Power supply circuit, ultrasonic flowmeter and power supply circuit control method

By using different voltages for transmitting and receiving transducers in the power circuit of the ultrasonic flowmeter, the problem of limited metering accuracy in the prior art is solved, and higher metering accuracy and lower power consumption are achieved.

CN119401818AInactive Publication Date: 2025-02-07TANCY INSTR GRP +1
View PDF 5 Cites 0 Cited by

Patent Information

Application Number
CN202411977335.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-31
Publication Date
2025-02-07
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

The transmitting and receiving transducers of existing ultrasonic flowmeters use the same supply voltage, resulting in limited metering accuracy because the optimal operating voltage of the transmitting and receiving transducers is different.

Method used

A power supply circuit is designed to output an excitation voltage and sampling voltage higher than the sampled state when the transducer is in the transmit state through the mode enable signal, which is used for the transmit transducer and the receive transducer, respectively.

Benefits of technology

By increasing the ultrasonic signal amplitude output by the transmit transducer, the interference of power supply noise on the sampling circuit is reduced, the signal-to-noise ratio of the sampling circuit is improved, thereby improving the metering accuracy of the flowmeter and reducing the power consumption of the power supply circuit.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119401818A_ABST
    Figure CN119401818A_ABST
Patent Text Reader

Abstract

The invention provides a power supply circuit, an ultrasonic flowmeter and a power supply circuit control method. The power supply circuit comprises a conversion module; the conversion module comprises a power supply chip and a mode unit; the power supply chip is used for receiving a power supply voltage and outputting a first voltage in a working state; the input end of the mode unit is connected with the power supply chip, and the output end of the mode unit is connected with the transducer; the mode unit is used for receiving a mode enable signal; according to the mode enable signal, the first voltage is converted into excitation voltage when the transducer is in a transmitting state, and the excitation voltage is output to the transducer; or, when the transducer is in the sampling state, the first voltage is converted into the sampling voltage, and the sampling voltage is output to the transducer; wherein the excitation voltage value is greater than the sampling voltage value. According to the circuit, different voltages can be provided for the transmitting transducer and the receiving transducer, and the metering precision of the flowmeter is improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present application relates to flow measurement technology, and in particular to a power supply circuit, an ultrasonic flow meter, and a power supply circuit control method. Background Art

[0002] Ultrasonic flowmeter is a non-contact flow measurement instrument with the advantages of high accuracy, good stability and easy operation. The principle of ultrasonic flowmeter is that the ultrasonic transmitting transducer converts electrical energy into ultrasonic energy and transmits it to the measured medium. The ultrasonic signal received by the receiving transducer is amplified by the electronic circuit and converted into an electrical signal to be supplied to the display and totalizing instrument for display and totalizing.

[0003] In the prior art, the transmitting transducer and the receiving transducer of the ultrasonic flowmeter generally use the same power supply voltage. However, since the actual optimal operating voltages of the transmitting transducer and the receiving transducer are different, the metering accuracy of the flowmeter is limited. Summary of the invention

[0004] The present application provides a power supply circuit, an ultrasonic flowmeter and a power supply circuit control method, which are used to provide different voltages for a transmitting transducer and a receiving transducer to improve the measurement accuracy of the flowmeter.

[0005] In one aspect, the present application provides a power supply circuit, comprising: a conversion module; the conversion module comprises: a power supply chip and a mode unit;

[0006] The power chip is used to receive the power supply voltage and output the first voltage in the working state;

[0007] The input end of the mode unit is connected to the power chip, and the output end of the mode unit is connected to the transducer; the mode unit is used to receive a mode enable signal; and, according to the mode enable signal, when the transducer is in a transmitting state, convert the first voltage into an excitation voltage, and output the excitation voltage to the transducer; or, when the transducer is in a sampling state, convert the first voltage into a sampling voltage, and output the sampling voltage to the transducer; wherein the excitation voltage value is greater than the sampling voltage value.

[0008] Optionally, the power chip includes a first transistor, and the power chip is provided with an input voltage pin, a feedback pin and a conversion pin;

[0009] The input voltage pin is used to receive the supply voltage; the feedback pin is used to output the first voltage.

[0010] Optionally, the mode unit includes: a first inductor, a diode, a first capacitor, a first resistor unit, a second resistor module, a third resistor module and a second transistor; wherein,

[0011] One end of the first inductor is connected to the input voltage pin of the power chip, and the other end of the first inductor is connected to the conversion pin of the power chip;

[0012] The positive electrode of the diode is connected to the conversion pin of the power chip, and the negative electrode of the diode is connected to one end of the first capacitor; the other end of the first capacitor is grounded;

[0013] One end of the first resistor unit is connected to one end of the first capacitor, and the other end of the first resistor unit is connected to a feedback pin of the power chip;

[0014] One end of the second resistance module is connected to the feedback pin of the power chip, the other end of the second resistance module is connected to one end of the third resistance module, and the other end of the third resistance module is grounded;

[0015] The input end of the second transistor is connected to the other end of the second resistor module, the output end of the second transistor is grounded, and the control end of the second transistor receives the mode enable signal.

[0016] Optionally, there are multiple first resistance units / second resistance units / third resistance units, the multiple first resistance units / second resistance units / third resistance units are connected in parallel, and each of the first resistance units / second resistance units / third resistance units includes a resistor and a switch connected in series.

[0017] Optionally, the mode unit further includes: a second capacitor;

[0018] One end of the second capacitor is connected to one end of the first resistor unit, and the other end of the second capacitor is connected to the other end of the first resistor unit.

[0019] Optionally, the circuit further includes: a power supply module;

[0020] The output end of the power module is connected to the power chip, and is used to provide a supply voltage to the power chip and control the power chip to work or not work.

[0021] Optionally, the power chip is further provided with an enable pin, and the power module comprises: a first enabling unit and a second enabling unit;

[0022] The first input end of the first enabling unit receives a power supply, the second input end of the first enabling unit receives a power enable signal, and the output end of the first enabling unit is connected to an input voltage pin of the power chip; the first enabling unit is used to output or not output the power supply voltage to the power chip according to the power enable signal;

[0023] The input end of the second enabling unit receives a working enable signal, and the output end of the second enabling unit is connected to the enable pin of the power chip; the second enabling unit is used to output an enable voltage to the power chip according to the working enable signal, so that the power chip switches to a working or standby state.

[0024] Optionally, the first enabling unit includes: a first resistor, a third transistor and a fourth transistor;

[0025] One end of the first resistor receives the power supply, and the other end of the first resistor is connected to the control end of the third transistor;

[0026] The input end of the third transistor is connected to one end of the first resistor, and the output end of the third transistor is connected to the input voltage pin of the power chip;

[0027] The input end of the fourth transistor is connected to the control end of the third transistor, and the output end of the fourth transistor is grounded; the control end of the fourth transistor receives the power enable signal.

[0028] Optionally, the first enabling unit further includes: a second resistor and a third resistor;

[0029] One end of the second resistor receives the power enable signal, and the other end of the second resistor is connected to the control end of the fourth transistor;

[0030] One end of the third resistor is connected to the control end of the fourth transistor, and the other end of the third resistor is grounded.

[0031] Optionally, the second enabling unit includes: a fourth resistor and a fifth resistor;

[0032] One end of the fourth resistor receives the work enable signal, and the other end of the fourth resistor is connected to the enable pin of the power chip;

[0033] One end of the fifth resistor is connected to the other end of the fourth resistor, and the other end of the fifth resistor is grounded.

[0034] Optionally, the circuit further includes: a filtering module;

[0035] The output end of the filter module is connected to the output end of the conversion module, and the output end of the filter module is connected to the transducer; the filter module is used to filter the excitation voltage or the sampling voltage.

[0036] Optionally, the filtering module includes: a third capacitor;

[0037] One end of the third capacitor is connected to the output end of the mode unit, and the other end of the third capacitor is grounded.

[0038] Optionally, the filtering module further includes: a second inductor and a fourth capacitor;

[0039] One end of the second inductor is connected to the output end of the mode unit, and the other end of the second inductor is connected to the transducer;

[0040] One end of the third capacitor is connected to the output end of the mode unit, and the other end of the third capacitor is grounded.

[0041] On the other hand, the present application provides an ultrasonic flow meter, comprising: the power supply circuit, a plurality of transducer pairs and a control module as described above;

[0042] The control module is connected to the power supply circuit and is used to control the power supply circuit to output an excitation voltage to a transmitting transducer in the corresponding transducer pair in each measurement cycle, and to control the power supply circuit to output a sampling voltage to a receiving transducer in the corresponding transducer pair.

[0043] In another aspect, the present application provides a power circuit control method, which is applied to the power circuit as described above, and the method comprises:

[0044] When the power chip is in working state, a receiving mode enable signal is sent to the mode unit, so that the mode unit outputs an excitation voltage to the excitation circuit of the transducer when the mode enable signal is enabled; or, when the mode enable signal is not enabled, outputs a sampling voltage to the sampling circuit of the transducer; wherein the excitation voltage value is greater than the sampling voltage value.

[0045] Optionally, the method further includes:

[0046] Sending a power enable signal to the first enabling unit, so that the first enabling unit outputs a power supply voltage to the power chip when the power enable signal is enabled; or does not output a power supply voltage to the power chip when the power enable signal is not enabled;

[0047] And, sending a work enable signal to the second enabling unit, so that the second enabling unit controls the power chip to switch to the working state when the power enable signal is enabled; or controls the power chip to switch to the standby state when the power enable signal is not enabled.

[0048] In the power supply circuit, ultrasonic flowmeter and power supply circuit control method provided by the present application, the power supply circuit converts the supply voltage to provide a working voltage for the transducer, and the voltage value of the excitation voltage output to the transmitting transducer is higher than the voltage value of the sampling voltage output to the receiving transducer, which can increase the amplitude of the ultrasonic signal output by the transmitting transducer and reduce the interference of the high-frequency broadband noise of the power supply to the sampling circuit, thereby effectively improving the signal-to-noise ratio of the ultrasonic signal collected by the sampling circuit, and thus effectively improving the metering accuracy of the flowmeter. At the same time, since the voltage value of the sampling voltage is low, the power consumption of the power supply circuit can be effectively reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0050] Figure 1 exemplarily shows a schematic diagram of the structure of the power supply circuit provided in an embodiment of the present application;

[0051] Figure 2 exemplarily shows a structural schematic diagram of another power supply circuit provided in an embodiment of the present application;

[0052] Figure 3 A signal timing diagram provided in an embodiment of the present application is exemplarily shown in FIG.

[0053] The following are the descriptions of the reference numerals:

[0054] 10- Power supply circuit;

[0055] 11- conversion module;

[0056] 111-mode unit;

[0057] 12-power module;

[0058] 121-a first enabling unit;

[0059] 122-second enabling unit;

[0060] 13- Filter module;

[0061] 20- transducer;

[0062] U1-power chip;

[0063] EN-enable pin;

[0064] FB-Feedback pin;

[0065] SW-switching pin;

[0066] VIN-input voltage pin;

[0067] C1-fifth capacitor;

[0068] C2-sixth capacitor;

[0069] C3-first capacitor;

[0070] C4-fourth capacitor;

[0071] C5-third capacitor;

[0072] C6-second capacitor;

[0073] D1 - diode;

[0074] L1-first inductor;

[0075] L2-second inductor;

[0076] Q1 - the third transistor;

[0077] Q2 - the fourth transistor;

[0078] Q3 - second transistor;

[0079] R1-first resistor;

[0080] R2-first resistance unit;

[0081] R3 - second resistor;

[0082] R4-the third resistor;

[0083] R5-second resistance unit;

[0084] R6-sixth resistor;

[0085] R7-third resistance unit;

[0086] R8-the fourth resistor;

[0087] R9-seventh resistor;

[0088] R10 - the fifth resistor.

[0089] The above drawings have shown clear embodiments of the present application, which will be described in more detail later. These drawings and text descriptions are not intended to limit the scope of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0090] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0091] The module in this application refers to a functional module or a logical module. It can be in software form, and its functions are realized by executing program code by a processor; it can also be in hardware form. "And / or" describes the association relationship of associated objects, indicating that three relationships can exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the related objects before and after are in an "or" relationship.

[0092] Ultrasonic flowmeter is a non-contact flow measurement instrument with the advantages of high accuracy, good stability and easy operation. The principle of ultrasonic flowmeter is that the ultrasonic transmitting transducer converts electrical energy into ultrasonic energy and transmits it to the measured medium. The ultrasonic signal received by the receiving transducer is amplified by the electronic circuit and converted into an electrical signal to be supplied to the display and totalizing instrument for display and totalizing.

[0093] In the prior art, the transmitting transducer and receiving transducer of an ultrasonic flow meter generally use the same power supply voltage. However, since the actual optimal operating voltages of the transmitting transducer and the receiving transducer are different, the optimal operating voltage of the excitation circuit of the transmitting transducer is higher than the optimal operating voltage of the sampling circuit of the receiving transducer, the metering accuracy of the flow meter is limited.

[0094] In order to solve the above technical problems, the power supply circuit provided in the embodiment of the present application outputs an excitation voltage to the transducer when the transducer is in the transmitting state, and outputs a sampling voltage to the transducer when the transducer is in the sampling state based on the mode enable signal; the excitation voltage value is greater than the sampling voltage value. In this way, the oscillation amplitude of the transmitting transducer can be enhanced, so that the amplitude of the ultrasonic signal output by the transmitting transducer is increased, and the interference of the high-frequency broadband noise of the power supply to the sampling circuit can be weakened, thereby effectively improving the signal-to-noise ratio of the ultrasonic signal collected by the sampling circuit, and thus the metering accuracy of the flow meter can be effectively improved.

[0095] The technical solution of the present application is illustrated below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0096] Figure 1 A schematic diagram of the structure of a power supply circuit provided in an embodiment of the present application. Figure 2This is a schematic diagram of another power supply circuit provided in an embodiment of the present application. Figure 1 and Figure 2 As shown, the power circuit 10 includes: a conversion module 11; the conversion module 11 includes: a power chip U1 and a mode unit 111;

[0097] The power chip U1 is used to receive the power supply voltage VCC1 and output the first voltage VFB in the working state;

[0098] The input end of the mode unit 111 is connected to the power chip U1, and the output end of the mode unit 111 is connected to the transducer 20; the mode unit 111 is used to receive a mode enable signal HV-Enable; and, according to the mode enable signal HV-Enable, when the transducer 20 is in a transmitting state, convert the first voltage VFB into an excitation voltage, and output the excitation voltage to the transducer 20; or, when the transducer 20 is in a sampling state, convert the first voltage VFB into a sampling voltage, and output the sampling voltage to the transducer 20; wherein the excitation voltage value is greater than the sampling voltage value.

[0099] In a specific implementation, the power chip U1 and the mode unit 111 constitute a voltage regulating circuit, which can convert the power supply voltage VCC1 into the working voltage of the transducer 20. The power chip U1 receives the power supply voltage VCC1, and the power chip U1 outputs the first voltage VFB in the working state. The mode unit 111 receives the first voltage VFB and the mode enable signal HV-Enable, and converts the first voltage VFB into an excitation voltage and outputs it to the transducer 20 when the transducer 20 is in the transmitting state; or, when the transducer 20 is in the sampling state, converts the first voltage VFB into a sampling voltage and outputs it to the transducer 20; wherein the excitation voltage value is greater than the sampling voltage value.

[0100] It can be understood that the mode unit 111 outputting the excitation voltage to the transducer 20 may include outputting the excitation voltage to the excitation circuit of the transducer 20 ; and outputting the sampling voltage to the transducer 20 may include outputting the sampling voltage to the sampling circuit of the transducer 20 .

[0101] Exemplarily, when the mode enable signal HV-Enable is enabled, the mode unit 111 outputs an excitation voltage to the transducer 20 ; when the mode enable signal HV-Enable is not enabled, the mode unit 111 outputs a sampling voltage to the transducer 20 .

[0102] In practical applications, other voltage regulating circuits may be provided between the mode unit 111 and the transducer 20 , so as to perform multi-level voltage regulation on the voltage output to the transducer 20 .

[0103] In the embodiment of the present application, the power supply circuit converts the supply voltage to provide a working voltage for the transducer, and the voltage value of the excitation voltage output to the transmitting transducer is higher than the voltage value of the sampling voltage output to the receiving transducer, which can increase the amplitude of the ultrasonic signal output by the transmitting transducer and reduce the interference of the high-frequency broadband noise of the power supply to the sampling circuit, thereby effectively improving the signal-to-noise ratio of the ultrasonic signal collected by the sampling circuit, and thus effectively improving the metering accuracy of the flowmeter. At the same time, since the voltage value of the sampling voltage is relatively low, the power consumption of the power supply circuit can be effectively reduced. In particular, for flowmeters with large calibers and a large number of transducers, the circuit power consumption can be significantly reduced.

[0104] In a possible implementation, the power chip U1 includes a first transistor, and the power chip U1 is provided with an input voltage pin VIN, a ground pin GND, a feedback pin FB and a conversion pin SW;

[0105] The input voltage pin VIN is used to receive the power supply voltage VCC1 ; the feedback pin FB is used to output the first voltage VFB.

[0106] In a specific implementation, after the power chip U1 receives the power supply voltage VCC1 through the input voltage pin VIN, it outputs the first voltage VFB through the feedback pin FB in the working state. The ground pin GND of the power chip U1 is grounded.

[0107] In a possible implementation, the mode unit 111 includes: a first inductor L1, a diode D1, a first capacitor C3, a first resistor unit R2, a second resistor unit R5, a third resistor unit R7, and a second transistor Q3; wherein,

[0108] One end of the first inductor L1 is connected to the input voltage pin VIN of the power chip U1, and the other end of the first inductor L1 is connected to the switching pin SW of the power chip U1;

[0109] The anode of the diode D1 is connected to the conversion pin SW of the power chip U1, and the cathode of the diode D1 is connected to one end of the first capacitor C3; the other end of the first capacitor C3 is grounded;

[0110] One end of the first resistor unit R2 is connected to one end of the first capacitor C3, and the other end of the first resistor unit R2 is connected to the feedback pin FB of the power chip;

[0111] One end of the second resistor unit R5 is connected to the feedback pin FB of the power chip U1, the other end of the second resistor unit R5 is connected to one end of the third resistor unit R7, and the other end of the third resistor unit R7 is grounded;

[0112] An input end of the second transistor Q3 is connected to the other end of the second resistor unit R5 , an output end of the second transistor Q3 is grounded, and a control end of the second transistor Q3 receives a mode enable signal HV-Enable.

[0113] In a specific implementation, the power chip U1 and the mode unit 111 together form a boost voltage regulation circuit. The first transistor inside the power chip U1 receives a control signal, such as a pulse width modulation signal PWM. When the first transistor is in the on state, the polarity of the voltage across the first inductor L1 is positive on the left and negative on the right. As time increases, the current in the first inductor L1 continues to increase, the diode D1 is reversely cut off, and the first capacitor C3 discharges to the first resistor unit R2. When the first transistor is in the off state, the polarity of the voltage across the first inductor L1 is negative on the left and positive on the right, the diode D1 is turned on, the first inductor L1 is discharged, and the first capacitor C3 is in a charging state.

[0114] When the mode enable signal HV-Enable is enabled, the second transistor Q3 works, and the third resistor unit R7 is short-circuited. At this time, the voltage VCC2 output by the mode unit 111 is the excitation voltage, and its value is VCC2 = (1+R2 / R5)×VFB. When the mode enable signal HV-Enable is not enabled, the second transistor Q3 does not work, and the second resistor unit R5 and the third resistor unit R7 are connected in series as a feedback path. At this time, the voltage VCC2 output by the mode unit 111 is the sampling voltage, and its value is VCC2 = [1+R2 / (R5+R7)]×VFB. Therefore, the voltage value of the excitation voltage is greater than the voltage value of the sampling voltage. The excitation voltage and the sampling voltage can be adjusted by adjusting the second resistor unit R5, the third resistor unit R7 and the first voltage VFB.

[0115] Among them, a sixth resistor R6 can be connected in series between the control end of the second transistor Q3 and the mode enable signal HV-Enable, and a grounded seventh resistor R9 can also be provided at the control end of the second transistor Q3. The sixth resistor R6 serves as a pull-down resistor, and the seventh resistor R9 serves as a current limiting resistor, which can effectively protect the circuit.

[0116] Furthermore, the excitation voltage and sampling voltage of multiple gears can be provided by adjusting the resistance values ​​of the second resistance unit R5 and the third resistance unit R7. In a possible implementation, there are multiple first resistance units R2 / second resistance units R5 / third resistance units R7, and the multiple first resistance units R2 / second resistance units R5 / third resistance units R7 are connected in parallel, and each first resistance unit R2 / second resistance unit R5 / third resistance unit R7 includes a resistor and a switch connected in series.

[0117] In a specific implementation, there may be a plurality of second resistor units R5, which are connected in parallel, and each second resistor unit R5 includes a resistor and a switch connected in series. Therefore, the number of second resistor units R5 actually connected in parallel can be controlled by controlling the second resistor unit R5 switch to be turned on or off, thereby adjusting the overall resistance value of the plurality of second resistor units R5 connected in parallel, thereby adjusting the excitation voltage and the sampling voltage, and effectively improving the flexibility of the power supply circuit. The first resistor unit R2 and the third resistor unit R7 are similar, and will not be described in detail here.

[0118] In a possible implementation, the mode unit 111 further includes: a second capacitor C6;

[0119] One end of the second capacitor C6 is connected to one end of the first resistor unit R2 , and the other end of the second capacitor C6 is connected to the other end of the first resistor unit R2 .

[0120] In a specific implementation, the second capacitor C6 plays the role of a feed-forward capacitor, and the conversion module 11 can respond to high-frequency disturbances more efficiently, improve the gain, phase and dynamic characteristics of the circuit, and thus effectively improve the stability and reliability of the circuit.

[0121] In a possible implementation, the power circuit 10 further includes: a power module 12;

[0122] The output end of the power module 12 is connected to the power chip U1 , and is used to provide a power supply voltage VCC1 for the power chip U1 , and control the power chip U1 to work or not work.

[0123] In a specific implementation, the power module 12 may be provided to supply power to the power chip U1 and control the state of the power chip.

[0124] In a possible implementation, the power chip U1 is further provided with an enable pin EN, and the power module 12 includes: a first enabling unit 121 and a second enabling unit 122;

[0125] The first input end of the first enabling unit 121 receives the power supply VCC_IN, the second input end of the first enabling unit 121 receives the power enable signal VCC-Enable, and the output end of the first enabling unit 121 is connected to the input voltage pin VIN of the power chip U1; the first enabling unit 121 is used to output or not output the power supply voltage VCC1 to the power chip U1 according to the power enable signal VCC-Enable;

[0126] The input end of the second enabling unit 122 receives the work enable signal IC-Enable, and the output end of the second enabling unit 122 is connected to the enable pin EN of the power chip U1; the second enabling unit 122 is used to output an enable voltage to the power chip U1 according to the work enable signal IC-Enable, so that the power chip U1 switches to the working or standby state. The standby state is a process that is performed when the time of the non-operation metering process reaches the relevant requirements, which can minimize the power consumption of the jump power management circuit.

[0127] In a specific implementation, the first enabling unit 121 receives a power supply VCC_IN and a power enable signal VCC-Enable, and according to the power enable signal VCC-Enable, the first enabling unit 121 outputs or does not output a power supply voltage VCC1 to an input voltage pin VIN of the power chip U1, wherein the power chip U1 does not work when there is no power supply voltage VCC1 input.

[0128] The input end of the second enabling unit 122 receives the work enable signal IC-Enable, and outputs an enable voltage to the power chip U1 according to the work enable signal IC-Enable. When the power chip U1 has the power supply voltage VCC1 input, it switches to the working or standby state according to the enable voltage. Whether to supply power to the power chip U1 is controlled by the first enabling unit 121, and the power chip U1 is controlled to switch to the working or standby state by the second enabling unit 122, so that effective control of the power chip U1 can be achieved.

[0129] Exemplarily, the first enabling unit 121 includes: a first resistor R1, a third transistor Q1 and a fourth transistor Q2;

[0130] One end of the first resistor R1 receives the power supply VCC_IN, and the other end of the first resistor R1 is connected to the control end of the third transistor Q1;

[0131] An input end of the third transistor Q1 is connected to one end of the first resistor R1, and an output end of the third transistor Q1 is connected to an input voltage pin VIN of the power chip U1;

[0132] An input terminal of the fourth transistor Q2 is connected to the control terminal of the third transistor Q1 , and an output terminal of the fourth transistor Q2 is grounded; and the control terminal of the fourth transistor Q2 receives a power enable signal VCC-Enable.

[0133] Specifically, the third transistor Q1 is turned on at a low level and the fourth transistor Q2 is turned on at a high level as an example. When the power enable signal VCC-Enable is at a low level, the fourth transistor Q2 is in a disconnected state, so the control end of the third transistor Q1 receives a high level, and the third transistor Q1 is disconnected, so there is no voltage input to the power chip U1, and the power chip U1 does not work. When the power enable signal VCC-Enable is at a high level, the fourth transistor Q2 is in a conductive state, so the control end of the third transistor Q1 receives a low level, the third transistor Q1 is turned on, and the input voltage pin VIN of the power chip U1 receives the power supply voltage VCC1. Among them, a fifth capacitor C1 can also be set at one end of the first resistor R1, and a sixth capacitor C2 can be set at the output end of the third transistor Q1 to filter the power supply voltage VCC1 output by the first enabling unit 121, thereby improving the quality of power supply to the power chip U1.

[0134] Exemplarily, the first enabling unit 121 further includes: a second resistor R3 and a third resistor R4;

[0135] One end of the second resistor R3 receives the power enable signal VCC-Enable, and the other end of the second resistor R3 is connected to the control end of the fourth transistor Q2;

[0136] One end of the third resistor R4 is connected to the control end of the fourth transistor Q2, and the other end of the third resistor R4 is grounded.

[0137] In a specific implementation, the second resistor R3 is used as a current limiting resistor, and the third resistor R4 is used as a pull-down resistor, which can protect the fourth transistor Q2 and effectively increase the reliability of the circuit.

[0138] Exemplarily, the second enabling unit 122 includes: a fourth resistor R8 and a fifth resistor R10;

[0139] One end of the fourth resistor R8 receives the work enable signal IC-Enable, and the other end of the fourth resistor R8 is connected to the enable pin EN of the power chip U1;

[0140] One end of the fifth resistor R10 is connected to the other end of the fourth resistor R8 , and the other end of the fifth resistor R10 is grounded.

[0141] Based on the above example, when the power enable signal VCC-Enable is turned on at a high level, the input voltage pin VIN of the power chip U1 receives the supply voltage VCC1. When the work enable signal IC-Enable is enabled, the power chip U1 enters the working state; when the work enable signal IC-Enable is not enabled, the power chip U1 enters the standby state.

[0142] The voltage of the enable pin EN of the input power chip U1 is buffered by the fourth resistor R8 and the fifth resistor R10, thereby effectively protecting the circuit.

[0143] In a possible implementation, the power supply circuit 10 further includes: a filtering module 13;

[0144] The output end of the filter module 13 is connected to the output end of the conversion module 11 , and the output end of the filter module 13 is connected to the transducer 20 ; the filter module 13 is used to filter the excitation voltage or the sampling voltage.

[0145] In a specific implementation, a filter module 13 can be set between the conversion module 11 and the transducer 20 to filter the voltage VCC2 output by the conversion module 11 and provide a filtered output voltage PWR_OUT to the transducer 20, thereby effectively improving the quality of power supply to the transducer 20 and facilitating improving the metering accuracy of the flow meter.

[0146] Exemplarily, the filtering module 13 further includes: a third capacitor C5;

[0147] One end of the third capacitor C5 is connected to the output end of the mode unit 111 , and the other end of the third capacitor C5 is grounded.

[0148] In a specific implementation, a third capacitor C5 may be provided at the output end of the mode unit 111 to filter the voltage VCC2 output to the transducer 20 .

[0149] Exemplarily, the filter module 13 further includes: a second inductor L2 and a fourth capacitor C4;

[0150] One end of the second inductor L2 is connected to the output end of the mode unit 111, and the other end of the second inductor L2 is connected to the transducer 20;

[0151] One end of the fourth capacitor C4 is connected to the transducer 20 , and the other end of the fourth capacitor C4 is grounded.

[0152] In a specific implementation, the third capacitor C5 , the second inductor L2 , and the fourth capacitor C4 form a CLC filter, which can effectively filter the voltage VCC2 output to the transducer 20 .

[0153] Optionally, the second inductor L2 may be replaced by a resistor to form a CRC filter.

[0154] The embodiment of the present application also provides an ultrasonic flow meter, including the power supply circuit as described above, a plurality of transducer pairs and a control module;

[0155] The control module is connected to the power supply circuit and is used to control the power supply circuit to output an excitation voltage to the transmitting transducer in the corresponding transducer pair in each measurement cycle, and to control the power supply circuit to output a sampling voltage to the receiving transducer in the corresponding transducer pair.

[0156] In a specific implementation, the control module can control the power supply circuit by enabling the mode enable signal, the power enable signal, and the work enable signal output to the power supply circuit. Figure 3 A signal timing diagram provided in an embodiment of the present application. Figure 3 As shown, when the flow meter is powered on for the first time or the device is actively reset, the control module configures the power enable signal to enable, so that the power chip U1 has voltage input, and the power circuit is initialized at this time. During the signal acquisition process, the transmitting transducer sends an ultrasonic signal, and the receiving transducer receives the ultrasonic signal. The control module sets the power enable signal and the configuration work enable signal to enable, and the power chip U1 is in a working state. Among them, the signal collection process is related to the actual number of transducer channels and can be divided into multiple measurement cycles. In each measurement cycle, one of the transducers of a transducer pair (transducer channel) acts as a transmitting transducer to send an ultrasonic signal, and the other transducer acts as a receiving transducer for sampling. Therefore, in each measurement cycle, the control module first configures the mode enable signal to enable, so that the voltage PWR_OUT output by the control power circuit to the transmitting transducer in the corresponding transducer pair is the excitation voltage; then the mode enable signal is configured to be disabled, and the voltage PWR_OUT output by the control power circuit to the receiving transducer in the corresponding transducer pair is the sampling voltage.

[0157] The ultrasonic flowmeter may also include a processing module. After the processing module completes signal acquisition, it can process and analyze the acquired signal to obtain the flow measurement result. When the flowmeter does not measure the flow for a certain period of time, the control module first sets the mode enable signal and the configuration work enable signal to be disabled, and the power supply circuit enters the standby state.

[0158] It should be noted that in actual applications, signal collection can be completed before signal processing, or signal processing can be performed after completing signal collection for a predetermined number of measurement cycles, for example, completing signal collection for one measurement cycle and then performing signal processing; or completing signal collection for three cycles and then performing signal processing. It can be set according to the actual flow meter caliber, the number of transducer channels configured, the processing module algorithm scheme, the metering accuracy, and the power consumption. For example, when the flow meter caliber is large or the number of transducer channels configured is large, the signal collection process and the signal processing and analysis process are long, so signal processing can be performed after completing signal collection for each predetermined number of measurement cycles; when the processing module algorithm scheme is more efficient, all signal collection can be completed before signal processing.

[0159] The embodiment of the present application also provides a power circuit control method, which is applied to the power circuit as described above. The execution subject of the method may be the control module as described above, and the method includes:

[0160] When the power chip is in working state, a receiving mode enable signal is sent to the mode unit, so that the mode unit outputs an excitation voltage to the excitation circuit of the transducer when the mode enable signal is enabled; or, when the mode enable signal is not enabled, outputs a sampling voltage to the sampling circuit of the transducer; wherein the excitation voltage value is greater than the sampling voltage value.

[0161] In a possible implementation, the method further includes:

[0162] Sending a power enable signal to the first enabling unit, so that the first enabling unit outputs a power supply voltage to the power chip when the power enable signal is enabled; or does not output a power supply voltage to the power chip when the power enable signal is not enabled;

[0163] And, a work enable signal is sent to the second enabling unit, so that the second enabling unit controls the power chip to switch to the working state when the power enable signal is enabled; or controls the power chip to switch to the standby state when the power enable signal is not enabled.

[0164] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the invention disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary techniques in the art that are not disclosed in the present application. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the following claims.

[0165] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. A power supply circuit, characterized in that: include: Conversion module; The conversion module includes: a power chip and a mode unit; The power chip is used to receive the power supply voltage and output the first voltage in the working state; The input end of the mode unit is connected to the power chip, and the output end of the mode unit is connected to the transducer; the mode unit is used to receive a mode enable signal; and, according to the mode enable signal, when the transducer is in a transmitting state, convert the first voltage into an excitation voltage, and output the excitation voltage to the transducer; or, when the transducer is in a sampling state, convert the first voltage into a sampling voltage, and output the sampling voltage to the transducer; wherein the excitation voltage value is greater than the sampling voltage value.

2. The circuit according to claim 1, characterized in that The power chip includes a first transistor, and the power chip is provided with an input voltage pin, a feedback pin and a conversion pin; the mode unit includes: a first inductor, a diode, a first capacitor, a first resistor unit, a second resistor module, a third resistor module and a second transistor; wherein, The input voltage pin is used to receive the supply voltage; the feedback pin is used to output the first voltage; One end of the first inductor is connected to the input voltage pin of the power chip, and the other end of the first inductor is connected to the conversion pin of the power chip; The positive electrode of the diode is connected to the conversion pin of the power chip, and the negative electrode of the diode is connected to one end of the first capacitor; the other end of the first capacitor is grounded; One end of the first resistor unit is connected to one end of the first capacitor, and the other end of the first resistor unit is connected to a feedback pin of the power chip; One end of the second resistance module is connected to the feedback pin of the power chip, the other end of the second resistance module is connected to one end of the third resistance module, and the other end of the third resistance module is grounded; The input end of the second transistor is connected to the other end of the second resistor module, the output end of the second transistor is grounded, and the control end of the second transistor receives the mode enable signal.

3. The circuit according to claim 2, characterized in that The mode unit further includes: a second capacitor; One end of the second capacitor is connected to one end of the first resistor unit, and the other end of the second capacitor is connected to the other end of the first resistor unit.

4. The circuit according to claim 2, characterized in that The circuit further comprises: a power supply module; The output end of the power module is connected to the power chip, and is used to provide a supply voltage to the power chip and control the power chip to work or not work.

5. The circuit according to claim 4, characterized in that The power chip is also provided with an enabling pin, and the power module comprises: a first enabling unit and a second enabling unit; The first input end of the first enabling unit receives a power supply, the second input end of the first enabling unit receives a power enable signal, and the output end of the first enabling unit is connected to an input voltage pin of the power chip; the first enabling unit is used to output or not output the power supply voltage to the power chip according to the power enable signal; The input end of the second enabling unit receives a working enable signal, and the output end of the second enabling unit is connected to the enable pin of the power chip; the second enabling unit is used to output an enable voltage to the power chip according to the working enable signal, so that the power chip switches to a working or standby state.

6. The circuit according to claim 5, characterized in that The first enabling unit includes: a first resistor, a third transistor and a fourth transistor; One end of the first resistor receives the power supply, and the other end of the first resistor is connected to the control end of the third transistor; The input end of the third transistor is connected to one end of the first resistor, and the output end of the third transistor is connected to the input voltage pin of the power chip; The input end of the fourth transistor is connected to the control end of the third transistor, and the output end of the fourth transistor is grounded; the control end of the fourth transistor receives the power enable signal.

7. The circuit according to claim 6, characterized in that The first enabling unit further includes: a second resistor and a third resistor; One end of the second resistor receives the power enable signal, and the other end of the second resistor is connected to the control end of the fourth transistor; One end of the third resistor is connected to the control end of the fourth transistor, and the other end of the third resistor is grounded.

8. The circuit according to claim 5, characterized in that The second enabling unit includes: a fourth resistor and a fifth resistor; One end of the fourth resistor receives the work enable signal, and the other end of the fourth resistor is connected to the enable pin of the power chip; One end of the fifth resistor is connected to the other end of the fourth resistor, and the other end of the fifth resistor is grounded.

9. The circuit according to any one of claims 1 to 8, characterized in that: The circuit further comprises: a filtering module; The output end of the filter module is connected to the output end of the conversion module, and the output end of the filter module is connected to the transducer; the filter module is used to filter the excitation voltage or the sampling voltage.

10. The circuit according to claim 9, characterized in that The filtering module includes: a third capacitor; One end of the third capacitor is connected to the output end of the mode unit, and the other end of the third capacitor is grounded.

11. The circuit according to claim 10, characterized in that The filtering module further includes: a second inductor and a fourth capacitor; One end of the second inductor is connected to the output end of the mode unit, and the other end of the second inductor is connected to the transducer; One end of the third capacitor is connected to the output end of the mode unit, and the other end of the third capacitor is grounded.

12. An ultrasonic flow meter, characterized in that: include: The power supply circuit, multiple transducer pairs and control module according to any one of claims 1 to 10; The control module is connected to the power supply circuit and is used to control the power supply circuit to output an excitation voltage to a transmitting transducer in the corresponding transducer pair in each measurement cycle, and to control the power supply circuit to output a sampling voltage to a receiving transducer in the corresponding transducer pair.

13. A power circuit control method, characterized in that: Applied to the power supply circuit according to any one of claims 1 to 10, the method comprising: When the power chip is in working state, a receiving mode enable signal is sent to the mode unit, so that the mode unit outputs an excitation voltage to the excitation circuit of the transducer when the mode enable signal is enabled; or, when the mode enable signal is not enabled, outputs a sampling voltage to the sampling circuit of the transducer; wherein the excitation voltage value is greater than the sampling voltage value.

14. The method according to claim 13, characterized in that The method further comprises: Sending a power enable signal to the first enabling unit, so that the first enabling unit outputs a power supply voltage to the power chip when the power enable signal is enabled; or does not output a power supply voltage to the power chip when the power enable signal is not enabled; And, sending a work enable signal to the second enabling unit, so that the second enabling unit controls the power chip to switch to the working state when the power enable signal is enabled; or controls the power chip to switch to the standby state when the power enable signal is not enabled.

Citation Information

Patent Citations

  • Ultrasonic flowmeter device

    CN114235064A

  • Transducer driving circuit and ultrasonic flowmeter comprising same

    CN116182968A

  • Boost circuit of portable cosmetic instrument

    CN201928189U

  • Energy-saving power supply circuit for underwater acoustic buoy and underwater acoustic buoy device

    CN221995300U

  • Power switching circuit and ultrasonic transmitting circuit

    CN222089457U