Clock tree synthesis method and device, equipment and storage medium

Abstract

The invention provides a clock tree synthesis method and device, equipment and a storage medium, and the method comprises the steps: building a characterization database according to a plurality of preset line load models, each line load model is used for representing a connection mode of a connection line, a load and a driver, the characterization database comprises a plurality of pieces of combination information, each piece of combination information is respectively used for indicating delay information of each line load model under different line lengths, loads and drive combinations, constructing an initial clock tree structure, and carrying out optimization processing on a path in the initial clock tree structure according to the characterization database to obtain a target clock tree structure. According to the method and the device, the clock tree structure can be automatically optimized, the labor cost and the time cost of clock tree customization are reduced, and the efficiency of the step of clock tree synthesis is improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a clock tree synthesis method, device, equipment and storage medium. Background Art

[0002] Clock signals are crucial in digital integrated circuit design, affecting the function, performance, and stability of the system. Since clock signals have the characteristics of large fan-out, long-distance transmission, and high speed, clock tree synthesis is required separately in the design process to ensure system synchronization.

[0003] In the prior art, when performing clock tree synthesis, the optimal design solution is usually determined and the clock tree is manually customized by trying different combinations of drive units, winding lengths, and rules.

[0004] However, manually customizing the clock tree is time-consuming and labor-intensive, and after the layout plan of the chip is changed, the clock tree may need to be manually customized again, which consumes a lot of time and energy and affects the efficiency of chip design. Summary of the invention

[0005] The purpose of this application is to provide a clock tree synthesis method, device, equipment and storage medium to address the deficiencies in the above-mentioned prior art, so as to solve the problem that manual customization of clock trees in the prior art consumes time and manpower, affecting chip design efficiency.

[0006] To achieve the above objectives, the technical solutions adopted in this application are as follows:

[0007] In a first aspect, the present application provides a clock tree synthesis method, the method comprising:

[0008] A characterization database is established according to a plurality of preset line load models, each of which is used to characterize a connection mode of a connection line, a load, and a drive, and the characterization database includes a plurality of combination information, each of which is used to indicate the delay information of each line load model under different line length, load, and drive combinations;

[0009] Build the initial clock tree structure;

[0010] The paths in the initial clock tree structure are optimized according to the characterization database to obtain a target clock tree structure.

[0011] As a possible implementation, establishing a characterization database according to a plurality of preset line load models includes:

[0012] A simulation circuit is established according to each of the line load models, and simulation results of the simulation circuit under multiple simulation conditions are obtained, wherein the simulation conditions at least include: line length;

[0013] Statistical processing is performed on each of the simulation results to obtain the characterization database.

[0014] As a possible implementation manner, the optimizing the paths in the initial clock tree structure according to the characterization database to obtain the target clock tree structure includes:

[0015] Constructing an initial clock tree diagram corresponding to the initial clock tree structure, wherein the initial clock tree diagram is used to describe the connection direction and path information between nodes in the initial clock tree structure;

[0016] Determine at least one first path to be optimized and / or at least one second path to be optimized in the initial clock tree structure according to the initial clock tree diagram, wherein the first path to be optimized is a path whose line direction is changed, and the second path to be optimized is a path whose line direction is not changed;

[0017] Each of the first paths to be optimized and / or each of the second paths to be optimized is optimized according to the characterization database to obtain a target clock tree structure.

[0018] As a possible implementation manner, determining at least one first path to be optimized and / or at least one second path to be optimized in the initial clock tree structure according to the initial clock tree diagram includes:

[0019] Determine a coordinate difference of each node combination in the initial clock tree diagram, wherein the node combination includes two connected nodes in the initial clock tree diagram;

[0020] If the node combination includes an anchor point, and the coordinate difference indicates that the connection direction of the node combination has changed, then a path corresponding to the connection of the node combination in the initial clock tree structure is used as a first path to be optimized;

[0021] If the node combination does not include an anchor point, and the coordinate difference indicates that the connection direction of the node combination has not changed, the path corresponding to the connection of the node combination in the initial clock tree structure is taken as a second path to be optimized.

[0022] As a possible implementation manner, the optimizing each of the first paths to be optimized and / or each of the second paths to be optimized according to the characterization database includes:

[0023] Matching each of the first paths to be optimized in the characterization database to obtain at least one combination of information corresponding to each of the first paths to be optimized;

[0024] Performing optimization processing according to at least one combination of information corresponding to each of the first paths to be optimized;

[0025] Matching each of the second paths to be optimized in the characterization database to obtain target combination information corresponding to each of the second paths to be optimized;

[0026] Optimization processing is performed according to the target combination information corresponding to each of the second paths to be optimized.

[0027] As a possible implementation manner, the performing optimization processing according to at least one combination of information corresponding to each of the first paths to be optimized includes:

[0028] Determining the usage quantity of the combination indicated by each combination information according to the line length of each first path to be optimized and the line length indicated by each combination information;

[0029] Optimization processing is performed according to each of the first paths to be optimized, each of the combination information, and the usage quantity of the combination indicated by each of the combination information.

[0030] As a possible implementation manner, the direction of the first path to be optimized includes: a horizontal direction to a vertical direction;

[0031] The matching of each of the first paths to be optimized in the characterization database to obtain at least one combination information corresponding to each of the first paths to be optimized includes:

[0032] If the first path to be optimized is from horizontal to vertical, matching the horizontal path in the first path to be optimized in the characterization database to obtain at least one combination information corresponding to the horizontal path in the first path to be optimized;

[0033] The determining, according to the line length of each first path to be optimized and the line length indicated by each combination information, the usage quantity of the combination indicated by each combination information includes:

[0034] The usage quantity of the combination indicated by each piece of the combination information is determined according to the line length of the horizontal path in the first path to be optimized and the line length indicated by each piece of the combination information.

[0035] As a possible implementation manner, the direction of the first path to be optimized includes: a vertical direction to a horizontal direction;

[0036] The matching the first path to be optimized in the characterization database to obtain at least one line load model corresponding to the first path to be optimized includes:

[0037] If the first path to be optimized is from a vertical direction to a horizontal direction, matching the vertical path in the first path to be optimized in the characterization database to obtain at least one combination information corresponding to the vertical path in the first path to be optimized;

[0038] The determining, according to the line length of each first path to be optimized and the line length indicated by each combination information, the usage quantity of the combination indicated by each combination information includes:

[0039] The usage quantity of the combination indicated by each piece of the combination information is determined according to the line length of the vertical path in the first path to be optimized and the line length indicated by each piece of the combination information.

[0040] As a possible implementation manner, determining the number of combinations indicated by each combination information according to the line length of the vertical path in the first path to be optimized and the line length indicated by each combination information includes:

[0041] determining an initial amount of the combination information according to the line length of the vertical path and the line length indicated by the combination information;

[0042] determining a product of the initial number and the line length indicated by the combination information;

[0043] If the difference between the product and the line length of the vertical path satisfies a first preset condition, performing a reduction process on the combination indicated by the last combination information on the vertical path;

[0044] If the difference between the product and the line length of the vertical path meets the second preset condition, the combination indicated by the last combination information on the vertical path is removed, and one of the combinations indicated by the combination information whose connection direction is vertical to horizontal, vertical or horizontal is determined as the last combination in the vertical path.

[0045] As a possible implementation manner, the performing optimization processing according to the first path to be optimized, each piece of combination information, and the number of used combinations indicated by each piece of combination information includes:

[0046] Determine at least one available combination information from each of the combination information based on the delay information of each of the combination information;

[0047] Determine, based on the line load model to which each of the available combination information belongs and the line load model corresponding to the first path to be optimized, a target position of the combination indicated by each of the combination information on the first path to be optimized;

[0048] The combinations indicated by each combination information are inserted into the target position corresponding to the first path to be optimized according to the usage quantity of the combinations indicated by each combination information.

[0049] As a possible implementation manner, the performing optimization processing according to the target combination information corresponding to each of the second paths to be optimized includes:

[0050] Determining the usage quantity of the combination indicated by the target combination information according to the line length of the second path to be optimized and the maximum driving line length of the target combination information;

[0051] Optimization processing is performed according to each of the second paths to be optimized, each of the target combination information, and the usage quantity of the combination indicated by each of the target combination information.

[0052] In a second aspect, the present application provides a clock tree synthesis device, the device comprising:

[0053] A database establishment module, used to establish a characterization database according to a plurality of preset line load models, each of which is used to characterize a connection mode of a connection line, a load, and a drive, and the characterization database includes a plurality of combination information, each of which is used to indicate the delay information of each line load model under different line length, load, and drive combinations;

[0054] A clock tree construction module, used to construct an initial clock tree structure;

[0055] The optimization processing module is used to optimize the paths in the initial clock tree structure according to the characterization database to obtain a target clock tree structure.

[0056] As a possible implementation, the database establishment module is specifically used for:

[0057] A simulation circuit is established according to each of the line load models, and simulation results of the simulation circuit under multiple simulation conditions are obtained, wherein the simulation conditions at least include: line length;

[0058] Statistical processing is performed on each of the simulation results to obtain the characterization database.

[0059] As a possible implementation manner, the optimization processing module is specifically used for:

[0060] Constructing an initial clock tree diagram corresponding to the initial clock tree structure, wherein the initial clock tree diagram is used to describe the connection direction and path information between nodes in the initial clock tree structure;

[0061] Determine at least one first path to be optimized and / or at least one second path to be optimized in the initial clock tree structure according to the initial clock tree diagram, wherein the first path to be optimized is a path whose line direction is changed, and the second path to be optimized is a path whose line direction is not changed;

[0062] Each of the first paths to be optimized and / or each of the second paths to be optimized is optimized according to the characterization database to obtain a target clock tree structure.

[0063] As a possible implementation manner, the optimization processing module is specifically used for:

[0064] Determine a coordinate difference of each node combination in the initial clock tree diagram, wherein the node combination includes two connected nodes in the initial clock tree diagram;

[0065] If the node combination includes an anchor point, and the coordinate difference indicates that the connection direction of the node combination has changed, then a path corresponding to the connection of the node combination in the initial clock tree structure is used as a first path to be optimized;

[0066] If the node combination does not include an anchor point, and the coordinate difference indicates that the connection direction of the node combination has not changed, the path corresponding to the connection of the node combination in the initial clock tree structure is taken as a second path to be optimized.

[0067] As a possible implementation manner, the optimization processing module is specifically used for:

[0068] Matching each of the first paths to be optimized in the characterization database to obtain at least one combination of information corresponding to each of the first paths to be optimized;

[0069] Performing optimization processing according to at least one combination of information corresponding to each of the first paths to be optimized;

[0070] Matching each of the second paths to be optimized in the characterization database to obtain target combination information corresponding to each of the second paths to be optimized;

[0071] Optimization processing is performed according to the target combination information corresponding to each of the second paths to be optimized.

[0072] As a possible implementation manner, the optimization processing module is specifically used for:

[0073] Determining the usage quantity of the combination indicated by each combination information according to the line length of each first path to be optimized and the line length indicated by each combination information;

[0074] Optimization processing is performed according to each of the first paths to be optimized, each of the combination information, and the usage quantity of the combination indicated by each of the combination information.

[0075] As a possible implementation manner, the direction of the first path to be optimized includes: a horizontal direction to a vertical direction;

[0076] The optimization processing module is specifically used for:

[0077] If the first path to be optimized is from horizontal to vertical, matching the horizontal path in the first path to be optimized in the characterization database to obtain at least one combination information corresponding to the horizontal path in the first path to be optimized;

[0078] The optimization processing module is specifically used for:

[0079] The usage quantity of the combination indicated by each piece of the combination information is determined according to the line length of the horizontal path in the first path to be optimized and the line length indicated by each piece of the combination information.

[0080] As a possible implementation manner, the direction of the first path to be optimized includes: a vertical direction to a horizontal direction;

[0081] The optimization processing module is specifically used for:

[0082] If the first path to be optimized is from a vertical direction to a horizontal direction, matching the vertical path in the first path to be optimized in the characterization database to obtain at least one combination information corresponding to the vertical path in the first path to be optimized;

[0083] The optimization processing module is specifically used for:

[0084] The usage quantity of the combination indicated by each piece of the combination information is determined according to the line length of the vertical path in the first path to be optimized and the line length indicated by each piece of the combination information.

[0085] As a possible implementation manner, the optimization processing module is specifically used for:

[0086] determining an initial amount of the combination information according to the line length of the vertical path and the line length indicated by the combination information;

[0087] determining a product of the initial number and the line length indicated by the combination information;

[0088] If the difference between the product and the line length of the vertical path satisfies a first preset condition, performing a reduction process on the combination indicated by the last combination information on the vertical path;

[0089] If the difference between the product and the line length of the vertical path meets the second preset condition, the combination indicated by the last combination information on the vertical path is removed, and one of the combinations indicated by the combination information whose connection direction is vertical to horizontal, vertical or horizontal is determined as the last combination in the vertical path.

[0090] As a possible implementation manner, the optimization processing module is specifically used for:

[0091] Determine at least one available combination information from each of the combination information based on the delay information of each of the combination information;

[0092] Determine, based on the line load model to which each of the available combination information belongs and the line load model corresponding to the first path to be optimized, a target position of the combination indicated by each of the combination information on the first path to be optimized;

[0093] The combinations indicated by each combination information are inserted into the target position corresponding to the first path to be optimized according to the usage quantity of the combinations indicated by each combination information.

[0094] As a possible implementation manner, the optimization processing module is specifically used for:

[0095] Determining the usage quantity of the combination indicated by the target combination information according to the line length of the second path to be optimized and the maximum driving line length of the target combination information;

[0096] Optimization processing is performed according to each of the second paths to be optimized, each of the target combination information, and the usage quantity of the combination indicated by each of the target combination information.

[0097] In a third aspect, an embodiment of the present application further provides an electronic device, comprising: a processor, a storage medium and a bus, wherein the storage medium stores machine-readable instructions executable by the processor, and when the electronic device is running, the processor communicates with the storage medium through the bus, and the processor executes the machine-readable instructions to perform the steps of the clock tree synthesis method as described in any one of the first aspects.

[0098] In a fourth aspect, an embodiment of the present application further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the clock tree synthesis method as described in any one of the first aspects are executed.

[0099] The beneficial effect of the present application is that by establishing a characterization database based on a preset line load model, the delay information of different line lengths, different load amounts, and different drive combinations can be obtained, so that the maximum line length that can be driven when the delay meets the preset requirements can be determined based on the characterization database, and then the path with longer delay in the initial clock tree structure can be optimized. Compared with the existing scheme of manually optimizing the clock tree structure, the present application can more quickly find the path that needs to be optimized and optimize the path based on the characterization database to reduce the delay of the path in the initial clock tree structure, saving the time and cost of manual optimization. When the clock tree structure changes, the changed clock tree structure can also be quickly optimized based on the method of the present application, which improves the efficiency of clock tree synthesis.

[0100] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, preferred embodiments are specifically cited below and described in detail with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0101] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0102] Figure 1 A flowchart of a clock tree synthesis method provided by an embodiment of the present application is shown;

[0103] Figure 2 A schematic diagram of the structure of a line load model provided in an embodiment of the present application is shown;

[0104] Figure 3 A flowchart of establishing a characterization database provided by an embodiment of the present application is shown;

[0105] Figure 4 A flowchart of optimizing an initial clock tree structure provided by an embodiment of the present application is shown;

[0106] Figure 5 An example diagram of an initial clock tree diagram provided by an embodiment of the present application is shown;

[0107] Figure 6 A flow chart for determining a path to be optimized provided by an embodiment of the present application is shown;

[0108] Figure 7 A flow chart of optimizing a path to be optimized provided by an embodiment of the present application is shown;

[0109] Figure 8 A flowchart of optimizing a first path to be optimized provided by an embodiment of the present application is shown;

[0110] Fig. 9 A flow chart of optimizing a vertical path provided by an embodiment of the present application is shown;

[0111] Fig.10 Another flow chart of optimizing the first path to be optimized provided by an embodiment of the present application is shown;

[0112] Fig.11 A flow chart of optimizing the second path to be optimized provided by an embodiment of the present application is shown;

[0113] Fig.12 An overall flow chart of a clock tree synthesis method provided by an embodiment of the present application is shown;

[0114] Fig.13 A schematic diagram of the structure of a clock tree synthesis device provided in an embodiment of the present application is shown;

[0115] Fig.14 A schematic structural diagram of an electronic device 140 provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0116] To make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. The components of the embodiments of the present application generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application claimed for protection, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present application.

[0117] It should be noted that the term "comprising" will be used in the embodiments of the present application to indicate the existence of the features declared thereafter, but does not exclude the addition of other features.

[0118] The clock signal is usually the signal with the largest fan-out, longest distance, and highest speed in the entire chip. It must be guaranteed that the timing can meet the requirements under various extreme conditions. Clock tree synthesis, as a key step in the back-end design process of digital integrated circuit design, provides a method for balancing and distributing clock signals.

[0119] Clock tree synthesis is to balance the delay of clock paths by building a clock network of buffers and inverters. Its essence is to achieve timing convergence by reducing the delay differences on each clock path.

[0120] The main method of clock tree synthesis in the prior art is to use a tool to perform clock tree synthesis first, obtain an initial clock tree structure, and then manually customize the clock tree based on the initial clock tree structure by the back-end physical designer. However, when manually customizing the clock tree, designers need to spend a lot of time and energy trying different combinations of drive units, different winding lengths, and different winding rules. Especially after the layout and routing are changed, the clock tree needs to be manually customized again based on the current layout and routing results, which consumes a lot of time and energy and affects the efficiency of the back-end design.

[0121] Based on this, the present application proposes a clock tree synthesis method, which constructs a characterization database by simulating multiple line load models, and accelerates the clock tree design process based on the characterization database, effectively accelerating the process of manually customizing the clock tree. Even if the layout and routing changes, the clock tree structure can be quickly optimized and adjusted based on the method of the present application, thereby improving the efficiency of the back-end design.

[0122] After the netlist is obtained through comprehensive design, clock tree synthesis can be performed according to the netlist based on the method of the present application to construct a clock tree, optimize the clock tree structure, and perform subsequent steps based on the optimized clock tree structure. Figure 1 is a flowchart of a clock tree synthesis method provided in an embodiment of the present application, referring to Figure 1 , the method comprising:

[0123] S101. Establish a characterization database based on multiple preset line load models, each line load model is used to characterize a connection mode of a connecting line, a load, and a drive, and the characterization database includes multiple combination information, each combination information is used to indicate the delay information of each line load model under different line length, load, and drive combinations.

[0124] The line load model can characterize the connection mode of the connection line, load and driver by describing the information of the interconnection line, resistance, capacitance and area. The load can be a buffer, inverter or other module connected to the connection line. Optionally, the line connection conditions in various chips can be collected and analyzed in advance, and various line load models can be constructed accordingly for subsequent use. Figure 2 , which is a schematic diagram of the structure of several line load models provided in this application. Figure 2,The line load model can be divided into many types based on the different ,connection methods of the connecting lines, including horizontal line load models H0, H1, H2 and H3, vertical line load models V0, V1, V2 and V3, and horizontal and vertical ,combination of line load models H1-V1, V1-H1.

[0125] In one possible implementation, after completing the layout and routing, signal analysis can be performed on the layout and routing results, and the line load model used by the current chip can be determined based on information such as the device position in the layout and routing results, thereby improving the correlation between the combination information in the characterization database and the layout and routing results of the current chip.

[0126] The line load model is used to characterize the connection method of the connection line, load and drive, but does not limit the specific line length and specific model of the load and other devices. Therefore, by performing circuit simulation or calculation on the line load model, one or more combination information corresponding to the above line load model can be established, and then all the combination information of all line load models can be integrated to form the above-mentioned characterization database.

[0127] Specifically, for a line load model, multiple possible line length, load and drive combinations can be obtained through circuit simulation or calculation, so that each combination can be used as a combination information corresponding to the line load model. The characterization database includes the combination information of different combinations corresponding to each line load model, and the combination information is used to indicate the delay information of the line load model under different line length, load and drive combinations. Among them, the delay information includes: unit delay, line delay, transmission delay and total delay.

[0128] Refer to Table 1 below for an example of combined information given in this application. The combined information can be Figure 2 The combination information of the line load model H0 shown is under the conditions of line length 3500 and load 70. Referring to Table 1, the combination information includes a variety of drive combinations, such as "1V1, 2V2" in the table, and records the unit delay, line delay, transmission delay and total delay of each drive combination. In a possible implementation, the combination information may also include the identifier of the line load model to which the combination belongs. It should be understood that for the line load model H0, the unit delay, line delay, transmission delay and total delay obtained under other line lengths and other load conditions are not the same, so that combination information containing other line lengths and other load amounts can be obtained.

[0129] Table 1 Example of combination information

[0130]

[0131] S102: Construct an initial clock tree structure.

[0132] After completing the chip layout, the position of each unit and the routing of most connections can be obtained, and the clock tree design is performed based on the position and routing of each unit. The initial clock tree structure is constructed based on the principles of the longest common path, the least inserted units, the least winding, and the shortest winding.

[0133] Among them, the initial clock tree structure can be a structural block diagram from the clock source to the peripheral device. The initial clock tree structure includes nodes, each node is used to represent a unit, such as a buffer unit or a trigger unit, etc. The initial clock tree structure can represent how the clock signal of the clock source is transmitted step by step through each unit to reach the peripheral device.

[0134] S103 : Optimize the paths in the initial clock tree structure according to the characterization database to obtain a target clock tree structure.

[0135] There are paths to be optimized in the initial clock tree structure. The paths to be optimized can be optimized based on the combination information stored in the characterization database. After all the paths to be optimized are optimized, the final clock tree structure is used as the target clock tree structure.

[0136] The paths in the initial clock tree structure are optimized, for example, by adjusting the line length of the paths to be optimized or adjusting the connection mode of the paths to be optimized, thereby optimizing the initial clock tree structure.

[0137] In the first implementation method, the initial clock tree structure can be traced first to obtain the path with the longest delay in the initial clock tree structure, and the path with the longest delay is used as a path to be optimized. The lines in the path to be optimized are optimized based on the characterization database to obtain a smaller delay. The initial clock tree structure is traced again in the next round, and the new path with the longest delay is used as the path to be optimized. The new path to be optimized is optimized based on the characterization database. When the number of iterations is equal to the preset value or the longest delay is less than the preset delay value, the current clock tree structure is used as the target clock tree structure.

[0138] In the second implementation method, the entire clock tree can be traced to obtain the delay information of all paths, and then the paths with delay values ​​greater than the preset delay values ​​are optimized in order from large to small based on the characterization database. After all the paths that need to be processed are optimized, the final clock tree structure is used as the target clock tree structure.

[0139] In the embodiment of the present application, by establishing a characterization database based on a preset line load model, the delay information of different line lengths, different load amounts, and different drive combinations can be obtained, so that the maximum line length that can be driven when the delay meets the preset requirements can be determined based on the characterization database, and then the path with longer delay in the initial clock tree structure can be optimized. Compared with the existing scheme of manually optimizing the clock tree structure, the present application can more quickly find the path that needs to be optimized and optimize the path based on the characterization database to reduce the delay of the path in the initial clock tree structure, saving the time and cost of manual optimization. When the clock tree structure changes, the changed clock tree structure can also be quickly optimized based on the method of the present application, which improves the efficiency of clock tree synthesis.

[0140] The following is a further description of establishing a characterization database based on a plurality of preset line load models. Figure 3 As shown, the above step S101 includes:

[0141] S301 , establishing a simulation circuit according to each line load model, and obtaining simulation results of the simulation circuit under multiple simulation conditions, where the simulation conditions at least include: line length.

[0142] By performing circuit simulation on the line load model under different line lengths, different loads and different drive combinations, simulation results of the line load model under different line lengths, different loads and different drive combinations can be obtained.

[0143] The simulation results include the delay information of the line load model under the line length and load amount.

[0144] S302: Perform statistical processing on each simulation result to obtain a characterization database.

[0145] The statistical processing of each simulation result may be to record the delay information of the same line load model, the same line length and the same load amount, and to add the identification of the line load model to the simulation results belonging to the same line load model.

[0146] As a possible implementation method, the delay information corresponding to each drive combination of the line load model under different line lengths and different loads can be recorded in the form of Table 1, and the identification of the line load model can be added to each table to complete the statistical processing of the simulation results, and the set of all statistical tables can be used as a characterization database.

[0147] The following is a further description of the above-mentioned optimization process of the paths in the initial clock tree structure according to the characterization database to obtain the target clock tree structure. Figure 4 As shown, the above step S103 includes:

[0148] S401: construct an initial clock tree diagram corresponding to the initial clock tree structure, where the initial clock tree diagram is used to describe the connection direction and path information between nodes in the initial clock tree structure.

[0149] The nodes of the initial clock tree structure may be units such as buffers and triggers. By performing trace processing on the initial clock tree structure, an initial clock tree diagram may be obtained. The specific process may be to first determine the clock signal input point, take the clock signal input point as a starting node, traverse along the path of the initial clock tree structure from the starting node, take the traversed units as branch nodes, and record the direction and length of the connection between the starting node and each branch node until the currently traversed unit is the last unit on the current traversal path, take the currently traversed unit as an anchor point of the initial clock tree diagram, and obtain the initial clock tree diagram after completing the traversal of all paths.

[0150] Figure 5 This is a schematic diagram of an initial clock tree diagram given in this application, refer to Figure 5 , where S is the clock input center point, S1~S5 (hereinafter collectively referred to as S*) are branch nodes in the connection line from S to T, T is the anchor point, and the winding line from the clock source to S* is the trunk between the nodes. Figure 5 As shown, the initial clock tree diagram can be used to describe the connection direction and path information between S1 to S5 in the initial clock tree structure. The path information includes the length of the connection between nodes, the load size of the node, the location coordinates of the node, etc. The location coordinates of the node can represent the location coordinates of the unit represented by the node in the layout.

[0151] S402: Determine at least one first path to be optimized and / or at least one second path to be optimized in the initial clock tree structure according to the initial clock tree diagram, wherein the first path to be optimized is a path whose line direction is changed, and the second path to be optimized is a path whose line direction is not changed.

[0152] The line direction may be the connection direction of the interconnection lines between the units represented by the nodes. The line direction between the nodes changes, which may be a change from a horizontal direction to a vertical direction, or a change from a vertical direction to a horizontal direction. The line direction between the nodes does not change, which may be a horizontal direction between the nodes or a vertical direction between the nodes. The initial clock tree diagram may include only the first path to be optimized or only the second path to be optimized, or both the first path to be optimized and the second path to be optimized.

[0153] In the first implementation, the initial clock tree diagram can be traversed to determine the path with the longest delay in the initial clock tree diagram, and for the sub-path between two adjacent nodes in the path, determine whether the line direction of the sub-path has changed. If the line direction of the sub-path has changed, the sub-path is determined to be a first path to be optimized, and if the line direction of the sub-path has not changed, the sub-path is used as a second path to be optimized. After the optimization of each sub-path in the path with the longest delay is completed, the optimized path is obtained, and the path with the longest delay in the current initial clock tree diagram is re-determined, and each sub-path in the path is optimized until the maximum delay in the current initial clock tree diagram is less than the preset threshold, that is, the optimization of the initial clock tree diagram is completed.

[0154] In the second implementation, all nodes in the initial clock tree diagram can be traversed, and for all node groups composed of adjacent nodes, it is determined in turn whether the line direction between the nodes in each node group has changed. If it has changed, the sub-path between the nodes is used as the first path to be optimized. If it has not changed, the sub-path between the nodes is used as the second path to be optimized. The first path to be optimized and the second path to be optimized are optimized. After the optimization of the sub-paths of all node groups is completed, the target clock tree structure is obtained.

[0155] S403 : Optimize each first path to be optimized and / or each second path to be optimized according to the characterization database to obtain a target clock tree structure.

[0156] If the first path to be optimized is determined in the above step S402, the first path to be optimized is optimized; if only the second path to be optimized is included, the second path to be optimized is optimized; if both the first path to be optimized and the second path to be optimized are included, the first path to be optimized and the second path to be optimized are optimized.

[0157] According to the characterization database, the line length, drive combination and connection method of the first path to be optimized and the second path to be optimized can be optimized. After completing the optimization processing of all the first paths to be optimized and the second paths to be optimized, the optimized clock tree structure is used as the target clock tree structure.

[0158] When optimizing the path to be optimized, the path to be optimized may be replaced with the combination indicated by the combination information, or one or more of the line length, drive combination, and connection method of the path to be optimized may be optimized based on the combination information, such as modifying the line length and replacing the drive combination, or replacing the drive combination and modifying the connection method, or modifying all three at the same time to achieve optimization of the path.

[0159] The following is a further description of determining at least one first path to be optimized and at least one second path to be optimized in the initial clock tree structure according to the initial clock tree diagram. Figure 6 As shown, the above step S402 includes:

[0160] S601: Determine the coordinate difference of each node combination in the initial clock tree diagram, where the node combination includes two connected nodes in the initial clock tree diagram.

[0161] In a possible implementation, two nodes having an interconnected relationship may be regarded as a node combination, and a difference is made between two nodes in the node combination to obtain a coordinate difference between the two nodes.

[0162] Reference Figure 5 , S4 and T indicated by the dashed box can be combined as a node, and the coordinate difference of the two nodes can be calculated. It should be noted that the position coordinates of the nodes can be three-dimensional position coordinates, and the coordinate difference can be a coordinate difference in a three-dimensional direction.

[0163] S602: If the node combination includes an anchor point, and the coordinate difference indicates that the connection direction of the node combination has changed, a path corresponding to the connection of the node combination in the initial clock tree structure is used as a first path to be optimized.

[0164] S603: If the node combination does not include an anchor point, and the coordinate difference indicates that the connection direction of the node combination has not changed, a path corresponding to the connection of the node combination in the initial clock tree structure is used as a second path to be optimized.

[0165] The anchor point may be a node at the end of a path in the initial clock tree diagram. Figure 5 The T points in the initial clock tree diagram are all anchor points. The nodes in the initial clock tree diagram correspond to the units in the clock tree structure. Based on the two nodes in the node combination, the corresponding units in the initial clock tree structure can be determined, so that the connection path between the two units is used as the path to be optimized.

[0166] Taking three-dimensional position coordinates as an example, if the node combination includes an anchor point, and the coordinate difference in the z-axis direction of the three-dimensional position coordinates is not equal to 0 and / or the coordinate difference in the y-axis direction is not equal to 0 and / or the coordinate difference in the x-axis direction is not equal to 0, then it can be determined that the connection direction of the node combination has changed. At this time, the path corresponding to the connection of the node combination in the initial clock tree structure can be used as a first path to be optimized.

[0167] On the contrary, if the coordinate difference of the three-dimensional position coordinates in the z-axis direction is equal to 0, the coordinate difference in the y-axis direction is equal to 0, and the coordinate difference in the x-axis direction is not equal to 0, or the coordinate difference in the y-axis direction is equal to 0, the coordinate difference in the x-axis direction is equal to 0, and the coordinate difference in the z-axis direction is not equal to 0, or the coordinate difference in the z-axis direction is equal to 0, the coordinate difference in the x-axis direction is equal to 0, and the coordinate difference in the y-axis direction is not equal to 0, that is, the coordinate difference indicates that there is a change between the two nodes in one direction dimension, then the path corresponding to the connection of the node combination in the initial clock tree structure can be used as a second path to be optimized.

[0168] After determining the first path to be optimized and the second path to be optimized, each first path to be optimized and each second path to be optimized can be optimized according to the characterization database, such as Figure 7 As shown, the above step S403 includes:

[0169] S701. Match each first path to be optimized in a characterization database to obtain at least one combination information corresponding to each first path to be optimized.

[0170] The characterization database includes multiple combination information of multiple line load models. The combination information corresponding to the first path to be optimized can be the combination information corresponding to the line load model with the same structure as the first path to be optimized, and further can be the combination information with the largest line length under the premise of minimum delay among all combination information of the line load model with the same structure as the first path to be optimized.

[0171] As an example, if the first path to be optimized is Figure 5 The line load model corresponding to the first path to be optimized can be determined based on the direction change and line length of the line between S4 and T indicated by the dotted box. Figure 2 H0 and H1-V1 in the characterization database, and the combination information corresponding to H0 and H1-V1 in the characterization database is used as the combination information corresponding to the first path to be optimized. The line between S4 and T marked by the dotted box shown in the figure includes the horizontal direction and the vertical direction. The number of line load models H0 used in the horizontal direction can be determined first, and after determining the number of H0, the line load model used in the vertical direction can be determined to be H1, H1-V1 or V3.

[0172] S702: Perform optimization processing according to at least one combination of information corresponding to each first path to be optimized.

[0173] The combination information can characterize the delay of the line load model under different line lengths, different load amounts and different drive combinations. Therefore, the line length, load amount and drive combination with the minimum delay can be determined from multiple combination information, and then the drive combination of the first path to be optimized and the number of line load models used can be modified, so that the first path to be optimized has a smaller delay.

[0174] S703: Match each second path to be optimized in the characterization database to obtain target combination information corresponding to each second path to be optimized.

[0175] The second path to be optimized is the path whose connection direction has not changed. Therefore, the second path to be optimized will only match the horizontal or vertical line load model in the characterization database. Figure 2 The combination information corresponding to the midline load model H0 is used as the target combination information corresponding to the second path to be optimized; if the second path to be optimized is in the vertical direction, then Figure 2 The combination information corresponding to the center line load model V0 is used as the target combination information of the second path to be optimized.

[0176] S704: Perform optimization processing according to target combination information corresponding to each second path to be optimized.

[0177] According to the target combination information corresponding to the second path to be optimized, the longest distance that can be driven with the minimum delay can be determined, and the number of drive combinations and line load models used by the second path to be optimized can be determined, and then the second path to be optimized can be optimized.

[0178] Furthermore, the above step of performing optimization processing according to at least one combination information corresponding to each first path to be optimized is as follows: Figure 8 As shown, including:

[0179] S801: Determine the usage quantity of the combination indicated by each combination information according to the line length of each first path to be optimized and the line length indicated by each combination information.

[0180] Referring to Table 1, the combination information includes line length and load, and the line length indicated by the combination information represents the maximum line length that can be driven under the load and delay recorded by the combination information. The maximum driven line length of the combination may be smaller than the line length of the first path to be optimized, so the first path to be optimized can splice multiple combinations so that the line length of each combination after splicing is equal to the line length of the first path to be optimized. When determining the number of combinations indicated by each combination information, the number of combinations indicated by each combination information can be determined starting from one end of the first path to be optimized.

[0181] For example, assuming that the horizontal line length of the first path to be optimized is 1000, and the line length of the combination information 1 corresponding to the first path to be optimized is 400, it can be determined that the number of combinations 1 indicated by the combination information 1 used by the first path to be optimized is 2, and then the number of combinations 2 used indicated by the combination information 2 is determined based on the remaining line length 200 of the horizontal line length of the first path to be optimized.

[0182] S802: Perform optimization processing according to each first path to be optimized, each combination information, and the usage quantity of the combination indicated by each combination information.

[0183] Based on the first path to be optimized, the combination information, and the number of combinations indicated by the combination information, the combination can be inserted into the path of the initial clock tree structure corresponding to the first path to be optimized according to the corresponding relationship between the number of combinations and the position of the combination information and the first path to be optimized, so as to achieve optimization processing of the path corresponding to the first path to be optimized in the initial clock tree structure.

[0184] In a possible implementation manner, the direction of the first path to be optimized includes: a horizontal direction to a vertical direction. Figure 2 , the path composition from horizontal direction to vertical direction can be expressed as a*H0+b*H1+c*H1-V1+d*V3, where a / b / c / d are integers greater than or equal to 0. Among the three models H1 / H1-V1 / V3, the specific line load model to be selected can be determined according to the number of H0.

[0185] At this time, the step of matching each first path to be optimized in the characterization database to obtain at least one combination information corresponding to each first path to be optimized includes:

[0186] If the first path to be optimized is from horizontal to vertical, the horizontal path in the first path to be optimized is matched in the characterization database to obtain at least one combination information corresponding to the horizontal path in the first path to be optimized.

[0187] For the path from horizontal to vertical direction, the path may be firstly divided into a path in the horizontal direction, namely, a horizontal path, and a path in the vertical direction, namely, a vertical path, and the path in the horizontal direction may be optimized.

[0188] The horizontal path includes lines and loads. Based on the structure of the horizontal path, that is, the position of the load of the horizontal path on the horizontal path, a line load model with the same structure as the horizontal path can be retrieved in the characterization database, and the combination information of the maximum line length that meets the set delay requirement among all the combination information corresponding to the line load model is determined, and the combination information of the maximum line length is used as the combination information corresponding to the horizontal path.

[0189] The above-mentioned determining the usage quantity of the combination indicated by each combination information according to the line length of each first path to be optimized and the line length indicated by each combination information includes:

[0190] The usage quantity of the combination indicated by each combination information is determined according to the line length of the horizontal path in the first path to be optimized and the line length indicated by each combination information.

[0191] When determining the number of combinations to be used, the initial number of uses can be determined based on the line length indicated by the combination information and the line length of the horizontal path, and then the total line length of the combination is determined based on the initial number of uses, and then the number of uses of the combination indicated by the combination information is determined based on the difference between the total line length and the line length of the horizontal path.

[0192] In a first implementation, the quotient of the line length of the horizontal path and the line length indicated by the combination information may be calculated, and the quotient may be used as the number of combinations indicated by the combination information. After determining the number of combinations used by the horizontal path, the line load model used by the first path to be optimized may be determined based on the remaining line length of the horizontal path, that is, the line length not covered by the combination used by the horizontal path.

[0193] Exemplarily, assuming that the line length of the horizontal path of the first path to be optimized is 1000, and the line length indicated by combination information 2 is 300, it can be determined that the usage quantity of combination 2 indicated by combination information 2 is 3, and the remaining line length is 1000-300×3=100. At this time, H1-V1 can be selected from the three models H1 / H1-V1 / V3 as the line load model corresponding to the first path to be optimized, and the combination information of the line load model H1-V1 can be retrieved from the characterization database, and the combination information that meets the set delay requirement is used as the combination information corresponding to the first path to be optimized, and the remaining 100 line lengths can be optimized based on the combination information.

[0194] In the second implementation, if there is a remainder when the line length of the horizontal path is divided by the line length indicated by the combination information, the quotient of the line length of the horizontal path and the line length indicated by the combination information can be added by 1 to obtain the number of combinations used indicated by the combination information. At this time, the line length of the last section of the combination used on the horizontal path can be reduced so that the total length of the combination indicated by the combination information is equal to the line length of the horizontal path.

[0195] As an example, assuming that the line length of the horizontal path of the first path to be optimized is 1000, and the line length indicated by combination information 2 is 300, it can be determined that the number of combinations 2 indicated by combination information 2 used is 4. At this time, the line length of the last combination can be shortened so that the end of the last combination is aligned with the end of the horizontal path line length.

[0196] In another possible implementation, the direction of the first path to be optimized includes: vertical direction to horizontal direction. The path composition is: a*V0+b*V1+c*V1-H1+d*H3, where a / b / c / d are integers greater than or equal to 0, and which line load model is specifically selected among the three models of V1 / V1-H1 / H3 can be determined according to the number of V0.

[0197] At this time, the step of matching the first path to be optimized in the characterization database to obtain at least one line load model corresponding to the first path to be optimized includes:

[0198] If the first path to be optimized is from a vertical direction to a horizontal direction, the vertical path in the first path to be optimized is matched in the characterization database to obtain at least one combination information corresponding to the vertical path in the first path to be optimized.

[0199] For the path from vertical to horizontal, the path may be firstly divided into a path in the horizontal direction, namely, a horizontal path, and a path in the vertical direction, namely, a vertical path, and the path in the vertical direction may be optimized.

[0200] The vertical path includes a line and a load. Based on the structure of the vertical path, that is, the position of the load of the vertical path on the vertical path, a line load model with the same structure as the vertical path can be retrieved in the characterization database, and the combination information of the maximum line length that meets the set delay requirement among all the combination information corresponding to the line load model is determined, and the combination information of the maximum line length is used as the combination information corresponding to the vertical path.

[0201] The above-mentioned determining the usage quantity of the combination indicated by each combination information according to the line length of each first path to be optimized and the line length indicated by each combination information includes:

[0202] The usage quantity of the combination indicated by each combination information is determined according to the line length of the vertical path in the first path to be optimized and the line length indicated by each combination information.

[0203] When determining the number of combinations to be used, the initial number of uses can be determined based on the line length indicated by the combination information and the line length of the vertical path, and then the total length of the combination is determined based on the initial number of uses, and then the number of uses of the combination indicated by the combination information is determined based on the difference between the total length and the line length of the vertical path.

[0204] Further, such as Fig. 9 As shown, the step of determining the number of combinations indicated by each combination information according to the line length of the vertical path in the first path to be optimized and the line length indicated by each combination information includes:

[0205] S901: Determine an initial amount of combination information according to the line length of the vertical path and the line length indicated by the combination information.

[0206] S902: Determine the product of the initial number and the line length indicated by the combination information.

[0207] In a first implementation, the line length of the vertical path may be used as the dividend, and the line length indicated by the combination information may be used as the divisor. The quotient of the two may be calculated and used as the initial number.

[0208] In the second implementation, if there is a remainder after the quotient obtained by dividing the line length of the vertical path by the line length indicated by the combination information, the result of adding 1 to the quotient is used as the initial number of the combination information.

[0209] Exemplarily, assuming that the length of the vertical path is 1000 and the line length indicated by the combination information is 300, the initial number is 4, and the product of the initial number and the line length indicated by the combination information is 1200.

[0210] S903: If the difference between the product and the line length of the vertical path meets a first preset condition, a reduction process is performed on the combination indicated by the last combination information on the vertical path.

[0211] The first preset condition may be that the product is greater than the length of the vertical path and the difference between the product and the length of the vertical path is less than or equal to a preset value. The preset value may be 3 / 4 of the length of the vertical path, or other proportions of the length of the vertical path.

[0212] Continuing with the above example, the product and the length of the vertical path are judged, and it is determined that 1200 is greater than 1000 and |1200-1000| is less than 1000*0.75. The last segment of the combination can be reduced by moving the units of the last segment of the combination forward to align the end of the combination with the end of the vertical path length, or the length of the last segment of the combination can be shortened by 1200-1000=200 to align the end of the combination with the end of the vertical path.

[0213] S904. If the difference between the product and the line length of the vertical path meets the second preset condition, remove the combination indicated by the last combination information on the vertical path, and determine one of the combinations indicated by the combination information whose connection direction is vertical to horizontal, vertical or horizontal as the last combination in the vertical path.

[0214] The second preset condition may be that the product is greater than the length of the vertical path and the difference between the product and the length of the vertical path is greater than a preset value. For example, assuming that the length of the line indicated by the combination information is 600, the number is 3, and the product is 1800, at this time 1800 is greater than 1000 and the difference of 1800-1000 is greater than 1000*0.75, then the combination indicated by the last combination information can be removed and the combination indicated by the combination information can be removed. Figure 2 Choose one of the three models shown, V1 / V1-H1 / H3, as the last combination on the vertical path.

[0215] It should be noted that the above embodiment is an explanation of how to determine the number of combinations to be used when the total length of the combined bus is greater than or equal to the length of the vertical path. In one possible case, the total length of the combined bus may be less than the length of the vertical path. In this case, the total length of the combined bus may be directly determined from Figure 2 Select one of the three models V1 / V1-H1 / H3 shown to obtain the last combination on the vertical path.

[0216] The steps for determining the number of combinations to be used in the horizontal path are the same as the steps for determining the number of combinations to be used in the vertical path, and are not described in detail in this application. It should be noted that when the difference between the product and the line length of the horizontal path in the horizontal path meets the second preset condition, the last combination on the horizontal path is removed, and one of the three models H1 / H1-V1 / V3 is selected as the last combination on the horizontal path.

[0217] The following is a further description of the optimization process performed according to the first path to be optimized, each combination information and the number of combinations indicated by each combination information. Fig.10 As shown, the step includes:

[0218] S1001. Determine at least one available combination information in each combination information based on delay information of each combination information.

[0219] In a first implementation, the delay information of each combination information may be compared with a preset delay value to determine the combination information less than the delay value, and the combination information with the longest line length among the combination information less than the delay value is used as the available combination information.

[0220] In the second implementation, each combination information may be sorted according to the delay information, the first N combination information with the smallest delay may be determined, and the combination information with the longest line length among the N combination information may be used as the available combination information.

[0221] S1002: Determine a target position of the combination indicated by each combination information on the first path to be optimized based on the line load model to which each available combination information belongs and the line load model corresponding to the first path to be optimized.

[0222] Based on the structure of the line load model, the line load model corresponding to the line load model to which each available combination information belongs on the first path to be optimized can be determined. The target position can be the starting position in the first path to be optimized where the line load model structure is the same as the line load model structure to which the combination information belongs.

[0223] S1003: insert the combination indicated by each combination information into the target position corresponding to the first path to be optimized according to the usage quantity of the combination indicated by each combination information.

[0224] After determining the position and combination of each combination, the combinations indicated by each combination information can be arranged in sequence according to the number of uses, and inserted into the target position corresponding to the first path to be optimized. Exemplarily, after determining that combination information 2 is the available combination information of the first path to be optimized and the number of uses is 3, the combinations 2 indicated by the three combination information 2 can be arranged in sequence and inserted into the first path to be optimized starting from the target position (e.g., the starting point) of the first path to be optimized, so as to achieve the optimization processing of the first path to be optimized.

[0225] The first path to be optimized is Figure 2 The second path to be optimized can be composed of at least two line load models in Figure 2 The following is a further description of the optimization process performed according to the target combination information corresponding to each second path to be optimized. Fig.11 As shown, the above step S704 includes:

[0226] S1101 . Determine the usage quantity of the combination indicated by the target combination information according to the line length of the second path to be optimized and the maximum driving line length of the target combination information.

[0227] In a first implementation, the line length of the second path to be optimized may be used as the dividend, the maximum driving line length of the target combination may be used as the divisor, and the quotient of the two may be used as the usage quantity of the combination indicated by the target combination information.

[0228] In the second implementation, the line length of the second path to be optimized can be used as the dividend, and the maximum driving line length of the target combination can be used as the divisor. The quotient of the two is calculated. If there is a remainder, the value of the quotient plus 1 is used as the number of combinations indicated by the target combination information.

[0229] S1102: Perform optimization processing according to each second path to be optimized, each target combination information, and the usage quantity of the combination indicated by each target combination information.

[0230] Based on the second path to be optimized, the target combination information, and the number of combinations indicated by the target combination information, the combination can be inserted into the path of the initial clock tree structure corresponding to the second path to be optimized according to the corresponding relationship between the number of combinations and the position of the target combination information and the second path to be optimized, so as to achieve optimization processing of the path corresponding to the second path to be optimized in the initial clock tree structure.

[0231] In the first implementation, if the second path to be optimized is horizontal, refer to Figure 2 , the path composition of the second path to be optimized is: a*H0, where a represents the number of uses, a is an integer greater than or equal to 0, H0 is the target combination information, which is used to indicate the maximum line length that can be driven with the minimum delay, and the horizontal path is L. By searching the characterization database, the number of H0 required, that is, the value of a, is obtained, and then based on the product of the number of uses and the line length indicated by the target combination information, it is determined whether to reduce the last section of the combination. Specifically, when a*H0 satisfies greater than or equal to L, the last section of H0 is shortened by |a*H0-L|, and the target position of each combination in the second path to be optimized is determined. Finally, each combination is inserted into the target position according to the number of uses to achieve the optimization of the second path to be optimized.

[0232] In the second implementation, if the second path to be optimized is in the vertical direction, refer to Figure 2 , the path composition of the second path to be optimized is a*V0, where a represents the number of uses, a is an integer greater than or equal to 0, V0 is the target combination information, which is used to indicate the maximum line length that can be driven with the minimum delay, and the vertical path is L. By searching the characterization database, the number of V0s required, that is, the value of a, is obtained, and then based on the product of the number of uses and the line length indicated by the target combination information, it is determined whether to reduce the last section of the combination. Specifically, when a*V0 satisfies greater than or equal to L, the last section of V0 is shortened by |a*V0-L|, and the target position of each combination in the second path to be optimized is determined. Finally, each combination is inserted into the target position according to the number of uses to achieve the optimization of the second path to be optimized.

[0233] After all the first paths to be optimized and the second paths to be optimized are processed, the initial clock tree structure after the optimization process may be used as the target clock tree structure, and subsequent chip design steps may be performed based on the target clock tree structure.

[0234] Next, combine Fig.12The overall process of the clock tree synthesis method of the present application is described. When the netlist after synthesis is obtained, first determine whether there is a constructed characterization database for the netlist. If not, build the characterization database corresponding to the netlist. If so, further determine whether there is an initial clock tree structure constructed for the netlist. If not, build the initial clock tree structure based on the principle of the longest common path, the least units, the least windings, and the shortest windings.

[0235] By performing trace processing on the initial clock tree structure, an initial clock tree diagram corresponding to the initial clock tree structure can be obtained. By subtracting the coordinates of the nodes with interconnected relationships in the initial clock tree diagram, it is possible to determine whether the path between the two nodes is the first path to be optimized or the second path to be optimized based on the coordinate difference. After optimizing each first path to be optimized and each second path to be optimized in the initial clock tree structure, the clock tree structure finally obtained is the target clock tree structure.

[0236] Based on the same inventive concept, a clock tree synthesis device corresponding to the clock tree synthesis method is also provided in the embodiment of the present application. Since the principle of solving the problem by the device in the embodiment of the present application is similar to the above-mentioned clock tree synthesis method in the embodiment of the present application, the implementation of the device can refer to the implementation of the method, and the repeated parts will not be repeated.

[0237] Fig.13 FIG. 1 is a schematic diagram showing the structure of a clock tree synthesis device provided in an embodiment of the present application. Fig.13 The device includes a database establishment module 1301, a clock tree construction module 1302 and an optimization processing module 1303.

[0238] The database establishment module 1301 is used to establish a characterization database according to a plurality of preset line load models, each line load model is used to characterize a connection mode of a connection line, a load and a drive, and the characterization database includes a plurality of combination information, each combination information is used to indicate the delay information of each line load model under different line length, load and drive combinations;

[0239] A clock tree construction module 1302 is used to construct an initial clock tree structure;

[0240] The optimization processing module 1303 is used to optimize the paths in the initial clock tree structure according to the characterization database to obtain a target clock tree structure.

[0241] As a possible implementation, the database establishment module 1301 is specifically used for:

[0242] A simulation circuit is established according to each line load model, and simulation results of the simulation circuit under multiple simulation conditions are obtained, where the simulation conditions at least include: line length;

[0243] Perform statistical processing on each simulation result to obtain a characterization database.

[0244] As a possible implementation, the optimization processing module 1303 is specifically used for:

[0245] Constructing an initial clock tree diagram corresponding to the initial clock tree structure, where the initial clock tree diagram is used to describe the connection direction and path information between nodes in the initial clock tree structure;

[0246] Determine at least one first path to be optimized and / or at least one second path to be optimized in the initial clock tree structure according to the initial clock tree diagram, wherein the first path to be optimized is a path whose line direction is changed, and the second path to be optimized is a path whose line direction is not changed;

[0247] Each first path to be optimized and / or each second path to be optimized is optimized according to the characterization database to obtain a target clock tree structure.

[0248] As a possible implementation, the optimization processing module 1303 is specifically used for:

[0249] Determine the coordinate difference of each node combination in the initial clock tree diagram, where the node combination includes two connected nodes in the initial clock tree diagram;

[0250] If the node combination includes an anchor point, and the coordinate difference indicates that the connection direction of the node combination has changed, a path corresponding to the connection of the node combination in the initial clock tree structure is used as a first path to be optimized;

[0251] If the node combination does not include an anchor point, and the coordinate difference indicates that the connection direction of the node combination has not changed, the path corresponding to the connection of the node combination in the initial clock tree structure is taken as a second path to be optimized.

[0252] As a possible implementation, the optimization processing module 1303 is specifically used for:

[0253] Matching each first path to be optimized in the characterization database to obtain at least one combination information corresponding to each first path to be optimized;

[0254] Performing optimization processing according to at least one combination of information corresponding to each first path to be optimized;

[0255] Matching each second path to be optimized in the characterization database to obtain target combination information corresponding to each second path to be optimized;

[0256] The optimization process is performed according to the target combination information corresponding to each second path to be optimized.

[0257] As a possible implementation, the optimization processing module 1303 is specifically used for:

[0258] Determine the usage quantity of the combination indicated by each combination information according to the line length of each first path to be optimized and the line length indicated by each combination information;

[0259] The optimization process is performed according to each first path to be optimized, each combination information and the usage quantity of the combination indicated by each combination information.

[0260] As a possible implementation manner, the direction of the first path to be optimized includes: a horizontal direction to a vertical direction;

[0261] The optimization processing module 1303 is specifically used for:

[0262] If the first path to be optimized is from horizontal to vertical, matching the horizontal path in the first path to be optimized in the characterization database to obtain at least one combination information corresponding to the horizontal path in the first path to be optimized;

[0263] The optimization processing module 1303 is specifically used for:

[0264] The usage quantity of the combination indicated by each combination information is determined according to the line length of the horizontal path in the first path to be optimized and the line length indicated by each combination information.

[0265] As a possible implementation manner, the direction of the first path to be optimized includes: a vertical direction to a horizontal direction;

[0266] The optimization processing module 1303 is specifically used for:

[0267] If the first path to be optimized is from a vertical direction to a horizontal direction, matching the vertical path in the first path to be optimized in the characterization database to obtain at least one combination information corresponding to the vertical path in the first path to be optimized;

[0268] The optimization processing module 1303 is specifically used for:

[0269] The usage quantity of the combination indicated by each combination information is determined according to the line length of the vertical path in the first path to be optimized and the line length indicated by each combination information.

[0270] As a possible implementation, the optimization processing module 1303 is specifically used for:

[0271] determining an initial amount of the combined information according to the line length of the vertical path and the line length indicated by the combined information;

[0272] determining the product of the initial quantity and the line length indicated by the combination information;

[0273] If the difference between the product and the line length of the vertical path meets the first preset condition, a reduction process is performed on the combination indicated by the last combination information on the vertical path;

[0274] If the difference between the product and the line length of the vertical path meets the second preset condition, the combination indicated by the last combination information on the vertical path is removed, and one of the combinations indicated by the combination information with the connection direction being vertical to horizontal, vertical or horizontal is determined as the last combination in the vertical path.

[0275] As a possible implementation, the optimization processing module 1303 is specifically used for:

[0276] Determine at least one available combination information in each combination information based on the delay information of each combination information;

[0277] Based on the line load model to which each available combination information belongs and the line load model corresponding to the first path to be optimized, determining the target position of the combination indicated by each combination information on the first path to be optimized;

[0278] The combination indicated by each combination information is inserted into the target position corresponding to the first path to be optimized according to the usage quantity of the combination indicated by each combination information.

[0279] As a possible implementation, the optimization processing module 1303 is specifically used for:

[0280] Determine the usage quantity of the combination indicated by the target combination information according to the line length of the second path to be optimized and the maximum driving line length of the target combination information;

[0281] The optimization process is performed according to each second path to be optimized, each target combination information and the usage quantity of the combination indicated by each target combination information.

[0282] The embodiment of the present application establishes a characterization database based on a preset line load model, and can obtain delay information of different line lengths, different load amounts, and different drive combinations, so that the maximum line length that can be driven when the delay meets the preset requirements can be determined based on the characterization database, and then the path with longer delay in the initial clock tree structure can be optimized. Compared with the existing scheme of manually optimizing the clock tree structure, the present application can more quickly find the path that needs to be optimized and optimize the path based on the characterization database to reduce the delay of the path in the initial clock tree structure, saving the time and cost of manual optimization. When the clock tree structure changes, the changed clock tree structure can also be quickly optimized based on the method of the present application, which improves the efficiency of clock tree synthesis.

[0283] Fig.14A structural schematic diagram of an electronic device 140 provided in an embodiment of the present application is shown, including: a processor 1401, a storage medium 1402 and a bus 1403, wherein the storage medium 1402 stores machine-readable instructions executable by the processor 1401, and when the electronic device runs the clock tree synthesis method as in the embodiment, the processor 1401 communicates with the storage medium 1402 via the bus 1403, and the processor 1401 executes the machine-readable instructions, and the processor 1401 executes the preamble of the method item to execute the steps in the above-mentioned clock tree synthesis method.

[0284] An embodiment of the present application further provides a computer-readable storage medium, on which a computer program is stored. The computer program is executed when a processor is running, and the processor executes the steps in the above-mentioned clock tree synthesis method.

[0285] In the embodiment of the present application, the computer program can also execute other machine-readable instructions when run by the processor to execute other methods described in the embodiment. For the specific execution method steps and principles, please refer to the description of the embodiment, which will not be repeated here.

[0286] In the embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some communication interfaces, and the indirect coupling or communication connection of the devices or units can be electrical, mechanical or other forms.

[0287] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0288] In addition, each functional unit in the embodiments provided in the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0289] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0290] It should be noted that similar numbers and letters represent similar items in the following figures. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description and are not to be understood as indicating or implying relative importance.

[0291] Finally, it should be noted that the above-described embodiments are only specific implementation methods of the present application, which are used to illustrate the technical solutions of the present application, rather than to limit them. The protection scope of the present application is not limited thereto. Although the present application is described in detail with reference to the above-mentioned embodiments, ordinary technicians in the field should understand that any technician familiar with the technical field can still modify the technical solutions recorded in the above-mentioned embodiments within the technical scope disclosed in the present application, or can easily think of changes, or make equivalent replacements for some of the technical features therein; and these modifications, changes or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application. They should all be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A clock tree synthesis method, characterized in that: include: Establishing a characterization database according to a plurality of preset line load models, each of the line load models is used to characterize a connection mode of a connection line, a load and a drive, and the characterization database includes a plurality of combination information, each combination information is used to indicate the delay information of each line load model under different line length, load and drive combinations; Build the initial clock tree structure; The paths in the initial clock tree structure are optimized according to the characterization database to obtain a target clock tree structure.

2. The method according to claim 1, characterized in that: The establishing of a characterization database according to a plurality of preset line load models comprises: A simulation circuit is established according to each of the line load models, and simulation results of the simulation circuit under multiple simulation conditions are obtained, wherein the simulation conditions at least include: line length; Statistical processing is performed on each of the simulation results to obtain the characterization database.

3. The method according to claim 1, characterized in that The optimizing the paths in the initial clock tree structure according to the characterization database to obtain the target clock tree structure includes: Constructing an initial clock tree diagram corresponding to the initial clock tree structure, wherein the initial clock tree diagram is used to describe the connection direction and path information between nodes in the initial clock tree structure; Determine at least one first path to be optimized and / or at least one second path to be optimized in the initial clock tree structure according to the initial clock tree diagram, wherein the first path to be optimized is a path whose line direction is changed, and the second path to be optimized is a path whose line direction is not changed; Each of the first paths to be optimized and / or each of the second paths to be optimized is optimized according to the characterization database to obtain a target clock tree structure.

4. The method according to claim 3, characterized in that The determining, according to the initial clock tree diagram, at least one first path to be optimized and / or at least one second path to be optimized in the initial clock tree structure comprises: Determine a coordinate difference of each node combination in the initial clock tree diagram, wherein the node combination includes two connected nodes in the initial clock tree diagram; If the node combination includes an anchor point, and the coordinate difference indicates that the connection direction of the node combination has changed, a path corresponding to the connection of the node combination in the initial clock tree structure is used as a first path to be optimized; If the node combination does not include an anchor point, and the coordinate difference indicates that the connection direction of the node combination has not changed, the path corresponding to the connection of the node combination in the initial clock tree structure is taken as a second path to be optimized.

5. The method according to claim 3, characterized in that: The optimizing the first paths to be optimized and / or the second paths to be optimized according to the characterization database includes: Matching each of the first paths to be optimized in the characterization database to obtain at least one combination of information corresponding to each of the first paths to be optimized; Performing optimization processing according to at least one combination of information corresponding to each of the first paths to be optimized; Matching each of the second paths to be optimized in the characterization database to obtain target combination information corresponding to each of the second paths to be optimized; Optimization processing is performed according to the target combination information corresponding to each of the second paths to be optimized.

6. The method according to claim 5, characterized in that The performing optimization processing according to at least one combination of information corresponding to each of the first paths to be optimized includes: Determining the usage quantity of the combination indicated by each combination information according to the line length of each first path to be optimized and the line length indicated by each combination information; Optimization processing is performed according to each of the first paths to be optimized, each of the combination information, and the usage quantity of the combination indicated by each of the combination information.

7. The method according to claim 6, characterized in that The direction of the first path to be optimized includes: horizontal direction to vertical direction; The matching of each of the first paths to be optimized in the characterization database to obtain at least one combination information corresponding to each of the first paths to be optimized includes: If the first path to be optimized is from horizontal to vertical, matching the horizontal path in the first path to be optimized in the characterization database to obtain at least one combination information corresponding to the horizontal path in the first path to be optimized; The determining, according to the line length of each first path to be optimized and the line length indicated by each combination information, the usage quantity of the combination indicated by each combination information includes: The usage quantity of the combination indicated by each piece of the combination information is determined according to the line length of the horizontal path in the first path to be optimized and the line length indicated by each piece of the combination information.

8. The method according to claim 6, characterized in that The direction of the first path to be optimized includes: a vertical direction to a horizontal direction; The matching the first path to be optimized in the characterization database to obtain at least one line load model corresponding to the first path to be optimized includes: If the first path to be optimized is from a vertical direction to a horizontal direction, matching the vertical path in the first path to be optimized in the characterization database to obtain at least one combination information corresponding to the vertical path in the first path to be optimized; The determining, according to the line length of each first path to be optimized and the line length indicated by each combination information, the usage quantity of the combination indicated by each combination information includes: The usage quantity of the combination indicated by each piece of the combination information is determined according to the line length of the vertical path in the first path to be optimized and the line length indicated by each piece of the combination information.

9. The method according to claim 8, characterized in that The determining, according to the line length of the vertical path in the first path to be optimized and the line length indicated by each piece of the combination information, the number of combinations indicated by each piece of the combination information to be used includes: Determining an initial amount of the combination information according to the line length of the vertical path and the line length indicated by the combination information; determining a product of the initial number and the line length indicated by the combination information; If the difference between the product and the line length of the vertical path satisfies a first preset condition, performing a reduction process on the combination indicated by the last combination information on the vertical path; If the difference between the product and the line length of the vertical path meets the second preset condition, the combination indicated by the last combination information on the vertical path is removed, and one of the combinations indicated by the combination information whose connection direction is vertical to horizontal, vertical or horizontal is determined as the last combination in the vertical path.

10. The method according to claim 6, characterized in that The performing optimization processing according to the first path to be optimized, each piece of combination information, and the usage quantity of the combination indicated by each piece of combination information includes: Determine at least one available combination information from each of the combination information based on the delay information of each of the combination information; Determine, based on the line load model to which each of the available combination information belongs and the line load model corresponding to the first path to be optimized, a target position of the combination indicated by each of the combination information on the first path to be optimized; The combinations indicated by each combination information are inserted into the target position corresponding to the first path to be optimized according to the usage quantity of the combinations indicated by each combination information.

11. The method according to claim 5, characterized in that The performing optimization processing according to the target combination information corresponding to each of the second paths to be optimized includes: Determining the usage quantity of the combination indicated by the target combination information according to the line length of the second path to be optimized and the maximum driving line length of the target combination information; Optimization processing is performed according to each of the second paths to be optimized, each of the target combination information, and the usage quantity of the combination indicated by each of the target combination information.

12. A clock tree synthesis device, characterized in that: include: A database establishment module, used to establish a characterization database according to a plurality of preset line load models, each of which is used to characterize a connection mode of a connection line, a load, and a drive, and the characterization database includes a plurality of combination information, each of which is used to indicate the delay information of each line load model under different line length, load, and drive combinations; A clock tree construction module, used to construct an initial clock tree structure; The optimization processing module is used to optimize the paths in the initial clock tree structure according to the characterization database to obtain a target clock tree structure.

13. An electronic device, characterized in that: include: A processor, a storage medium and a bus, wherein the storage medium stores machine-readable instructions executable by the processor, and when the electronic device is running, the processor and the storage medium communicate via the bus, and the processor executes the machine-readable instructions to perform the steps of the clock tree synthesis method as described in any one of claims 1 to 11.

14. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the clock tree synthesis method according to any one of claims 1 to 11 are executed.

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