Motor simulator control system and method based on ARM and dual-FPGA architecture, and computer readable storage medium

Abstract

The invention provides a motor simulator control system and method based on an ARM and double-FPGA architecture, and a computer readable storage medium, and mainly solves the technical problem that the test precision of an existing motor simulator on a motor controller is reduced due to the fact that the simulation precision of the existing motor simulator on a real motor is not enough. Wherein the control system comprises an ARM control unit, a centralized control FPGA unit and a rotary transformer FPGA unit, the ARM control unit and the centralized control FPGA unit mainly realize functions of a motor control algorithm, PWM output and the like, the rotary transformer FPGA unit mainly undertakes a rotary transformer simulation function, and the three units jointly form a whole set of motor simulator model algorithm. Therefore, accurate simulation and high-precision output of the motor model are realized.

Description

Technical Field

[0001] The present invention relates to a motor control system, and in particular to a motor simulator control system, method and computer-readable storage medium based on an ARM plus dual FPGA architecture. Background Art

[0002] In recent years, with the growth of new energy vehicle production, there are more and more motor controller manufacturers. As one of the core components of electric vehicles, the research and development and production processes of motor controllers must undergo a lot of experimental verification to ensure their factory quality.

[0003] Usually, motor controllers need to be tested on mechanical test benches before leaving the factory. However, mechanical test benches have problems such as high noise, large footprint, and inconvenience in use. Therefore, in order to meet the application requirements of motor controllers under different motor types, some manufacturers have begun to use motor simulators instead of traditional test benches to perform factory tests on motor controllers. As a power electronic device, the motor simulator has a small overall structure and is relatively easy to use. It can replace the traditional mechanical test bench by simulating the output characteristics of the motor through the generator parameters, thereby quickly completing the factory test of the motor controller.

[0004] However, the motor simulators on the market do not have sufficient simulation accuracy for real motors. The main reason is that the discrete method of the motor simulator control system is incorrect or the main control chip has a low operating speed, resulting in large delays and failure to meet the output accuracy requirements, thus reducing the test accuracy of the motor controller. Summary of the invention

[0005] The purpose of the present invention is to solve the technical problem that the existing motor simulator has insufficient simulation accuracy of the real motor, resulting in reduced test accuracy of the motor controller, and to provide a motor simulator control system, method and computer-readable storage medium based on ARM plus dual FPGA architecture.

[0006] To achieve the above objectives, the technical solutions provided by the present invention are as follows:

[0007] A motor simulator control system based on ARM plus dual FPGA architecture, which is special in that:

[0008] Including ARM control unit, centralized control FPGA unit and resolver FPGA unit;

[0009] The ARM control unit includes a voltage control module and an information acquisition module; the information acquisition module is connected to the voltage control module, and is used to collect the port signal of the motor simulator and feed it back to the voltage control module;

[0010] The centralized control FPGA unit includes a motor model generation module, an inner loop control module, a PWM generation module, and an optical fiber communication module which are connected in sequence;

[0011] The motor model generation module is connected to the voltage control module and the optical fiber communication module respectively, and is used to output a feedback signal to the voltage control module and a phase signal to the optical fiber communication module; the voltage control module calculates an inner loop given signal based on the port signal and the feedback signal, and transmits the inner loop control module via the motor model generation module; the inner loop control module is used to modulate the inner loop given signal and transmit it to the PWM generation module; the output end of the PWM generation module is used to connect to the motor simulator, and the PWM generation module generates the PWM wave required by the motor simulator based on the modulated inner loop given signal;

[0012] The resolver FPGA unit includes a resolver simulation module, an input end of which is connected to the optical fiber communication module for receiving a phase signal, and an output end of which is used to connect to a motor simulator; the resolver simulation module is used to convert the phase signal into a resolver signal and then output it to the motor simulator.

[0013] Furthermore, the resolver FPGA unit also includes a sensor fault simulation module, which is connected to the optical fiber communication module and the resolver simulation module respectively, and is used to simulate the open circuit and short circuit fault conditions of the sensor, and transmit the received phase signal to the resolver simulation module under this condition.

[0014] Further, the PWM generation module includes an SVPWM converter and a PWM generator;

[0015] The input end of the SVPWM converter is connected to the inner loop control module, and the output end is connected to the PWM generator, which is used to convert and compare the inner loop given signal modulated by the inner loop control module and transmit it to the PWM generator; the output end of the PWM generator is connected to the motor simulator to generate the PWM wave required by the motor simulator.

[0016] Furthermore, the information acquisition module includes a voltage collector, a current collector and a speed collector.

[0017] Furthermore, the resolver simulation module includes an AD sampling circuit, an amplitude frequency calculation module, a DDS conversion module, a resolver signal calculation module and a DA output circuit which are connected in sequence;

[0018] The AD sampling circuit is connected to the optical fiber communication module, and is used to receive the phase signal, convert it into a digital signal and send it to the amplitude frequency calculation module. The digital signal is calculated by the amplitude frequency calculation module, the DDS conversion module and the resolver calculation module in sequence to obtain a resolver signal, which is converted into an analog signal by the DA output circuit and then output.

[0019] At the same time, the present invention also provides a motor simulator control method based on ARM plus dual FPGA architecture, comprising the following steps:

[0020] [1] The port signal of the motor simulator is collected by the information acquisition module and transmitted to the voltage control module, and the voltage control module calculates the outer loop given signal; the port signal is the port current;

[0021] 【2】The motor model generation module discretizes its internal algorithm and outputs a feedback signal to the voltage control module;

[0022] [3] Based on the outer loop given signal obtained in step [1] and the feedback signal obtained in step [2], the voltage control module calculates the inner loop given signal, and transmits it to the inner loop control module through the motor model generation module;

[0023] 【4】The inner loop control module modulates the inner loop given signal and transmits it to the PWM generation module; at the same time, the motor model generation module transmits the phase signal to the resolver simulation module through the optical fiber communication module;

[0024] [5] The PWM generation module generates the corresponding PWM wave based on the modulated inner loop given signal and transmits it to the motor simulator; at the same time, the resolver simulation module converts the received phase signal into a resolver signal and transmits it to the motor simulator, thereby realizing the control of the motor simulator.

[0025] Furthermore, in step [1], the calculation process of the outer loop given signal is:

[0026]

[0027]

[0028] Where U dref is the given voltage of the outer ring of the d-axis, L d is the d-axis inductance, i d is the d-axis current, R is the stator resistance, L q is the q-axis inductance, p is the number of pole pairs, w m is the mechanical angular velocity, i q is the q-axis current, U qrrf It represents the given voltage of the outer ring of q axis, and F is the magnetic flux.

[0029] Furthermore, in step [3], the inner loop given signal is calculated by subtracting the outer loop given signal from the feedback signal to obtain a voltage feedback difference, and the difference is sent to a PI controller in the voltage control module, and the PI controller outputs a corresponding inner loop given signal based on the port current transmitted by the information acquisition module.

[0030] Furthermore, step [5] is specifically as follows:

[0031] The SVPWM converter in the PWM generation module converts the inner loop given signal modulated by the inner loop control module into the voltage signal required by the PWM generator and transmits it to the PWM generator. The PWM generator compares the voltage signal with its internal triangular carrier to obtain the corresponding PWM wave and transmits it to the motor simulator.

[0032] At the same time, the AD sampling circuit in the resolver analog module converts the phase signal into a digital signal after receiving it. The digital signal is converted into a resolver signal after amplitude-frequency calculation, DDS conversion and resolver calculation in sequence. It is converted into an analog signal by the DA output circuit and then transmitted to the motor simulator, thereby realizing the control of the motor simulator.

[0033] In addition, the present invention also provides a computer-readable storage medium on which a computer program or instruction is stored. When the computer program or instruction is executed by a processor, the steps of the motor simulator control method based on the dual FPGA architecture are implemented.

[0034] Compared with the prior art, the present invention has the following beneficial technical effects:

[0035] 1. The motor simulator control system based on ARM plus dual FPGA architecture proposed in the present invention uses the voltage control module to calculate the port signal collected by the information acquisition module and the feedback signal output by the motor model generation module to obtain the inner loop given signal, and then outputs the PWM wave through the inner loop control module and the PWM generation module; at the same time, the phase signal output by the motor model generation module is received by the resolver FPGA unit and converted into a resolver signal, thereby realizing the control of the motor simulator. Based on the ARM plus dual FPGA architecture, the system realizes the accurate simulation and high-precision output of the motor model, and then realizes the high-precision test of the motor controller.

[0036] 2. The present invention also provides a sensor fault simulation module in the resolver FPGA unit, which is used to simulate the open circuit and short circuit fault conditions of the sensor during the operation of the motor controller, thereby helping to test the actual performance of the motor controller under various working conditions, thereby improving the factory quality of the motor controller.

[0037] 3. The motor simulator control method based on ARM plus dual FPGA architecture proposed in the present invention is easy to operate and can control different parameters of the motor simulator, so that it can be used for factory testing of different types of motor controllers and has a wide range of applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 It is a structural schematic diagram of an embodiment of a motor simulator control system based on ARM plus dual FPGA architecture of the present invention.

[0039] Figure 2 This is a working principle diagram of the voltage control module in the motor simulator control system embodiment of the present invention based on ARM plus dual FPGA architecture.

[0040] Figure 3 It is a structural schematic diagram of the resolver simulation module in the motor simulator control system embodiment based on ARM plus dual FPGA architecture of the present invention.

[0041] Figure 4 The figure is a comparison chart of the motor torque accuracy of the motor simulator control system based on ARM plus dual FPGA architecture at different calculation frequencies of the present invention, where (a) is the model calculation accuracy curve at 10kHz; (b) is the model calculation accuracy curve at 1MHz. DETAILED DESCRIPTION

[0042] In order to make the purpose, advantages and features of the present invention more clear, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0043] At present, conventional motor simulator algorithms on the market are mainly based on simulating the external characteristics of motors. However, since motors are essentially mechanical devices, if conventional algorithms are used to simulate motors, they cannot achieve accurate output of external characteristics. The main reason is that the discrete method of the motor model is incorrect or the main control chip has a low computing speed, resulting in large model delays.

[0044] For this reason, Figure 1 As shown, this embodiment proposes a motor simulator control system based on ARM plus dual FPGA architecture, including an ARM control unit, a centralized control FPGA unit and a resolver FPGA unit.

[0045] The ARM control unit is mainly responsible for controlling the output voltage of the motor simulator, which includes a voltage control module and an information acquisition module.

[0046] Among them, the information acquisition module includes a voltage collector, a current collector and a speed collector, etc., which are used to collect the port signals of the motor simulator (that is, the feedback signal required for the outer loop control) and perform relevant protection on the motor simulator.

[0047] The centralized control FPGA unit includes a motor model generation module, an inner loop control module, a PWM generation module, and an optical fiber communication module which are connected in sequence.

[0048] Among them, the motor model generation module is connected to the voltage control module and the optical fiber communication module respectively, and is used to output feedback signals to the voltage control module, and use the motor kinematic equation to obtain the current angular velocity and angle, and output phase signals to the optical fiber communication module. The voltage control module calculates the inner loop given signal based on the port signal and the feedback signal, and transmits it to the inner loop control module through the motor model generation module.

[0049] Specifically, the voltage control module mainly consists of voltage setting calculation, voltage feedback acquisition and voltage outer loop control. The voltage setting calculation converts the port current and motor simulator collected by the information acquisition module into the voltage outer loop setting value. The voltage feedback acquisition mainly obtains the feedback signal of the capacitor voltage from the centralized control FPGA unit through the data bus.

[0050] After the voltage control module obtains the voltage outer loop given and feedback signals, it will calculate and output the inner loop given signal, and then send the inner loop given signal to the motor model generation module through the data bus, and then transmit it to the inner loop control module through the motor model generation module. The inner loop control module modulates it into the required modulation signal and transmits it to the PWM generation module.

[0051] The PWM generation module includes an SVPWM converter and a PWM generator; wherein the input end of the SVPWM converter is connected to the inner loop control module, and the output end is connected to the PWM generator. The SVPWM converter is used to convert the modulation signal output by the inner loop control module through SVPWM and then transmit it to the PWM generator. After that, the PWM generator compares the signal with its internal triangular carrier to generate the PWM wave required by the motor simulator. The output end of the PWM generator is connected to the motor simulator, so the PWM wave is directly transmitted to the corresponding motor simulator.

[0052] The optical fiber communication module of this embodiment is connected to the resolver FPGA via a high-speed optical fiber with a transmission rate of up to 1 Gbit, and mainly transmits phase signals, including an excitation signal EXC, a motor SIN signal, and a motor COS signal.

[0053] The resolver FPGA unit includes a sensor fault simulation module and a resolver simulation module, wherein the input end of the sensor fault simulation module is connected to the optical fiber communication module, and the output end is connected to the resolver simulation module. The sensor fault simulation module is used to receive a phase signal and simulate the open circuit and short circuit fault conditions of the sensor, and transmit the received phase signal to the resolver simulation module under this condition.

[0054] In this embodiment, the sensor fault simulation module mainly uses IO nodes to control the relays on the EXC differential signal, SINout differential signal, and COSout differential signal lines, and realizes various sensor faults such as EXC line break fault, EXC short circuit fault, SIN line break fault, SIN short circuit fault, COS line break fault, and COS short circuit fault by controlling the on and off of the relays.

[0055] like Figure 3 As shown, the resolver analog module includes an AD sampling circuit, an amplitude frequency calculation module, a DDS conversion module, a resolver signal calculation module and a DA output circuit which are connected in sequence.

[0056] Among them, the AD sampling circuit is responsible for converting the EXC analog signal into a digital signal. To ensure the sampling accuracy, this embodiment uses high-speed AD conversion to achieve a sampling rate of more than 1M. The AD sampling circuit is connected to the sensor fault simulation module to receive the phase signal, and the phase signal includes the excitation EXC signal, the motor SIN signal, the motor COS signal and the speed signal.

[0057] After the AD sampling circuit obtains the EXC signal, it is sent to the amplitude-frequency calculation module. After amplitude-frequency calculation and DDS conversion, a high-precision digital EXC signal is obtained. The EXC signal is then sent to the resolver calculation module and multiplied with the speed phase signal to obtain the SIN and COS signals, which are finally output through the DA output circuit.

[0058] The control system of the present invention is mainly composed of an ARM control unit, a centralized control FPGA unit and a resolver FPGA unit. The ARM control unit and the centralized control FPGA unit mainly realize functions such as motor control algorithm and PWM output, and the resolver FPGA unit mainly undertakes the function of resolver simulation. The three units together constitute a complete set of motor simulator model algorithms.

[0059] This embodiment also provides a motor simulator control method based on ARM plus dual FPGA architecture, comprising the following steps:

[0060] [1] The port signal of the motor simulator is collected by the information acquisition module and transmitted to the voltage control module, and the voltage control module calculates the outer loop given signal; the port signal here is the port current.

[0061] For a motor simulator, the most important control goal should be to accurately simulate the external characteristics of the motor, including the motor's back electromotive force, output current, torque, etc. Therefore, it is necessary to obtain an accurate motor model and transplant it into the program. The conventional PMSM stator current equation is:

[0062]

[0063]

[0064] Among them, i d is the d-axis current, i q is the q-axis current, v d is the d-axis voltage, v q is the q-axis voltage, R is the stator resistance, L d is the d-axis inductance, L q is the q-axis inductance, p is the number of pole pairs, w m is the mechanical angular velocity, and F is the magnetic flux.

[0065] From this formula, the current set value of the motor simulator can be obtained. However, for the motor controller, conventional electronic control also controls the size of the port current. Therefore, if both the motor controller and the motor simulator control the current output, once a current difference occurs, it may cause the two devices to oscillate.

[0066] Therefore, in order to avoid the above problem, the present embodiment adopts the following stator voltage equation instead of the above stator current equation, that is, the inner loop given signal can be calculated by the following equation:

[0067]

[0068]

[0069] Where U dref is the given voltage of the outer ring of the d-axis, L d is the d-axis inductance, i d is the d-axis current, R is the stator resistance, L q is the q-axis inductance, p is the number of pole pairs, w m is the mechanical angular velocity, i q is the q-axis current, U qrrf It represents the given voltage of the outer ring of q axis, and F is the magnetic flux.

[0070] By using the above stator voltage equation, the motor simulator can be made into a voltage source, and the motor back electromotive force can be simulated by controlling the output voltage of the motor simulator. It can be seen that the core of the present invention is that the voltage control module adjusts the output voltage through the PI controller ( Figure 2 shown).

[0071] The voltage control module is mainly used to control the port voltage of the simulator. It uses a conventional dual-axis outer loop. Therefore, the effect of the outer loop is mainly determined by the outer loop given value U dref and U qref .

[0072] 【2】The motor model generation module discretizes its internal algorithm and outputs a feedback signal to the voltage control module.

[0073] In the discretization method, this embodiment uses the two-step Adams method for discretization, which greatly reduces the amount of calculation while improving the accuracy. After discretization is achieved using the Adams method, a higher operating speed is required to support the calculation of the model. At present, conventional simulators often use CPUs to realize model calculations. Since the CPU main frequency is low, it cannot support higher frequency calculations. Therefore, the present invention puts the model calculation into FPGA. FPGA is a hardware programmable logic circuit whose maximum calculation frequency can reach more than 10M, so using FPGA can obtain higher model accuracy.

[0074] After discretization, the output voltage is transformed into a feedback signal by the following formula:

[0075]

[0076] The three-phase output voltage U a , U b , U c (i.e. the actual terminal voltage of the motor simulator) is converted into the feedback signal U dfeed and U qfeed .

[0077] [3] Based on the outer loop given signal obtained in step [1] and the feedback signal obtained in step [2], the voltage control module calculates the inner loop given signal and transmits it to the inner loop control module through the motor model generation module.

[0078] The calculation method of the inner loop given signal is to make a difference between the outer loop given signal and the feedback signal to obtain the voltage feedback difference, that is:

[0079] U derr =U dref –U dfeed

[0080] U qerr =U qref –U qfeed

[0081] After that, the voltage feedback difference is sent to the PI controller in the voltage control module, and the PI controller is based on the port current I transmitted by the information acquisition module. dfeed and I qfeed , output U dout and U qout , U dout and U qout It is then sent to the motor model generation module through the data bus as the inner loop given, and then transmitted to the inner loop control module through the motor model generation module.

[0082] [4] The inner loop control module modulates the inner loop given signal and transmits it to the PWM generation module; at the same time, the motor model generation module transmits the phase signal to the resolver simulation module through the optical fiber communication module.

[0083] The inner loop control module mainly uses the inductor current IL to realize the inner loop control, and its given value is the inner loop given U dout and U qout , then the inner loop control module modulates the inner loop given signal into the required modulation signal and transmits it to the PWM generation module.

[0084] 【5】The SVPWM converter in the PWM generation module converts the inner loop given signal modulated by the inner loop control module into the voltage signal required by the PWM generator through SVPWM and transmits it to the PWM generator. The PWM generator compares the voltage signal with its internal triangular carrier to obtain the corresponding PWM wave and transmits it to the motor simulator.

[0085] At the same time, the AD sampling circuit in the resolver simulation module receives the phase signal, which is converted into a resolver signal after amplitude-frequency calculation, DDS conversion and resolver calculation, and transmitted to the motor simulator through the DA output circuit, thereby realizing the control of the motor simulator.

[0086] In this embodiment, in addition to the great influence of the motor model on the output of the simulator, another influential factor is the simulation accuracy of the resolver sensor. The full name of the resolver is a rotary transformer, which is an absolute position sensor connected between the motor controller and the motor to transmit the motor speed and phase signals.

[0087] From the description in the previous text, the resolver needs to receive the EXC signal and send out the SIN and COS signals, where the EXC signal is usually a sine wave above 10KH, so it is impossible to simulate such a high-frequency sine wave using a conventional CPU. Based on this problem, the present invention proposes a resolver simulation unit based on high-speed optical fiber and FPGA. The resolver FPGA is mainly responsible for collecting the EXC signal, and the high-speed optical fiber is responsible for receiving the speed and EXC signals transmitted by the centralized control FPGA unit. After the EXC signal and the speed signal are combined, they are transmitted to the external interface through the resolver FPGA.

[0088] The specific algorithm of the resolver signal is as follows:

[0089] SINout=EXC*motor SIN

[0090] COSout=EXC*motor COS

[0091] The SINout and COSout signals are resolver signals generated by the resolver analog module. After being output, the signals are converted into differential signals such as SINout+ and SINout-, COSout+ and COSout- through analog circuits. These differential signals are finally connected to the corresponding external interfaces through relays.

[0092] Figure 4 The figure shows the comparison of motor torque accuracy under different calculation frequencies. In the figure, the red curve is the torque waveform of the real motor, and the blue curve is the torque waveform output by the motor simulator. It can be seen from Figure (a) that at a calculation frequency of 10kHz, the calculation accuracy of the motor torque is not high, and oscillation occurs during the torque rise and stabilization process; while Figure (b) uses a calculation frequency of 1Mhz, and the real and simulated torque waveforms are basically consistent. Therefore, the present invention uses FPGA to perform motor model control, which can effectively improve the output accuracy of the simulator.

[0093] This embodiment also provides a computer-readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by the processor, the various processes of the above-mentioned motor simulator control method based on ARM plus dual FPGA architecture are implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0094] The computer-readable storage medium includes a computer read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, etc.

[0095] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the present invention.

Claims

1. A motor simulator control system based on ARM plus dual FPGA architecture, characterized by: Including ARM control unit, centralized control FPGA unit and resolver FPGA unit; The ARM control unit includes a voltage control module and an information acquisition module; the information acquisition module is connected to the voltage control module and is used to collect the port signal of the motor simulator and feed it back to the voltage control module; The centralized control FPGA unit includes a motor model generation module, an inner loop control module, a PWM generation module, and an optical fiber communication module which are connected in sequence; The motor model generation module is connected to the voltage control module and the optical fiber communication module respectively, and is used to output a feedback signal to the voltage control module and a phase signal to the optical fiber communication module; the voltage control module calculates an inner loop given signal based on the port signal and the feedback signal, and transmits the inner loop control module via the motor model generation module; the inner loop control module is used to modulate the inner loop given signal and transmit it to the PWM generation module; the output end of the PWM generation module is used to connect to the motor simulator, and the PWM generation module generates the PWM wave required by the motor simulator based on the modulated inner loop given signal; The resolver FPGA unit includes a resolver simulation module, an input end of which is connected to the optical fiber communication module for receiving a phase signal, and an output end of which is used to connect to a motor simulator; the resolver simulation module is used to convert the phase signal into a resolver signal and then output it to the motor simulator.

2. The motor simulator control system based on ARM plus dual FPGA architecture according to claim 1 is characterized in that: The resolver FPGA unit also includes a sensor fault simulation module, which is connected to the optical fiber communication module and the resolver simulation module respectively, and is used to simulate the open circuit and short circuit fault conditions of the sensor, and transmit the received phase signal to the resolver simulation module under this condition.

3. The motor simulator control system based on ARM plus dual FPGA architecture according to claim 2 is characterized in that: The PWM generation module includes an SVPWM converter and a PWM generator; The input end of the SVPWM converter is connected to the inner loop control module, and the output end is connected to the PWM generator, which is used to convert and compare the inner loop given signal modulated by the inner loop control module and transmit it to the PWM generator; the output end of the PWM generator is connected to the motor simulator to generate the PWM wave required by the motor simulator.

4. The motor simulator control system based on ARM plus dual FPGA architecture according to claim 3 is characterized in that: The information acquisition module includes a voltage collector, a current collector and a speed collector.

5. The motor simulator control system based on ARM plus dual FPGA architecture according to any one of claims 1 to 4, characterized in that: The resolver simulation module includes an AD sampling circuit, an amplitude frequency calculation module, a DDS conversion module, a resolver signal calculation module and a DA output circuit connected in sequence; The AD sampling circuit is connected to the optical fiber communication module, and is used to receive the phase signal, convert it into a digital signal and send it to the amplitude frequency calculation module. The digital signal is calculated by the amplitude frequency calculation module, the DDS conversion module and the resolver calculation module in sequence to obtain a resolver signal, which is converted into an analog signal by the DA output circuit and then output.

6. A motor simulator control method based on ARM plus dual FPGA architecture, characterized in that: The motor simulator control system based on ARM plus dual FPGA architecture according to any one of claims 1 to 5 comprises the following steps: [1] The port signal of the motor simulator is collected by the information acquisition module and transmitted to the voltage control module, and the voltage control module calculates the outer loop given signal; the port signal is the port current; 【2】The motor model generation module discretizes its internal algorithm and outputs a feedback signal to the voltage control module; [3] Based on the outer loop given signal obtained in step [1] and the feedback signal obtained in step [2], the voltage control module calculates the inner loop given signal, and transmits it to the inner loop control module through the motor model generation module; 【4】The inner loop control module modulates the inner loop given signal and transmits it to the PWM generation module; at the same time, the motor model generation module transmits the phase signal to the resolver simulation module through the optical fiber communication module; [5] The PWM generation module generates the corresponding PWM wave based on the modulated inner loop given signal and transmits it to the motor simulator; at the same time, the resolver simulation module converts the received phase signal into a resolver signal and transmits it to the motor simulator, thereby realizing the control of the motor simulator.

7. The motor simulator control method based on ARM plus dual FPGA architecture according to claim 6 is characterized in that: In step [1], the calculation process of the outer loop given signal is: Where U dref is the given voltage of the outer ring of the d-axis, L d is the d-axis inductance, i d is the d-axis current, R is the stator resistance, L q is the q-axis inductance, p is the number of pole pairs, w m is the mechanical angular velocity, i q is the q-axis current, U qref It represents the given voltage of the outer ring of q axis, and F is the magnetic flux.

8. The motor simulator control method based on ARM plus dual FPGA architecture according to claim 6 is characterized in that: In step [3], the inner loop given signal is calculated by subtracting the outer loop given signal from the feedback signal to obtain a voltage feedback difference, and the difference is sent to a PI controller in the voltage control module, and the PI controller outputs a corresponding inner loop given signal based on the port current transmitted by the information acquisition module.

9. The motor simulator control method based on ARM plus dual FPGA architecture according to claim 6 is characterized in that: Step [5] is as follows: The SVPWM converter in the PWM generation module converts the inner loop given signal modulated by the inner loop control module into the voltage signal required by the PWM generator and transmits it to the PWM generator. The PWM generator compares the voltage signal with its internal triangular carrier to obtain the corresponding PWM wave and transmits it to the motor simulator. At the same time, the AD sampling circuit in the resolver analog module converts the phase signal into a digital signal after receiving it. The digital signal is converted into a resolver signal after amplitude-frequency calculation, DDS conversion and resolver calculation in sequence. It is converted into an analog signal by the DA output circuit and then transmitted to the motor simulator, thereby realizing the control of the motor simulator.

10. A computer-readable storage medium having a computer program or instruction stored thereon, characterized in that: When the computer program or instruction is executed by the processor, the steps of the motor simulator control method based on ARM plus dual FPGA architecture described in any one of claims 6 to 9 are implemented.

Images