Digital-to-analog conversion control voltage variable LDO based on current negative feedback

Abstract

The invention belongs to the technical field of electronic equipment, and particularly relates to a digital-to-analog conversion control voltage variable LDO (Low Dropout Regulator) based on current negative feedback, which comprises a digital bit control DAC (Digital-to-Analog Converter) module, an error amplifier, an mos (Metal Oxide Semiconductor) tube, feedback resistors R1 and R2 and feedback capacitors C1 and C2, output current of the digital bit control DAC module is connected with a reverse input end of the error amplifier, a positive input end of the error amplifier is externally connected with reference voltage, and an output end of the error amplifier is connected with a grid electrode of the mos tube; a drain electrode of the mos tube is externally connected with power supply voltage, and a source electrode of the mos tube is connected with one ends of the R1, the R2, the C1 and the C2 respectively; the other end of the R1 is respectively connected with the other ends of the C1 and the C2, and is connected with the reverse input end of the error amplifier; the other end of the resistor R2 is grounded. According to the invention, the change of gain can be reduced through current negative feedback, so that the system is more stable under different working conditions, and oscillation and nonlinear distortion are reduced.

Description

Technical Field

[0001] The invention belongs to the technical field of electronic equipment, and in particular relates to a voltage-variable LDO controlled by digital-to-analog conversion based on current negative feedback. Background Art

[0002] Voltage-variable LDO (Low Dropout Regulator) is an innovative solution for different load requirements and power management application requirements. The early voltage-regulated LDO used an external resistor or voltage regulator to adjust the output voltage. With the development of digital circuit technology, LDOs that can accurately adjust the output voltage through digital control signals have emerged. This design usually uses a digital-to-analog converter (DAC) to control the LDO, thereby improving the regulation accuracy and flexibility.

[0003] In general, voltage variable LDO has gone through a development process from simple adjustable type to digital control type. In this process, significant progress has also been made in integration, power consumption optimization and miniaturization to meet the ever-changing application requirements.

[0004] like Figure 1 As shown, an existing voltage variable LDO is provided, and the main feature of the design of the programmable output voltage is that the output voltage is adjustable. By adjusting the ratio of the resistors in the feedback network, the circuit can output 6 voltages (2.0V, 1.8V, 1.6V, 1.4V, 1.2V, 1.0V) from 1V to 2V under 3.3V input. The selection of the output voltage is achieved by using a PMOS tube as a switch. The source of the PMOS tube is connected to one end of the feedback resistor, the drain is grounded, and the gate is connected to the logic control circuit (Logic control). The gate voltage of the PMOS tube determines whether the transistor is open or short-circuited, thereby changing the ratio of R1 / R2.

[0005] The prior art is to control the shutdown of the PMOS tube through a logic control circuit to change the value of the ground resistance to achieve output adjustment. Such a design will cause greater noise and generate more heat due to the large layout area occupied by the resistor, and will also cause high cost problems. In addition, this design will reduce the stability of the system. The oversized resistors may increase the risk of mechanical conflict between them and other components, leading to assembly problems or short circuits. In addition, the MOS tube will also produce a certain resistance value and cannot be completely treated as a wire, so the output voltage may not reach the expected value. Summary of the invention

[0006] In order to solve the above technical problems, the present invention provides a digital-to-analog conversion control voltage variable LDO based on current negative feedback, comprising: a digital bit control DAC module, an error amplifier OP, a MOS tube, feedback resistors R1, R2 and feedback capacitors C1, C2;

[0007] The output current of the digital bit control DAC module is connected to the reverse input terminal of the error amplifier OP, the forward input terminal thereof is externally connected to the reference voltage Vref_1v, and the output terminal thereof is connected to the gate of the MOS tube;

[0008] The power supply voltage and bias voltage of the error amplifier OP are provided by VDD and iBias;

[0009] The drain of the MOS tube is externally connected to the source voltage VDD, the source thereof is respectively connected to the feedback resistors R1, R2 and one end of the feedback capacitors C1, C2, and the base thereof is grounded to the ground terminal VSS;

[0010] The other end of the feedback resistor R1 is connected to the other end of the feedback capacitors C1 and C2 respectively, and is connected to the inverting input end of the error amplifier;

[0011] The other end of the feedback resistor R2 is connected to the ground end VSS.

[0012] Beneficial effects of the present invention:

[0013] The present invention can reduce the change of gain through current negative feedback, make the system more stable under different working conditions, and reduce oscillation and nonlinear distortion; through negative feedback, the nonlinear distortion in the amplifier or circuit can be effectively reduced, and the linearity of the output signal can be improved. Negative feedback helps to expand the bandwidth of the system, so that the signal maintains high quality in a wider frequency range; under certain configurations, current negative feedback can increase input impedance and reduce output impedance, thereby improving the overall performance of the circuit; at the same time, current negative feedback can enhance the system's resistance to external interference and improve the quality of the signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 This is a traditional adjustable LDO circuit diagram;

[0015] Figure 2 A schematic diagram of a voltage-variable LDO structure with digital-to-analog conversion control based on current negative feedback according to the present invention;

[0016] Figure 3 A schematic diagram of a feedback loop of a voltage-variable LDO controlled by digital-to-analog conversion based on current negative feedback according to the present invention;

[0017] Figure 4 Schematic diagram of the PMOS_DAC bias subcircuit of the present invention;

[0018] Figure 5 It is a schematic diagram of a PMOS_DAC current source sub-circuit of the present invention;

[0019] Figure 6 Schematic diagram of the control position of the LDO voltage regulator of the present invention. DETAILED DESCRIPTION

[0020] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0021] A variable voltage LDO controlled by digital-to-analog conversion based on current negative feedback, such as Figure 2 As shown, it includes: a digital bit control DAC module, an error amplifier OP, a MOS tube, feedback resistors R1, R2 and feedback capacitors C1, C2;

[0022] The output current of the digital bit control DAC module is connected to the reverse input terminal of the error amplifier OP, the forward input terminal thereof is externally connected to the reference voltage Vref_1v, and the output terminal thereof is connected to the gate of the MOS tube;

[0023] The power supply voltage and bias voltage of the error amplifier OP are provided by VDD and iBias;

[0024] The drain of the MOS tube is externally connected to the source voltage VDD, the source thereof is respectively connected to the feedback resistors R1, R2 and one end of the feedback capacitors C1, C2, and the base thereof is grounded to the ground terminal VSS;

[0025] The other end of the feedback resistor R1 is connected to the other end of the feedback capacitors C1 and C2 respectively, and is connected to the inverting input end of the error amplifier;

[0026] The other end of the feedback resistor R2 is connected to the ground end VSS.

[0027] like Figure 3As shown, resistors R1 and R2 form a negative feedback loop, which is voltage-current feedback. The error amplifier OP realizes potential clamping, compares the feedback voltage with the reference voltage Vref_1v, and forms a fixed proportional relationship between the output voltage of the power tube and the input voltage of the operational amplifier through the virtual short characteristics of the error amplifier, thereby ensuring the stability of the output voltage. The power supply voltage and bias voltage of the error amplifier OP are provided by VDD and iBias. The output end of the error amplifier is connected to the gate of the power tube. The function of the error amplifier is to collect the feedback voltage and compare it with the reference voltage and amplify it to the gate of the power tube. The power tube adjusts the on-voltage of the transistor according to the amplified signal to form a negative feedback loop. The programmable output of the LDO is realized through the DAC module, and the output current is affected by its digital potential change to control the output voltage of the LDO. When the digital potential changes, the DAC will have a corresponding current flowing into the LDO circuit. The current is controlled by the MOS switch of the DAC module and flows through the ground resistor R2 of the LDO to generate a voltage. Capacitors C1 and C2 are feedback capacitors, which mainly generate a zero point of the left half plane with the feedback resistor R1 to compensate for the stability of the circuit.

[0028] Analysis of the DAC control loop:

[0029] Due to the virtual-off characteristic of the op amp, the current flowing through resistor R1 is equal to the output current of the DAC. In order to facilitate the determination of the current direction, it is assumed that V out Greater than the reference voltage V ref (In the actual circuit, V out It may also be less than the reference voltage. In this case, the current on R1 is in the opposite direction, and the DAC flows out current). Due to the virtual short characteristic of the op amp, the voltage of V_in- is equal to V ref Also less than V out , the current direction is marked on the graph, and the functional relationship between the output voltage V_out and the reference voltage can be calculated: V out =V ref +I DAC R1;

[0030] Since the output voltage is adjustable and the reference voltage is fixed, the feedback factor F of the circuit is actually proportional to the DAC output I DAC In changing.

[0031] The feedback network is connected in parallel at the output end, and the sampling quantity is voltage. It is also connected in parallel at the input end, and the feedback quantity is current. That is, the feedback network is a voltage-current feedback network, and its feedback coefficient can be expressed as follows:

[0032]

[0033] After analysis, we know that the feedback amount is actually the current flowing through R1, that is, I DAC , and the sampling amount is the output voltage V of the circuit out , while V out =V ref +I DAC R1, so the feedback factor F can be written as: This is a about DAC Function of I DAC The current generated by the DAC module is negative when it flows into the DAC and positive when it flows out of the DAC. Because the DAC module has two current mirrors, PMOS and NMOS, these two current mirrors form PMOS_DAC and NMOS_DAC respectively.

[0034] After simplification, the output voltage is: V out =V ref -I DAC R1. Analyzing the formula, we can draw a conclusion: I DAC Full flow into the DAC, V OUT The larger (NMOS_DAC fully open, PMOS_DAC fully closed) I DAC Full-current DAC, V OUT The smaller (PMOS_DAC is fully on, NMOS_DAC is fully off).

[0035] Analog-to-digital conversion module DAC analysis:

[0036] The entire DAC module is divided into two parts, PMOS_DAC and NMOS_DAC, which are controlled by 8-bit digital bits. The lower four bits control PMOS_DAC, and the upper four bits control NMOS_DAC. The digital bits control the output current of the DAC module. The current output by the DAC flows through the feedback resistor R2 to the ground. The voltage generated by the resistor is input to the negative end of the op amp as feedback to achieve control of the LDO.

[0037] PMOS_DAC bias circuit as shown Figure 4 As shown, the entire PMOS_DAC module includes 15 circuit modules shown in the figure. Through 4-bit digital control, for a sub-circuit, the control terminals in the overall circuit are all high, M12 is turned off, M11 is turned on, and the bias voltage of M9 and M10 is provided by iBias. The current generated by M9 and M10 as current mirrors is grounded and has no effect on the output.

[0038] PMOS_DAC current source circuit Figure 5 As shown in the figure, the entire PMOS_DAC module includes 15 sub-circuit modules shown in the figure, which are controlled by 4-bit digital bits. For a sub-circuit, the control bit is PMOS <n>. PMOS in the overall circuit <n>Controlled by external digital circuitry.

[0039] PMOS <n>is high, M11 is closed, M12 is opened, and the current generated by M9 and M10 is normally output through iDAC; PMOS <n>is low, M11 is turned on, M12 is turned off, the current generated by M9 and M10 is grounded, and the iDAC output current decreases. Similar to PMOS_DAC, the NMOS_DAC control circuit is the same as PMOS. The PMOS module controls the outflow of DAC current, and the NMOS module is responsible for the inflow of DAC current, thereby obtaining a voltage divider on the feedback resistor to control the change of the output voltage at the LDO output end.

[0040] In this embodiment, the LDO of the present invention is simulated. Figure 6 1, which shows the control bits of the LDO regulator of the present invention, indicating that the LDO has a digitally programmable output voltage in the range of 0.75V to 1.25V in 17mV increments.

[0041] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.< / n> < / n> < / n> < / n>

Claims

1. A variable voltage LDO controlled by digital-to-analog conversion based on current negative feedback, characterized in that: include: Digital bit control DAC module, error amplifier OP, MOS tube, feedback resistors R1, R2 and feedback capacitors C1, C2; The output current of the digital bit control DAC module is connected to the reverse input terminal of the error amplifier OP, the positive input terminal thereof is externally connected to the reference voltage Vref_1v, and the output terminal thereof is connected to the gate of the MOS tube; The power supply voltage and bias voltage of the error amplifier OP are provided by VDD and iBias; The drain of the MOS tube is externally connected to the source voltage VDD, the source thereof is respectively connected to the feedback resistors R1, R2 and one end of the feedback capacitors C1, C2, and the base thereof is grounded to the ground terminal VSS; The other end of the feedback resistor R1 is connected to the other end of the feedback capacitors C1 and C2 respectively, and is connected to the inverting input end of the error amplifier; The other end of the feedback resistor R2 is connected to the ground end VSS.

2. The variable voltage LDO controlled by digital-to-analog conversion based on current negative feedback according to claim 1, characterized in that: The digital bit controlled DAC module is divided into two parts, PMOS_DAC and NMOS_DAC, and is controlled by 8-bit digital bits, wherein the lower four bits control the PMOS_DAC and the upper four bits control the NMOS_DAC.

3. The variable voltage LDO controlled by digital-to-analog conversion based on current negative feedback according to claim 2, characterized in that: The digital bit control DAC module affects the magnitude of the output current through the change of its digital potential, thereby controlling the output voltage Vout of the LDO. When the digital potential changes, the digital bit control DAC module controls the current flowing into the LDO circuit through the upper four bits of NMOS_DAC, and generates a voltage through the resistor R2 of the LDO.

4. The variable voltage LDO controlled by digital-to-analog conversion based on current negative feedback according to claim 1, characterized in that: The error amplifier OP collects the voltage fed back by the feedback resistor R1, compares it with the reference voltage Vref_1v, and amplifies it to the gate of the MOS tube.

5. The variable voltage LDO controlled by digital-to-analog conversion based on current negative feedback according to claim 1, characterized in that: The MOS tube adjusts its own on-state voltage according to the signal amplified by the error amplifier OP, and forms a negative feedback loop through feedback R1 and R2.

6. The variable voltage LDO controlled by digital-to-analog conversion based on current negative feedback according to claim 1, characterized in that: The feedback resistors R1 and R2 form a negative feedback loop, the feedback is voltage-current feedback, and the error amplifier OP realizes potential clamping.

7. The variable voltage LDO controlled by digital-to-analog conversion based on current negative feedback according to claim 1, characterized in that: The feedback capacitors C1 and C2 mainly generate a zero point of the left half plane with the feedback resistor R1 to compensate for the circuit stability.

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