P-type double-sided passivation selective contact TOPCon battery structure and preparation method thereof

Abstract

The invention relates to a P-type double-sided passivation selective contact TOPCon cell structure and a preparation method thereof, and belongs to the technical field of solar cells. According to the cell prepared by the invention, the short-circuit current and the photoelectric conversion photoelectric efficiency are improved, a polycrystalline silicon doping layer and a tunneling oxide layer in a non-metal contact region outside a front electrode position are removed through laser film opening, and a selective local contact structure is formed in a metal contact region at the electrode position; current parasitic absorption and contact recombination between metal and the surface of crystalline silicon are reduced; the PN junction is manufactured on the back face, front face light absorption is prevented from being affected, low-power laser is adopted to ensure that the back face PN junction is not damaged by the laser in a non-metal contact area outside the back face electrode position, and then back face current parasitic absorption is greatly reduced by etching and cleaning a back face tunneling oxide layer of the area.

Description

Technical Field

[0001] The invention belongs to the technical field of solar cells, and in particular relates to a P-type double-sided passivated selective contact TOPCon cell structure and a preparation method thereof. Background Art

[0002] The tunneling oxide passivated contact cell (TOPCon) is a high-efficiency cell based on a carrier selective collection passivation contact structure. It forms a passivation contact structure by preparing a tunneling oxide layer on the back of the cell and depositing a doped silicon layer. TOPCon cells are mainly divided into two categories, N-type TOPCon cells and P-type TOPCon cells. At present, the mainstream mass-produced crystalline silicon solar cells in the industry are mainly N-type TOPCon cells. N-type TOPCon cells are back-tunneling passivation contact structures, and the front of the cell still uses a traditional single crystal structure, which has the disadvantages of low passivation, high metal composite, and large contact resistance. Due to the parasitic absorption of light by the polycrystalline silicon layer, the existing P-type TOPCon cell structure will seriously affect the light absorption by making a full-surface TOPCon structure on the front surface of the cell, resulting in a serious reduction in the short-circuit current and a decrease in the cell's photoelectric conversion efficiency. Summary of the invention

[0003] The present invention proposes a P-type double-sided passivation selective contact TOPCon battery structure and preparation method based on a P-type silicon substrate and a double-sided metallization selective local contact structure to improve the short-circuit current Isc and photoelectric conversion efficiency η .

[0004] The technical solution of the present invention is as follows:

[0005] In a first aspect, the present invention provides a method for preparing a P-type double-sided passivated selective contact TOPCon cell, comprising the following steps:

[0006] (1) Double-sided polishing of a P-type silicon substrate;

[0007] (2) performing a first phosphorus diffusion on the back side of the P-type silicon substrate to prepare a back PN junction, and performing a first etching to remove the phosphorus plated on the front and side surfaces of the P-type silicon substrate;

[0008] (3) depositing on both sides of a P-type silicon substrate a front tunneling oxide layer, a back tunneling oxide layer, a front polysilicon layer, and a back polysilicon layer;

[0009] (4) preparing a first back mask layer on the back polysilicon layer, and removing the first back mask layer that is plated around the front side by a second etching process;

[0010] (5) performing boron diffusion on the front polysilicon layer to form a front boron-doped polysilicon layer, and preparing a front borosilicate glass (BSG) mask layer on the front boron-doped polysilicon layer;

[0011] (6) removing the first back mask layer by a third etching process;

[0012] (7) performing a second phosphorus diffusion on the back polysilicon layer to prepare a back phosphorus-doped polysilicon layer, and preparing a second back mask layer on the back phosphorus-doped polysilicon layer;

[0013] (8) Laser film opening on the front side;

[0014] (9) Front side velveting;

[0015] (10) Back laser film opening;

[0016] (11) performing a fourth etching on the back side;

[0017] (12) depositing an aluminum oxide passivation layer on both sides to obtain a front aluminum oxide passivation layer and a back aluminum oxide passivation layer;

[0018] (13) preparing a back silicon nitride anti-reflection layer and a front silicon nitride anti-reflection layer;

[0019] (14) Electrodes are prepared by metallization process.

[0020] Further, the double-sided polishing of the P-type silicon substrate includes: using an alkaline solution to perform alkaline polishing on the front and back sides of the P-type silicon substrate; optionally, the alkaline solution is sodium hydroxide (NaOH) or potassium hydroxide (KOH). Wherein, the P-type silicon substrate is selected from P-type single crystal silicon.

[0021] Furthermore, the first phosphorus diffusion is performed on the back side of the P-type silicon substrate to prepare a back PN junction, and the first etching is used to remove the phosphorus that is plated on the front and side of the P-type silicon substrate; wherein, during diffusion, the phosphorus will also adhere to the front and side of the P-type silicon substrate to form a wrapped "around plating" phenomenon, and a chain etching device can be used, using a mixture of nitric acid, sulfuric acid, and hydrofluoric acid as an etching solution for chain etching, with a ratio of 6:4:1, and a chain belt speed of 1.5M / min.

[0022] Further, the double-sided deposition on the P-type silicon substrate to obtain the front tunneling oxide layer, the back tunneling oxide layer, the front polysilicon layer and the back polysilicon layer includes: depositing the front tunneling oxide layer and the back tunneling oxide layer on the P-type silicon substrate, and then depositing the front polysilicon layer on the front tunneling oxide layer, and depositing the back polysilicon layer on the back tunneling oxide layer; wherein the deposition can be carried out by low pressure chemical vapor deposition (LPCVD);

[0023] The thickness of the front tunneling oxide layer and the back tunneling oxide layer are both 1.2-1.8 nm, preferably 1.4-1.7 nm, and most preferably 1.5 nm; the front tunneling oxide layer and the back tunneling oxide layer are both silicon dioxide layers;

[0024] The thickness of the front polysilicon layer and the back polysilicon layer are both 120-150 nm, preferably 130-140 nm.

[0025] Furthermore, a first back mask layer is prepared on the back polysilicon layer, and a second etching is used to remove the first back mask layer that is plated on the front side; wherein the first back mask layer is silicon oxynitride or silicon nitride, and its function is to protect the back polysilicon layer from being expanded and back-doped during the subsequent front boron diffusion; wherein the second etching uses a chain etching device, and high-concentration hydrofluoric acid can be used to clean the first back mask layer that is plated on the front side, and at the same time, a water film is used for protection of the back side, the hydrofluoric acid concentration is 20%, and the chain belt speed is 1.5M / min.

[0026] Furthermore, boron diffusion is performed on the front polysilicon layer to form a front boron-doped polysilicon layer, and a front borosilicate glass (BSG) mask layer is prepared on the front boron-doped polysilicon layer; wherein the front borosilicate glass (BSG) mask layer is formed by continuous oxygen permeation as a protective layer.

[0027] Furthermore, the third etching to remove the first back mask layer includes: using chain etching equipment, using a water film to protect the front side, using high-concentration hydrofluoric acid as an etching solution to clean the first back mask layer, the hydrofluoric acid concentration is 20%, and the chain belt speed is 1.5M / min.

[0028] Furthermore, a second phosphorus diffusion is performed on the back polysilicon layer to prepare a back phosphorus-doped polysilicon layer, and a second back mask layer is prepared on the back phosphorus-doped polysilicon layer; wherein, after the phosphorus diffusion, phosphorus oxychloride (POCl 3 ) layer; wherein, a second back mask layer is formed by continuous oxygen permeation, and the second back mask layer is a phosphosilicate glass (PSG) mask layer, which functions to protect the back phosphorus-doped polysilicon layer from being damaged after subsequent laser window opening on the light-receiving surface and texturing of the front non-metallic contact area.

[0029] Further, the front laser film opening includes: using a laser to remove the front borosilicate glass (BSG) mask layer, the front boron-doped polysilicon layer and the front tunneling oxide layer in the second front region, and retaining the front borosilicate glass (BSG) mask layer, the front boron-doped polysilicon layer and the front tunneling oxide layer in the first front region;

[0030] Among them, the front side of the P-type silicon substrate is divided into a first front side area and a second front side area, the first front side area is a metal contact area at the front electrode position, and the second front side area is a non-metal contact area outside the front electrode position.

[0031] The parameters of the laser are: power 60-70W, depth equal to the thickness of the front borosilicate glass mask layer, the front boron-doped polysilicon layer and the front tunneling oxide layer.

[0032] Furthermore, the front surface texturing includes: performing alkali texturing on the P-type silicon substrate in the second front area after the front laser film opening to form a pyramid texture surface; the alkali texturing uses sodium hydroxide or potassium hydroxide.

[0033] Furthermore, the back laser opening includes: using laser to remove the second back mask layer and phosphorus-doped polysilicon layer in the second back area, retaining the second back mask layer and phosphorus-doped polysilicon layer in the first back area, and retaining the back tunneling oxide layer.

[0034] The back of the P-type silicon substrate is divided into a first back area and a second back area, the first back area is a metal contact area at the back electrode position, and the second back area is a non-metal contact area outside the back electrode position. Different from the front film opening process, the laser power of the back laser film opening is relatively small, which is 40-50W, and the depth is the thickness of the second back mask layer, the phosphorus silicon glass mask layer and the phosphorus doped polysilicon layer, and the back tunneling oxide layer is retained to protect the back PN junction from damage during laser film opening.

[0035] Furthermore, the fourth etching on the back side includes: using the fourth etching to remove the back tunneling oxide layer of the second back side area; using chain etching equipment, using nitric acid as the etching solution, water film protection on the front side, using pure nitric acid concentration of 69%, and a chain belt speed of 1.5M / min, in order to further reduce the parasitic absorption of current.

[0036] Furthermore, the double-sided aluminum oxide passivation layer is deposited to obtain a front aluminum oxide passivation layer and a back aluminum oxide passivation layer, and the thickness of the front aluminum oxide passivation layer and the back aluminum oxide passivation layer is 3nm-5nm by ALD method.

[0037] Furthermore, the back side silicon nitride anti-reflection layer and the front side silicon nitride anti-reflection layer are prepared, and the thickness of the back side silicon nitride anti-reflection layer and the front side silicon nitride anti-reflection layer is 70-75nm; the refractive index of the back side silicon nitride anti-reflection layer and the front side silicon nitride anti-reflection layer is 1.9-2.1.

[0038] Furthermore, the metallization process for preparing electrodes includes: using non-burn-through pure silver paste to print the back main grid and the back fine grid in the first back area, and printing the front main grid and the front fine grid in the first front area, preparing the front electrode and the back electrode, and then sintering to obtain a finished battery to form a good ohmic contact. Wherein, the fine grid width is 12-30μm, preferably 20-30μm; the main grid width is 100-200μm, for example, 100μm, 110μm, 120μm, 130μm, 140μm, 150μm, 160μm, 170μm, 180μm, 190μm or 200μm.

[0039] Furthermore, the front electrode and the back electrode are both silver electrodes.

[0040] A P-type double-sided passivation selective contact TOPCon cell is prepared by the above preparation method, and the structure of the P-type double-sided passivation selective contact TOPCon cell comprises: a P-type silicon substrate 12, a front tunneling oxide layer 4 and a front boron-doped polysilicon layer 3 sequentially arranged in the first front region of the P-type silicon substrate 12, a front aluminum oxide passivation layer 2 arranged on the front of the P-type silicon substrate 12, a front silicon nitride anti-reflection layer 1 arranged on the front aluminum oxide passivation layer 2, and a front electrode 10;

[0041] A back PN junction 5 is arranged on the back side of a P-type silicon substrate 12, a back tunneling oxide layer 6 and a back phosphorus-doped polysilicon layer 7 are sequentially arranged in the first back region of the P-type silicon substrate 12, a back aluminum oxide passivation layer 8 is arranged on the back side of the P-type silicon substrate 12, a back silicon nitride anti-reflection layer 9 is arranged on the back aluminum oxide passivation layer 8, and a back electrode 11.

[0042] Compared with the prior art, the present invention has the following beneficial effects:

[0043] Using P-type single crystal silicon as the substrate is low-priced and the cost is greatly reduced.

[0044] Laser is used to remove the polysilicon doped layer and tunnel oxide layer in the non-metallic contact area outside the front electrode position to form a selective local contact structure, which greatly reduces the parasitic absorption of the front current. The electrode and the polysilicon boron doped layer in the front metal contact area are in contact, which greatly reduces the contact resistivity and metal contact recombination.

[0045] The PN junction is made on the back side, mainly to avoid the problem that the polysilicon cannot be completely removed when making the PN junction on the front side, which affects the light absorption on the front side and has a greater impact on the current. A low-power laser is used in the non-metallic contact area outside the back electrode position to ensure that the back PN junction is not damaged by the laser. The back tunneling oxide layer in this area is then cleaned by etching, which greatly reduces the parasitic absorption of the back current. The electrode and the polysilicon phosphorus-doped layer in the back metal contact area are in contact to form a selective local contact structure, which greatly reduces the contact resistivity and metal contact recombination. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 This is a schematic diagram of the overall structure of a P-type double-sided passivated selective contact TOPCon battery;

[0047] Figure 2 This is a partial enlarged schematic diagram of the first front area of ​​the TOPCon battery of the present invention;

[0048] Figure 3 This is a partial enlarged schematic diagram of the first back surface area of ​​the TOPCon battery of the present invention;

[0049] Figure numerals: front silicon nitride anti-reflection layer 1; front aluminum oxide passivation layer 2; front boron-doped polysilicon layer 3; front tunneling oxide layer 4; back PN junction 5; back tunneling oxide layer 6; back phosphorus-doped polysilicon layer 7; back aluminum oxide passivation layer 8; back silicon nitride anti-reflection layer 9; front electrode 10; back electrode 11; P-type silicon substrate 12. DETAILED DESCRIPTION

[0050] In order to make the purpose, technical scheme and advantages of the present invention clearer, the implementation scheme of the present application will be described in detail below in conjunction with specific examples. The technical terms and scientific terms used in the present invention have the meanings generally understood by those of ordinary skill in the art to which the present invention belongs, without other definitions. Without departing from the concept of the present invention, those skilled in the art may make various improvements and changes to the specific implementation methods of the present invention specification, which all belong to the protection scope of the present invention. The raw materials used in the present invention are all commercially available unless otherwise specified.

[0051] In a specific embodiment, a method for preparing a P-type double-sided passivated selective contact TOPCon cell comprises the following steps:

[0052] (1) Double-sided polishing of P-type silicon substrate:

[0053] P-type single crystal silicon is selected as the silicon substrate, and sodium hydroxide is used to perform alkaline polishing on both sides of the P-type single crystal silicon to remove surface defects.

[0054] (2) Perform the first phosphorus diffusion on the back of the P-type silicon substrate to prepare the back PN junction, and use the first chain etching to remove the phosphorus plated on the front and side of the P-type silicon substrate:

[0055] The first phosphorus diffusion is carried out on the back side of the P-type silicon substrate to prepare a back PN junction, and the first chain etching is carried out with a mixture of nitric acid, sulfuric acid and hydrofluoric acid to remove the phosphorus plated on the front and sides of the P-type silicon substrate. The ratio of nitric acid, sulfuric acid and hydrofluoric acid is 6:4:1, the chain belt speed is 1.5M / min, and the etching time is 65 seconds.

[0056] (3) Double-sided deposition on a P-type silicon substrate to obtain a front tunneling oxide layer, a back tunneling oxide layer, a front polysilicon layer, and a back polysilicon layer:

[0057] A 1.5 nm front tunneling oxide layer and a 1.5 nm back tunneling oxide layer are deposited on a P-type silicon substrate by LPCVD, wherein both the front tunneling oxide layer and the back tunneling oxide layer are silicon dioxide layers; then, a 140 nm front polysilicon layer is deposited on the front tunneling oxide layer, and a 140 nm back polysilicon layer is deposited on the back tunneling oxide layer;

[0058] (4) preparing a first back mask layer on the back polysilicon layer, and removing the first back mask layer that is plated around the front side by a second chain etching process:

[0059] A first back mask layer of silicon nitride is prepared on the back polysilicon layer, and a second chain etching is performed using hydrofluoric acid with a mass concentration of 20% to remove the first back mask layer that is plated on the front side. At the same time, a water film is used to protect the back side. The chain belt speed is 1.5 M / min, and the etching time is 60 seconds. The function of the first back mask layer of silicon nitride is to protect the back polysilicon layer from being expanded and reverse-doped during the subsequent front boron diffusion.

[0060] (5) Boron diffusion is performed on the front polysilicon layer to form a front boron-doped polysilicon layer, and a front borosilicate glass (BSG) mask layer is prepared on the front boron-doped polysilicon layer 3:

[0061] The front polysilicon layer is subjected to boron diffusion to form a front boron-doped polysilicon layer, and the front boron-doped polysilicon layer is continuously oxygenated to form a front borosilicate glass (BSG) mask layer as a protective layer.

[0062] (6) The first back mask layer is removed by a third chain etching: the front side is protected by a water film, and 20% mass concentration of hydrofluoric acid is used as an etching solution to clean the silicon nitride of the first back mask layer. The chain belt speed is 1.5 M / min, and the etching time is 60 seconds.

[0063] (7) Performing a second phosphorus diffusion on the back polysilicon layer to prepare a back phosphorus-doped polysilicon layer, and preparing a second back mask layer on the back phosphorus-doped polysilicon layer:

[0064] A second phosphorus diffusion is performed on the back polysilicon layer to prepare a back phosphorus-doped polysilicon layer. After phosphorus diffusion, phosphorus oxychloride (POCl 3 ) layer; then, a second back mask layer, a phosphosilicate glass (PSG) mask layer, is formed on the back phosphorus-doped polysilicon layer by continuous oxygen permeation. The function of the PSG mask layer is to protect the back phosphorus-doped polysilicon layer from being damaged after the subsequent laser window opening on the light-receiving surface and the texturing of the front non-metallic contact area.

[0065] (8) Front laser film opening:

[0066] A picosecond laser is used to remove the front borosilicate glass (BSG) mask layer, the front boron-doped polysilicon layer and the front tunneling oxide layer in the second front area (non-metal contact area outside the front electrode position), and retain the front borosilicate glass (BSG) mask layer, the front boron-doped polysilicon layer and the front tunneling oxide layer in the first front area (metal contact area at the front electrode position); wherein the laser parameters are: power of 65W, depth of the front borosilicate glass mask layer, the front boron-doped polysilicon layer and the thickness of the front tunneling oxide layer.

[0067] (9) Front side velveting:

[0068] After the front laser opening, sodium hydroxide is used to perform alkaline texturing on the P-type silicon substrate in the second front area to form a pyramid velvet surface. A layer of uneven microstructure is created on the surface, which helps to reduce the reflection of light by the battery.

[0069] (10) Back laser film opening:

[0070] The second back mask layer of phosphosilicate glass (PSG) mask layer and part of the phosphorus-doped polysilicon layer in the second back region (non-metal contact region outside the back electrode position) are removed by a picosecond laser, and the second back mask layer of phosphosilicate glass mask layer and phosphorus-doped polysilicon layer in the first back region (metal contact region at the back electrode position) are retained, and the back tunneling oxide layer is retained. The difference from the front film opening process is that the laser power of the back laser film opening is relatively small, which is 45W, and the depth is the thickness of the second back mask layer of phosphosilicate glass mask layer and phosphorus-doped polysilicon layer, and the back tunneling oxide layer is retained to protect the back PN junction from being damaged during the laser film opening.

[0071] (11) Perform the fourth chain etching on the back side:

[0072] The fourth chain etching is used to remove the back tunneling oxide layer of the second back area (non-metallic contact area outside the back electrode position); 69% mass concentration nitric acid is used as the etching solution, the front side is protected by water film, the chain belt speed is 1.5M / min, and the etching time is 60 seconds.

[0073] (12) Depositing an aluminum oxide passivation layer on both sides to prepare a front aluminum oxide passivation layer and a back aluminum oxide passivation layer: ALD is used to prepare a 5 nm front aluminum oxide passivation layer and a 5 nm back aluminum oxide passivation layer.

[0074] (13) Preparing a back silicon nitride anti-reflection layer and a front silicon nitride anti-reflection layer: ALD is used to prepare a 70nm back silicon nitride anti-reflection layer and a 70nm front silicon nitride anti-reflection layer, wherein the refractive index of the back silicon nitride anti-reflection layer and the front silicon nitride anti-reflection layer is 2; wherein silicon nitride as an anti-reflection layer can increase the absorption of light and prevent the P-type silicon substrate from being oxidized.

[0075] (14) Electrode preparation by metallization process: Use non-burn-through pure silver paste to print the back main grid and back fine grid in the back metal electrode contact area, and print the front main grid and front fine grid in the front metal electrode contact area to prepare the front electrode and back electrode, and then sinter to obtain the TOPCon battery product to form a good ohmic contact. Among them, the actual width of the fine grid after screen printing is 25μm, and the width of the main grid is 110μm.

[0076] In a specific embodiment, a P-type double-sided passivation selective contact TOPCon cell is prepared by the above preparation method, and the structure of the P-type double-sided passivation selective contact TOPCon cell includes: a P-type silicon substrate 12, a front tunneling oxide layer 4 and a front boron-doped polysilicon layer 3 sequentially arranged in the first front region of the P-type silicon substrate 12, a front aluminum oxide passivation layer 2 arranged on the front of the P-type silicon substrate 12, a front silicon nitride anti-reflection layer 1 arranged on the front aluminum oxide passivation layer 2, and a front electrode 10;

[0077] A back PN junction 5 is arranged on the back side of a P-type silicon substrate 12, a back tunneling oxide layer 6 and a back phosphorus-doped polysilicon layer 7 are sequentially arranged in the first back region of the P-type silicon substrate 12, a back aluminum oxide passivation layer 8 is arranged on the back side of the P-type silicon substrate 12, a back silicon nitride anti-reflection layer 9 is arranged on the back aluminum oxide passivation layer 8, and a back electrode 11.

[0078] Battery structure Figure 1-Figure 3 As shown, Figure 1 This is the overall schematic diagram of the TOPCon battery structure. Figure 2 is a partial enlarged schematic diagram of the first front area, that is, a partial enlarged schematic diagram of the metal contact area at the front electrode position; Figure 3 It is a partial enlarged schematic diagram of the first back side area of ​​the battery, that is, a partial enlarged schematic diagram of the metal contact area at the back side electrode position.

[0079] The TOPCon battery prepared in the embodiment of the present invention and the conventional TOPCon battery were tested to obtain the electrical performance parameters of the battery shown in Table 1:

[0080] Table 1. Battery electrical performance parameters

[0081]

[0082]

[0083] Among them, open circuit voltage (Voc), short circuit current (Isc), fill factor (FF), and photoelectric conversion efficiency (Eff).

[0084] It can be seen from Table 1 that the TOPCon battery prepared in the embodiment of the present invention has better electrical performance parameters and higher photoelectric conversion efficiency.

[0085] Finally, it should be noted that the above is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the aforementioned embodiments, it is still possible for those skilled in the art to modify the technical solutions described in the aforementioned embodiments or to make equivalent substitutions for some of the technical features therein. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for preparing a P-type double-sided passivated selective contact TOPCon cell, characterized in that: The following steps are involved: (1) Double-sided polishing of a P-type silicon substrate; (2) performing a first phosphorus diffusion on the back side of the P-type silicon substrate to prepare a back PN junction, and performing a first etching to remove the phosphorus plated on the front and side surfaces of the P-type silicon substrate; (3) depositing on both sides of a P-type silicon substrate a front tunneling oxide layer, a back tunneling oxide layer, a front polysilicon layer, and a back polysilicon layer; (4) preparing a first back mask layer on the back polysilicon layer, and removing the first back mask layer that is plated around the front side by a second etching process; (5) performing boron diffusion on the front polysilicon layer to form a front boron-doped polysilicon layer, and preparing a front borosilicate glass mask layer on the front boron-doped polysilicon layer; (6) removing the first back mask layer by a third etching process; (7) performing a second phosphorus diffusion on the back polysilicon layer to prepare a back phosphorus-doped polysilicon layer, and preparing a second back mask layer on the back phosphorus-doped polysilicon layer; (8) Laser film opening on the front side; (9) Front side velveting; (10) Back laser film opening; (11) performing a fourth etching on the back side; (12) depositing an aluminum oxide passivation layer on both sides to obtain a front aluminum oxide passivation layer and a back aluminum oxide passivation layer; (13) preparing a back silicon nitride anti-reflection layer and a front silicon nitride anti-reflection layer; (14) Electrodes are prepared by metallization process.

2. The preparation method according to claim 1, characterized in that: The double-sided deposition on the P-type silicon substrate to obtain a front tunneling oxide layer, a back tunneling oxide layer, a front polysilicon layer and a back polysilicon layer includes: depositing a front tunneling oxide layer and a back tunneling oxide layer on the P-type silicon substrate, then depositing a front polysilicon layer above the front tunneling oxide layer, and depositing a back polysilicon layer above the back tunneling oxide layer.

3. The preparation method according to claim 2, characterized in that: The thickness of the front tunneling oxide layer and the back tunneling oxide layer are both 1.2-1.8 nm; The front tunneling oxide layer and the back tunneling oxide layer are both silicon dioxide layers; The thickness of the front polysilicon layer and the back polysilicon layer are both 120-150nm.

4. The preparation method according to claim 1, characterized in that: The front laser film opening comprises: using laser to remove the front borosilicate glass mask layer, the front boron-doped polysilicon layer and the front tunneling oxide layer in the second front area, and retaining the front borosilicate glass mask layer, the front boron-doped polysilicon layer and the front tunneling oxide layer in the first front area; The first front area is a metal contact area at the front electrode position, and the second front area is a non-metal contact area outside the front electrode position.

5. The preparation method according to claim 1 or 4, characterized in that: The front surface texturing includes: performing alkali texturing on the P-type silicon substrate in the second front surface area after the front surface laser film opening to form a pyramid texture surface.

6. The preparation method according to claim 1, characterized in that: The back laser film opening comprises: removing the second back mask layer and the phosphorus-doped polysilicon layer in the second back region by laser, retaining the second back mask layer and the phosphorus-doped polysilicon layer in the first back region, and retaining the back tunneling oxide layer; The first back area is a metal contact area at the back electrode position, and the second back area is a non-metal contact area outside the back electrode position.

7. The preparation method according to claim 1, characterized in that: The thickness of the front aluminum oxide passivation layer and the back aluminum oxide passivation layer are both 3nm-5nm.

8. The preparation method according to claim 1, characterized in that: The thickness of the back silicon nitride anti-reflection layer and the front silicon nitride anti-reflection layer are both 70-75 nm.

9. The preparation method according to claim 8, characterized in that: The refractive indexes of the back silicon nitride anti-reflection layer and the front silicon nitride anti-reflection layer are both 1.9-2.

1.

10. A P-type double-sided passivated selective contact TOPCon cell, prepared by the preparation method according to any one of claims 1 to 9, characterized in that: The structure of the P-type double-sided passivation selective contact TOPCon cell comprises: a P-type silicon substrate, a front tunneling oxide layer and a front boron-doped polysilicon layer sequentially arranged in the first front region of the P-type silicon substrate, a front aluminum oxide passivation layer arranged on the front of the P-type silicon substrate, a front silicon nitride anti-reflection layer arranged on the front aluminum oxide passivation layer, and a front electrode; A back PN junction is arranged on the back side of a P-type silicon substrate, a back tunneling oxide layer and a back phosphorus-doped polysilicon layer are arranged in sequence in the first back side region of the P-type silicon substrate, a back aluminum oxide passivation layer is arranged on the back side of the P-type silicon substrate, a back silicon nitride anti-reflection layer is arranged on the back aluminum oxide passivation layer, and a back electrode.

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