Single-side polishing method for 8-inch silicon carbide wafer

Abstract

The invention relates to a single-sided polishing method for an 8-inch silicon carbide wafer, which adopts a ceramic disc with the radius less than 8 inches to perform single-sided polishing on the 8-inch silicon carbide wafer, and ensures mechanical balance and efficient polishing in the polishing process by reasonably setting the distance between the wafer and the ceramic disc as well as the distance between the wafer and a polishing disc. And the fluidity and the uniformity of the polishing solution are further enhanced through the optimal design of the polishing cloth and the groove body. The small-size wafer is used as an auxiliary tool, the stability and the machining flexibility of the polishing process are improved, the surface flatness of the polished wafer meets the actual production requirement, meanwhile, the production cost is remarkably reduced, and the equipment utilization rate and the production efficiency are improved. The silicon carbide wafer polishing method is efficient, low in cost and high in flexibility, and has remarkable economic benefits and practical value.

Description

Technical Field

[0001] The invention relates to the technical field of polishing, and in particular to a single-side polishing method for an 8-inch silicon carbide wafer. Background Art

[0002] Please refer to Figures 1 to 3 As shown, in the prior art, the rough polishing and fine polishing of some silicon carbide wafers are usually carried out by a single-sided polishing machine. The single-sided polishing machine provides multiple loading blocks that can vacuum absorb ceramic disks. Each loading block vertically presses a ceramic disk with multiple silicon carbide wafers bonded to it above a horizontally set polishing disk. The required polishing surface of the silicon carbide is pressed downward and contacts the polishing layer set on the surface of the polishing disk. Finally, the polishing disk and the ceramic disk are rotated separately to complete the polishing of the silicon carbide wafer.

[0003] Among them, the loading blocks provided by the existing single-sided polishing machines can often only absorb ceramic discs within a set size, and cannot support the selection of ceramic disc diameters within a larger range, resulting in the ceramic discs being able to bond and polish silicon carbide wafers of fixed sizes. For example, the diameter of the ceramic disc that can be absorbed by the loading block of the single-sided polishing machine is 360mm. Normally, only 2 to 3 6-inch silicon carbide wafers can be symmetrically bonded along the center of the ceramic disc for single-sided polishing, and it is difficult to polish larger silicon carbide wafers.

[0004] When the diameter of the ceramic disc is less than 400mm, the diameter of the 8-inch silicon carbide wafer is already larger than the radius of the ceramic disc. No matter how the 8-inch silicon carbide wafer is placed, a part of the wafer will be located in the center area of ​​the ceramic disc. The linear speed of the center area of ​​the ceramic disc is low when the ceramic disc rotates, and the corresponding de-massing effect is poor, resulting in a poor overall TTV value of the silicon carbide wafer. However, if a ceramic disc that can circumferentially bond and arrange multiple 8-inch silicon carbide wafers needs to be used normally for polishing, a larger single-sided polishing machine needs to be re-customized, which requires higher costs. At present, most domestic 8-inch silicon carbide wafer products are produced in small batches for trial production. Therefore, a single-sided polishing method for 8-inch silicon carbide wafers is needed, which can use a smaller single-sided polishing machine to polish 8-inch silicon carbide wafers, and the surface flatness after polishing can meet actual production requirements. Summary of the invention

[0005] At present, most of the domestic 8-inch silicon carbide wafer products are produced in small batches for trial production. Therefore, a single-sided polishing method for 8-inch silicon carbide wafers is needed. A smaller single-sided polishing machine can be used to polish the 8-inch silicon carbide wafer, and the surface flatness after polishing can meet the actual production requirements.

[0006] A single-side polishing method for a silicon carbide wafer comprises the following steps:

[0007] S1. Disposing the edge of the first silicon carbide wafer close to the edge of the ceramic disk, wherein the edge of the ceramic disk is close to the edge of the polishing disk;

[0008] S2. Take two second silicon carbide wafers and place them on the free area of ​​the ceramic disk, and the distances from the centers of the two second silicon carbide wafers to the center of the first silicon carbide wafer are the same;

[0009] S3. Make a circle with O1 as the center. The outer and inner rings of the circle intersect with the line AB respectively. The two intersection points fall on the left and right sides of O2 respectively. The distance between the outer intersection point and O2 is l1, and the distance between the inner intersection point and O2 is l2. Moreover, l1, l2 and O2O3 should satisfy: O2O3≤l2≤l1;

[0010] S4. additionally opening a groove for the polishing cloth within the two circular rings of step S3, and opening a new groove along the diagonal of the smallest square unit formed by the original groove;

[0011] S5. After the above settings are completed, the Si surface and the C surface of the first silicon carbide wafer are roughly polished respectively.

[0012] As a preferred technical solution for a single-side polishing method of a silicon carbide wafer, the distance between the edge of the first silicon carbide wafer and the edge of the ceramic disk is 2 mm to 10 mm, and the distance between the edge of the ceramic disk and the edge of the polishing disk is 10 mm to 50 mm.

[0013] As a preferred technical solution for a single-sided polishing method of a silicon carbide wafer, the closest point on the first silicon carbide wafer to the edge of the ceramic disk is marked as point A, and a straight line passing through the center O3 of the first silicon carbide wafer is drawn from point A, and the intersection of the straight line and the edge of the other side of the first silicon carbide wafer is B, and the straight line also passes through the center O2 of the ceramic disk.

[0014] As a preferred technical solution for a single-side polishing method of a silicon carbide wafer, the center of one of the second silicon carbide wafers is marked as O 2， The angle formed by connecting O2O4, O2O4 and O2B is α, and α should satisfy: 30°≤α≤60°.

[0015] As a preferred technical solution for a single-side polishing method of a silicon carbide wafer, the initial use thickness δ of the two second silicon carbide wafers achieved through the thinning process should satisfy: 482μm≤δ≤485μm.

[0016] As a preferred technical solution for a single-side polishing method for a silicon carbide wafer, the angle between the new groove and the original groove body is 30° to 60°.

[0017] As a preferred technical solution for a single-side polishing method for a silicon carbide wafer, the openings at both ends of the new groove are symmetrically arranged along the diagonal of the minimum square unit.

[0018] As a preferred technical solution for a single-sided polishing method of a silicon carbide wafer, when the first silicon carbide wafer is flipped between two rough polishings, the side of the first silicon carbide wafer that is close to the edge of the ceramic disk during the first rough polishing should be located near O2 after flipping.

[0019] As a preferred technical solution for a single-sided polishing method of a silicon carbide wafer, the size of the first silicon carbide wafer is 8 inches, and the size of the second silicon carbide wafer is 4 inches.

[0020] Beneficial effects of the present invention:

[0021] The present invention uses a ceramic disk with a radius of less than 8 inches to perform single-side polishing on an 8-inch silicon carbide wafer, making full use of existing equipment and avoiding the high cost of purchasing large-scale polishing equipment. By reasonably setting the positional relationship between the silicon carbide wafer and the ceramic disk, the mechanical balance and polishing efficiency during the polishing process are ensured, so that the surface flatness of the polished wafer can meet the actual production requirements, which not only improves the polishing effect, but also significantly reduces the production cost;

[0022] At the same time, the present invention also cleverly utilizes the remaining small-sized wafers as auxiliary polishing tools. By arranging small-sized wafers in the free area of ​​the ceramic disk, the load on the ceramic disk can be effectively balanced, the stability during the polishing process is ensured, and the vibration and deviation caused by the unbalanced load are avoided. This method not only improves the polishing quality, but also increases the flexibility of the processing process, so that wafers of different sizes can be processed on the same device, greatly improving the utilization rate and production efficiency of the equipment;

[0023] In addition, the optimized design of the polishing cloth and the tank further enhances the fluidity and uniformity of the polishing liquid during the polishing process, ensuring that each wafer surface can be polished evenly and effectively. This design not only improves the polishing effect, but also extends the service life of the polishing cloth, further reducing production costs.

[0024] In summary, the present invention provides an efficient, low-cost, and highly flexible single-side polishing method for 8-inch silicon carbide wafers, which is not only significantly innovative in technology, but also has important economic benefits and practical value in practical applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 It is a schematic diagram of the structure of the polishing disc and the ceramic disc;

[0026] Figure 2 Schematic diagram of the polishing assembly for a 6-inch silicon carbide wafer;

[0027] Figure 3 Schematic diagram of 8-inch silicon carbide wafer polishing assembly;

[0028] Figure 4 Schematic diagram of polishing assembly for 8-inch and 4-inch silicon carbide wafers;

[0029] Figure 5 A schematic diagram showing adjustments for the polishing cloth;

[0030] Figure 6 A schematic diagram of a structure in which an additional groove is provided for the polishing cloth within the range of two circular rings;

[0031] Figure 7 The schematic diagram of the structure of the groove body of the original polishing cloth;

[0032] Figure 8 This is a schematic diagram of the structure of the existing polishing cloth groove;

[0033] Fig. 9 It is a partial schematic diagram of the original tank;

[0034] Fig.10 It is a partial schematic diagram of the existing tank;

[0035] Fig.11 Schematic diagram of 8-inch silicon carbide wafer polishing assembly;

[0036] Fig.12 Schematic diagram of the area affected by the ring when the wafer is at different rotation positions

[0037] Fig.13 Thickness analysis diagram of the third set of data in Example 1, (a) top plan view, (b) thickness distribution view;

[0038] Fig.14 Thickness analysis diagram of the fourth group of data in Example 1, (a) top plan view, (b) thickness distribution view;

[0039] Fig.15 Thickness analysis diagram of the third group of data in Comparative Example 1, (a) top plane schematic diagram, (b) thickness distribution schematic diagram; DETAILED DESCRIPTION

[0040] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are described in detail below in conjunction with the embodiments of the specification.

[0041] In the following description, many specific details are set forth to facilitate a full understanding of the present invention, but the present invention may also be implemented in other ways different from those described herein, and those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0042] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The term "in one embodiment" that appears in different places in this specification does not necessarily refer to the same embodiment, nor does it refer to a separate or selective embodiment that is mutually exclusive with other embodiments.

[0043] Example 1

[0044] The present invention provides a single-side polishing method for an 8-inch silicon carbide wafer, which is an improvement on the original polishing method for an 8-inch silicon carbide wafer, and mainly solves the problem that the polishing effect of the silicon carbide wafer located at the center of the ceramic disk is poor, and includes the following specific steps:

[0045] For the first step, please refer to Figure 4 As shown, the edge of the 8-inch silicon carbide wafer is placed close to the edge of the ceramic disk, so that the distance between the 8-inch silicon carbide wafer and the edge of the ceramic disk is 2 mm to 10 mm; the edge of the ceramic disk is close to the edge of the polishing disk, and the distance between the edge of the ceramic disk and the edge of the polishing disk is 10 mm to 50 mm;

[0046] It should be noted that when the distance to the edge is too large, the speed limit of the silicon carbide wafer is relatively small, which will have a certain impact on the polishing effect. When the distance to the edge is too small, the load position may not be guaranteed to remain unchanged due to the influence of the accuracy of the equipment. If it exceeds the range of the large disc below, it will pose risks to the equipment and the wafer, so a safe distance needs to be reserved in the design.

[0047] In addition, the closest point on the 8-inch silicon carbide wafer to the edge of the ceramic disk is marked as point A. A straight line is drawn from point A through the center O3 of the first silicon carbide wafer, and the intersection of the straight line and the edge of the other side of the first silicon carbide wafer is point B. At the same time, the straight line also passes through the center O2 of the ceramic disk. By marking point A and drawing a straight line, the position of the wafer on the ceramic disk can be accurately determined. This straight line passes through the center O3 of the wafer and the center O2 of the ceramic disk, ensuring the symmetrical positioning of the wafer on the ceramic disk, which helps the precise operation of the subsequent polishing steps; the setting of this straight line enables the wafer to maintain uniform force during the polishing process, avoiding uneven force caused by position offset, especially when flipping the wafer, ensuring that different parts of the wafer can be uniformly stressed at different positions, improving the uniformity and quality of polishing.

[0048] In the second step, two 4-inch silicon carbide wafers are placed on the empty area of ​​the ceramic plate. The distance between the center of the two 4-inch silicon carbide wafers and the center of the 8-inch silicon carbide wafer is the same, so that the load of the wafers on the ceramic plate can be balanced during polishing. The center of one of the 4-inch silicon carbide wafers is marked as O. 2，Connect O2O4, the angle formed by O2O4 and O2B is α, α should meet the following requirements: 30°≤α≤60°, and the edge of the 4-inch silicon carbide wafer is set close to the edge of the ceramic plate; if the angle is too large or too small, the wafer load center on the ceramic plate will be biased to the left or right, thus affecting the polishing effect;

[0049] It should be noted that the initial use thickness δ of the two 4-inch silicon carbide wafers achieved through the thinning process should satisfy: 482μm≤δ≤485μm, so as to balance the load and improve the polishing effect.

[0050] The third step is to adjust the polishing cloth. Please refer to Figure 5 As shown, two circular rings are made with O1 as the center, that is, O1 is the center of the polishing disk, the outer ring and the inner ring intersect with the straight line AB respectively, and the two intersection points fall on the left and right sides of O2 respectively. The distance between the outer ring intersection point and O2 is l1, and the distance between the inner ring intersection point and O2 is l2, and l1, l2 and O2O3 should satisfy: O2O3≤l2≤l1.

[0051] It should be noted that point O3 is symmetrical to point O3, and the range of the circular ring formed between the two points is the minimum design area of ​​the circular ring of the present invention. Figure 5 and 12 In order to ensure that the shadow area is roughly uniform, the outer ring should be moved outward appropriately to improve the polishing effect.

[0052] Specifically, by appropriately moving the outer ring outward, the coverage area of ​​the polishing cloth in the high-speed area can be increased, ensuring that the polishing cloth can always maintain effective contact with the wafer surface during the polishing process. The linear speed near the O2 point of the silicon carbide wafer is relatively small, and the polishing effect is relatively poor compared to other places. The above design can improve the polishing efficiency at the place with lower linear speed. This adjustment can also balance the pressure distribution in different areas during the polishing process, avoid uneven polishing caused by excessive or insufficient local pressure, thereby improving the flatness of the wafer surface after polishing. Through the reasonable design and adjustment of the polishing cloth and the ring, the present invention not only improves the polishing efficiency and effect, but also extends the service life of the polishing cloth and reduces production costs.

[0053] Step 4, please refer to 6 to 10, open additional grooves on the polishing cloth within the two circular rings in step 3, and open new grooves along the diagonal lines of the smallest square units formed by the original grooves.

[0054] It should be noted that the angle between the new groove and the original groove body is 30° to 60°, and the openings at both ends of the new groove are symmetrically arranged along the diagonal of the minimum square unit, thereby increasing the flow rate of polishing liquid within the circular range, thereby enhancing the rough polishing effect of silicon carbide wafers within the circular range.

[0055] Specifically, the openings at both ends of the new groove are symmetrically arranged along the diagonal of the smallest square unit, which can ensure that the flow path of the polishing liquid in the groove body is more reasonable and efficient. This symmetrical setting helps to balance the liquid pressure on the polishing cloth and avoid the problem of poor local polishing effect caused by uneven liquid distribution during the polishing process.

[0056] By opening new grooves within the circular ring, the flow rate of the polishing liquid has been significantly increased, thereby enhancing the rough polishing effect on the silicon carbide wafer. This design allows the polishing liquid to reach every corner of the polishing area faster and more evenly, ensuring sufficient and uniform liquid supply throughout the polishing process, especially in the edge area of ​​the wafer. The increased liquid flow rate can effectively improve the polishing efficiency and reduce edge defects caused by insufficient polishing liquid.

[0057] In addition, the setting of the new groove can also reduce the wear of the polishing cloth during the polishing process, extend the service life of the polishing cloth, and further reduce the production cost. Through reasonable groove design and liquid flow control, the present invention not only improves the polishing efficiency and effect, but also ensures the flatness and uniformity of the wafer surface.

[0058] Step 5, please refer to Figure 4 and 11 As shown, after the above settings are completed, the Si surface and C surface of the 8-inch silicon carbide wafer are rough-polished respectively. When the 8-inch silicon carbide wafer is flipped between two rough-polishings, the side of the 8-inch silicon carbide wafer close to the edge of the ceramic disk during the first rough-polishing should be located near the O2 point after flipping, ensuring that the polishing loads on both sides of the silicon carbide wafer are the same after flipping, thereby improving the polishing effect;

[0059] It should be noted that this design takes into account the mechanical changes that the wafer is subjected to at different positions during the polishing process. By flipping the wafer so that the edge area during the first rough polishing is close to the O2 point during the second rough polishing, it can ensure that all areas of the wafer are evenly stressed during the polishing process, thereby improving the overall polishing effect.

[0060] Specifically, during the first rough polishing, one side edge of the 8-inch silicon carbide wafer is at the edge of the ceramic disk, so that the high-speed area at the edge of the ceramic disk can be used for effective polishing. By flipping the wafer, the side close to the edge of the ceramic disk during the first rough polishing is located near the O2 point after flipping, so that this area can be polished under a different mechanical environment during the second polishing, thereby compensating for the possible deficiencies in the first polishing and further improving the polishing effect.

[0061] The flatness of the silicon carbide wafer after rough polishing was tested, and the TTV (Total Thickness Variation) value (Table 1) and thickness analysis image ( Fig.13 and Fig.14 ), the overall TTV value of the sample is significantly reduced compared with before, and most of the data can meet the requirements (<10μm), indicating that the polishing effect is improved.

[0062] The specific detection steps are as follows:

[0063] Flatness measurement: Use high-precision optical or mechanical measuring instruments to detect the flatness of the polished silicon carbide wafer and record the thickness value of each point on the wafer surface.

[0064] Data analysis: Input the measured data into the computer, analyze the data through the dedicated software, and calculate the TTV value of the wafer. The smaller the TTV value, the smaller the thickness variation of the wafer surface and the higher the flatness.

[0065] Image generation: Generate a thickness analysis image based on the measurement data to show the thickness distribution at different locations on the wafer surface. The image allows you to intuitively observe the flatness of the wafer surface.

[0066] The test results show that the overall TTV value of the sample has been significantly reduced compared to before, and most of the data can meet the requirements (<10μm). The specific data are shown in Table 1:

[0067] Table 1 TTV values ​​of Example 1

[0068]

[0069]

[0070] Fig.13 and 14 The thickness analysis image further shows the distribution of wafer surface thickness. It can be clearly seen from the image that there is no obvious high thickness area in the middle of the wafer, indicating that the thickness change on the wafer surface during the polishing process tends to be uniform and the polishing effect is good. Fig.13 The thickness distribution of the wafer surface before polishing is shown, and it can be seen that there is an obvious area with higher thickness in the middle. Fig.14 The thickness distribution of the wafer surface after polishing is shown. The thicker area in the middle has disappeared and the surface flatness has been significantly improved.

[0071] Through this rough polishing, the flatness of the silicon carbide wafer surface has been significantly improved, and the TTV value has been greatly reduced, indicating that the polishing process has effectively improved the quality of the wafer surface. This result verifies the significant advantages of the method of the present invention in improving the wafer polishing effect, and provides a reliable technical guarantee for the production of high-quality silicon carbide wafers.

[0072] Comparative Example 1

[0073] The original single-sided rough polishing steps for 8-inch silicon carbide wafers are as follows:

[0074] 8-inch silicon carbide wafers were selected as polishing test samples. Before the experiment, it was ensured that the samples were processed by the front-end process, such as grinding, chamfering and thinning. The diameter of the ceramic disc was 360mm and the diameter of the polishing disc was 914mm.

[0075] Paste a polishing cloth on the horizontal surface of the polishing disc, and evenly open grooves on the surface of the polishing cloth (square size (10mm to 40mm)*(10mm to 40mm), groove width 1mm to 4mm, groove depth 0.5mm to 2mm); prepare a coarse polishing liquid (KMnO4, Al2O3) and water in a certain ratio (1:0.2 to 1) and set aside;

[0076] Place the C surface of the first sample outward and align the center of the sample with the center of the ceramic disk to complete the bonding. Place the ceramic disk with the sample bonded under the loading block of the single-sided polishing machine. After setting the load, the loading block slowly descends until the sample is close to the polishing cloth. After setting the speed of the loading block and the polishing disk, start polishing. The loading block and the polishing disk rotate in the same direction. After polishing is completed, remove the sample and prepare for Si surface polishing.

[0077] Turn the Si surface of the first sample outward, and perform the remaining operations the same as the C surface polishing to complete the Si surface polishing of the sample.

[0078] The flatness of the sample was tested to obtain the TTV value of the entire sample (Table 2) and the thickness analysis image ( Fig.15 ), the overall TTV value of the sample is too large, and many data fail to meet the requirements (<10μm).

[0079] The specific detection steps are as follows:

[0080] Flatness measurement: Use high-precision optical or mechanical measuring instruments to detect the flatness of the polished silicon carbide wafer and record the thickness value of each point on the wafer surface.

[0081] Data analysis: Input the measured data into the computer, analyze the data through the dedicated software, and calculate the TTV value of the wafer. The smaller the TTV value, the smaller the thickness variation of the wafer surface and the higher the flatness.

[0082] Image generation: Generate a thickness analysis image based on the measurement data to show the thickness distribution at different locations on the wafer surface. The image allows you to intuitively observe the flatness of the wafer surface.

[0083] The test results show that the overall TTV values ​​of the samples are too large, and many data fail to meet the requirements (<10μm). The specific data are shown in Table 2:

[0084] Table 2 TTV values ​​of comparative example 1

[0085] Polishing serial number TTV(um) 1 13.343 2 16.912 3 6.353 4 10.611 5 9.934 6 16.366 7 11.575

[0086] It can be seen from the data in Table 2 that the overall TTV value of the polished wafer is too large, and the TTV values ​​of most measurement points exceed 10μm, failing to meet the requirements of high-precision polishing.

[0087] from Fig.15 It can be seen that the thickness analysis image further shows the distribution of wafer surface thickness. It can be clearly seen from the image that there is an area with significantly higher thickness in the middle of the wafer. This phenomenon is mainly due to the fact that during the polishing process, when the wafer rotates with the ceramic disk, the linear speed at the center of the wafer is relatively low, resulting in poor polishing effect at this position. Therefore, there is a large change in the wafer flatness at this position.

[0088] During the polishing process of the wafer, the edge area has a better polishing effect due to the higher linear speed, while the middle area has a poor polishing effect due to the lower linear speed, resulting in a higher thickness in the middle area. Subsequent processes cannot effectively eliminate the thickness protrusion there, thus affecting the overall polishing quality and flatness of the wafer surface.

[0089] From the experimental comparison between Example 1 and Comparative Example 1, it can be concluded that Example 1 is significantly superior to Comparative Example 1 in many aspects. First, the TTV value of Example 1 is significantly reduced, and all data can meet the requirements (<10μm). The specific data show that the thickness of the wafer surface after polishing changes little and the flatness is high. However, the TTV value of Comparative Example 1 is too large, and many data fail to meet the requirements (>10μm). The thickness analysis image shows that there is an obvious high thickness area in the middle of the wafer, and the polishing effect is not ideal.

[0090] In terms of thickness uniformity, Example 1 performs well, with high flatness of the wafer surface after polishing and small thickness variation. In contrast, the thickness uniformity of Comparative Example 1 is poor, with large thickness variation on the wafer surface, high thickness in the middle area, and low flatness. In terms of polishing effect, Example 1 improves the polishing efficiency and effect through optimized design, and the flatness of the wafer surface after polishing is significantly improved, with significant effect. However, since Comparative Example 1 does not perform optimized design, the polishing effect is poor, there are obvious defects on the wafer surface, and the middle position is not polished enough.

[0091] In terms of polishing efficiency, Example 1 increases the flow rate and distribution uniformity of the polishing liquid by optimizing the polishing cloth design and tank setting, so that the polishing efficiency is high and the effect is significant. In Comparative Example 1, due to the unoptimized polishing cloth design and tank setting, the polishing liquid flow is insufficient, the polishing efficiency in the middle area is low, and the effect is poor. In terms of cost-effectiveness, Example 1 improves the polishing effect and efficiency by optimizing the design, reduces the scrap rate caused by uneven wafer thickness, and improves production quality and cost-effectiveness. On the contrary, Comparative Example 1 has poor polishing effect and high scrap rate, which affects production quality and increases production costs.

[0092] In summary, Example 1 is significantly superior to Comparative Example 1 in terms of TTV value, thickness uniformity, polishing effect, polishing efficiency and cost-effectiveness. Through the optimized design of Example 1, the polishing effect and production efficiency of silicon carbide wafers can be significantly improved, the scrap rate in production can be reduced, and the overall production quality and economic benefits can be improved. The optimized polishing cloth design and tank setting significantly improve the fluidity and distribution uniformity of the polishing liquid, so that the surface flatness and thickness uniformity of the polished wafer are greatly improved.

[0093] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention is described in detail with reference to the aforementioned embodiments, those skilled in the art can still modify the technical solutions described in the aforementioned embodiments or replace some of the technical features therein by equivalents. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A method for single-side polishing of a silicon carbide wafer, characterized in that: The steps include: S1. Disposing the edge of the first silicon carbide wafer close to the edge of the ceramic disk, wherein the edge of the ceramic disk is close to the edge of the polishing disk; S2. Take two second silicon carbide wafers and place them on the free area of ​​the ceramic disk, and the distances from the centers of the two second silicon carbide wafers to the center of the first silicon carbide wafer are the same; S3. Make a circle with O1 as the center. The outer and inner rings of the circle intersect with the line AB respectively. The two intersection points fall on the left and right sides of O2 respectively. The distance between the outer intersection point and O2 is l1, and the distance between the inner intersection point and O2 is l2. Moreover, l1, l2 and O2O3 should satisfy: O2O3≤l2≤l1; S4. additionally opening a groove for the polishing cloth within the two circular rings of step S3, and opening a new groove along the diagonal of the smallest square unit formed by the original groove; S5. After the above settings are completed, the Si surface and the C surface of the first silicon carbide wafer are roughly polished respectively.

2. The method for single-side polishing of silicon carbide wafer according to claim 1, characterized in that: The distance between the edge of the first silicon carbide wafer and the edge of the ceramic disk is 2 mm to 10 mm, and the distance between the edge of the ceramic disk and the edge of the polishing disk is 10 mm to 50 mm.

3. The method for single-side polishing of silicon carbide wafer according to claim 1, characterized in that: The closest point on the first silicon carbide wafer to the edge of the ceramic disk is marked as point A. A straight line is drawn from point A through the center O3 of the first silicon carbide wafer, and the intersection of the straight line and the edge of the other side of the first silicon carbide wafer is B. At the same time, the straight line passes through the center O2 of the ceramic disk.

4. The method for single-side polishing of a silicon carbide wafer according to claim 1, characterized in that: The center of one of the second silicon carbide wafers is marked as O. 2， The angle formed by connecting O2O4, O2O4 and O2B is α, and α should satisfy: 30°≤α≤60°.

5. The method for single-side polishing of a silicon carbide wafer according to claim 1 or 4, characterized in that: The initial use thickness δ of the two second silicon carbide wafers achieved through the thinning process should satisfy: 482 μm≤δ≤485 μm.

6. The method for single-side polishing of silicon carbide wafer according to claim 1, characterized in that: The angle between the new trough and the original trough is 30° to 60°.

7. The method for single-side polishing of a silicon carbide wafer according to claim 1 or 6, characterized in that: The openings at both ends of the new groove are symmetrically arranged along the diagonal line of the minimum square unit.

8. The method for single-side polishing of a silicon carbide wafer according to claim 1, characterized in that: When the first silicon carbide wafer is flipped between two rough polishings, the side of the first silicon carbide wafer close to the edge of the ceramic disk during the first rough polishing should be located near O2 after flipping.

9. The method for single-side polishing of a silicon carbide wafer according to claim 1, characterized in that: The size of the first silicon carbide wafer is 8 inches, and the size of the second silicon carbide wafer is 4 inches.

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