Reaction device scheduling method, device and equipment for molecular-level oil refining simulation

Abstract

The invention relates to the technical field of oil refining simulation, and provides a reaction device scheduling method, device and equipment for molecular-level oil refining simulation, and the method comprises the following steps: constructing a reaction device set for molecular-level oil refining simulation into a target data structure; performing path accessibility detection on the reaction devices in the target data structure, and sequentially writing the reaction devices meeting the path accessibility into a linear operation sequence table; performing distributed optimization on the reaction devices in the linear operation sequence table to obtain a scheduling sequence directed graph; carrying out computability detection on the reaction devices in the scheduling sequence directed graph according to the scheduling sequence; and carrying out dynamic equilibrium simulation of molecular-grade oil refining on the reaction device meeting the computability. According to the embodiment of the invention, the robustness and simulation efficiency in the molecular-level oil refining simulation process can be improved.

Description

Technical Field

[0001] This specification relates to the field of oil refining simulation technology, and in particular to a method, apparatus and equipment for scheduling reaction units for molecular-level oil refining simulation. Background Technology

[0002] Using computer technology to simulate the oil refining process allows for the prediction of reaction results without conducting actual experiments, and the simulation results can be used to guide actual oil refining processes. Therefore, simulating the oil refining process is of great significance.

[0003] Molecular-level refining simulation refers to simulating the refining process at the molecular level to achieve precise simulation of the petroleum processing process, thereby providing process optimization and product optimization in the refining process at the lowest cost.

[0004] However, existing molecular-level refining simulation technologies can solve the problems of modeling and calculating refining processes from a molecular perspective, and can achieve molecular-level tracking of material flows and identification of reaction trends between units. Nevertheless, problems such as weak robustness and low computational efficiency still exist in molecular-level refining simulation processes. Summary of the Invention

[0005] The purpose of the embodiments in this specification is to provide a reaction unit scheduling method, apparatus, and equipment for molecular-level oil refining simulation, so as to improve the robustness and simulation efficiency in the molecular-level oil refining simulation process.

[0006] To achieve the above objectives, in one aspect, embodiments of this specification provide a reaction unit scheduling method for molecular-level oil refining simulation, comprising:

[0007] The set of reaction devices used for molecular-level oil refining simulation is constructed as the target data structure;

[0008] Perform path accessibility detection on the reaction devices in the target data structure, and sequentially write the reaction devices that meet the path accessibility into the linear operation order table.

[0009] Distributed optimization is performed on the reaction devices in the linear operation sequence table to obtain a directed graph of scheduling order;

[0010] The computability of the reaction devices in the directed graph of the scheduling order is checked according to the scheduling order;

[0011] Dynamic equilibrium simulations of molecular-level oil refining were performed on reaction devices that met computability requirements.

[0012] In the reaction unit scheduling method for molecular-level oil refining simulation in the embodiments of this specification, the step of performing path accessibility detection on the reaction units in the target data structure includes:

[0013] Select an undetected reaction device from the target data structure as the target device;

[0014] Determine whether the target device depends on all upstream devices in the linear operation sequence table;

[0015] If the target data structure contains all the upstream devices that the target device depends on, then the target device is confirmed to satisfy the path accessibility, and the target device is written into the linear running order table;

[0016] Repeat the above steps until all reaction devices that satisfy path accessibility in the target data structure are sequentially written into the linear operation order table.

[0017] In the reaction unit scheduling method for molecular-level oil refining simulation in the embodiments of this specification, the step of performing path accessibility detection on the reaction units in the target data structure includes:

[0018] Select an undetected reaction device from the target data structure as the target device;

[0019] It is estimated whether the reaction device in the target data structure can form a ring structure with the target device as the starting point of the cycle;

[0020] If a ring structure with the target device as the starting point of the loop can be formed, then the upstream device located in the ring structure that the target device depends on is identified, and it is determined whether there are all upstream devices other than the target device that the target device depends on in the linear running order table.

[0021] If a circular structure with the target device as the starting point cannot be formed, then determine whether all upstream devices that the target device depends on exist in the linear running order table.

[0022] If a loop structure with the target device as the starting point can be formed, and if there are all upstream devices that the target device depends on, except for the target device, then the target device is confirmed to satisfy the path accessibility requirement.

[0023] If a loop structure with the target device as the starting point cannot be formed, and if all upstream devices on which the target device depends exist, then the target device is confirmed to satisfy path accessibility.

[0024] Repeat the above steps until all reaction devices that satisfy path accessibility in the target data structure are sequentially written into the linear operation order table.

[0025] In the reaction unit scheduling method for molecular-level oil refining simulation in the embodiments of this specification, whether the reaction units in the predicted target data structure can form a ring structure with the target unit as the cycle starting point includes:

[0026] Query the number of path accessibility checks performed on each reaction device in the target data structure;

[0027] When the number of detections of at least two interdependent reaction devices continues to increase, and the number of reaction devices in the linear operation sequence table does not change, it is confirmed that there is a ring structure formed by the at least two interdependent reaction devices.

[0028] Identify the reaction device in the ring structure that serves as the starting point of the cycle;

[0029] Determine whether the reaction device that serves as the starting point of the cycle in the ring structure is the target device;

[0030] When the reaction device serving as the starting point of the cycle in the ring structure is the target device, it is confirmed that a ring structure with the target device as the starting point of the cycle can be formed; otherwise, it is confirmed that a ring structure with the target device as the starting point of the cycle cannot be formed.

[0031] In the reaction device scheduling method for molecular-level oil refining simulation in the embodiments of this specification, the step of identifying the reaction device as the cycle starting point in the ring structure includes:

[0032] For each reaction device in the ring structure, calculate the number of jumps from the first reaction device in the linear operation sequence table to form a jump count set.

[0033] The reaction device corresponding to the minimum value in the set of jumps is identified as the reaction device that serves as the starting point of the loop in the ring structure.

[0034] In the reaction unit scheduling method for molecular-level oil refining simulation in the embodiments of this specification, the distributed optimization of the reaction units in the linear operation sequence table includes:

[0035] For each reaction device in the linear operation sequence list, calculate the number of jumps from the first reaction device in the linear operation sequence list;

[0036] Reactors with the same number of jumps are grouped into the same operating level;

[0037] Sort the various running levels in ascending order of jump count;

[0038] A scheduling order directed graph is generated based on the sorting.

[0039] In the reaction unit scheduling method for molecular-level oil refining simulation in the embodiments of this specification, the computability test of the reaction units in the directed graph of the scheduling order according to the scheduling order includes:

[0040] According to the scheduling order in the directed graph, all reaction devices within the same operating level are selected from the directed graph.

[0041] Determine whether all the inputs required for each reaction device within the currently selected operating level are ready;

[0042] If all the inputs required for a reaction device within the current operating level are ready, then the reaction device is deemed to satisfy computability; otherwise, the reaction device is deemed not to satisfy computability.

[0043] In the reaction unit scheduling method for molecular-level oil refining simulation in the embodiments of this specification, the step of performing dynamic equilibrium simulation of molecular-level oil refining on a reaction unit that meets the requirements of computability includes:

[0044] Determine whether the currently available computing resources match the computability requirements of the currently selected runtime level;

[0045] If the available computing resources match the computability of the devices within the currently selected operating level, then perform parallel cyclic simulation of the computability-compliant reaction devices within the currently selected operating level.

[0046] For each reaction device that satisfies computability within the current operating level, when the difference between two adjacent simulation results in its cyclic simulation is less than the difference threshold, it is confirmed that the simulation of the reaction device has reached dynamic equilibrium, the cyclic simulation of the reaction device is stopped, and the latest simulation result of the reaction device is transmitted to the corresponding downstream device.

[0047] In the reaction device scheduling method for molecular-level oil refining simulation in the embodiments of this specification, in the directed graph of the scheduling sequence, nodes represent reaction devices, directed line segments between nodes represent the dependencies between nodes, and directed paths composed of each directed line segment represent the scheduling sequence. Reaction devices at different operating levels can be executed sequentially, and reaction devices within the same operating level can be executed in parallel.

[0048] In the reaction unit scheduling method for molecular-level oil refining simulation in the embodiments of this specification, the target data structure is a queue.

[0049] On the other hand, embodiments of this specification also provide a reaction apparatus scheduling device for molecular-level oil refining simulation, comprising:

[0050] The data structure construction module is used to construct the set of reaction devices used for molecular-level oil refining simulation into a target data structure;

[0051] The path accessibility detection module is used to perform path accessibility detection on the reaction devices in the target data structure and write the reaction devices that meet the path accessibility requirements into the linear operation order table in sequence.

[0052] The scheduling order optimization module is used to perform distributed optimization on the reaction devices in the linear operation order table to obtain a directed graph of scheduling order.

[0053] A computability detection module is used to perform computability detection on the reaction devices in the scheduling order directed graph according to the scheduling order;

[0054] The dynamic equilibrium simulation module is used to perform molecular-level dynamic equilibrium simulations of reaction devices that meet computability requirements for oil refining.

[0055] On the other hand, embodiments of this specification also provide a computer device, including a memory, a processor, and a computer program stored in the memory, wherein the computer program, when run by the processor, executes instructions for the above-described method.

[0056] On the other hand, embodiments of this specification also provide a computer storage medium storing a computer program thereon, which, when run by the processor of a computer device, executes instructions for the above-described method.

[0057] On the other hand, embodiments of this specification also provide a computer program product, which includes a computer program that, when run by the processor of a computer device, executes instructions for the above-described method.

[0058] As can be seen from the technical solutions provided in the embodiments of this specification above, in these embodiments, after constructing the set of reaction devices for molecular-level oil refining simulation into a target data structure, a linear running order list can be generated by performing path accessibility checks on the reaction devices in the target data structure, serving as a preliminary reaction device scheduling order. Based on this, by performing distributed optimization on the reaction devices in the linear running order list, a more optimized directed graph of scheduling order can be obtained, thereby improving the simulation efficiency in the molecular-level oil refining simulation process. Furthermore, during the generation of the linear running order list, by performing path accessibility checks on the reaction devices in the target data structure, unnecessary reaction devices introduced into the reaction device set due to errors or other reasons can be eliminated. Moreover, before performing dynamic simulation, by performing computability checks on the reaction devices in the directed graph of scheduling order according to the scheduling order, blindly initiating dynamic simulations and wasting system resources can be avoided. Therefore, these embodiments of this specification also improve the robustness of the molecular-level oil refining simulation process. Attached Figure Description

[0059] To more clearly illustrate the technical solutions in the embodiments or prior art of this specification, the drawings used in the description of the embodiments or prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this specification. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. In the drawings:

[0060] Figure 1 This specification shows a block diagram of a reaction unit scheduling system used for molecular-level oil refining simulation in some embodiments;

[0061] Figure 2 Flowcharts of reaction unit scheduling methods for molecular-level oil refining simulation are shown in some embodiments of this specification;

[0062] Figure 3 This specification shows flowcharts illustrating path accessibility detection for reaction devices in a target data structure in some embodiments;

[0063] Figure 4 This specification shows flowcharts for path accessibility detection of reaction devices in target data structures in other embodiments;

[0064] Figure 5 It shows Figure 4 The flowchart shown illustrates the method for identifying whether a loop structure with the target device as the starting point of the loop exists.

[0065] Figure 6 It shows Figure 5 The flowchart shown illustrates the identification of the reaction device that serves as the starting point of the cycle in the toroidal structure.

[0066] Figure 7 It shows Figure 2 The flowchart shown illustrates the distributed optimization of the reaction apparatus in the linear operation sequence table.

[0067] Figure 8 It shows Figure 2 The flowchart shown illustrates the computability test of reaction devices in a directed graph with a scheduling order, performed according to the scheduling order.

[0068] Figure 9 It shows Figure 2 The flowchart shown illustrates the dynamic equilibrium simulation of molecular-level oil refining using a reaction apparatus that satisfies computability.

[0069] Figure 10 A schematic diagram of a queue in an exemplary embodiment of this specification is shown;

[0070] Figure 11 A schematic diagram illustrating the linear order of operations in an exemplary embodiment of this specification is shown;

[0071] Figure 12 A schematic diagram of a linear operation sequence table including a ring structure is shown in an exemplary embodiment of this specification;

[0072] Figure 13 A schematic diagram of a scheduling order directed graph in an exemplary embodiment of this specification is shown;

[0073] Figure 14 This specification shows a structural block diagram of a reaction unit scheduling device used for molecular-level oil refining simulation in some embodiments;

[0074] Figure 15 A structural block diagram of a computer device in some embodiments of this specification is shown.

[0075] [Explanation of Labels in the Attached Image]

[0076] 10. Client-side application;

[0077] 20. Server-side;

[0078] 141. Data Structure Construction Module;

[0079] 142. Path accessibility detection module;

[0080] 143. Scheduling order optimization module;

[0081] 144. Computability Detection Module;

[0082] 145. Dynamic equilibrium simulation module;

[0083] 1502. Computer equipment;

[0084] 1504, Processor;

[0085] 1506. Memory;

[0086] 1508. Drive mechanism;

[0087] 1510. Input / output interface;

[0088] 1512. Input devices;

[0089] 1514. Output devices;

[0090] 1516. Presentation equipment;

[0091] 1518. Graphical User Interface;

[0092] 1520. Network interface;

[0093] 1522. Communication link;

[0094] 1524. Communication bus. Detailed Implementation

[0095] To enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this specification will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this specification, and not all embodiments. Based on the embodiments in this specification, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this specification.

[0096] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in the embodiments of this specification are all information and data authorized and agreed upon by the user and fully authorized by all parties. That is, the acquisition, transmission, storage, use, and processing of data in the technical solution of this application all comply with the relevant provisions of national laws and regulations.

[0097] It should be noted that in the embodiments of this application, certain software, components, models and other existing solutions in the industry may be mentioned. These should be regarded as exemplary and are only intended to illustrate the feasibility of implementing the technical solution of this application. However, it does not mean that the applicant has used or necessarily used the solution.

[0098] The embodiments in this specification relate to molecular-level oil refining simulation technology. Molecular-level oil refining simulation refers to using computer simulation technology to simulate, at the molecular scale, the chemical transformation and other processing processes from crude oil molecules to final product (such as gasoline) molecules.

[0099] Figure 1The diagram illustrates a reactor scheduling system for molecular-level refining simulation in some embodiments of this specification. The system includes a client 10 and a server 20. The client 10 provides the server 20 with a set of reactors for molecular-level refining simulation. The server 20 constructs this set of reactors into a target data structure. It performs path accessibility checks on the reactors in the target data structure and sequentially writes the reactors that meet the path accessibility requirements into a linear execution order table. It performs distributed optimization on the reactors in the linear execution order table to obtain a directed graph of scheduling order. It performs computability checks on the reactors in the directed graph of scheduling order according to their scheduling order. Finally, it performs dynamic equilibrium simulation of molecular-level refining using reactors that meet the computability requirements. These embodiments of the specification can improve the robustness and simulation efficiency of the molecular-level refining simulation process.

[0100] In some embodiments of this specification, the client 10 can be a desktop computer, tablet computer, laptop computer, etc. Of course, the client 10 is not limited to the aforementioned physical electronic devices; it can also be software running on such electronic devices. The server 20 can be an electronic device with computing and network interaction functions; it can also be software running on such electronic devices that provides business logic for data processing and network interaction.

[0101] In addition, it should be noted that, Figure 1 The example shown is merely one application environment provided in this specification. In actual applications, there can be multiple clients 10 and multiple servers 20. This specification does not impose any restrictions.

[0102] This specification provides an embodiment of a reaction unit scheduling method for molecular-level oil refining simulation, which can be applied to the aforementioned server-side. (Refer to...) Figure 2 As shown in some embodiments of this specification, the reaction unit scheduling method for molecular-level oil refining simulation may include the following steps:

[0103] Step 201: Construct the set of reaction devices used for molecular-level oil refining simulation into a target data structure.

[0104] Step 202: Perform path accessibility detection on the reaction devices in the target data structure, and write the reaction devices that meet the path accessibility requirements into the linear operation sequence table in sequence.

[0105] Step 203: Perform distributed optimization on the reaction devices in the linear operation sequence table to obtain a directed graph of scheduling order.

[0106] Step 204: Perform computability checks on the reaction devices in the scheduling order directed graph according to the scheduling order.

[0107] Step 205: Perform a dynamic equilibrium simulation of oil refining at the molecular level on the reaction device that meets the computability requirements.

[0108] In the embodiments of this specification, after constructing the set of reaction devices for molecular-level refining simulation into a target data structure, a linear execution order list can be generated by performing path accessibility checks on the reaction devices in the target data structure, serving as a preliminary reaction device scheduling order. Based on this, a more optimized directed graph of scheduling order can be obtained by performing distributed optimization on the reaction devices in the linear execution order list, thereby improving the simulation efficiency in the molecular-level refining simulation process. Furthermore, during the generation of the linear execution order list, by performing path accessibility checks on the reaction devices in the target data structure, unnecessary reaction devices introduced into the reaction device set due to errors or other reasons can be eliminated. Moreover, before performing dynamic simulation, by performing computability checks on the reaction devices in the directed graph of scheduling order according to the scheduling order, the waste of system resources caused by blindly initiating dynamic simulations can be avoided. Therefore, the embodiments of this specification also improve the robustness of the molecular-level refining simulation process.

[0109] In the embodiments of this specification, the set of reaction devices used for molecular-level refining simulation refers to the set of reaction device models required for molecular-level refining simulation of a specified refining process. For example, taking the catalytic reforming refining process as an example, molecular-level catalytic reforming refining simulation requires feedstock pretreatment devices (such as pre-hydrogenation reactors), reforming reactors, stabilizers, fractionators, etc. Therefore, numerical simulation models of these devices need to be pre-constructed to form the set of reaction device models required for molecular-level simulation of the catalytic reforming refining process.

[0110] In some embodiments of this specification, the set of reaction devices used for molecular-level oil refining simulation is an unordered set. By constructing the set of reaction devices for molecular-level oil refining simulation into a target data structure, the unordered set can be transformed into an ordered set, facilitating subsequent traversal operations to generate a linear execution order list and improving traversal efficiency. The target data structure can be a queue (e.g., Figure 10 (as shown in the queue); of course, in other embodiments, any other suitable data structure (such as a tree diagram, etc.) may be used as needed.

[0111] In some embodiments of this specification, by performing path accessibility detection on the reaction devices in the target data structure, not only can a linear operation order table containing a preliminary scheduling order be obtained, but also unnecessary reaction devices introduced into the reaction device set due to reasons such as misoperation can be eliminated.

[0112] refer to Figure 3As shown, in some embodiments of this specification, path accessibility detection of the reaction device in the target data structure may include the following steps:

[0113] Step 301: Select an undetected reaction device from the target data structure as the target device.

[0114] For example, an undetected reaction device is randomly selected from the target data structure as the target device. Here, an undetected reaction device refers to a reaction device that has not yet undergone path accessibility detection.

[0115] Step 302: Determine whether all upstream devices that the target device depends on exist in the linear execution order table. If all upstream devices that the target device depends on exist in the target data structure, proceed to step 303; otherwise, proceed to step 304.

[0116] For example, if the target data structure contains reaction device A, reaction device B, and reaction device C; and if reaction device B is selected, the input of reaction device B depends only on reaction device A (reaction device A is the upstream device of reaction device B, and reaction device B is the downstream device of reaction device A), since the target data structure already contains reaction device A, it can be assumed that the target data structure contains all the upstream devices that reaction device B depends on.

[0117] Step 303: Confirm that the target device meets the path accessibility requirement, and write the target device into the linear operation sequence table.

[0118] When the target device has all the upstream devices it depends on in the linear execution order table, it indicates that the upstream path of the target device is reachable. Therefore, it can be confirmed that the target device satisfies the path reachability requirement, and thus it can be written into the linear execution order table.

[0119] Step 304: Determine whether there are any undetected reaction devices in the target data structure. If there are undetected reaction devices in the target data structure, proceed to step 301; otherwise, end (i.e., end path accessibility detection).

[0120] refer to Figure 4 As shown, in some other embodiments of this specification, path accessibility detection of the reaction device in the target data structure may include the following steps:

[0121] Step 401: Select an undetected reaction device from the target data structure as the target device.

[0122] Step 402: Estimate whether the reaction device in the target data structure can form a ring structure with the target device as the starting point of the loop. If a ring structure with the target device as the starting point of the loop can be formed, proceed to step 403; otherwise, proceed to step 405.

[0123] Step 403: Identify the upstream device located in the ring structure that the target device depends on.

[0124] For example, in Figure 12 In the exemplary embodiment shown, there is a ring structure formed by reaction device 2, reaction device 3, and reaction device 4. Since reaction device 2 depends on reaction device 1 and reaction device 4, reaction device 2 can only be added to the linear operation sequence list if reaction device 1 and reaction device 4 are present in the linear operation sequence list. Similarly, reaction device 4 depends on reaction device 3, and reaction device 4 can only be added to the linear operation sequence list if reaction device 3 is present in the linear operation sequence list. Furthermore, reaction device 3 depends on reaction device 2, and reaction device 3 can only be added to the linear operation sequence list if reaction device 2 is present in the linear operation sequence list. As a result, when performing path accessibility detection, reaction devices 2, 3, and 4 are prone to getting stuck in an infinite loop.

[0125] Assuming the reaction devices in the target data structure can form a loop structure with the target device as the starting point, to prevent path accessibility detection from getting stuck in such a dead loop, when determining whether all upstream devices dependent on the target device exist in the linear running order table, it is necessary to remove upstream devices located in the loop structure that the target device depends on. For example, in Figure 12 In the exemplary embodiment shown, in the annular structure formed by reaction device 2, reaction device 3 and reaction device 4, reaction device 4 is the upstream device located in the annular structure on which reaction device 2 depends.

[0126] Step 404: Determine whether the linear running order table contains all upstream devices that the target device depends on, excluding the target device itself. If all upstream devices that the target device depends on, excluding the target device itself, are present, proceed to step 406; otherwise, proceed to step 407.

[0127] For example, in Figure 12 In the exemplary embodiment shown, in the annular structure formed by reaction device 2, reaction device 3 and reaction device 4, reaction device 4 is an upstream device located in the annular structure on which reaction device 2 depends; then, during the subsequent determination, it can be determined whether there are all upstream devices on which reaction device 2 depends, except for reaction device 4, in the linear operation sequence table.

[0128] Step 405: Determine whether all upstream devices that the target device depends on exist in the linear execution order table. If all upstream devices that the target device depends on exist, proceed to step 406; otherwise, proceed to step 407.

[0129] Step 406: Confirm that the target device meets the path accessibility requirement, and write the target device into the linear operation sequence table.

[0130] Step 407: Determine whether there are any undetected reaction devices in the target data structure. If there are undetected reaction devices, proceed to step 401; otherwise, end (i.e., end path accessibility detection).

[0131] Combination Figure 5 As shown, in some embodiments of this specification, estimating whether the reaction device in the target data structure can form a ring structure with the target device as the starting point of the cycle may include:

[0132] Step 501: Query the number of path accessibility checks performed on each reaction device in the target data structure.

[0133] Step 502: When the number of detections of at least two interdependent reaction devices continues to increase, and the number of reaction devices in the linear operation sequence table does not change, it is confirmed that there is a ring structure formed by the at least two interdependent reaction devices.

[0134] A typical characteristic of path accessibility detection getting stuck in a loop is that the number of detections for at least two interdependent reaction devices continues to increase, but the number of reaction devices in the linear run order remains unchanged (no new reaction devices are added to the linear run order). For example, in Figure 12 In the exemplary embodiment shown, in the annular structure formed by reaction device 2, reaction device 3 and reaction device 4, the number of detections of reaction device 2, reaction device 3 and reaction device 4 continuously increases, while the number of reaction devices in the linear operation sequence table does not change (i.e., reaction device 2, reaction device 3 and reaction device 4 are difficult to write into the linear operation sequence table). At this time, it can be confirmed that there is an annular structure formed by reaction device 2, reaction device 3 and reaction device 4.

[0135] Step 503: Identify the reaction device in the ring structure that serves as the starting point of the cycle.

[0136] Step 504: Determine whether the reaction device serving as the starting point of the cycle in the annular structure is the target device. If the reaction device serving as the starting point of the cycle is the target device, proceed to step 505; otherwise, proceed to step 506.

[0137] Step 505: Confirm that a ring structure with the target device as the starting point of the loop can be formed.

[0138] Step 506: Confirm that a ring structure cannot be formed with the target device as the starting point of the loop.

[0139] Combination Figure 6 As shown, in some embodiments of this specification, identifying the reaction device as the starting point of the cycle in the ring structure may include the following steps:

[0140] Step 601: For each reaction device in the ring structure, calculate the number of jumps from the first reaction device in the linear operation sequence table to form a jump number set.

[0141] Step 602: Identify the reaction device corresponding to the minimum value in the set of jump numbers as the reaction device that serves as the starting point of the loop in the ring structure.

[0142] For example, in Figure 12 In the exemplary embodiment shown, in the annular structure formed by reaction device 2, reaction device 3 and reaction device 4, the distance between reaction device 2 and reaction device 1 is 1 jump, the distance between reaction device 3 and reaction device 1 is 2 jumps, and the distance between reaction device 2 and reaction device 1 is 3 jumps. Since the distance between reaction device 2 and reaction device 1 is 1 jump, which is the minimum value, it can be confirmed that reaction device 2 is the reaction device that serves as the starting point of the cycle in the annular structure.

[0143] In an exemplary embodiment of this specification, based on Figure 10 The device queue shown can be obtained through path accessibility detection, as follows: Figure 11 The linear running order is shown.

[0144] refer to Figure 7 As shown, in some embodiments of this specification, distributed optimization of the reaction apparatus in the linear operation sequence table may include the following steps:

[0145] Step 701: For each reaction device in the linear operation sequence table, calculate the number of jumps from the first reaction device in the linear operation sequence table.

[0146] For example, as Figure 11 Taking the linear operation sequence shown as an example, the number of jumps from the first-order reaction device in the linear operation sequence table can be calculated according to the dependency relationship of each reaction device.

[0147] Step 702: Assign reactors with the same number of jumps to the same operating level.

[0148] For example, all reactors that are 1 hop away from the first reactor in the linear operation sequence are classified as the first operation level, all reactors that are 2 hops away from the first reactor in the linear operation sequence are classified as the second operation level, all reactors that are 3 hops away from the first reactor in the linear operation sequence are classified as the third operation level, and so on.

[0149] Step 703: Sort each of the aforementioned running levels in ascending order of jump count.

[0150] Step 704: Generate a directed graph of scheduling order based on the sorting.

[0151] That is, a directed graph of scheduling order is generated based on the sorting and the dependencies of each reaction device. In the directed graph of scheduling order, nodes represent reaction devices, directed line segments between nodes represent dependencies between nodes, and directed paths formed by the directed line segments represent the scheduling order. Reaction devices at different operating levels can be executed sequentially, and reaction devices within the same operating level can be executed in parallel.

[0152] For example, for such Figure 11 The linear execution order shown can be obtained through distributed optimization as follows: Figure 13 The scheduling order shown is a directed graph. Figure 13 In the diagram, nodes such as Reaction Device 1 and Reaction Device 2 represent reaction devices, and directed line segments between nodes such as Reaction Device 1 and Reaction Device 2 represent the dependencies between nodes (for example, the directed line segment between Reaction Device 1 and Reaction Device 2 indicates that Reaction Device 2 depends on Reaction Device 1). Different dashed boxes represent different operating levels, and reaction devices within the same dashed box are at the same operating level (for example, Reaction Device 2 and Reaction Device 3 are at the same operating level).

[0153] refer to Figure 8 As shown, in some embodiments of this specification, performing computability testing on the reaction devices in the scheduling order directed graph according to the scheduling order may include the following steps:

[0154] Step 801: According to the scheduling order in the directed graph, select all reaction devices within the same operating level from the directed graph.

[0155] Step 802: Determine whether all the inputs required for each reaction device within the currently selected operating level are ready.

[0156] In the embodiments of this specification, "all inputs on which the reaction apparatus depends are ready" means that all input data required for the reaction apparatus to perform computational simulations has been prepared (i.e., received). For example, in... Figure 13In the exemplary embodiment shown, if the operating level where the reaction device 1 is located is currently selected, when all the input data required for the reaction device 1 to perform the calculation simulation is ready, it can be considered that all the inputs on which the reaction device 1 depends are ready.

[0157] Step 803: If all the inputs that a reaction device in the current operating level depends on are ready, then the reaction device is confirmed to satisfy computability; otherwise, the reaction device is confirmed not to satisfy computability.

[0158] refer to Figure 9 As shown in some embodiments of this specification, performing molecular-level dynamic equilibrium simulation of a reaction apparatus that satisfies computability may include the following steps:

[0159] Step 901: Determine whether the currently available computing resources match the computability-compliant devices within the currently selected operating level. If the currently available computing resources match the computability-compliant devices within the currently selected operating level, proceed to step 902; otherwise, continue the determination (i.e., perform the determination again when the next determination cycle arrives).

[0160] In some embodiments of this specification, "matching" means that the currently available computing resources are sufficient to allow at least one of all devices within the currently selected operating level that satisfy computability to perform a computational simulation.

[0161] Step 902: Perform parallel cyclic simulation on the reaction device that meets the computability requirements within the currently selected operating level.

[0162] If the available computing resources are sufficient for two or more of the devices within the currently selected operating level that meet the computability requirements to perform computational simulations, then they can perform parallel cyclic simulations.

[0163] Step 903: For each reaction device that satisfies computability within the currently selected operating level, when the difference between two adjacent simulation results in its cyclic simulation is less than the difference threshold, confirm that the simulation of the reaction device has reached dynamic equilibrium, stop the cyclic simulation of the reaction device, and transmit the latest simulation result of the reaction device to the corresponding downstream device.

[0164] Step 904: Determine if there are any reaction devices in the directed graph of the scheduling sequence that have not been simulated. If there are reaction devices that have not been simulated, proceed to step 905; otherwise, end.

[0165] Step 905: According to the scheduling order in the directed graph, select all reaction devices within the same operating level from the directed graph.

[0166] Although the process described above includes multiple operations that occur in a specific order, it should be clearly understood that these processes may include more or fewer operations, which may be executed sequentially or in parallel (e.g., using parallel processors or a multithreaded environment).

[0167] Corresponding to the above-described reaction unit scheduling method for molecular-level oil refining simulation, this specification also provides a reaction unit scheduling device for molecular-level oil refining simulation, which can be configured on the above-described device. (Refer to...) Figure 14 As shown in some embodiments of this specification, the reaction apparatus scheduling device for molecular-level oil refining simulation may include:

[0168] Data structure construction module 141 is used to construct a set of reaction devices for molecular-level oil refining simulation into a target data structure;

[0169] The path accessibility detection module 142 is used to perform path accessibility detection on the reaction devices in the target data structure and write the reaction devices that meet the path accessibility requirements into the linear operation order table in sequence.

[0170] The scheduling order optimization module 143 is used to perform distributed optimization on the reaction devices in the linear operation order table to obtain a directed graph of scheduling order.

[0171] Computability detection module 144 is used to perform computability detection on the reaction devices in the scheduling order directed graph according to the scheduling order;

[0172] The dynamic equilibrium simulation module 145 is used to perform molecular-level dynamic equilibrium simulations of a reaction device that meets the requirements of computability.

[0173] Of course, after completing the path accessibility detection of all reaction devices in the target data structure, if there are still reaction devices in the target data structure that do not meet the path accessibility requirements, then the reaction devices that do not meet the path accessibility requirements are discarded or ignored.

[0174] For ease of description, the above devices are described in terms of function, divided into various units. Of course, in implementing this specification, the functions of each unit can be implemented in one or more software and / or hardware components.

[0175] Embodiments of this specification also provide a computer device. For example... Figure 15As shown, in some embodiments of this specification, the computer device 1502 may include one or more processors 1504, such as one or more central processing units (CPUs) or graphics processing units (GPUs), each of which may implement one or more hardware threads. The computer device 1502 may also include any memory 1506 for storing any kind of information such as code, settings, data, etc. In one specific embodiment, a computer program on the memory 1506 and executable on the processor 1504, when run by the processor 1504, can execute instructions for the reaction unit scheduling method for molecular-level oil refining simulation described in any of the above embodiments. Non-limitingly, for example, the memory 1506 may include any type of RAM, any type of ROM, flash memory, hard disk, optical disk, etc. More generally, any memory can use any technology to store information. Furthermore, any memory may provide volatile or non-volatile retention of information. Furthermore, any memory may represent a fixed or removable component of the computer device 1502. In one scenario, when processor 1504 executes associated instructions stored in any memory or combination of memories, computer device 1502 can perform any operation of the associated instructions. Computer device 1502 also includes one or more drive mechanisms 1508 for interacting with any memory, such as hard disk drive mechanisms, optical disk drive mechanisms, etc.

[0176] Computer device 1502 may also include an input / output interface 1510 (I / O) for receiving various inputs (via input device 1512) and providing various outputs (via output device 1514). A specific output mechanism may include a presentation device 1516 and an associated graphical user interface 1518 (GUI). In other embodiments, the input / output interface 1510 (I / O), input device 1512, and output device 1514 may be omitted, and the device may function solely as a computer device within a network. Computer device 1502 may also include one or more network interfaces 1520 for exchanging data with other devices via one or more communication links 1522. One or more communication buses 1524 couple the components described above together.

[0177] Communication link 1522 can be implemented in any way, such as via a local area network, a wide area network (e.g., the Internet), a point-to-point connection, or any combination thereof. Communication link 1522 may include any combination of hardwired links, wireless links, routers, gateway functions, name servers, etc., governed by any protocol or combination of protocols.

[0178] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), computer-readable storage media, and computer program products according to some embodiments of this specification. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processor to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processor, create a mechanism for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0179] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processor to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0180] These computer program instructions may also be loaded onto a computer or other programmable data processor, causing a series of operational steps to be performed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable device for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0181] In a typical configuration, a computer device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0182] Memory may include non-persistent storage in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.

[0183] Computer-readable media, including both permanent and non-permanent, removable and non-removable media, can store information using any method or technology. Information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by computer equipment. As defined in this specification, computer-readable media does not include transient media, such as modulated data signals and carrier waves.

[0184] Those skilled in the art will understand that the embodiments of this specification can be provided as methods, systems, or computer program products. Therefore, the embodiments of this specification can take the form of entirely hardware embodiments, entirely software embodiments, or embodiments combining software and hardware aspects. Furthermore, the embodiments of this specification can take the form of computer program products implemented on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0185] The embodiments described in this specification can be described in the general context of computer-executable instructions, such as program modules, that are executed by a computer. Generally, program modules include routines, programs, objects, components, data structures, etc., that perform a specific task or implement a specific abstract data type. The embodiments of this specification can also be practiced in distributed computing environments where tasks are performed by remote processors connected via a communication network. In distributed computing environments, program modules can reside in local and remote computer storage media, including storage devices.

[0186] It should also be understood that, in the embodiments of this specification, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0187] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the system embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments.

[0188] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the embodiments of this specification. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0189] The above description is merely an embodiment of this application and is not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

Claims

1. A reaction apparatus scheduling method for molecular level oil refining simulation, characterized by, The application relates to a method for molecular refining simulation, comprising the following steps: a reaction device set for molecular refining simulation is constructed into a target data structure; path accessibility detection is performed on the reaction devices in the target data structure, and reaction devices meeting the path accessibility are sequentially written into a linear operation sequence table; distributed optimization is performed on the reaction devices in the linear operation sequence table, and a scheduling sequence directed graph is obtained; computability detection is performed on the reaction devices in the scheduling sequence directed graph according to the scheduling sequence; dynamic equilibrium simulation of molecular refining is performed on the reaction devices meeting the computability.

2. The reaction apparatus scheduling method for molecular level oil refining simulation according to claim 1, wherein, The path accessibility detection performed on the reaction devices in the target data structure comprises the following steps: an undetected reaction device in the target data structure is selected as a target device; it is judged whether all upstream devices relied on by the target device exist in the linear operation sequence table; if all upstream devices relied on by the target device exist in the target data structure, it is confirmed that the target device meets the path accessibility, and the target device is written into the linear operation sequence table; the above steps are repeated until all reaction devices meeting the path accessibility in the target data structure are sequentially written into the linear operation sequence table.

3. The reaction apparatus scheduling method for molecular level oil refining simulation according to claim 1, wherein, The path accessibility detection performed on the reaction devices in the target data structure comprises the following steps: an undetected reaction device in the target data structure is selected as a target device; it is estimated whether the reaction devices in the target data structure can form a ring structure with the target device as a cycle starting point; if the ring structure with the target device as the cycle starting point can be formed, upstream devices relied on by the target device and located in the ring structure are identified, and it is judged whether all upstream devices relied on by the target device except the upstream devices exist in the linear operation sequence table; if the ring structure with the target device as the cycle starting point cannot be formed, it is judged whether all upstream devices relied on by the target device exist in the linear operation sequence table; under the condition that the ring structure with the target device as the cycle starting point can be formed, if all upstream devices relied on by the target device except the upstream devices exist, it is confirmed that the target device meets the path accessibility; under the condition that the ring structure with the target device as the cycle starting point cannot be formed, if all upstream devices relied on by the target device exist, it is confirmed that the target device meets the path accessibility; the above steps are repeated until all reaction devices meeting the path accessibility in the target data structure are sequentially written into the linear operation sequence table.

4. The reaction apparatus scheduling method for molecular level oil refining simulation according to claim 3, wherein, The estimation whether the reaction devices in the target data structure can form the ring structure with the target device as the cycle starting point comprises the following steps: the detection times of each reaction device in the target data structure subjected to the path accessibility detection are inquired; when the detection times of at least two reaction devices in a dependent relationship continuously increase, and the number of reaction devices in the linear operation sequence table does not change, it is confirmed that a ring structure surrounded by the at least two reaction devices in the dependent relationship exists; the reaction device as the cycle starting point in the ring structure is identified; determining whether a reaction device in the ring structure as a starting point of a cycle is the target device; when the reaction device in the ring structure as a starting point of a cycle is the target device, confirming that a ring structure with the target device as a starting point of a cycle can be formed; otherwise, confirming that a ring structure with the target device as a starting point of a cycle cannot be formed.

5. The reaction apparatus scheduling method for molecular level oil refining simulation according to claim 4, wherein, The identification of the reaction device in the ring structure as a starting point of a cycle comprises: For each reaction device in the ring structure, the number of hops from the reaction device to the first-order reaction device in the linear operation sequence table is calculated respectively to form a hop number set; The reaction device corresponding to the minimum value in the hop number set is identified as the reaction device in the ring structure as a starting point of a cycle.

6. The reaction apparatus scheduling method for molecular level oil refining simulation according to claim 1, wherein, The distributed optimization of the reaction device in the linear operation sequence table comprises: For each reaction device in the linear operation sequence table, the number of hops from the reaction device to the first-order reaction device in the linear operation sequence table is calculated respectively; Reaction devices with the same number of hops are classified into the same operation level; Each of the operation levels is sorted in ascending order of the number of hops; A scheduling sequence directed graph is generated according to the sorting.

7. The reaction apparatus scheduling method for molecular level oil refining simulation according to claim 6, wherein, The computability detection of the reaction device in the scheduling sequence directed graph according to the scheduling sequence comprises: According to the scheduling sequence in the scheduling sequence directed graph, all reaction devices in the same operation level in the scheduling sequence directed graph are taken; It is respectively judged whether the inputs relied on by each reaction device in the currently taken operation level are all ready; If the inputs relied on by one reaction device in the currently taken operation level are all ready, it is confirmed that the reaction device satisfies the computability, otherwise it is confirmed that the reaction device does not satisfy the computability.

8. The reaction apparatus scheduling method for molecular level oil refining simulation according to claim 7, wherein, The dynamic balance simulation of the reaction device satisfying the computability comprises: It is judged whether the currently available computing resources match the reaction devices satisfying the computability in the currently taken operation level; If the currently available computing resources match the reaction devices satisfying the computability in the currently taken operation level, the reaction devices satisfying the computability in the currently taken operation level are simulated in parallel cycles; For each reaction device satisfying the computability in the currently taken operation level, when the difference between two adjacent simulation results in the cycle simulation of the reaction device is less than a difference threshold, it is confirmed that the simulation of the reaction device reaches dynamic balance, the cycle simulation of the reaction device is stopped, and the latest simulation result of the reaction device is transmitted to the corresponding downstream device.

9. The reaction apparatus scheduling method for molecular level oil refining simulation according to claim 6, wherein, In the scheduling sequence directed graph, nodes represent reaction devices, directed line segments between nodes represent dependency relationships between nodes, and directed paths composed of each directed line segment represent scheduling sequences. Reaction devices in different operation levels can be executed in sequence, and reaction devices in the same operation level can be executed in parallel.

10. The reaction apparatus scheduling method for molecular level oil refining simulation according to Claim 1, wherein, The target data structure is a queue.

11. A reaction apparatus scheduling device for molecular level oil refining simulation, characterized by, It comprises: A data structure construction module for constructing a set of reaction devices for molecular refining simulation into a target data structure; A path reachability detection module for performing path reachability detection on the reaction devices in the target data structure, and sequentially writing the reaction devices satisfying the path reachability into a linear operation sequence table; A scheduling sequence optimization module is configured to perform distributed optimization on the reaction devices in the linear operation sequence table to obtain a scheduling sequence directed graph; A computability detection module is configured to perform computability detection on the reaction devices in the scheduling sequence directed graph according to the scheduling sequence; A dynamic balance simulation module is configured to perform dynamic balance simulation on the reaction devices that satisfy the computability.

12. A computer device comprising a memory, a processor, and a computer program stored on the memory, wherein, The computer program is run by the processor, and instructions of the method according to any one of claims 1-10 are executed.

13. A computer storage medium having stored thereon a computer program, characterized in that The computer program is run by the processor of the computer device, and instructions of the method according to any one of claims 1-10 are executed.

14. A computer program product, characterised in that, The computer program product comprises a computer program, and the computer program is run by the processor of the computer device, and instructions of the method according to any one of claims 1-10 are executed.

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