Miniature light-emitting diode chip, forming method thereof and automobile lamp

Abstract

The invention discloses a miniature light emitting diode chip, a forming method thereof and an automobile lamp, and the miniature light emitting diode chip comprises a first epitaxial layer which is provided with a first side and a second side which are opposite to each other; a plurality of multi-quantum well layers located on the first side, wherein the multi-quantum well layers are in contact with the first epitaxial layer; a plurality of second epitaxial layers located on the first side, wherein each multi-quantum well layer is located between the first epitaxial layer and the corresponding second epitaxial layer; and the plurality of conductive reflector layers are located on the first side, each conductive reflector layer is electrically connected with the corresponding second epitaxial layer, and each conductive reflector layer surrounds the non-light-emitting side of the corresponding multi-quantum well layer. According to the micro light-emitting diode chip, the plurality of conductive reflector layers are additionally arranged, the conductive reflector layers not only can meet the requirement for electrical connection of the micro light-emitting diode chip, but also can block and reflect light rays emitted by the multi-quantum well layer towards the non-light-emitting side, so that the photoelectric conversion efficiency of the micro light-emitting diode chip is improved, and light crosstalk is reduced.

Description

Technical Field

[0001] This invention relates to the field of micro-display technology, and more particularly to a micro light-emitting diode chip and its fabrication method, and automotive headlights. Background Technology

[0002] Inorganic micro-pixel light-emitting diodes, also known as micro LEDs or μ-LEDs, are a high-pixel-density LED planar display technology that uses micrometer-scale LEDs as pixels, assembled on a CMOS backplane at micrometer-scale intervals. The display principle involves thinning, miniaturizing, and arraying the LED structure, reducing its size to only a few to tens of micrometers. These micro-LED chips are then mass-produced and transferred onto a TFT or CMOS backplane. Micro LED displays possess excellent characteristics such as high luminous efficiency, high brightness, short response time, and high reliability, and are hailed by the industry as the next-generation display technology and the ultimate form of display.

[0003] However, existing miniature light-emitting diode chips still have many problems. Summary of the Invention

[0004] The technical problem solved by this invention is to provide a micro light-emitting diode chip and its forming method, as well as an automotive headlight, thereby improving the photoelectric conversion efficiency of the micro light-emitting diode chip and reducing optical crosstalk.

[0005] To address the aforementioned problems, the present invention provides a micro light-emitting diode chip, comprising: a first epitaxial layer having a first doped ion, the first epitaxial layer having a first side and a second side opposite to each other; a plurality of quantum well layers located on the first side, the quantum well layers being in contact with the first epitaxial layer; a plurality of second epitaxial layers located on the first side, the second epitaxial layers having a second doped ion, the second doped ion having a different electrical type than the first doped ion, each of the quantum well layers being located between the first epitaxial layer and a corresponding second epitaxial layer; and a plurality of conductive mirror layers located on the first side, each of the conductive mirror layers being electrically connected to a corresponding second epitaxial layer, and each of the conductive mirror layers surrounding the non-light-emitting side of the corresponding quantum well layer.

[0006] Optionally, it further includes: a plurality of microlenses located on the second side, wherein the light-emitting side of each of the multiple quantum well layers faces the corresponding microlens, and the projection area of ​​each of the multiple quantum well layers toward the second epitaxial layer is located within the projection area of ​​the corresponding microlens toward the second epitaxial layer.

[0007] Optionally, it further includes: a plurality of fluorescent layers located on the second side, each fluorescent layer being located between the corresponding multi-quantum well layer and the corresponding microlens; the fluorescent layers are used to adjust the color of the light emitted by the multi-quantum well layer toward the microlens.

[0008] Optionally, the fluorescent layer excites light of a first wavelength, which is displayed as a first color; the multiple quantum well layer excites light of a second wavelength, which is displayed as a second color; the first wavelength is different from the second wavelength; and the first color and the second color are mixed to form a third color.

[0009] Optionally, the first color light is yellow light; the second color light is blue light; and the third color light is white light.

[0010] Optionally, it further includes: a dam structure located on the second side, the dam structure having a plurality of first through holes, each first through hole exposing the light emission path of the corresponding multi-quantum well layer; each fluorescent layer filling the corresponding first through hole.

[0011] Optionally, it further includes: a first conductive structure located on the second side, the first conductive structure being electrically connected to the first epitaxial layer, and the first conductive structure being located between the dam structure and the first epitaxial layer, the first conductive structure having a plurality of second through holes, each of the first through holes exposing a corresponding second through hole.

[0012] Optionally, each of the fluorescent layers also fills the corresponding second via.

[0013] Optionally, it further includes: a plurality of first ohmic contact layers located on the first side, each first ohmic contact layer being located between the corresponding conductive reflective layer and the second epitaxial layer.

[0014] Optionally, the material of the first ohmic contact layer includes: a transparent conductive material.

[0015] Optionally, transparent conductive materials include: transparent metallic materials, indium tin oxide, or fluorine-doped SnO2.

[0016] Optionally, the material of the dam structure includes: metal material or silicone material; the metal material includes: aluminum, silver, titanium or platinum.

[0017] Optionally, it further includes: a second ohmic contact layer located on the second side, the second ohmic contact layer being located between the first conductive structure and the first epitaxial layer.

[0018] Optionally, the material of the second ohmic contact layer includes a transparent conductive material.

[0019] Optionally, transparent conductive materials include: transparent metallic materials, indium tin oxide, or fluorine-doped SnO2.

[0020] Optionally, the material of the conductive reflective mirror layer includes: a metallic material; the metallic material includes: nickel, silver, titanium, platinum, gold or aluminum.

[0021] Optionally, it further includes: a plurality of first conductive plugs located on the first side, each first conductive plug being electrically connected to a corresponding second epitaxial layer; a driving backplane, the driving backplane including a driving circuit layer; and the plurality of first conductive plugs being electrically connected to the driving circuit layer respectively.

[0022] Optionally, the drive backplane further includes: a plurality of drive backplane conductive plugs, the plurality of drive backplane conductive plugs being electrically connected to the drive circuit layer respectively; the plurality of first conductive plugs being electrically connected to the drive circuit layer respectively through the plurality of drive backplane conductive plugs.

[0023] Optionally, it further includes: a bonding layer located between the drive backplane and the plurality of first conductive plugs, the bonding layer including a plurality of second conductive plugs and a plurality of metal plates, each of the metal plates being electrically connected to the plurality of drive backplane conductive plugs, each of the second conductive plugs being electrically connected to the corresponding metal plate; and each of the first conductive plugs being electrically connected to the corresponding second conductive plug.

[0024] Optionally, the drive backplane further includes: a plurality of functional conductive plugs, each of the functional conductive plugs being electrically connected to the drive circuit layer; the bonding layer further includes: a plurality of third conductive plugs, each of the third conductive plugs being electrically connected to a corresponding functional conductive plug.

[0025] Optionally, it further includes: a plurality of fourth conductive plugs located on the first side, each of the fourth conductive plugs being electrically connected to a corresponding third conductive plug; and a plurality of second conductive structures located on the second side, each of the second conductive structures being electrically connected to a corresponding fourth conductive plug.

[0026] Optionally, the materials of the first epitaxial layer and the second epitaxial layer include gallium nitride.

[0027] Accordingly, the present invention also provides a method for forming a micro light-emitting diode chip, comprising: a first epitaxial layer having a first doped ion, the first epitaxial layer having a first side and a second side opposite to each other; forming a plurality of quantum well layers on the first side, the quantum well layers being in contact with the first epitaxial layer; forming a plurality of second epitaxial layers on the first side, the second epitaxial layers having a second doped ion, the second doped ion having a different electrical type than the first doped ion, each of the quantum well layers being located between the first epitaxial layer and a corresponding second epitaxial layer; forming a plurality of conductive mirror layers on the first side, each of the conductive mirror layers being electrically connected to a corresponding second epitaxial layer, and each of the conductive mirror layers surrounding the non-light-emitting side of the corresponding quantum well layer.

[0028] Optionally, before forming the conductive mirror layer, the method further includes: forming a plurality of first ohmic contact layers on the first side, each first ohmic contact layer being located between the corresponding conductive mirror layer and the second epitaxial layer.

[0029] Optionally, the method for forming the first epitaxial layer, a plurality of first ohmic contact layers, a plurality of second epitaxial layers, and a plurality of multiple quantum well layers includes: providing a temporary substrate; forming a first epitaxial material layer on the temporary substrate; forming a multiple quantum well material layer on the first epitaxial material layer; forming a second epitaxial material layer on the multiple quantum well material layer; forming a first ohmic contact material layer on the second epitaxial material layer; and performing patterned etching on the first ohmic contact material layer, the second epitaxial material layer, the multiple quantum well material layer, and the first epitaxial material layer to form a plurality of first ohmic contact layers, a plurality of second epitaxial layers, a plurality of multiple quantum well layers, and the first epitaxial layer.

[0030] Optionally, the method for forming the plurality of conductive mirror layers includes: forming a third photoresist structure on the first side; forming a mirror material layer on the first side, the mirror material layer covering the third photoresist structure; removing the third photoresist structure and the mirror material layer on the third photoresist structure to form the plurality of conductive mirror layers.

[0031] Optionally, after forming the conductive reflector layer, the method further includes: forming a plurality of first conductive plugs on the first side, each first conductive plug being electrically connected to a corresponding second epitaxial layer; providing a driving backplane, the driving backplane including a driving circuit layer; and electrically connecting the plurality of first conductive plugs to the driving circuit layer respectively.

[0032] Optionally, the drive backplane further includes: a plurality of drive backplane conductive plugs, the plurality of drive backplane conductive plugs being electrically connected to the drive circuit layer respectively; the plurality of first conductive plugs being electrically connected to the drive circuit layer respectively through the plurality of drive backplane conductive plugs.

[0033] Optionally, after providing the drive backplane, the method further includes: forming a bonding layer on the drive backplane, the bonding layer including a plurality of second conductive plugs and a plurality of metal plates, each of the metal plates being electrically connected to a plurality of the drive backplane conductive plugs, and each of the second conductive plugs being electrically connected to a corresponding metal plate; and bonding each of the first conductive plugs to a corresponding second conductive plug.

[0034] Optionally, the drive backplane further includes: a plurality of functional conductive plugs, each of the functional conductive plugs being electrically connected to the drive circuit layer; the bonding layer further includes: a plurality of third conductive plugs, each of the third conductive plugs being electrically connected to a corresponding functional conductive plug.

[0035] Optionally, it further includes: forming a plurality of fourth conductive plugs on the first side, each of the fourth conductive plugs being electrically connected to a corresponding third conductive plug; and forming a plurality of second conductive structures on the second side, each of the second conductive structures being electrically connected to a corresponding fourth conductive plug.

[0036] Optionally, after forming the conductive reflective mirror layer, the method further includes: forming a plurality of microlenses on the second side, wherein the light-emitting side of each of the multiple quantum well layers faces the corresponding microlens, and the projection area of ​​each of the multiple quantum well layers toward the second epitaxial layer is located within the projection area of ​​the corresponding microlens toward the second epitaxial layer.

[0037] Optionally, before forming the plurality of microlenses, the method further includes: forming a plurality of fluorescent layers on the second side, each fluorescent layer being located between a corresponding multi-quantum well layer and a corresponding microlens; the fluorescent layers are used to adjust the color of the light emitted by the multi-quantum well layer toward the microlens.

[0038] Optionally, before forming the plurality of fluorescent layers, the method further includes: a dam structure on the second side, the dam structure having a plurality of first through holes, each first through hole exposing the light emission path of the corresponding multi-quantum-well layer; each fluorescent layer filling the corresponding first through hole.

[0039] Optionally, the method for forming the dam structure includes: forming a plurality of first photoresist structures on the second side, with a first gap between adjacent first photoresist structures; forming the dam structure within the first gap; and after forming the dam structure, removing the first photoresist structures so that the dam structure has a plurality of first through holes.

[0040] Optionally, before forming the dam structure, the method further includes: forming a first conductive structure on the second side, the first conductive structure being electrically connected to the first epitaxial layer, and the first conductive structure being located between the dam structure and the first epitaxial layer, the first conductive structure having a plurality of second through holes, each of the first through holes exposing a corresponding second through hole.

[0041] Optionally, the method for forming the first conductive structure includes: forming a plurality of second photoresist structures on the second side, with a second gap between adjacent second photoresist structures; forming the first conductive structure within the second gap; and after forming the first conductive structure, removing the second photoresist structures so that the first conductive structure has a plurality of second through holes.

[0042] Optionally, each of the fluorescent layers also fills the corresponding second via.

[0043] Optionally, before forming the first conductive structure, the method further includes: a second ohmic contact layer on the second side, the second ohmic contact layer being located between the first conductive structure and the first epitaxial layer.

[0044] Accordingly, the present invention also provides an automotive headlight, including a miniature light-emitting diode chip as described in any of the above technical solutions.

[0045] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0046] In the micro light-emitting diode chip of the present invention, a plurality of conductive reflective mirror layers are added to the second side. Each conductive reflective mirror layer is electrically connected to the corresponding second epitaxial layer, and each conductive reflective mirror layer surrounds the non-light-emitting side of the corresponding multi-quantum well layer. By adding the plurality of conductive reflective mirror layers, the conductive reflective mirror layers can not only meet the electrical connection requirements of the micro light-emitting diode chip, but also block and reflect the light emitted by the multi-quantum well layer toward the non-light-emitting side, thereby improving the photoelectric conversion efficiency of the micro light-emitting diode chip and reducing optical crosstalk.

[0047] Furthermore, it also includes: several fluorescent layers located on the second side, each fluorescent layer situated between a corresponding multi-quantum well layer and a corresponding microlens; the fluorescent layers are used to adjust the color of the light emitted by the multi-quantum well layer toward the microlens. By adding fluorescent layers, the color of the light emitted by the multi-quantum well layer toward the microlens can be adjusted to meet the needs of different application scenarios.

[0048] Furthermore, it also includes: a plurality of first ohmic contact layers located on the first side, each first ohmic contact layer being located between the corresponding conductive mirror layer and the second epitaxial layer. By adding the first ohmic contact layers, the contact resistance between the conductive mirror layer and the second epitaxial layer can be effectively reduced.

[0049] Furthermore, it also includes a second ohmic contact layer located on the second side, between the first conductive structure and the first epitaxial layer. Adding the second ohmic contact layer effectively reduces the contact resistance between the first conductive structure and the first epitaxial layer.

[0050] Furthermore, it also includes a bonding layer located between the drive backplane and the plurality of first conductive plugs. The bonding layer includes a plurality of second conductive plugs and a plurality of metal plates. Each metal plate is electrically connected to a plurality of drive backplane conductive plugs, and each second conductive plug is electrically connected to a corresponding metal plate; each first conductive plug is electrically connected to a corresponding second conductive plug. By electrically connecting the plurality of drive backplane conductive plugs through the metal plates, the power supply pressure of a single drive backplane conductive plug can be effectively reduced, so as to provide a larger current for each first conductive plug.

[0051] In the method for forming a micro light-emitting diode chip according to the technical solution of the present invention, a plurality of conductive reflective mirror layers are formed on the second side. Each conductive reflective mirror layer is electrically connected to a corresponding second epitaxial layer, and each conductive reflective mirror layer surrounds the non-light-emitting side of the corresponding multi-quantum well layer. By adding a plurality of conductive reflective mirror layers, the conductive reflective mirror layers can not only meet the electrical connection requirements of the micro light-emitting diode chip, but also block and reflect the light emitted by the multi-quantum well layer toward the non-light-emitting side, thereby improving the photoelectric conversion efficiency of the micro light-emitting diode chip and reducing optical crosstalk.

[0052] Furthermore, the method also includes: forming a bonding layer on the drive backplane, the bonding layer comprising a plurality of second conductive plugs and a plurality of metal plates, each metal plate being electrically connected to a plurality of drive backplane conductive plugs, and each second conductive plug being electrically connected to a corresponding metal plate; and bonding each first conductive plug to a corresponding second conductive plug. Electrically connecting the plurality of drive backplane conductive plugs via metal plates effectively reduces the power supply pressure on a single drive backplane conductive plug, thereby providing a larger current to each first conductive plug.

[0053] Furthermore, it also includes: forming several fluorescent layers on the second side, each fluorescent layer located between the corresponding multi-quantum well layer and the corresponding microlens; the fluorescent layers are used to adjust the color of the light emitted by the multi-quantum well layer toward the microlens. By adding fluorescent layers, the color of the light emitted by the multi-quantum well layer toward the microlens can be adjusted to meet the needs of different application scenarios.

[0054] Furthermore, it also includes: forming a plurality of first ohmic contact layers on the first side, each first ohmic contact layer being located between the corresponding conductive mirror layer and the second epitaxial layer. By adding the first ohmic contact layers, the contact resistance between the conductive mirror layer and the second epitaxial layer can be effectively reduced.

[0055] Furthermore, it also includes a second ohmic contact layer on the second side, which is located between the first conductive structure and the first epitaxial layer. By adding the second ohmic contact layer, the contact resistance between the first conductive structure and the first epitaxial layer can be effectively reduced.

[0056] In the automotive headlights of the present invention, by replacing the traditional headlights with miniature light-emitting diode chips, the resolution and luminous flux of the headlights can be effectively improved. Attached Figure Description

[0057] Figures 1 to 14 This is a schematic diagram of the structure of each step in the method for forming a micro light-emitting diode chip according to an embodiment of the present invention. Detailed Implementation

[0058] As described in the background section, existing miniature light-emitting diode (LED) chips still have many problems. These will be explained in detail below.

[0059] While miniature LED chips have many advantages, they also face technical challenges at present, such as low photoelectric conversion efficiency and optical crosstalk.

[0060] Based on this, the present invention provides a micro light-emitting diode chip and its formation method, as well as an automotive headlight. A plurality of conductive reflective mirror layers are added to the second side, each conductive reflective mirror layer being electrically connected to a corresponding second epitaxial layer, and each conductive reflective mirror layer surrounding the non-emitting side of the corresponding multi-quantum well layer. By adding these conductive reflective mirror layers, not only can the electrical connection requirements of the micro light-emitting diode chip be met, but the light emitted by the multi-quantum well layer towards the non-emitting side can also be blocked and reflected, thereby improving the photoelectric conversion efficiency of the micro light-emitting diode chip and reducing optical crosstalk.

[0061] To make the above-mentioned objects, features, and advantages of the present invention more apparent and understandable, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0062] In the description of this invention, it should be understood that the terms "upper," "lower," "top surface," "bottom surface," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the indicated position or element must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations of the invention. Furthermore, the terms "first" and "second" are used only to distinguish an entity or operation from another entity or operation, and do not require or imply any actual relationship, order, or relative importance between these entities or operations.

[0063] Figures 1 to 14 This is a schematic diagram of the structure of each step in the method for forming a micro light-emitting diode chip according to an embodiment of the present invention.

[0064] This process involves forming a first epitaxial layer, several multiple quantum well layers, and several second epitaxial layers. Please refer to [reference needed] for details. Figures 1 to 7 .

[0065] Please refer to Figure 1 Provide temporary substrate 100.

[0066] In this embodiment, the micro LED chip uses a flip-chip fabrication process, and the temporary substrate 100 is an epitaxial substrate layer. The temporary substrate 100 is used as a temporary support structure in the flip-chip fabrication process of the micro LED chip. After the actual device structure of the micro LED chip is fabricated, the temporary substrate 100 needs to be removed.

[0067] Please refer to Figure 2 and Figure 3 , Figure 2 yes Figure 3 A cross-sectional view along line AA shows a first epitaxial material layer 101 formed on a temporary substrate 100.

[0068] In this embodiment, the first epitaxial material layer 101 is doped with a first doped ion, which is an N-type ion.

[0069] In this embodiment, the first epitaxial material layer 101 is gallium nitride.

[0070] In this embodiment, the first epitaxial material layer 101 has a first side 101a and a second side 101b opposite to each other, and the temporary substrate 100 is located on the second side 101b.

[0071] In this embodiment, the first epitaxial material layer 101 includes a display area I and a non-display area II surrounding the display area I. In subsequent processes, pixels formed based on the display area I have light-emitting functionality, while pixels formed based on the non-display area II do not. The purpose of pixels formed based on the non-display area II is to make the structural environment of the display area I and the non-display area II more consistent, thereby reducing the problem of film peeling due to stress differences during subsequent coating. It also eliminates the step height difference between the display area I and the non-display area II, facilitating subsequent bonding processes.

[0072] Please refer to Figure 4 , Figure 4 and Figure 2 With the view direction consistent, a multi-quantum well material layer 102 is formed on the first epitaxial material layer 101.

[0073] In this embodiment, the multi-quantum well material layer 102 is located on the first side 101a.

[0074] Please refer to Figure 5 A second epitaxial material layer 103 is formed on the multi-quantum-well material layer 102.

[0075] In this embodiment, the second epitaxial material layer 103 is doped with a second doped ion. The second doped ion has a different electrical type from the first doped ion, and the second doped ion is a P-type ion.

[0076] In this embodiment, the second epitaxial material layer 103 is located on the first side 101a, and the multi-quantum well material layer 102 is located between the first epitaxial material layer 101 and the second epitaxial material layer 103.

[0077] In this embodiment, the material of the second epitaxial layer 103 is gallium nitride.

[0078] Please refer to Figure 6 A first ohmic contact material layer 104 is formed on the second epitaxial material layer 103.

[0079] Please refer to Figure 7 The first ohmic contact material layer 104, the second epitaxial material layer 103, the multi-quantum well material layer 102, and the first epitaxial material layer 101 are patterned and etched to form a plurality of first ohmic contact layers 105, a plurality of second epitaxial layers 106, a plurality of multi-quantum well layers 107, and a first epitaxial layer 108.

[0080] In this embodiment, the formed multi-quantum well layer 107, second epitaxial layer 106, and first ohmic contact layer 105 are all located on the first side 101a. Each multi-quantum well layer 107 is located between the first epitaxial layer 108 and the corresponding second epitaxial layer 106, and each second epitaxial layer 106 is located between the corresponding multi-quantum well layer 107 and the corresponding first ohmic contact layer 105. The first epitaxial layer 108 and the second epitaxial layer 106 serve as the positive and negative electrodes of the micro-LED chip, respectively.

[0081] In this embodiment, after patterning etching of the first epitaxial material layer 101, the first epitaxial layer 108 formed has a plurality of protrusions 1081.

[0082] In this embodiment, after patterning etching of the first ohmic contact material layer 104, the second epitaxial material layer 103, the multi-quantum well material layer 102, and the first epitaxial material layer 101, a plurality of mesa structures are formed. Each mesa structure includes: a protrusion 1081 of the first epitaxial layer 108, a multi-quantum well layer 107 located on the protrusion 1081, a second epitaxial layer 106 located on the multi-quantum well layer 107, and a first ohmic contact layer 105 located on the second epitaxial layer 106.

[0083] In this embodiment, the sidewalls of each platform structure are inclined surfaces, meaning that the diameter of the platform gradually decreases from the bottom surface of the protrusion 1081 to the top surface of the first ohmic contact layer 105. By setting the sidewalls of the platform structure as inclined surfaces, the conductive reflective mirror layer formed based on the platform structure can reflect light as much as possible towards the direction of the microlens, thereby further improving the photoelectric conversion efficiency.

[0084] It should be noted that the platform structures formed after patterning etching are evenly distributed in display area I and non-display area II. The number of platform structures in display area I exceeds 2 million, meaning the resolution of the micro LED chip exceeds 2 million. Since the pixels in non-display area II do not have light-emitting function, the platform structures in non-display area II only need to have protrusions 1081. One or more of the corresponding multi-quantum well layer 107, second epitaxial layer 106, and first ohmic contact layer 105 may or may not be formed. The individual pixels in non-display area II will not light up because they do not have corresponding driving circuits and plugs at the subsequent driving backplane location.

[0085] It should be noted that, Figure 7 Only a portion of the platform structure in display area I and non-display area II is shown in the image.

[0086] It should be noted that in this embodiment, the first ohmic contact layer 105 cannot block the light emitted by the multiple quantum well layer 107 toward the subsequently formed conductive mirror layer, which will affect the light reflection effect of the conductive mirror layer. Therefore, the first ohmic contact layer 105 needs to be made of a transparent conductive material, specifically a transparent metal material, indium tin oxide, or fluorine-doped SnO2.

[0087] It should be noted that the multiple quantum well layer 107 can emit light of different colors, mainly because they have specific physical properties that allow recombination of electrons and holes to occur between different energy levels, thereby emitting light of different wavelengths.

[0088] The technical principle of the multiple quantum well layer 107 involves a fundamental concept in quantum physics, where the energy states of electrons and holes are confined to specific regions, resulting in the discreteness of energy levels. When an electron transitions from a higher energy level to a lower energy level, it releases a photon, the energy of which depends on the energy difference between the energy levels. Because the structure of the multiple quantum well layer 107 allows for precise control over the positions of these energy levels, the wavelength of the emitted light, i.e., the color of the light, can be precisely controlled.

[0089] Specifically, the multiple quantum well layer 107 is composed of alternating thin layers of two or more different semiconductor materials. The thickness and material selection of these thin layers determine the characteristics of the energy levels. By adjusting the thickness and material of these thin layers, the recombination process of electrons and holes can be precisely controlled, thereby controlling the wavelength of the emitted light and achieving the emission of different colors of light. For example, by adjusting the structural parameters of the InGaAs / InGaAsP multiple quantum well layer 107, laser outputs with wavelengths of 1.3 micrometers and 1.5 micrometers can be obtained. These specific wavelengths of light correspond to different colors required in communication and display technologies.

[0090] Furthermore, the application of the multi-quantum-well layer 107 is not limited to emitting light of a single color. By designing and adjusting the combination and structure of materials, it is possible to achieve the output of multiple colors, which is of great significance for display technology and optical communication. For example, quantum dot technology, by controlling the size and materials of quantum dots, can achieve full-color display, which is widely used in modern display technology.

[0091] Please refer to Figure 8 A plurality of conductive mirror layers 109 are formed on the first side 101a. Each conductive mirror layer 109 is electrically connected to the corresponding second epitaxial layer 106, and each conductive mirror layer 109 surrounds the non-light-emitting side of the corresponding multi-quantum well layer 107.

[0092] By adding several conductive reflective mirror layers 109, the conductive reflective mirror layers 109 can not only meet the electrical connection requirements of the micro light-emitting diode chip, but also block and reflect the light emitted by the multi-quantum well layer 107 toward the non-light-emitting side, thereby improving the photoelectric conversion efficiency of the micro light-emitting diode chip and reducing optical crosstalk.

[0093] It should be noted that, in this embodiment, since the optical emitted by the multi-quantum well layer 107 is ultimately collected and emitted through a microlens formed subsequently, the side where the microlens is located is the light-emitting side of the multi-quantum well layer 107, and the other sides are the non-light-emitting sides of the multi-quantum well layer.

[0094] In this embodiment, each first ohmic contact layer 105 is located between the corresponding conductive reflective mirror layer 109 and the second epitaxial layer 106. By adding the first ohmic contact layer 105, the contact resistance between the conductive reflective mirror layer 109 and the second epitaxial layer 106 can be effectively reduced.

[0095] In this embodiment, the method for forming a plurality of conductive mirror layers 109 includes: forming a third photoresist structure (not shown) on a first side 101a; forming a mirror material layer (not shown) on the first side 101a, the mirror material layer covering the third photoresist structure; removing the third photoresist structure and the mirror material layer on the third photoresist structure to form a plurality of conductive mirror layers 109.

[0096] It should be noted that the third photoresist structure is applied to locations where the conductive reflective mirror layer 109 does not need to be formed.

[0097] It should be noted that, in this embodiment, since the display area I is used to form display points with light-emitting function, the conductive reflective mirror layer 109 is only formed on the platform structure in the display area I, while the conductive reflective mirror layer 109 is not formed on the platform structure in the non-display area II.

[0098] In this embodiment, the conductive reflective mirror layer 109 is made of a metallic material; the metallic material may be nickel, silver, titanium, platinum, gold, or aluminum.

[0099] Please continue to refer to this. Figure 8 In this embodiment, before forming the conductive reflective mirror layer 109, the method further includes: forming a passivation layer 110 on the first side 101a, the passivation layer 110 covering the surface of a plurality of platform structures, and the passivation layer 110 needs to expose the first ohmic contact layer 105 of the platform structure in the display area I, so as to ensure that the formed conductive reflective mirror layer 109 can achieve electrical connection with the corresponding first ohmic contact layer 105.

[0100] In this embodiment, the passivation layer 110 mainly serves as an electrical isolation layer, and the first passivation material layer can be an alumina (AL2O3) film layer formed by an atomic layer deposition process with good step coverage.

[0101] Please continue to refer to this. Figure 8 In this embodiment, specifically, the passivation layer 110 comprises three parts (not shown). The first part covers the surface of several platform structures, located between the first ohmic contact layer 105 and the conductive reflector 109, and exposes a portion of the first ohmic contact layer 105, which contacts the conductive reflector 109. The second part covers the side surface of several platform structures, located between the side surface of the platform and the conductive reflector 109. The third part covers the surface of the first epitaxial layer 108 in the gap between adjacent platform structures. The first, second, and third parts of the passivation layer 110 are interconnected.

[0102] In some modified embodiments, the passivation layer 110 may consist only of the second and third portions described above, and the top of the second portion of the passivation layer 110 may be flush with the top of the first ohmic contact layer 105, or the top of the second portion may be slightly lower than the height of the top surface of the second epitaxial layer 106.

[0103] It should be noted that, in this embodiment, since the pixels in the non-display area II do not have the function of emitting light, the platform structure in the non-display area II may not form a conductive reflective mirror layer 109 (i.e., it may be covered in advance by a third photoresist structure) and may not retain a passivation layer 110.

[0104] Please refer to Figure 9 After the conductive reflector layer 109 is formed, a plurality of first conductive plugs 111 are formed on the first side 101a, and each first conductive plug 111 is electrically connected to the corresponding second epitaxial layer 106.

[0105] In this embodiment, the method for forming a plurality of first conductive plugs 111 includes: forming a dielectric layer 112 on a first side 101a, the dielectric layer 112 covering a plurality of platform structures; forming a plurality of plug through holes (not shown) in the dielectric layer 112; and forming first conductive plugs 111 in the plug through holes.

[0106] It should be noted that in this embodiment, the platform structure in display area I is electrically connected to the corresponding first conductive plug 111, while the platform structure in non-display area II is not electrically connected to the corresponding first conductive plug 111.

[0107] In this embodiment, while forming the first conductive plug 111, the method also includes forming a first alignment mark 113 and a plurality of fourth conductive plugs 114 within the dielectric layer 112. The first alignment mark 113 is used to align with the second alignment mark formed within the bonding layer during subsequent bonding processes, thereby reducing offset caused by bonding. The fourth conductive plugs 114 are used to introduce functional pins from the subsequent drive backplane to the first side 101a.

[0108] Please refer to Figure 10 Provides a drive backplane 200.

[0109] In this embodiment, the drive backplane 200 includes: a drive circuit layer 2001; a plurality of drive backplane conductive plugs 2002, which are electrically connected to the drive circuit layer 2001 respectively; and a plurality of functional conductive plugs 2003, which are electrically connected to the drive circuit layer 2001 respectively.

[0110] In this embodiment, the drive backplane 200 is an IC board or a TET board.

[0111] Please refer to Figure 11 A bonding layer 300 is formed on the drive backplane 200. The bonding layer 300 includes: a plurality of metal plates 3001, each metal plate 3001 being electrically connected to a plurality of drive backplane conductive plugs 2002; a plurality of second conductive plugs 3002, each second conductive plug 3002 being electrically connected to a corresponding metal plate 3001; and a plurality of third conductive plugs 3003, each third conductive plug 3003 being electrically connected to a corresponding functional conductive plug 2003.

[0112] By electrically connecting several drive backplane conductive plugs 2002 through the metal plate 3001, the power supply pressure of a single drive backplane conductive plug 2002 can be effectively reduced, so as to provide a larger current to each first conductive plug 111 in the display area I.

[0113] It should be noted that, in this embodiment, several functional conductive plugs 2003 are used as transmission media to enable the driving backplane 200 to provide voltage or data input / output to the micro LED chip.

[0114] Please continue to refer to this. Figure 11 In this embodiment, the bonding layer further includes a second alignment marker 3004.

[0115] Please refer to Figure 12 Each first conductive plug 111 is bonded to the corresponding second conductive plug 3002.

[0116] In this embodiment, during the process of bonding each first conductive plug 111 to the corresponding second conductive plug 3002, the method further includes: bonding each third conductive plug 3003 to the corresponding fourth conductive plug 114; and aligning the first alignment mark 113 and the second alignment mark 3004.

[0117] It should be noted that, in this embodiment, a second conductive plug 3002 is also formed in the bonding layer 300, which is bonded to the first conductive plug 111 in the non-display area II. The purpose is to keep the bonding environment of the display area I and the non-display area II as consistent as possible and improve the bonding quality.

[0118] Please refer to Figure 13 A plurality of second conductive structures 115 are formed on the second side 101b, and each second conductive structure 115 is electrically connected to the corresponding fourth conductive plug 114.

[0119] It should be noted that, in this embodiment, before forming the second conductive structure 115, the temporary substrate 100 needs to be removed and the first epitaxial layer 108 needs to be thinned accordingly.

[0120] In this embodiment, during the process of forming the second conductive structure 115, the method further includes: forming a first conductive structure 116 on the second side 101b, wherein the first conductive structure 116 is electrically connected to the first epitaxial layer 108.

[0121] Please continue to refer to this. Figure 13 In this embodiment, before forming the first conductive structure 116, a second ohmic contact layer 117 is further included on the second side 101b, the second ohmic contact layer 117 being located between the first conductive structure 116 and the first epitaxial layer 108. By adding the second ohmic contact layer 117, the contact resistance between the first conductive structure 116 and the first epitaxial layer 108 can be effectively reduced.

[0122] It should be noted that in this embodiment, the second ohmic contact layer 117 cannot block the light emitted by the multi-quantum well layer 107 toward the microlens subsequently formed. Therefore, the second ohmic contact layer 117 also needs to be made of a transparent conductive material, specifically a transparent metal material, indium tin oxide, or fluorine-doped SnO2.

[0123] Please continue to refer to this. Figure 13 In this embodiment, since the formed fourth conductive plug 114 does not completely penetrate the dielectric layer 112, in order to ensure that the second conductive structure 115 can be electrically connected to the fourth conductive plug 114, after the second ohmic contact layer 117 is formed, corresponding opening etching is required to expose each fourth conductive plug 114, so that the second conductive structure 115 can be electrically connected to the corresponding fourth conductive plug 114.

[0124] It should be noted that the second conductive structure 115 is directly electrically connected to the fourth conductive plug 114, and neither the second conductive structure 115 nor the fourth conductive plug 114 is electrically connected to the second ohmic contact layer 117 or the first epitaxial layer 108, so as to avoid short circuit between the second conductive structure 115 and the first conductive structure 116.

[0125] In this embodiment, the method for forming the first conductive structure 116 includes: forming a plurality of second photoresist structures (not shown) on the second side 101b, with a second gap between adjacent second photoresist structures; forming the first conductive structure 116 within the second gap; and after forming the first conductive structure 116, removing the second photoresist structures so that the first conductive structure 116 has a plurality of second vias 118, each second via 118 exposing the light-emitting path of the corresponding multi-quantum well layer 107.

[0126] It should be noted that, in this embodiment, the formation process of the second conductive structure 115 is also based on the positioning and formation of several second photoresist structures.

[0127] Please refer to Figure 14 A plurality of microlenses 119 are formed on the second side 101b. The light-emitting side of each multi-quantum well layer 107 faces the corresponding microlens 119, and the projection area of ​​each multi-quantum well layer 107 toward the second epitaxial layer 106 is located within the projection area of ​​the corresponding microlens 119 toward the second epitaxial layer 106.

[0128] In this embodiment, the microlens 119 has a hemispherical shape, and the hemispherical structure can effectively improve the light extraction efficiency of the micro light-emitting diode chip.

[0129] In this embodiment, the microlens 119 is made of benzocyclobutene (BCB).

[0130] Please continue to refer to this. Figure 14 In this embodiment, before forming the plurality of microlenses 119, the method further includes forming a plurality of fluorescent layers 120 on the second side 101b, each fluorescent layer 120 being located between the corresponding multi-quantum well layer 107 and the corresponding microlens 119; the fluorescent layer 120 is used to adjust the color of the light emitted by the multi-quantum well layer 107 toward the microlens 119. By adding the fluorescent layer 120, the color of the light emitted by the multi-quantum well layer 107 toward the microlens 119 can be adjusted to meet the needs of different application scenarios.

[0131] In this embodiment, the fluorescent layer 120 excites light of a first wavelength, which is displayed as light of a first color; the multiple quantum well layer 107 excites light of a second wavelength, which is displayed as light of a second color, and the first wavelength is different from the second wavelength; the first color light and the second color light are mixed to form a third color light.

[0132] In one specific embodiment, the first color light is yellow light; the second color light is blue light; and the third color light is white light.

[0133] Please continue to refer to this. Figure 14 In this embodiment, before forming a plurality of fluorescent layers 120, the method further includes: a dam structure 121 on the second side 101b, the dam structure 121 having a plurality of first through holes (not shown), each first through hole exposing the light emission path of the corresponding multi-quantum well layer 107; each fluorescent layer 120 filling the corresponding first through hole.

[0134] In this embodiment, the method for forming the dam structure 121 includes: forming a plurality of first photoresist structures (not shown) on the second side 101b, with a first gap between adjacent first photoresist structures; forming the dam structure 121 within the first gap; and after forming the dam structure 121, removing the first photoresist structures so that the dam structure 121 has a plurality of first through holes.

[0135] In this embodiment, the first conductive structure 116 is located between the dam structure 121 and the first epitaxial layer 108. Each first via exposes a corresponding second via 118, and each first via also exposes the light-emitting path of the corresponding multi-quantum well layer 107.

[0136] Please continue to refer to this. Figure 14 In this embodiment, each fluorescent layer 120 is also filled within the corresponding second via 118.

[0137] It should be noted that in this embodiment, the microlens 119 and the phosphor layer 120 are only fabricated on the pixels of the display area I. Since the pixels of the non-display area II do not have the function of emitting light, and the subsequent point electrical connection structure needs to be formed on the non-display area II, the microlens 119 and the phosphor layer 120 are not fabricated on the pixels of the non-display area II at the same time.

[0138] Accordingly, this invention also provides a miniature light-emitting diode chip, please refer to the following embodiments. Figure 14The system includes: a first epitaxial layer 108, which contains first doped ions and has opposing first sides 101a and second sides 101b; a plurality of quantum well layers 107 located on the first side 101a, which are in contact with the first epitaxial layer 108; a plurality of second epitaxial layers 106 located on the first side 101a, which contain second doped ions, the second doped ions having different electrical types from the first doped ions, and each quantum well layer 107 located between the first epitaxial layer 108 and the corresponding second epitaxial layer 106; and a plurality of conductive mirror layers 109 located on the first side 101a, each conductive mirror layer 109 being electrically connected to the corresponding second epitaxial layer 106, and each conductive mirror layer 109 surrounding the non-light-emitting side of the corresponding quantum well layer 107.

[0139] By adding several conductive reflective mirror layers 109, the conductive reflective mirror layers 109 can not only meet the electrical connection requirements of the micro light-emitting diode chip, but also block and reflect the light emitted by the multi-quantum well layer 107 toward the non-light-emitting side, thereby improving the photoelectric conversion efficiency of the micro light-emitting diode chip and reducing optical crosstalk.

[0140] In this embodiment, it also includes: a plurality of microlenses 119 located on the second side 101b, wherein the light-emitting side of each multi-quantum well layer 107 faces the corresponding microlens 119, and the projection area of ​​each multi-quantum well layer 107 toward the second epitaxial layer 106 is located within the projection area of ​​the corresponding microlens 119 toward the second epitaxial layer 106.

[0141] In this embodiment, it further includes: a plurality of fluorescent layers 120 located on the second side 101b, each fluorescent layer 120 being located between the corresponding multi-quantum well layer 107 and the corresponding microlens 119; the fluorescent layers 120 are used to adjust the color of the light emitted by the multi-quantum well layer 107 toward the microlens 119. By adding fluorescent layers 120, the color of the light emitted by the multi-quantum well layer 107 toward the microlens 119 can be adjusted to meet the needs of different application scenarios.

[0142] In this embodiment, the fluorescent layer 120 excites a first color light; the multiple quantum well layer 107 excites a second color light; the first and second color lights are mixed to form a third color light. Specifically, the first color light is yellow light; the second color light is blue light; and the third color light is white light.

[0143] In this embodiment, it also includes: a dam structure 121 located on the second side 101b, the dam structure 121 having a plurality of first through holes, each first through hole exposing the light emission path of the corresponding multi-quantum well layer 107; each fluorescent layer 120 filling the corresponding first through hole.

[0144] In this embodiment, it also includes: a first conductive structure 116 located on the second side 101b, the first conductive structure 116 being electrically connected to the first epitaxial layer 108, and the first conductive structure 116 being located between the dam structure 121 and the first epitaxial layer 108, the first conductive structure 116 having a plurality of second through holes 118, each first through hole exposing a corresponding second through hole 118.

[0145] In this embodiment, each fluorescent layer 120 is also filled within the corresponding second via 118.

[0146] In this embodiment, it further includes a plurality of first ohmic contact layers 105 located on the first side 101a, each first ohmic contact layer 105 being located between the corresponding conductive mirror layer 109 and the second epitaxial layer 106. By adding the first ohmic contact layers 105, the contact resistance between the conductive mirror layer 109 and the second epitaxial layer 106 can be effectively reduced.

[0147] In this embodiment, the first ohmic contact layer 105 is made of a transparent conductive material; specifically, the transparent conductive material may be a transparent metal material, indium tin oxide, or fluorine-doped SnO2.

[0148] In this embodiment, the dam structure 121 is made of metal or silicone; the metal material can be aluminum, silver, titanium or platinum.

[0149] In this embodiment, a second ohmic contact layer 117 is also included, located on the second side 101b, between the first conductive structure 116 and the first epitaxial layer 108. By adding the second ohmic contact layer 117, the contact resistance between the first conductive structure 116 and the first epitaxial layer 108 can be effectively reduced.

[0150] In this embodiment, the material of the second ohmic contact layer 117 is a transparent conductive material; specifically, the transparent conductive material can be a transparent metal material, indium tin oxide, or fluorine-doped SnO2.

[0151] In this embodiment, the conductive reflective mirror layer 109 is made of a metallic material; the metallic material may be nickel, silver, titanium, platinum, gold, or aluminum.

[0152] In this embodiment, it further includes: a plurality of first conductive plugs 111 located on the first side 101a, each first conductive plug 111 being electrically connected to the corresponding second epitaxial layer 106; a driving backplate 200, the driving backplate 200 including a driving circuit layer 2001; and the plurality of first conductive plugs 111 being electrically connected to the driving circuit layer 2001 respectively.

[0153] In this embodiment, the drive backplane 200 further includes: a plurality of drive backplane conductive plugs 2002, which are electrically connected to the drive circuit layer 2001 respectively; and a plurality of first conductive plugs 111 are electrically connected to the drive circuit layer 2001 respectively through the plurality of drive backplane conductive plugs 2002.

[0154] In this embodiment, a bonding layer 300 is further included between the drive backplane 200 and the plurality of first conductive plugs 111. The bonding layer 300 includes a plurality of second conductive plugs 3002 and a plurality of metal plates 3001. Each metal plate 3001 is electrically connected to the plurality of drive backplane conductive plugs 2002, and each second conductive plug 3002 is electrically connected to its corresponding metal plate 3001. Each first conductive plug 111 is electrically connected to its corresponding second conductive plug 3002. By electrically connecting the plurality of drive backplane conductive plugs 2002 through the metal plates 3001, the power supply pressure of a single drive backplane conductive plug 2002 can be effectively reduced, so as to provide a larger current for each first conductive plug 111.

[0155] In this embodiment, the drive backplane 200 further includes: a plurality of functional conductive plugs 2003, which are electrically connected to the drive circuit layer 2001 respectively; the bonding layer 300 further includes: a plurality of third conductive plugs 3003, each of which is electrically connected to the corresponding functional conductive plug 2003.

[0156] In this embodiment, it further includes: a plurality of fourth conductive plugs 114 located on the first side 101a, each fourth conductive plug 114 being electrically connected to a corresponding third conductive plug 3003; and a plurality of second conductive structures 115 located on the second side 101b, each second conductive structure 115 being electrically connected to a corresponding fourth conductive plug 114.

[0157] In this embodiment, the first epitaxial layer 108 and the second epitaxial layer 106 are made of gallium nitride.

[0158] Accordingly, this invention also provides an automotive headlight; please refer to further details. Figure 14 This includes miniature light-emitting diode chips as described in any of the above embodiments. By replacing traditional vehicle headlights with miniature light-emitting diode chips, the resolution and luminous flux of the headlights can be effectively improved.

[0159] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A miniature light-emitting diode chip, characterized in that, include: A first epitaxial layer, wherein the first epitaxial layer has a first doped ion, and the first epitaxial layer has a first side and a second side opposite to each other; A plurality of quantum well layers are located on the first side, and the quantum well layers are in contact with the first epitaxial layer; A plurality of second epitaxial layers are located on the first side, each second epitaxial layer having a second doped ion, the second doped ion having a different electrical type than the first doped ion, and each of the multiple quantum well layers being located between the first epitaxial layer and the corresponding second epitaxial layer; A plurality of conductive mirror layers are located on the first side, each of the conductive mirror layers being electrically connected to the corresponding second epitaxial layer, and each of the conductive mirror layers surrounding the non-light-emitting side of the corresponding multi-quantum-well layer.

2. The micro light-emitting diode chip according to claim 1, characterized in that, Also includes: A plurality of microlenses are located on the second side, with the light-emitting side of each of the multiple quantum well layers facing the corresponding microlens, and the projection area of ​​each of the multiple quantum well layers toward the second epitaxial layer is located within the projection area of ​​the corresponding microlens toward the second epitaxial layer.

3. The micro light-emitting diode chip according to claim 2, characterized in that, Also includes: A plurality of fluorescent layers are located on the second side, each of the fluorescent layers being located between the corresponding multiple quantum well layer and the corresponding microlens; The fluorescent layer is used to adjust the color of the light emitted by the multi-quantum-well layer toward the microlens.

4. The micro light-emitting diode chip according to claim 3, characterized in that, The fluorescent layer excites light of a first wavelength, which is displayed as a first color; the multiple quantum well layer excites light of a second wavelength, which is displayed as a second color; the first wavelength is different from the second wavelength; the first color and the second color are mixed to form a third color.

5. The micro light-emitting diode chip according to claim 3, characterized in that, Also includes: The dam structure located on the second side has a plurality of first through holes, each of which exposes the light emission path of the corresponding multi-quantum well layer; each of the fluorescent layers fills the corresponding first through hole.

6. The miniature light-emitting diode chip according to claim 5, characterized in that, Also includes: A first conductive structure is located on the second side, electrically connected to the first epitaxial layer, and located between the dam structure and the first epitaxial layer. The first conductive structure has a plurality of second through holes, each of which exposes a corresponding second through hole.

7. The micro light-emitting diode chip according to claim 6, characterized in that, Each of the fluorescent layers also fills the corresponding second via.

8. The micro light-emitting diode chip according to claim 1, characterized in that, Also includes: A plurality of first ohmic contact layers are located on the first side, each first ohmic contact layer being located between the corresponding conductive reflective layer and the second epitaxial layer.

9. The micro light-emitting diode chip according to claim 8, characterized in that, The material of the first ohmic contact layer includes: a transparent conductive material.

10. The micro light-emitting diode chip according to claim 9, characterized in that, Transparent conductive materials include: transparent metallic materials, indium tin oxide, or fluorine-doped SnO2.

11. The micro light-emitting diode chip according to claim 5, characterized in that, The materials used in the dam structure include: metal materials or silicone materials; metal materials include: aluminum, silver, titanium or platinum.

12. The micro light-emitting diode chip according to claim 6, characterized in that, Also includes: A second ohmic contact layer is located on the second side, between the first conductive structure and the first epitaxial layer.

13. The micro light-emitting diode chip according to claim 12, characterized in that, The material of the second ohmic contact layer includes: a transparent conductive material.

14. The micro light-emitting diode chip according to claim 13, characterized in that, Transparent conductive materials include: transparent metallic materials, indium tin oxide, or fluorine-doped SnO2.

15. The micro light-emitting diode chip according to claim 1, characterized in that, The material of the conductive reflective mirror layer includes: metallic materials; metallic materials include: nickel, silver, titanium, platinum, gold or aluminum.

16. The micro light-emitting diode chip according to claim 1, characterized in that, Also includes: A plurality of first conductive plugs are located on the first side, each of the first conductive plugs being electrically connected to the corresponding second epitaxial layer; A drive backplane, the drive backplane including a drive circuit layer; a plurality of first conductive plugs are electrically connected to the drive circuit layer respectively.

17. The miniature light-emitting diode chip according to claim 16, characterized in that, The drive backplane further includes: a plurality of drive backplane conductive plugs, the plurality of drive backplane conductive plugs being electrically connected to the drive circuit layer respectively; the plurality of first conductive plugs being electrically connected to the drive circuit layer respectively through the plurality of drive backplane conductive plugs.

18. The micro light-emitting diode chip according to claim 17, characterized in that, Also includes: A bonding layer is located between the drive backplane and a plurality of first conductive plugs. The bonding layer includes a plurality of second conductive plugs and a plurality of metal plates. Each metal plate is electrically connected to a plurality of drive backplane conductive plugs. Each second conductive plug is electrically connected to a corresponding metal plate. Each first conductive plug is electrically connected to a corresponding second conductive plug.

19. The micro light-emitting diode chip according to claim 18, characterized in that, The drive backplane further includes: a plurality of functional conductive plugs, each of the functional conductive plugs being electrically connected to the drive circuit layer; the bonding layer further includes: a plurality of third conductive plugs, each of the third conductive plugs being electrically connected to a corresponding functional conductive plug.

20. The miniature light-emitting diode chip according to claim 19, characterized in that, Also includes: A plurality of fourth conductive plugs are located on the first side, each of the fourth conductive plugs being electrically connected to the corresponding third conductive plug; A plurality of second conductive structures are located on the second side, each of the second conductive structures being electrically connected to the corresponding fourth conductive plug.

21. The micro light-emitting diode chip according to claim 1, characterized in that, The materials of the first epitaxial layer and the second epitaxial layer include gallium nitride.

22. A method for forming a miniature light-emitting diode chip, characterized in that, include: A first epitaxial layer, wherein the first epitaxial layer has a first doped ion, and the first epitaxial layer has a first side and a second side opposite to each other; A plurality of quantum well layers are formed on the first side, and the quantum well layers are in contact with the first epitaxial layer; A plurality of second epitaxial layers are formed on the first side, each second epitaxial layer containing a second doped ion, the second doped ion having a different electrical type than the first doped ion, and each of the multiple quantum well layers being located between the first epitaxial layer and the corresponding second epitaxial layer. A plurality of conductive mirror layers are formed on the first side, each of the conductive mirror layers being electrically connected to the corresponding second epitaxial layer, and each of the conductive mirror layers surrounding the non-light-emitting side of the corresponding multi-quantum-well layer.

23. The method for forming a micro light-emitting diode chip according to claim 22, characterized in that, Before forming the conductive mirror layer, the method further includes forming a plurality of first ohmic contact layers on the first side, each first ohmic contact layer being located between the corresponding conductive mirror layer and the second epitaxial layer.

24. The method for forming a micro light-emitting diode chip according to claim 23, characterized in that, The method for forming the first epitaxial layer, a plurality of first ohmic contact layers, a plurality of second epitaxial layers, and a plurality of multiple quantum well layers includes: providing a temporary substrate; forming a first epitaxial material layer on the temporary substrate; forming a multiple quantum well material layer on the first epitaxial material layer; forming a second epitaxial material layer on the multiple quantum well material layer; forming a first ohmic contact material layer on the second epitaxial material layer; and performing patterned etching on the first ohmic contact material layer, the second epitaxial material layer, the multiple quantum well material layer, and the first epitaxial material layer to form a plurality of first ohmic contact layers, a plurality of second epitaxial layers, a plurality of multiple quantum well layers, and the first epitaxial layer.

25. The method for forming a micro light-emitting diode chip according to claim 22, characterized in that, A method for forming a plurality of conductive mirror layers includes: forming a third photoresist structure on a first side; forming a mirror material layer on the first side, the mirror material layer covering the third photoresist structure; removing the third photoresist structure and the mirror material layer on the third photoresist structure to form a plurality of conductive mirror layers.

26. The method for forming a micro light-emitting diode chip according to claim 22, characterized in that, After forming the conductive reflector layer, the method further includes: forming a plurality of first conductive plugs on the first side, each first conductive plug being electrically connected to a corresponding second epitaxial layer; providing a driving backplane, the driving backplane including a driving circuit layer; and electrically connecting the plurality of first conductive plugs to the driving circuit layer respectively.

27. The method for forming a micro light-emitting diode chip according to claim 26, characterized in that, The drive backplane further includes: a plurality of drive backplane conductive plugs, the plurality of drive backplane conductive plugs being electrically connected to the drive circuit layer respectively; the plurality of first conductive plugs being electrically connected to the drive circuit layer respectively through the plurality of drive backplane conductive plugs.

28. The method for forming a micro light-emitting diode chip according to claim 27, characterized in that, After providing the drive backplane, the method further includes: forming a bonding layer on the drive backplane, the bonding layer including a plurality of second conductive plugs and a plurality of metal plates, each of the metal plates being electrically connected to a plurality of the drive backplane conductive plugs, and each of the second conductive plugs being electrically connected to a corresponding metal plate; and bonding each of the first conductive plugs to a corresponding second conductive plug.

29. The method for forming a micro light-emitting diode chip according to claim 28, characterized in that, The drive backplane further includes: a plurality of functional conductive plugs, each of the functional conductive plugs being electrically connected to the drive circuit layer; the bonding layer further includes: a plurality of third conductive plugs, each of the third conductive plugs being electrically connected to a corresponding functional conductive plug.

30. The method for forming a micro light-emitting diode chip according to claim 29, characterized in that, Also includes: A plurality of fourth conductive plugs are formed on the first side, and each fourth conductive plug is electrically connected to the corresponding third conductive plug. A plurality of second conductive structures are formed on the second side, and each second conductive structure is electrically connected to the corresponding fourth conductive plug.

31. The method for forming a micro light-emitting diode chip according to claim 22, characterized in that, After forming the conductive reflective mirror layer, the method further includes: forming a plurality of microlenses on the second side, wherein the light-emitting side of each of the multiple quantum well layers faces the corresponding microlens, and the projection area of ​​each of the multiple quantum well layers toward the second epitaxial layer is located within the projection area of ​​the corresponding microlens toward the second epitaxial layer.

32. The method for forming a micro light-emitting diode chip according to claim 31, characterized in that, Before forming the plurality of microlenses, the method further includes: forming a plurality of fluorescent layers on the second side, each fluorescent layer being located between a corresponding multi-quantum well layer and a corresponding microlens; the fluorescent layers are used to adjust the color of the light emitted by the multi-quantum well layer toward the microlens.

33. The method for forming a micro light-emitting diode chip according to claim 32, characterized in that, Before forming the plurality of fluorescent layers, the method further includes: a dam structure on the second side, the dam structure having a plurality of first through holes, each first through hole exposing the light emission path of the corresponding multiple quantum well layer; each fluorescent layer filling the corresponding first through hole.

34. The method for forming a micro light-emitting diode chip according to claim 33, characterized in that, The method for forming the dam structure includes: forming a plurality of first photoresist structures on the second side, with a first gap between adjacent first photoresist structures; forming the dam structure within the first gap; and after forming the dam structure, removing the first photoresist structures to make the dam structure have a plurality of first through holes.

35. The method for forming a micro light-emitting diode chip according to claim 33, characterized in that, Before forming the dam structure, the method further includes: forming a first conductive structure on the second side, the first conductive structure being electrically connected to the first epitaxial layer, and the first conductive structure being located between the dam structure and the first epitaxial layer, the first conductive structure having a plurality of second through holes, each of the first through holes exposing a corresponding second through hole.

36. The method for forming a micro light-emitting diode chip according to claim 35, characterized in that, The method for forming the first conductive structure includes: forming a plurality of second photoresist structures on the second side, with a second gap between adjacent second photoresist structures; forming the first conductive structure within the second gap; and after forming the first conductive structure, removing the second photoresist structures to make the first conductive structure have a plurality of second through holes.

37. The method for forming a micro light-emitting diode chip according to claim 35, characterized in that, Each of the fluorescent layers also fills the corresponding second via.

38. The method for forming a micro light-emitting diode chip according to claim 35, characterized in that, Before forming the first conductive structure, the method further includes a second ohmic contact layer on the second side, the second ohmic contact layer being located between the first conductive structure and the first epitaxial layer.

39. A type of automotive headlight, characterized in that: Includes the micro light-emitting diode chip as described in any one of claims 1 to 21.

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