Micro-LED chip

Abstract

The utility model provides a Mi cro-LED (Light Emitting Diode) chip. The Mi cro-LED chip comprises: a substrate layer; a light emitting structure on the substrate layer; the pattern of the light-emitting structure on the cross section parallel to the substrate layer is a polygon; the light-emitting structure comprises an N-type GaN layer; the substrate layer is arranged on one side surface; the I nGaN active layer is located on the surface of the side, away from the substrate layer, of the part of the N-type GaN layer; the P-type GaN layer is located on the surface of the side, away from the N-type GaN layer, of the I nGaN active layer; the side wall of the light-emitting structure is perpendicular to the surface of the substrate layer and is in a GaN hexagonal crystal system, and the plane where the side wall is located belongs to a {11-20} crystal plane family. The Mi cro-LED chip provided by the utility model is high in luminous efficiency.

Description

Technical Field

[0001] The utility model relates to the technical field of semiconductor light-emitting devices, and in particular to a Micro-LED chip. Background Art

[0002] Micro-LED chip display technology refers to a display technology that uses self-luminous micron-sized LEDs as light-emitting pixel units and assembles them on a driving panel to form a high-density LED chip array. Due to its small display chip size, high integration and self-luminescence, Micro-LED chips have greater advantages than LCD chips and OLED chips in terms of brightness, resolution, contrast, energy consumption, service life, response speed and thermal stability. But at the same time, Micro-LED chips also face many problems, such as full-color display, mass transfer, defect control and defect uniformity. At present, Micro-LED chips are mainly based on GaN materials, and different luminous center wavelengths are achieved by controlling the In component in the quantum well.

[0003] The current process flow for making GaN-based Micro-LED chips is: (1) preparation of a transparent conductive ITO layer, (2) table etching, (3) passivation of a SiO2 protective layer, and (4) deposition of electrodes. However, the luminous efficiency of Micro-LED chips made using existing technologies is relatively low. Utility Model Content

[0004] Therefore, the technical problem to be solved by the present invention is to overcome the defect of low luminous efficiency of Micro-LED chips in the prior art, thereby providing a Micro-LED chip.

[0005] The utility model provides a Micro-LED chip, comprising: a substrate layer; a light-emitting structure located on the substrate layer; the shape of the light-emitting structure on a cross section parallel to the substrate layer is a polygon; the light-emitting structure comprises: an N-type GaN layer; located on one side surface of the substrate layer; an InGaN active layer, located on a side surface of a portion of the N-type GaN layer away from the substrate layer; a P-type GaN layer, located on a side surface of the InGaN active layer away from the N-type GaN layer; the side wall of the light-emitting structure is perpendicular to the surface of the substrate layer, and in the GaN hexagonal crystal system, the plane where the side wall is located belongs to the {11-20} crystal plane family.

[0006] Optionally, the polygon is a hexagon; in the GaN hexagonal crystal system, the crystal plane indices of the plane where the side wall of the light-emitting structure is located are (11-20), (-1-120), (-12-10), (1-210), (-2110), and (2-1-10), respectively.

[0007] Optionally, the N-type GaN layer includes a first region and a second region, and the thickness of the first region is greater than that of the second region; the InGaN active layer is located on a surface of the first region facing away from the substrate layer; and the light-emitting structure includes the first region.

[0008] Optionally, it further includes: a passivation layer, at least covering the side walls of the light-emitting structure.

[0009] Optionally, it also includes: a conductive layer located on a surface of the P-type GaN layer away from the substrate layer; the passivation layer also covers the side wall of the conductive layer and a portion of the surface of the conductive layer away from the substrate layer.

[0010] Optionally, it also includes: an N-type electrode and a P-type electrode; the N-type electrode is located on the surface of the second region of the N-type GaN layer and on the side of the light-emitting structure; the P-type electrode is located on the surface of the conductive layer away from the substrate layer.

[0011] The technical solution of the utility model has the following advantages:

[0012] In the Micro-LED chip provided by the utility model, since the refractive index of light inside gallium nitride is much greater than the refractive index in air, less light is refracted from gallium nitride to air in the smooth surface morphology of the gallium nitride crystal system, and more light can be refracted to air in the rough surface morphology. Therefore, the side wall of the light-emitting structure selected in the present application is perpendicular to the surface of the substrate layer, and in the GaN hexagonal crystal system, the plane where the side wall is located belongs to the {11-20} crystal plane family. Since the crystal plane belonging to the {11-20} crystal plane family in the GaN hexagonal crystal system has more rough surface morphology after the etching process, that is, the side wall surface of the light-emitting structure has more rough surface morphology, a larger escape angle will be generated to reduce internal reflection, and more light can be refracted to the outside air, thereby improving the luminous efficiency of the Micro-LED chip.

[0013] Furthermore, the polygon is a hexagon. That is, the light-emitting structure has 6 side walls. Specifically, in the GaN hexagonal crystal system, the crystal plane indices of the planes where the side walls of the light-emitting structure are located are (11-20), (-1-120), (-12-10), (1-210), (-2110), and (2-1-10). Since the crystal structure of gallium nitride belongs to a hexagonal close-packed structure, the pattern of the light-emitting structure on the cross section parallel to the substrate layer is a hexagonal setting, which can enable the Micro-LED chip to obtain a new structure with a full A-plane, thereby improving the luminous efficiency of the Micro-LED chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the specific implementation methods of the utility model or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0015] Figure 1 A cross-sectional view of a Micro-LED chip provided in Example 1 of the utility model;

[0016] Figure 2 A top view of the Micro-LED chip provided in Example 1 of the utility model;

[0017] Figure 3 A flow chart of a method for preparing a Micro-LED chip provided in Example 2 of the present utility model;

[0018] Figures 4 to 10 This is a structural schematic diagram of the preparation process of the Micro-LED chip provided in Example 2 of the present utility model. DETAILED DESCRIPTION

[0019] The technical solution of the utility model will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0020] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0021] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0022] In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0023] Example 1

[0024] Combined with reference Figure 1 to Figure 2 This embodiment provides a Micro-LED chip, comprising: a substrate layer 1; a light-emitting structure located on the substrate layer 1; the cross-sectional figure of the light-emitting structure parallel to the substrate layer 1 is a polygon; the light-emitting structure comprises: an N-type GaN layer 2; located on one side surface of the substrate layer 1; an InGaN active layer 3, located on a side surface of a portion of the N-type GaN layer 2 away from the substrate layer 1; a P-type GaN layer 4, located on a side surface of the InGaN active layer 3 away from the N-type GaN layer 2; the side wall of the light-emitting structure is perpendicular to the surface of the substrate layer 1, and in the GaN hexagonal crystal system, the plane where the side wall is located belongs to the {11-20} crystal plane family.

[0025] In this embodiment, since the refractive index of light inside gallium nitride is much greater than the refractive index in air, less light is refracted from gallium nitride to air in the smooth surface morphology of the gallium nitride crystal system, and more light can be refracted to air in the rough surface morphology. Therefore, the side wall of the light-emitting structure selected in this application is perpendicular to the surface of the substrate layer, and in the GaN hexagonal crystal system, the plane where the side wall is located belongs to the {11-20} crystal plane family. Since the crystal plane belonging to the {11-20} crystal plane family in the GaN hexagonal crystal system has more rough surface morphology after the etching process, that is, the side wall surface of the light-emitting structure has more rough surface morphology, which will produce a larger escape angle and reduce internal reflection, and more light can be refracted to the outside air, thereby improving the luminous efficiency of the Micro-LED chip.

[0026] It is important to understand that Figure 1 is a cross-sectional view of the Micro-LED chip, Figure 1 It can be known that the side wall of the light emitting structure is perpendicular to the surface of the substrate layer; Figure 2 is a top view of the Micro-LED chip, Figure 2It can be seen from the figure that the shape of the light-emitting structure on the cross section parallel to the substrate layer is a polygon.

[0027] Specifically, Figure 2 The polygon is a hexagon. That is, the light-emitting structure has 6 side walls. Specifically, in the GaN hexagonal crystal system, the crystal plane indices of the plane where the side walls of the light-emitting structure are located are (11-20), (-1-120), (-12-10), (1-210), (-2110), and (2-1-10). Since the crystal structure of gallium nitride belongs to a hexagonal close-packed structure, the pattern of the light-emitting structure on the cross section parallel to the substrate layer is a hexagonal setting, which can enable the Micro-LED chip to obtain a new structure with a full A-plane, thereby improving the luminous efficiency of the Micro-LED chip.

[0028] It should be noted that the A-plane is any crystal plane belonging to the {11-20} crystal plane family, that is, any crystal plane including (11-20), (-1-120), (-12-10), (1-210), (-2110), and (2-1-10). The plane where the side walls of the light-emitting structure of the Micro-LED chip of the present application are located includes the six crystal planes (11-20), (-1-120), (-12-10), (1-210), (-2110), and (2-1-10) to obtain a new structure with a full A-plane.

[0029] In one embodiment, the N-type GaN layer 2 includes a first region and a second region, the thickness of the first region is greater than the thickness of the second region; the InGaN active layer 3 is located on a surface of the first region facing away from the substrate layer 1; and the light emitting structure includes the first region.

[0030] In one embodiment, the Micro-LED chip further includes: a passivation layer 7, which at least covers the side wall of the light-emitting structure. The function of the passivation layer 7 is to effectively eliminate the non-radiative recombination center of the side wall of the light-emitting structure, saturate the electronic state of the side wall of the light-emitting structure, and reduce the non-radiative recombination center; the passivation layer 7 can also prevent the periodic arrangement of atoms on the side wall of the light-emitting structure from being damaged and leaving a large number of dangling bonds, such as dangling bonds between gallium atoms and nitrogen atoms, and prevent the side wall of the light-emitting structure from becoming a leakage current path, thereby reducing the generation of leakage current in the Micro-LED chip and improving the luminous efficiency of the Micro-LED chip.

[0031] In one embodiment, the Micro-LED chip further includes: a conductive layer 5, which is located on a surface of the P-type GaN layer away from the substrate layer 1; and the passivation layer 7 also covers the sidewall of the conductive layer 5 and a portion of the surface of the conductive layer 5 away from the substrate layer 1. In the process of forming the Micro-LED chip, part of the conductive layer 5 is etched, and the passivation layer 7 covers part of the conductive layer 5 to ensure the ability of the conductive layer 5 to conduct electricity.

[0032] In one embodiment, the Micro-LED chip further includes: an N-type electrode 8 and a P-type electrode 9; the N-type electrode 8 is located on the surface of the second region of the N-type GaN layer 2 and on the side of the light-emitting structure; the P-type electrode 9 is located on the surface of the conductive layer 5 away from the substrate layer 1.

[0033] Example 2

[0034] refer to Figure 3 This embodiment provides a method for preparing a Micro-LED chip, comprising:

[0035] S1: providing a substrate layer;

[0036] S2: A light-emitting structure is formed on one side surface of the substrate layer; the shape of the light-emitting structure on the cross section parallel to the substrate layer is a polygon; the light-emitting structure includes: an N-type GaN layer; located on one side surface of the substrate layer; an InGaN active layer, located on a side surface of a portion of the N-type GaN layer away from the substrate layer; a P-type GaN layer, located on a side surface of the InGaN active layer away from the N-type GaN layer; the side wall of the light-emitting structure is perpendicular to the surface of the substrate layer, and in the GaN hexagonal crystal system, the plane where the side wall is located belongs to the {11-20} crystal plane family.

[0037] Reference below Figures 4 to 10 The preparation method of Micro-LED chips is introduced in detail.

[0038] refer to Figure 4 , providing a substrate layer 1; and sequentially forming a stacked N-type GaN layer 200, an initial InGaN active layer 300 and an initial P-type GaN layer 400 on one side of the substrate layer 1.

[0039] In one embodiment, the material of the substrate layer 1 includes a sapphire substrate. In other embodiments, the material of the substrate layer includes other materials.

[0040] refer to Figure 5 A conductive layer 500 is formed on a surface of the initial P-type GaN layer 400 away from the substrate layer 1 .

[0041] In one embodiment, the material of the conductive layer 500 includes indium tin oxide. In other embodiments, the material of the conductive layer includes other conductive materials.

[0042] refer to Figure 6 , etching part of the initial P-type GaN layer 400 and part of the initial InGaN active layer 300 until the N-type GaN layer 200 is exposed, and the initial P-type GaN layer 400 forms a P-type GaN layer 4, and the initial InGaN active layer 300 forms an InGaN active layer 3, and in the process of etching part of the initial P-type GaN layer 400 and part of the initial InGaN active layer 300 until the N-type GaN layer 200 is exposed, a damaged layer 600 is formed, and the damaged layer 600 is located on the side walls of the InGaN active layer 3 and the P-type GaN layer 4.

[0043] In one embodiment, the process of etching a portion of the initial P-type GaN layer 400 and a portion of the initial InGaN active layer 300 includes an inductively coupled plasma etching process.

[0044] In one embodiment, in the step of etching part of the initial P-type GaN layer 400 and part of the initial InGaN active layer 300 until the N-type GaN layer 200 is exposed, part of the conductive layer 500 is also etched. The damaged layer 600 is also located on the side wall of the formed conductive layer 5 .

[0045] In one embodiment, in the process of etching part of the initial P-type GaN layer 400 and part of the initial InGaN active layer 300, part of the N-type GaN layer 200 is also etched; the formed N-type GaN layer 2 includes a first region and a second region, the thickness of the first region is greater than the thickness of the second region; the InGaN active layer 300 is located on one side surface of the first region. The damaged layer 600 is also located on the side wall of part of the N-type GaN layer 2, specifically, on the side wall of the first region.

[0046] refer to Figure 7 , removing the damaged layer 600. The purpose of removing part of the damaged layer 600 is to remove the lattice disordered material near the side wall of the P-type GaN layer 4, the side wall of the InGaN active layer 3, the side wall of the N-type GaN layer 2, and the side wall surface of the conductive layer 5.

[0047] In one embodiment, the process of removing the damaged layer 600 includes a wet etching process. In other embodiments, the process of removing the damaged layer includes a dry etching process.

[0048] In one embodiment, the parameters of the wet etching process include: using a tetramethylammonium hydroxide solution, the concentration of the tetramethylammonium hydroxide solution is preferably 10%; the temperature is 80°C-85°C, and the time is 10 minutes. The wet etching process is performed using the above parameters, so that the crystal planes belonging to the {11-20} crystal plane family in the GaN hexagonal system have more rough surface morphology, that is, the side wall surface of the light-emitting structure has more rough surface morphology, which will produce a larger escape angle and reduce internal reflection, so that more light can be refracted to the outside air, thereby improving the luminous efficiency of the Micro-LED chip. Reference Figure 8 A light emitting structure is formed on one side surface of the substrate layer 1.

[0049] Figure 8 It is a top view of the Micro-LED chip, wherein the polygon in the substrate layer 1 is a top view of the light-emitting structure.

[0050] After removing the damaged layer 600, a light-emitting structure is formed on one side surface of the substrate layer 1. Specifically, the step of forming the light-emitting structure on one side surface of the substrate layer 1 includes: providing a mask with a polygonal structure (not shown in the figure); forming a photosensitive resin layer on the side surface of the P-type GaN layer 4 away from the substrate layer 1 (not shown in the figure); placing the mask on the side surface of the photosensitive resin layer away from the substrate layer 1, and exposing the photosensitive resin layer (not shown in the figure); in the process of placing the mask on the side surface of the photosensitive resin layer away from the substrate layer 1, the planes where the side walls of the polygonal structure are located all belong to the {11-20} crystal plane family in the GaN hexagonal system; after exposing the photosensitive resin layer, developing the photosensitive resin layer (not shown in the figure) to form a photosensitive resin layer with a polygonal structure; using the photosensitive resin layer with a polygonal structure as a mask, etching the P-type GaN layer 4, the InGaN active layer 3 and the N-type GaN layer 2 in sequence.

[0051] In one embodiment, before developing the photosensitive resin layer, the mask with the polygonal structure is removed. The process of forming the light emitting structure on one side of the substrate layer 1 is a photolithography process, which is well known to those skilled in the art and will not be described in detail.

[0052] It can be understood that in the step of forming a light-emitting structure on one side surface of the substrate layer 1, the P-type GaN layer 4, the InGaN active layer 3 and the N-type GaN layer 2 are etched, and the conductive layer 5 formed on the side surface of the P-type GaN layer away from the substrate layer is also etched; using the photosensitive resin layer with a polygonal structure as a mask, the P-type GaN layer 4, the InGaN active layer 3 and the N-type GaN layer 2 are etched in turn, and the first region is etched so that the light-emitting structure includes the first region.

[0053] After etching, the P-type GaN layer 4, the InGaN active layer 3, the first region of the N-type GaN layer 2 and the conductive layer 5 have the same polygonal shapes on the cross section parallel to the substrate layer; the side walls of the P-type GaN layer 4, the InGaN active layer 3, the first region of the N-type GaN layer 2 and the conductive layer 5 are perpendicular to the surface of the substrate layer 1, and in the GaN hexagonal crystal system, the side walls of the P-type GaN layer 4, the InGaN active layer 3 and the first region of the N-type GaN layer 2 are located in the same plane, which belongs to the {11-20} crystal plane family.

[0054] In this embodiment, in the step of providing a mask having a polygonal structure, a mask having a hexagonal shape is provided so that the pattern of the light-emitting structure on the cross section parallel to the substrate layer is a hexagon; in the GaN hexagonal crystal system, the crystal plane indices of the plane where the side wall of the light-emitting structure is located are (11-20), (-1-120), (-12-10), (1-210), (-2110), and (2-1-10), respectively.

[0055] refer to Fig. 9 A passivation layer 7 is formed on the sidewalls of the light emitting structure, the sidewalls of the conductive layer 5, and a portion of the surface of the conductive layer 5 away from the substrate layer 1. Specifically, a passivation layer 7 is formed on the sidewalls of the P-type GaN layer 4, the InGaN active layer 3, the first region of the N-type GaN layer 2, the sidewalls of the conductive layer 5, and a portion of the surface of the conductive layer 5 away from the substrate layer 1.

[0056] In one embodiment, the process of forming the passivation layer 7 includes an atomic layer deposition process.

[0057] In one embodiment, the material of the passivation layer 7 includes silicon dioxide. In other embodiments, the material of the passivation layer may also include other transparent insulating materials, such as silicon oxide.

[0058] refer to Fig.10 An N-type electrode 8 is formed on the surface of the second region of the N-type GaN layer 2 and the side of the light-emitting structure; and a P-type electrode 9 is formed on the surface of the conductive layer 5 on the side away from the substrate layer 1.

[0059] After forming the passivation layer 7 , an N-type electrode 8 is formed on the surface of the second region of the N-type GaN layer 2 and the side of the light-emitting structure; and a P-type electrode 9 is formed on the surface of the conductive layer 5 facing away from the substrate layer 1 .

[0060] Comparative Example

[0061] The difference between the comparative example and the above-mentioned embodiment 2 is:

[0062] The comparative example provides a method for preparing a Micro-LED chip, comprising:

[0063] S1: providing a substrate layer;

[0064] S2: A light-emitting structure is formed on one side surface of the substrate layer; the shape of the light-emitting structure on the cross section parallel to the substrate layer is a polygon; the light-emitting structure includes: an N-type GaN layer; located on one side surface of the substrate layer; an InGaN active layer, located on a side surface of a portion of the N-type GaN layer away from the substrate layer; a P-type GaN layer, located on a side surface of the active layer away from the N-type GaN layer; the side wall of the light-emitting structure is perpendicular to the surface of the substrate layer, and in the GaN hexagonal crystal system, the plane where the side wall is located belongs to the {1-100} crystal plane family.

[0065] At this time, in the step of forming the light emitting structure on one side surface of the substrate layer 1, the planes where the side walls of the polygonal mask are located all belong to the {1-100} crystal plane family in the GaN hexagonal system.

[0066] The difference between the Micro-LED chip prepared by the preparation method of the comparative Micro-LED chip and the Micro-LED chip provided in the above-mentioned embodiment 1 is that the side wall of the light-emitting structure is perpendicular to the surface of the substrate layer, and in the GaN hexagonal crystal system, the plane where the side wall is located belongs to the {1-100} crystal plane family.

[0067] It should be noted that the {1-100} crystal plane family includes multiple M planes, and the lattice orientation of the M plane is different from that of the A plane in Example 2. The M plane and the A plane are perpendicular to each other in the GaN hexagonal crystal system.

[0068] By testing the photoluminescence intensity at different positions in the Micro-LED chip to obtain an average value, the luminous efficiency of the Micro-LED chip formed by the embodiment of the present application is improved by 5%-20% compared with the Micro-LED chip formed in the comparative example.

[0069] Obviously, the above embodiments are merely examples for the purpose of clear explanation, and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived therefrom are still within the scope of protection of the invention of the utility model.

Claims

1. A Micro-LED chip, characterized in that: include: substrate layer; a light emitting structure located on the substrate layer; The shape of the light emitting structure on the cross section parallel to the substrate layer is a polygon; The light emitting structure comprises: N-type GaN layer; located on one side surface of the substrate layer; An InGaN active layer is located on a surface of a portion of the N-type GaN layer that is away from the substrate layer; A P-type GaN layer is located on a surface of the InGaN active layer that is away from the N-type GaN layer; The side wall of the light emitting structure is perpendicular to the surface of the substrate layer, and in the GaN hexagonal crystal system, the plane where the side wall is located belongs to the {11-20} crystal plane family.

2. The Micro-LED chip according to claim 1, characterized in that: The polygon is a hexagon; In the GaN hexagonal crystal system, the crystal plane indices of the plane where the side wall of the light-emitting structure is located are (11-20), (-1-120), (-12-10), (1-210), (-2110), and (2-1-10), respectively.

3. The Micro-LED chip according to claim 1, characterized in that: The N-type GaN layer includes a first region and a second region, the thickness of the first region is greater than the thickness of the second region; the InGaN active layer is located on a surface of the first region facing away from the substrate layer; The light emitting structure includes the first region.

4. The Micro-LED chip according to claim 3, characterized in that: Also includes: The passivation layer at least covers the side walls of the light emitting structure.

5. The Micro-LED chip according to claim 4, characterized in that: Also includes: A conductive layer, located on a surface of the P-type GaN layer away from the substrate layer; The passivation layer also covers the sidewall of the conductive layer and a portion of the surface of the conductive layer away from the substrate layer.

6. The Micro-LED chip according to claim 5, characterized in that: Also includes: N-type electrode and P-type electrode; The N-type electrode is located on the surface of the second region of the N-type GaN layer and is located on the side of the light emitting structure; The P-type electrode is located on a surface of the conductive layer facing away from the substrate layer.

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