Layered ceramic electronic component and manufacturing method for the same

Abstract

To provide a layered ceramic electronic component that maintains high dielectric constant and has good DC bias characteristics.SOLUTION: The layered ceramic electronic component includes an element assembly formed by alternately stacking internal electrode layers and dielectric layers. The proportion of cubic crystal structures in the particles forming the dielectric layer sandwiched between the internal electrode layers is 25 mass% or more and 75 mass% or less. The average particle size of the particles forming the dielectric layer sandwiched between the internal electrode layers is 30 nm or more and 70 nm or less.SELECTED DRAWING: Figure 4

Description

[Technical field]

[0001] The present invention relates to a multilayer ceramic electronic component and a method for manufacturing the same. [Background technology]

[0002] Recently, multilayer ceramic electronic components have been known that have a capacitance section in which internal electrodes and dielectric layers are alternately laminated. In multilayer ceramic electronic components, the capacitance may decrease due to a direct current voltage applied to the dielectric layers (DC bias characteristic). Various proposals have been made to improve this DC bias characteristic (for example, see Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2006-56765 A Summary of the Invention [Problem to be solved by the invention]

[0004] As electronic devices that use multilayer ceramic electronic components become smaller, there is a demand for further miniaturization and larger capacity for these components. For this reason, there is a demand for further improvements in multilayer ceramic electronic components in terms of maintaining a high dielectric constant and providing good DC bias characteristics.

[0005] An object of the present invention is to provide a multilayer ceramic electronic component that maintains a high dielectric constant and has good DC bias characteristics. [Means for solving the problem]

[0006] The above object is achieved by a multilayer ceramic electronic component comprising an element body formed by alternately stacking internal electrode layers and dielectric layers, wherein the abundance ratio of cubic crystals in particles forming the dielectric layers sandwiched between the internal electrode layers is 25 mass% or more and 75 mass% or less, and the average particle size of the particles forming the dielectric layers sandwiched between the internal electrode layers is 30 nm or more and 70 nm or less.

[0007] In the monolithic ceramic electronic component having the above configuration, the ratio of cubic crystals present in the particles can be 35 mass % or more and less than 65 mass %.

[0008] In the multilayer ceramic electronic component having the above-described configuration, the particles forming the dielectric layer may include a core portion mainly made of tetragonal crystals and a shell portion surrounding the core portion and mainly made of cubic crystals.

[0009] The above object can also be achieved by a method for producing a multilayer ceramic electronic component, the method including the steps of: obtaining a ceramic slurry containing ceramic powder synthesized by hydrothermal synthesis, the ceramic powder including a core portion mainly made of tetragonal crystals and a shell portion surrounding the core portion and mainly made of cubic crystals; producing a green sheet using the ceramic slurry; forming a laminate in which the green sheet and a metal conductive layer are alternately stacked; and firing the laminate to form a dielectric layer from the ceramic powder, the hydrothermal synthesis being carried out in a synthesis environment having a pressure of 600 hPa or more and 2000 hPa or less and a temperature of 60°C or more and 120°C or less.

[0010] In the method for producing a monolithic ceramic electronic component having the above configuration, the ceramic powder may have an average particle size of 20 nm or more and 50 nm or less, and the ceramic powder may contain BaTiO3.

[0011] In the method for producing a monolithic ceramic electronic component having the above configuration, the ceramic powder may be synthesized in the synthesis environment for 30 minutes or more and 100 hours or less.

[0012] In the method for producing a multilayer ceramic electronic component having the above-described configuration, the step of obtaining the ceramic slurry can include a step of adding, to the ceramic powder, a grain growth inhibiting additive that inhibits grain growth of particles contained in the ceramic powder.

[0013] In the method for producing a monolithic ceramic electronic component having the above configuration, the grain growth inhibiting additive may be at least one of Mg, Ho, Yb, Er, and Mn.

[0014] In the method for manufacturing a multilayer ceramic electronic component having the above configuration, the component may contain at least one element selected from Ba, Sr, and Ca, and at least one element selected from Ti, Zr, and Hf, and the combined atomic ratio (at %) of Ba, St, and Ca may be 1.020 times or more, or 0.96 times or less, the combined atomic ratio (at %) of Ti, Zr, and Hf.

[0015] Furthermore, in the method for manufacturing a multilayer ceramic electronic component having the above configuration, when the combined atomic ratio (at%) of Ba, St, and Ca is 1.020 times or more the combined atomic ratio (at%) of Ti, Zr, and Hf, the combined atomic ratio (at%) of Ba, St, and Ca can be 1.100 times or less the combined atomic ratio (at%) of Ti, Zr, and Hf.

[0016] Furthermore, in the method for manufacturing a multilayer ceramic electronic component having the above configuration, when the combined atomic ratio (at%) of Ba, St, and Ca is 0.96 times or less the combined atomic ratio (at%) of Ti, Zr, and Hf, the combined atomic ratio (at%) of Ba, St, and Ca can be 0.900 times or more the combined atomic ratio (at%) of Ti, Zr, and Hf. Effect of the Invention

[0017] According to the present invention, it is possible to provide a multilayer ceramic electronic component that maintains a high dielectric constant and has good DC bias characteristics. [Brief description of the drawings]

[0018] [Figure 1] FIG. 1 is a perspective view of a multilayer ceramic capacitor according to one embodiment of the present invention. [Diagram 2] FIG. 2 is a cross-sectional view taken along the line AA′ of the multilayer ceramic capacitor in FIG. [Diagram 3] FIG. 3 is a cross-sectional view of the multilayer ceramic capacitor taken along line BB' in FIG. [Figure 4] FIG. 4 is a diagram showing a schematic view of the state of particles forming the dielectric layer. [Diagram 5] FIG. 5(A) is a schematic diagram showing cubic crystals contained in a particle forming a dielectric layer, and FIG. 5(B) is a schematic diagram showing tetragonal crystals contained in a particle forming a dielectric layer. [Figure 6] FIG. 6 is a flowchart showing an example of a method for manufacturing the multilayer ceramic capacitor according to the embodiment. [Figure 7] FIG. 7 is a graph showing DC bias characteristics of some examples and some comparative examples. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the drawings, an X-axis, a Y-axis, and a Z-axis that are mutually orthogonal are shown as appropriate. The X-axis, the Y-axis, and the Z-axis are common to all the drawings. The X-axis direction corresponds to the third axis direction, the Y-axis direction corresponds to the second axis direction, and the Z-axis direction corresponds to the first axis direction.

[0020] [Overall configuration of multilayer ceramic capacitor 10] The multilayer ceramic capacitor 10 includes an element body 11 having a substantially rectangular parallelepiped shape. The four faces of the element body 11 other than the top and bottom faces in the stacking direction are referred to as side faces. In the example illustrated in Figs. 1 to 3, a first external electrode 14a and a second external electrode 14b are provided on two opposing side faces (a first side face and a second side face) of the element body 11. The first external electrode 14a extends from the first side face to the four adjacent faces. The second external electrode 14b extends from the second side face to the four adjacent faces. However, the first external electrode 14a and the second external electrode 14b are spaced apart from each other.

[0021] 1 to 3, the Z-axis direction (first direction) is the stacking direction, and is the direction in which the internal electrode layers face each other. The X-axis direction (second direction) is the length direction of element body 11, and is the direction in which the first side surface and the second side surface of element body 11 face each other, and in which first external electrode 14a and second external electrode 14b face each other. The Y-axis direction (third direction) is the width direction of the internal electrode layers, and is the direction in which two side surfaces (third side surface and fourth side surface) other than the first side surface and the second side surface of element body 11 face each other among the four side surfaces. The X-axis direction, the Y-axis direction, and the Z-axis direction are mutually perpendicular.

[0022] The element body 11 has a configuration in which dielectric layers 15 containing a ceramic material that functions as a dielectric and internal electrode layers are alternately laminated. The internal electrode layers include a plurality of first internal electrode layers 12 and a plurality of second internal electrode layers 13. The first internal electrode layers 12 and the second internal electrode layers 13 are alternately laminated. The edge of the first internal electrode layer 12 is drawn to a first side surface of the element body 11 on which the first external electrode 14a is provided. The edge of the second internal electrode layer 13 is drawn to a second side surface of the element body 11 on which the second external electrode 14b is provided. Thereby, the first internal electrode layer 12 and the second internal electrode layer 13 are alternately conductive to the first external electrode 14a and the second external electrode 14b. As a result, the multilayer ceramic capacitor 10 has a configuration in which capacitor units are laminated. In addition, in the laminate of the dielectric layers 15 and the internal electrode layers, the internal electrode layers are arranged on the outermost layers in the lamination direction, and the upper and lower surfaces of the laminate are covered with a cover portion 18. The cover portion 18 is mainly composed of a ceramic material. Note that, as long as the first internal electrode layer 12 and the second internal electrode layer 13 are exposed in different regions on the surface of the laminate and are conductive to different external electrodes, the configuration is not limited to that of FIGS. 1 to 3. The different regions on the surface of the laminate may be the respective surface regions of opposing faces of the laminate, the respective surface regions of adjacent faces of the laminate, or different surface regions of the same face of the laminate. As long as the different external electrodes are spaced apart from each other, the first internal electrode layer 12 and the second internal electrode layer 13 may extend from the faces exposed on the surface region of the laminate to other faces.

[0023] The size of the multilayer ceramic capacitor 10 is, for example, 0.25 mm in length, 0.125 mm in width, and 0.125 mm in height, or 0.4 mm in length, 0.2 mm in width, and 0.2 mm in height, or 0.6 mm in length, 0.3 mm in width, and 0.3 mm in height, or 1.0 mm in length, 0.5 mm in width, and 0.5 mm in height, or 3.2 mm in length, 1.6 mm in width, and 1.6 mm in height, or 4.5 mm in length, 3.2 mm in width, and 2.5 mm in height, but is not limited to these sizes. The size of the multilayer ceramic capacitor 10 may be, for example, length>width≧height, width>length≧height, height>length≧width, or height>width≧length.

[0024] The element body 11 has a capacitive portion 16 and a protective portion 17. The protective portion 17 forms the periphery of the ceramic element body 11.

[0025] In detail, protective portion 17 has a cover portion 18 located on the outside of capacitive portion 16 in the stacking direction, i.e., in the case of Figures 1 to 3, on the outside in the Z-axis direction, a side margin portion 19 located on the outside in a direction perpendicular to the stacking direction of capacitive portion 16, i.e., in the case of Figures 1 to 3, on the outside in the Y-axis direction, and which is a region where no internal electrodes are present, and an end margin portion 20 located on the outside in a direction perpendicular to the stacking direction, i.e., in the case of Figures 1 to 3, on the outside of capacitive portion 16 in the X-axis direction, and which is a region where the pull-out portions of the internal electrodes are present.

[0026] The capacitance section 16 is disposed inside the protection section 17 and constitutes a functional section. In the capacitance section 16, a plurality of first internal electrode layers 12 and a plurality of second internal electrode layers 13 are laminated in the Z-axis direction via a dielectric layer 15 (see FIG. 2). The internal electrode layers 12, 13 are sheet-shaped extending along a plane perpendicular to the lamination direction, i.e., along the XY plane in all of the cases of FIGS. 1 to 3, and are alternately disposed along the lamination direction, i.e., along the Z-axis direction in the cases of FIGS. 1 to 3. The configuration of the dielectric layer 15 sandwiched between the first internal electrode layer 12 and the second internal electrode layer 13 will be described in detail later.

[0027] The first internal electrode layer 12a and the second internal electrode layer 12b are mainly composed of base metals such as nickel (Ni), copper (Cu), tin (Sn), etc., or alloys containing these metals. The main components of the first internal electrode layer 12a and the second internal electrode layer 12b may be precious metals such as platinum (Pt), palladium (Pd), silver (Ag), gold (Au), etc., or alloys containing these metals. The main components of the first internal electrode layer 12a and the second internal electrode layer 12b may be the same or different.

[0028] The dielectric layers 15 are made of dielectric ceramics. In the multilayer ceramic capacitor 10, a dielectric ceramic with a high dielectric constant is used to increase the capacitance of each dielectric layer 15 between the internal electrode layers 12 and 13. The dielectric ceramic with a high dielectric constant is mainly composed of a ceramic material having a perovskite structure represented by the general formula ABO3. The perovskite structure is an ABO3 structure that deviates from the stoichiometric composition. 3-α Specifically, the dielectric layer 15 is mainly composed of (Ba,Sr,Ca)(Zr,Ti,Hf)O3. (Ba,Sr,Ca)(Zr,Ti,Hf)O3 contains barium (Ba) at the A site, and may further contain strontium (Sr) and calcium (Ca) at the A site, and may contain at least one of zirconium (Zr) and titanium (Ti) at the B site, and may further contain hafnium (Hf) at the B site. In this specification, Ba may be described as a representative component of the A site. In this case, when expressing the atomic ratio (at%) of Ba, Sr and Ca are also included in the expression. For the B site, Ti is described as a representative component, and when expressing the atomic ratio (at%) of Ti, Zr and Hf are also included in the expression. The A site and the B site may be described as individual components.

[0029] In addition to the above-mentioned main components, the dielectric layer 15 contains magnesium (Mg), manganese (Mn), and at least one of holmium (Ho), ytterbium (Yb), and erbium (Er). In addition to the above-mentioned main components, the dielectric layer 15 contains at least one element selected from rare earth elements, first transition metal elements, and second transition metal elements. When selected from rare earth elements, the element is selected from scandium (Sc), yttrium (Y), lanthanum (La), cerium (Ce), praseodymium (Pr), (neodymium Nd), promethium (Pm), samarium (Sm), eurobium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), and thulium (Tm). Although the enumeration is omitted here, the element may be selected from first transition metal elements or second transition metal elements.

[0030] The protective portion 17 is also made of a dielectric ceramic. In the protective portion 17, the cover portion 18 and the end margin portion 20 preferably have the same main component as the dielectric layer 15 from the viewpoint of suppressing internal stress.

[0031] In the protective portion 17, the side margin portion 19 has the same main component as the dielectric layer 15.

[0032] The external electrodes 14a, 14b each have a conductive undercoat film 21 formed so as to be electrically connected to the drawn-out portion of the internal electrode, which is drawn out to the surface of the ceramic body, and a plating film 22 formed on the undercoat film 21. The undercoat film 21 is formed, for example, of a baked film formed by baking a conductive paste, a conductive sputtered film of metal or the like, a conductive resin film containing a metal filler, or the like. The undercoat film 21 may be a layered structure of a plurality of films, such as a layer with good adhesion or a layer that is not easily eroded by solder. The plating film 22 is a film formed by electrolytic plating. Each film of the external electrodes 14a, 14b is formed of a metal or an alloy mainly composed of, for example, nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), silver (Ag), gold (Au), or the like.

[0033] [Detailed configuration of dielectric layer 15] Fig. 4 is a diagram showing a schematic view of a particle 151 forming the dielectric layer 15. The particle 151 includes a core portion 151a and a shell portion 151b surrounding the periphery of the core portion 151a. The core portion 151a is mainly formed of cubic crystals as shown in Fig. 5(A). On the other hand, the shell portion 151b is mainly formed of tetragonal crystals as shown in Fig. 5(B).

[0034] Comparing the dielectric properties of cubic crystals and tetragonal crystals, cubic crystals tend to exhibit paraelectricity, while tetragonal crystals tend to exhibit ferroelectricity. By forming the dielectric layer 15 with ferroelectric particles, it becomes easier to ensure capacitance, but DC bias characteristics tend to deteriorate. Therefore, in this embodiment, the abundance ratio of cubic crystals in one particle 151 (hereinafter simply referred to as "cubic crystal ratio") is set to 25 mass% or more and 75 mass% or less. This ensures both the capacitance and the maintenance of good DC bias characteristics. It is considered that by setting the cubic crystal ratio to 35 mass% or more and less than 65 mass%, it becomes easier to ensure the capacitance and maintain good DC bias characteristics. The cubic crystal ratio is the abundance ratio of cubic crystals in one particle 151, but can be an average value obtained by measuring a plurality of particles using XRD (X-ray diffraction; X-ray analysis method).

[0035] The average particle size of the particles 151 is preferably 30 nm or more and 70 nm or less. The average particle size of the particles 151 is more preferably 30 nm or more and 60 nm or less, and even more preferably 30 nm or more and 50 nm or less. The smaller the average particle size of the particles 151, the better the DC bias characteristics when applying a current, which is preferable.

[0036] Here, the average particle size of the particles 151 is obtained, for example, in the following manner. First, the cross section of the multilayer ceramic capacitor 10 is polished so that a plane including an axis in the lamination direction of the first internal electrode layer 12, the second internal electrode layer 13, and the dielectric layer 15 is observed. A secondary electron image of the dielectric layer 15 between the internal electrode layers 12 and 13 of the capacitance section 16 in the cross section is taken using a SEM (scanning electron microscope). Then, the area of ​​each particle in the field of view is measured using image processing measurement software, the diameter of a circle with the same area (Heywood diameter) is calculated, and the average value is calculated from them. The SEM is taken at nine points, which are 1 / 4, 1 / 2, and 3 / 4 of the vertical length of the capacitance section 16 and 1 / 4, 1 / 2, and 3 / 4 of the horizontal length of the capacitance section 16, and the average value of these is taken as the average particle size of the sample. When the nine points correspond to the internal electrodes, the dielectric layer near the center of the top and bottom is observed.

[0037] [Method of manufacturing multilayer ceramic capacitor 10] Next, a description will be given of a method for manufacturing the multilayer ceramic capacitor 10. FIG 6 is a diagram illustrating a flow of the method for manufacturing the multilayer ceramic capacitor 10.

[0038] (Step S01: Raw material powder preparation process) A dielectric material for forming the dielectric layer 15 is prepared. First, a ceramic powder of (Ba,Sr,Ca)(Zr,Ti,Hf)O3 is prepared. Various methods have been conventionally known for synthesizing a ceramic powder of (Ba,Sr,Ca)(Zr,Ti,Hf)O3, such as a solid phase method, a sol-gel method, and a hydrothermal method. In this embodiment, the hydrothermal method is adopted.

[0039] Here, the hydrothermal synthesis by the hydrothermal method will be described in detail. In this embodiment, the hydrothermal synthesis is performed at a lower temperature and pressure than the conventional hydrothermal method. Conventionally, the synthesis was performed under temperature and pressure conditions of about 200°C to 300°C, several MPa to several tens of MPa, etc., but in this embodiment, the synthesis is performed in a synthesis environment with a temperature of 120°C or less, 60°C or more, and a pressure of 600hPa to 2000hPa. It is preferable to lower the pressure, but if synthesis is performed even at the boiling temperature of water of 100°C or more, the pressure condition will be slightly higher than atmospheric pressure. By performing the hydrothermal synthesis under such conditions, a ceramic powder by hydrothermal synthesis with a large ratio of cubic crystals can be obtained. The hydrothermal synthesis in this embodiment is performed in the synthesis environment as described above for a time of 30 minutes to 100 hours. The implementation time can be set appropriately within this range.

[0040] At least one of magnesium (Mg), manganese (Mn), and holmium (Ho), ytterbium (Yb), and erbium (Er) is added to the obtained ceramic powder. This is to suppress the growth of the particles 151. This allows the average particle size of the particles in the unsintered ceramic powder to be 20 nm or more and 50 nm or less. The average particle size of the particles in this ceramic powder can be measured by using a laser transmission type particle size distribution meter or the like.

[0041] The ceramic powder may be BaTiO3. The A site of the perovskite structure may be mixed with Sr or Ca instead of Ba alone. The B site of the perovskite structure may be mixed with Zr or Hf instead of Ti alone. When at least one element of Ba, Sr, and Ca and at least one element of Ti, Zr, and Hf are included, the atomic ratio (at%) of Ba, St, and Ca combined may be 1.020 times or more or 0.96 times or less than the atomic ratio (at%) of Ti, Zr, and Hf combined. This may allow the average particle size of the particles in the unfired raw ceramic powder to be 20 nm or more and 50 nm or less. In other words, the grain growth of the particles contained in the ceramic powder may be adjusted by adjusting the ratio of Ba, Sr, and Ca to Ti, Zr, and Hf. By adjusting the ratio, Ba, Sr, and Ca, or Ti, Zr, and Hf, are increased on the surface of the particles, and the atoms inhibit the reaction between the particles, so that the grain growth is suppressed.

[0042] In addition, when the atomic ratio (at%) of Ba, St, and Ca is 1.020 times or more the atomic ratio (at%) of Ti, Zr, and Hf, the atomic ratio (at%) of Ba, St, and Ca can be 1.100 times or less the atomic ratio (at%) of Ti, Zr, and Hf. In addition, when the atomic ratio (at%) of Ba, St, and Ca is 0.96 times or less the atomic ratio (at%) of Ti, Zr, and Hf, the atomic ratio (at%) of Ba can be 0.900 times or more the atomic ratio (at%) of Ti, Zr, and Hf. In addition, as described above, in this specification, Ba may be described as a representative component for the A site. In the expression of the atomic ratio (at%) of Ba, Sr and Ca are also included in the expression. In addition, Ti may be described as a representative component for the B site. In the expression of the atomic ratio (at%) of Ti, Zr and Hf are also included in the expression. In the expression of the atomic ratio (at%) of Ti, Zr and Hf are also included in the expression. The A site and the B site may be described by their individual components.

[0043] In addition to the above, a predetermined additive compound is added to the obtained ceramic powder depending on the purpose. Examples of the additive compound include oxides of molybdenum (Mo), niobium (Nb), tantalum (Ta), tungsten (W), magnesium (Mg), manganese (Mn), vanadium (V), chromium (Cr), rare earth elements (yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy) and thulium (Tm), as well as oxides of cobalt (Co), Ni, lithium (Li), boron (B), sodium (Na), potassium (K) and silicon (Si), oxides of Si or glass.

[0044] The ceramic powder is mixed with an additive compound and calcined at 820 to 1150°C. The ceramic powder is then wet mixed, dried and pulverized. The average particle size of the calcined and pulverized ceramic powder is 20 to 70 nm, preferably 20 to 50 nm. For example, the ceramic powder obtained as described above may be pulverized as necessary to adjust the particle size, or may be combined with a classification process to adjust the particle size.

[0045] (Step S02: Lamination process) Next, a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer are added to the obtained dielectric material and wet mixed. Using the obtained slurry, a dielectric green sheet is applied onto a substrate by, for example, a die coater method or a doctor blade method, and then dried.

[0046] Next, a metal conductive paste for forming an internal electrode containing an organic binder is printed on the surface of the dielectric green sheet by screen printing, gravure printing, or the like to arrange a pattern for the internal electrode layer. Ceramic particles may or may not be added to the metal conductive paste as a co-material. When ceramic particles are added as a co-material, the main component of the ceramic particles is not particularly limited, but is preferably the same as the main component ceramic of the dielectric layer 15.

[0047] After that, in a state where it is peeled off from the base material, the dielectric green sheets are alternately laminated so that the internal electrode layers 12, 13 and the dielectric layers 15 are alternately arranged, and the internal electrode layers 12, 13 are alternately exposed at both end faces in the length direction of the dielectric layer 15 and alternately drawn out to a pair of external electrodes 14a, 14b having different polarities. For example, the total number of layers is 100 to 500 layers. Then, a ceramic laminate is obtained by pressing a plurality of cover sheets that become the cover portion 18 on the top and bottom of the laminate of the laminated dielectric green sheets. Then, the obtained ceramic laminate is cut to a predetermined chip size (for example, a chip size considering shrinkage due to firing when the dimensions of the multilayer ceramic capacitor 10 are 0.6 mm x 0.3 mm x 0.3 mm).

[0048] (Step S03: Firing process) The molded body thus obtained is subjected to a binder removal process in an N2 atmosphere, after which a metal paste that will become the base for the external electrodes 20a, 20b is applied thereto by a dipping method, and the metal paste is then applied to the molded body in an N2 atmosphere under an oxygen partial pressure of 10 -5 ~10 -8 The mixture is fired in a reducing atmosphere at 1,100 to 1,300°C at 1 atm for 10 minutes to 2 hours.

[0049] (Step S04: Reoxidation treatment process) After that, a re-oxidation treatment may be performed at 600°C to 1000°C in an N2 gas atmosphere.

[0050] (Step S05: External electrode formation process) Thereafter, the undercoat film 21 is formed. The undercoat film 21 is formed by applying unsintered electrode material to the end faces, side faces and main faces of the ceramic laminate. The application method is, for example, a dipping method, but other conventionally known methods such as a printing method or a sputtering method, or a combination of these, may also be used. Next, the unsintered electrode material is baked. The baking can be performed, for example, in a reducing atmosphere or a low oxygen partial pressure atmosphere. After the undercoat film 21 is formed, electrolytic plating is performed by immersing in a plating solution that forms the plating film 22. As a result, the plating film 22 is formed, and the external electrodes 14a, 14b are formed.

[0051] Although each embodiment of the present invention has been described above, the present invention is not limited to the above-described embodiments, and it is needless to say that various modifications can be made without departing from the spirit of the present invention. EXAMPLES

[0052] Next, the relative dielectric constant and DC bias characteristics, that is, the rate of capacitance change (%) when a direct current is applied, of the multilayer ceramic capacitors of the examples will be described together with the corresponding values ​​of the comparative examples.

[0053] The examples correspond to the multilayer ceramic capacitor 10 of the embodiment. Five types of examples, Example 1 to Example 5, were prepared by combining average particle size and cubic crystal ratio. Four types of comparative examples, Comparative Example 1 to Comparative Example 4, were prepared by combining average particle size and cubic crystal ratio. In addition, three types of conventional examples, Conventional Examples 1 to 3, were prepared as examples using conventional ceramic powder. The dimensions of the examples, comparative examples, and conventional examples are length x width x height = 0.6 mm x 0.3 mm x 0.3 mm.

[0054] The average grain size is obtained as follows. First, the multilayer capacitor is polished in cross section so that the plane including the axis of the lamination direction of the first internal electrode, the second internal electrode, and the dielectric layer is observed. A secondary electron image is taken of the dielectric layer between the internal electrodes of the capacitance part of the cross section using a SEM (scanning electron microscope). Then, the area of ​​each particle in the field of view is measured using image processing measurement software, the diameter of a circle with the same area (Heywood diameter) is calculated, and the average value is calculated from these. The SEM is photographed at nine points, which are 1 / 4, 1 / 2, and 3 / 4 of the vertical length of the capacitance part 16 and 1 / 4, 1 / 2, and 3 / 4 of the horizontal length of the capacitance part 16, and the average value of these points is taken as the average grain size of the sample. When the nine points correspond to the internal electrodes, the dielectric layer near the center of the top and bottom is observed.

[0055] The cubic crystal ratio (%) was calculated by measuring the ratio of tetragonal crystals to cubic crystals by analyzing the powder obtained by crushing each sample by XRD. Here, the calculation of the cubic crystal ratio will be further explained. First, the sample multilayer ceramic capacitor is cut and polished to remove the external electrodes and protective parts, leaving only the capacitance part (laminate) consisting of the internal electrodes and the dielectric layers present between the internal electrodes. Next, this capacitance part is crushed to obtain a powdered measurement sample. This powdered measurement sample is subjected to XRD. The obtained X-ray diffraction pattern is fitted by Rietveld analysis using a multiphase model consisting of cubic crystals and tetragonal crystals, and the respective ratios (mass%) are calculated when the cubic crystals and tetragonal crystals are combined and taken as 100%. Note that the powdered measurement sample also contains Ni, which is an internal electrode component, but it is considered that it does not affect the XRD measurement because it does not have a peak in the same region.

[0056] The relative dielectric constant was determined by measuring the capacitance with an LCR meter under conditions of 25° C., 1 kHz, and 1 Vrms, and calculating from the cross area, dielectric thickness, and number of layers of the sample multilayer ceramic capacitor.

[0057] The capacity change rate (%) is the rate of decrease in capacity when comparing the capacity when a DC current of 4 V is applied with the capacity when there is no load.

[0058] If the relative dielectric constant was 400 or more and the capacitance change rate was within -20%, the product was deemed to have passed the test. Referring to FIG. 7, the relationship between the DC bias voltage and the capacitance change rate for the examples and the comparative examples is shown. For the examples, the capacitance change rate for Example 1 is shown as a representative of Examples 1 to 5. For the comparative examples, the capacitance change rate for Comparative Example 1 is shown as a representative of Comparative Examples 1 to 4.

[0059] [Table 1]

[0060] Referring to Table 1, Example 1 had an average particle size of 66 nm and a cubic crystal ratio of 40%. Example 1 had a relative dielectric constant of 553 and a capacitance change rate of -18.3%. Therefore, Example 1 was an acceptable product.

[0061] In Example 2, the average particle size was 69 nm and the cubic crystal ratio was 32%. In Example 2, the relative dielectric constant was 615 and the capacitance change rate was −17.1%. Therefore, Example 2 was an acceptable product.

[0062] In Example 3, the average particle size was 59 nm and the cubic crystal ratio was 47%. In Example 3, the relative dielectric constant was 510 and the capacitance change rate was −15.9%. Therefore, Example 3 was an acceptable product.

[0063] In Example 4, the average particle size was 48 nm and the cubic crystal ratio was 62%. In Example 4, the relative dielectric constant was 413 and the capacitance change rate was -12.9%. Therefore, Example 4 was an acceptable product.

[0064] In Example 5, the average particle size was 32 nm and the cubic crystal ratio was 73%. In Example 5, the relative dielectric constant was 408 and the capacitance change rate was −11.2%. Therefore, Example 5 was an acceptable product.

[0065] In Comparative Example 1, the average particle size was 77 nm and the cubic crystal ratio was 36%. In Comparative Example 1, the relative dielectric constant was 605 and the capacitance change rate was -21.0%. Therefore, Comparative Example 1 was a failed product. Here, the value of the cubic crystal ratio of Comparative Example 1 is a value that is approximately intermediate between the cubic crystal ratio of Example 1 and the cubic crystal ratio of Example 2. Despite this, it is considered that the reason that Comparative Example 1 was a failed product is because the value of the average particle size shown in Table 1 surrounded by a thick frame was large. Note that the average particle size of Example 2 was 69 nm, but Example 2 was a passing product. Therefore, it can be said that the average particle size is preferably 70 nm or less.

[0066] In Comparative Example 2, the average particle size was 28 nm and the cubic crystal ratio was 43%. In Comparative Example 2, the relative dielectric constant was 363 and the capacitance change rate was −8.6%. Therefore, Comparative Example 2 was a failed product.

[0067] In Comparative Example 3, the average particle size was 51 nm and the cubic crystal ratio was 76%. In Comparative Example 3, the relative dielectric constant was 389 and the capacitance change rate was -8.4%. Therefore, Comparative Example 3 was a failed product. While cubic crystals exhibit paraelectricity, tetragonal crystals exhibit ferroelectricity. In Comparative Example 3, the cubic crystal ratio was high. Therefore, while good DC bias characteristics were obtained, the relative dielectric constant was small and sufficient capacitance could not be obtained compared to the examples, which were successful products.

[0068] Comparative Example 4 had an average particle size of 46 nm and a cubic crystal ratio of 23%. Comparative Example 3 had a relative dielectric constant of 501 and a capacitance change rate of -21.9%. Therefore, Comparative Example 3 was a rejected product.

[0069] Conventional examples 1 to 3 are examples of conventional general multilayer ceramic capacitors, which use hydrothermal synthesis powder at 250°C and 25 MPa. In all cases, the average particle size is larger than the range specified in the present invention, and the proportion of tetragonal crystals is smaller than the range specified in the present invention, so although a high relative dielectric constant was obtained, the capacitance change rate was significantly lower than -20%, and therefore they were rejected.

[0070] In the above embodiment, the multilayer ceramic capacitor 10 has been described as an example of a multilayer ceramic electronic component, but the present invention is applicable to all multilayer ceramic electronic components in which dielectric layers and internal electrodes are laminated. Examples of such multilayer ceramic electronic components include chip varistors and chip thermistors. [Explanation of symbols]

[0071] 10...Multilayer ceramic capacitor 11…Ceramic body 12,13…Internal electrode 14a,14b...External electrode 21...Base film 22...Plating film 151...Particle 151a…Core section 151b…Shell section

Claims

1. The element body is formed by alternately laminating internal electrode layers and dielectric layers, the abundance ratio of cubic crystals in particles forming the dielectric layer sandwiched between the internal electrode layers is 25% by mass or more and 75% by mass or less, the average particle size of the particles forming the dielectric layer sandwiched between the internal electrode layers is 30 nm or more and 70 nm or less; Multilayer ceramic electronic components.

2. The content ratio of cubic crystals in the particles is 35% by mass or more and less than 65% by mass.

2. The multilayer ceramic electronic component according to claim 1.

3. the particles forming the dielectric layer include a core portion mainly made of tetragonal crystals and a shell portion surrounding the core portion and mainly made of cubic crystals; 2. The multilayer ceramic electronic component according to claim 1.

4. A step of obtaining a ceramic slurry containing a ceramic powder synthesized by a hydrothermal synthesis method, the ceramic powder including a core portion mainly made of tetragonal crystals and a shell portion surrounding the core portion and mainly made of cubic crystals; preparing a green sheet using the ceramic slurry; forming a laminate in which the green sheets and metal conductive layers are alternately stacked; forming a dielectric layer from the ceramic powder by firing the laminate; Including, The hydrothermal synthesis method is carried out in a synthesis environment having a pressure of 600 hPa or more and 2000 hPa or less and a temperature of 60 ° C. or more and 120 ° C. or less; A method for manufacturing multilayer ceramic electronic components.

5. The ceramic powder has an average particle size of 20 nm or more and 50 nm or less, and the ceramic powder is BaTiO ３ Including, The method for producing a multilayer ceramic electronic component according to claim 4.

6. The ceramic powder is synthesized in the synthesis environment for 30 minutes to 100 hours. The method for producing a multilayer ceramic electronic component according to claim 4.

7. The step of obtaining the ceramic slurry includes a step of adding a grain growth inhibiting additive to the ceramic powder, the grain growth inhibiting additive inhibiting grain growth of particles contained in the ceramic powder. The method for producing a multilayer ceramic electronic component according to claim 4.

8. The grain growth inhibiting additive is at least one of Mg, Ho, Yb, Er, and Mn; The method for producing a multilayer ceramic electronic component according to claim 7.

9. The ceramic powder contains at least one element selected from Ba, Sr, and Ca, and at least one element selected from Ti, Zr, and Hf, and the atomic ratio (at%) of Ba, St, and Ca combined is 1.020 times or more, or 0.96 times or less, the atomic ratio (at%) of Ti, Zr, and Hf combined. The method for producing a multilayer ceramic electronic component according to claim 4.

10. when the atomic ratio (at%) of Ba, St, and Ca combined is 1.020 times or more the atomic ratio (at%) of Ti, Zr, and Hf combined, the atomic ratio (at%) of Ba, St, and Ca combined is 1.100 times or less the atomic ratio (at%) of Ti, Zr, and Hf combined; The method for producing a multilayer ceramic electronic component according to claim 9.

11. when the atomic ratio (at%) of Ba, St and Ca combined is 0.96 times or less the atomic ratio (at%) of Ti, Zr and Hf combined, the atomic ratio (at%) of Ba, St and Ca combined is 0.900 times or more the atomic ratio (at%) of Ti, Zr and Hf combined; The method for producing a multilayer ceramic electronic component according to claim 9.

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