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Method for fabricating a semiconductor device

a semiconductor and device technology, applied in the direction of coatings, transistors, chemical vapor deposition coatings, etc., can solve the problems of reducing the contact resistance of the source/drain, not desirable, excessive silicidation,

Inactive Publication Date: 2007-06-07
FUJITSU MICROELECTRONICS LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0023] According to the present invention, an insulation film is deposited with a first pressure a little lower than the atmospheric pressure set in a deposition chamber, and the insulation film is further deposited with the second pressure lower than the first pressure set in the deposition chamber. Furthermore, according to the present invention, the insulation film is not deposited in the state where the pressure in the deposition chamber is extremely low, and an atmosphere in the deposition chamber is unstable. Thus, according to the present invention, a semiconductor device having the insulation film with a sufficiently flat surface can be fabricated without using reflow process.

Problems solved by technology

This technique can decrease the contact resistance of the source / drain.
However, it is not desirable to make the surface of the inter-layer insulation film planarized by the reflow process in forming a metal silicide layer on the surface of the source / drain diffused layer.
The reflow process for planarizing the surface of the inter-layer insulation film is performed at high temperatures as high as 800-1000° C. and furthermore for a long period of time, which makes the silicidation excessive.
However, the proposed method for fabricating the semiconductor device cannot obtain the inter-layer insulation film with a sufficiently flat surface.

Method used

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  • Method for fabricating a semiconductor device
  • Method for fabricating a semiconductor device
  • Method for fabricating a semiconductor device

Examples

Experimental program
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first embodiment

A FIRST EMBODIMENT

[0049] The method for fabricating the semiconductor device according to a first embodiment of the present invention will be explained with reference to FIGS. 1A to 10. FIGS. 1A to 5B are sectional views of the semiconductor device according to the present embodiment in the steps of the method for fabricating the semiconductor device, which show the method.

[0050] First, as shown in FIG. 1A, a silicon oxide film 12 is formed on the entire surface of a semiconductor substrate 10 of, e.g., silicon by, e.g., thermal oxidation. The silicon oxide film 12 is to be a tunnel insulation film 12 of a transistor of the floating gate structure (see FIG. 1B).

[0051] Then, a polysilicon film 14 is formed on the entire surface by, CVD (Chemical Vapor Deposition). The polysilicon film 14 is to be the floating gate 14 of the transistor of the floating gate structure (see FIG. 1B).

[0052] Next, a silicon oxide film 16 is formed on the entire surface by, e.g., CVD. The silicon oxide f...

second embodiment

A SECOND EMBODIMENT

[0096] The method for fabricating the semiconductor device according to a second embodiment of the present invention will be explained with reference to FIG. 11. FIG. 11 is the time chart of pressures in the deposition chamber when the inter-layer insulation film is formed by the method for fabricating the semiconductor device according to the present embodiment. The same members of the present embodiment as those of the method for fabricating the semiconductor device according to the first embodiment shown in FIGS. 1A to 10 are represented by the same reference numbers not to repeat or to simplify their explanation.

[0097] The method for fabricating the semiconductor device according to the present embodiment is characterized mainly in that the inter-layer insulation film is deposited with the pressure in the deposition chamber set at a first pressure, then substituting an atmosphere in the deposition chamber with an inert gas atmosphere, exhausting the atmospher...

third embodiment

A THIRD EMBODIMENT

[0107] The method for fabricating the semiconductor device according to a third embodiment of the present invention will be explained with reference to FIG. 12. FIG. 12 is the time chart of the pressure in the deposition chamber when the inter-layer insulation film is formed by the method for fabricating the semiconductor device according to the present embodiment. The same members of the present embodiment as those of the method for fabricating the semiconductor device according to the first or the second embodiment are represented by the same reference numbers not to repeat or to simplify their explanation.

[0108] The method for fabricating the semiconductor device according to the present embodiment is characterized mainly in that the inter-layer insulation film 32a is formed with the pressure in the deposition chamber 102 set at a first pressure, then an atmosphere in the deposition chamber 102 is replaced by an inert atmosphere to exhaust the atmosphere in the...

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Abstract

A method for fabricating a semiconductor device comprises the step of depositing an insulation film 32 a with a first pressure set in a deposition chamber; the step of gradually decreasing the pressure in the deposition chamber to a second pressure which is lower than the first pressure; and the step of further depositing the insulation film 32 b with the second pressure set in the deposition chamber. The insulation film is deposited with the first pressure a little lower than a second pressure set in a deposition chamber, and the insulation film is further deposited with the second pressure lower than the first pressure set in the deposition chamber. Furthermore, the insulation film is not deposited in the state where the pressure in the deposition chamber is extremely low, and an atmosphere in the deposition chamber is unstable. Thus, a semiconductor device having the insulation film with a sufficiently flat surface can be fabricating without using reflow process.

Description

CROSS-REFERENCE TO RELATED APPLICATION [0001] This application is based upon and claims priority of Japanese Patent Application No. 2002-331694, filed on Nov. 15, 2002, the contents being incorporated herein by reference. This application is a divisional of U.S. patent application Ser. No. 10 / 705,881 filed Nov. 13, 2003.BACKGROUND OF THE INVENTION [0002] The present invention relates to a method for fabricating a semiconductor device, more specifically a method for fabricating a semiconductor device having an insulation film. [0003] In a conventional method for fabricating a semiconductor device, an inter-layer insulation film is formed by, e.g., BPSG on a semiconductor substrate with a gate electrode, an interconnection layer, etc. formed on, and then the surface of the inter-layer insulation film is planarized by long-time and high-temperature reflow process. [0004] On the other hand, recently the technique of forming a metal silicide layer on the surface of the source / drain diffu...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L21/471C23C16/44C23C16/455H01L21/316H01L21/3205H01L21/768H01L21/8247H01L27/115H01L29/788H01L29/792
CPCC23C16/4408C23C16/45557H01L21/02129H01L21/02271H01L21/31612H01L21/31625H01L21/76801H01L21/76829H01L21/76834H01L21/76837
Inventor NAGAKURA, YOSHIMASAOHASHI, HIDEAKI
Owner FUJITSU MICROELECTRONICS LTD