Lock loop circuit and method having improved lock time

Abstract

A lock loop circuit (230) includes a floating ground loop filter circuit (302) and a precharge circuit (304). The floating ground loop filter circuit includes at least one capacitive element (326, 328). The floating ground loop filter circuit provides a steering signal (334) for a controllable oscillator circuit (306) in response to a precharge signal (347). The precharge circuit provides the precharge signal in response to lock loop enable information (226). The precharge circuit controls the floating ground loop filter to bypass the at least one capacitive element for a period of time (606) in response to the lock loop enable information.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]This application is related to co-pending application entitled “AUTOMATIC CALIBRATION LOCK LOOP CIRCUIT AND METHOD HAVING IMPROVED LOCK TIME,” filed on even date, having docket number 36600.07.1631, inventors David M. Schlueter and Michael C. Doll, owned by instant Assignee and is incorporated herein by reference in its entirety.BACKGROUND[0002]1. Field[0003]The present disclosure generally relates to lock loop circuits, and more particularly, to lock loop circuits having a reduced time required to lock frequency and phase.[0004]2. Related Art[0005]Lock loop circuits such as phase lock loop (PLL) circuits provide an output signal having a frequency and phase that is locked to a reference signal. More specifically, PLL circuits use feedback to adjust the output signal so that the frequency and phase of the output signal match the reference signal.[0006]As known in the art, PLL circuits are used in many applications such as radio, telecommun...

AI Technical Summary

Problems solved by technology

In addition, the first and second capacitors 112, 114 are known to leak current to ground, which increases power consumption and noise of the PLL circuit 100.

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