A circuit switching device for domestically produced chips

By designing a circuit adapter, the domestic chip is connected to the original base plate, which solves the problem of design repetition when replacing the domestic processor, improves data utilization and reduces costs.

CN110783787BActive Publication Date: 2025-02-14GUANGZHOU BONSON INFORMATION SYST CO LTD
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Patent Information

Application Number
CN201911164597.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2019-11-25
Publication Date
2025-02-14
Estimated Expiration
2039-11-25

AI Technical Summary

Technical Problem

In the power environment monitoring industry and security monitoring industry, when the domestic processor needs to be replaced, the monitoring device is usually required to be redesigned, resulting in low data reuse rate, high cost, long development cycle and increased product maintenance.

Method used

Design a circuit adapter for domestic chips. By setting up CN1 and CN2 chips, the pins at the docking end of the core board are converted into pins, thereby realizing the connection between the domestic chip and the original base plate and replacing the original core board.

Benefits of technology

It improves the reuse rate of product data, reduces costs, shortens development cycles, and does not require the development of chips of the same size.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a circuit switching device for a domestic chip, including a circuit board, a core board docking end, the core board docking end is arranged on the upper layer of the circuit board, and can be used to connect the core board processor, a CN1 socket and a CN2 socket, the CN1 socket and the CN1 socket are arranged on the lower layer of the circuit board, located on both sides of the core board docking end, and used to convert the core board docking end pins into needle holder pins, needle holder pins, the needle holder pins are arranged on the lower layer of the circuit board, and can be used to connect an external bottom plate, the core board docking end is respectively connected to the CN1 socket and the CN2 socket, and the needle holder pins are respectively connected to the CN1 socket and the CN2 socket. The present invention converts the core board docking end into needle holder pins by arranging the CN1 socket and the CN2 socket, so that the device replaces the original core board with the connection between the domestic chip and the original bottom plate, thereby improving the reuse rate of product information, reducing costs, and shortening the development cycle, without the need to develop chips of the same size.
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Description

Technical Field

[0001] The present invention relates to the technical field of circuit switching, and in particular to a circuit switching device for a domestically produced chip. Background Art

[0002] In the existing power environment monitoring industry and security monitoring industry, the processors used in the current mainstream monitoring equipment are all foreign, such as embedded processors from foreign companies such as ATMEL, NXP, and TI. However, in the domestic military's power environment monitoring industry, the product function requirements of FSU (field monitoring unit) are the same, but it is required to use domestically produced processors. According to this application scenario, it is necessary to replace it with a domestically produced processor. The common practice is to redesign the monitoring device based on the domestically produced processor to realize a brand new product, and the disadvantages of doing so are:

[0003] 1. Application products with the same functions only require localization and redesign of different products, resulting in a very low data reuse rate and increased useless work;

[0004] 2. Low availability leads to higher corresponding costs;

[0005] 3. The development cycle becomes longer;

[0006] 4. The amount of product maintenance increases. Summary of the invention

[0007] In view of the above problems, the present invention provides a circuit switching device for a domestic chip to solve the problems raised in the above background technology.

[0008] In order to solve the above problems, the present invention adopts the following technical solution: a circuit switching device for a domestic chip, characterized in that it comprises: a circuit board,

[0009] A core board docking end, which is arranged on the upper layer of the circuit board and can be used to connect to the core board processor;

[0010] A CN1 socket and a CN2 socket, wherein the CN1 socket and the CN2 socket are arranged on the lower layer of the circuit board, located on both sides of the core board docking end, and are used to convert the core board docking end pins into needle seat pins;

[0011] The needle holder pins are arranged on the lower layer of the circuit board and can be used to connect to the external base plate;

[0012] The core board butt end is connected to the CN1 socket and the CN2 socket respectively, and the needle holder pins are connected to the CN1 socket and the CN2 socket respectively.

[0013] The CN1 socket is provided with pins 1 to 60;

[0014] The CN2 socket is provided with pins numbered 1 to 60.

[0015] The core board docking end includes: a USB function pin end, a UART function pin end, an IIC function pin end, an SPI function pin end, an RGMII function pin end, an MMC function pin end, and a GPIO function pin end.

[0016] The core board docking end specifically includes: USB function pin end: HOST2_DM pin end, HOST2_DP pin end, OTG_DR pin end, OTG_ID pin end, VDD_SV_SYS pin end, OTG_DM pin end, OTG_DP pin end, HOST1_DM pin end, HOST1_DP pin end;

[0017] UART function pins: UART2_RXD pin, UART2_TXD pin, UART1_RXD pin, UART1_TXD pin, UART3_RXD / GPIO7_A7 pin, UART3_TXD / GPIO7_B0 pin, UART4_TXD / SPI0_TXD pin, UART4_RXD / SPIO_RXD pin, UARTO_RXD pin, UARTD_TXD pin;

[0018] IIC function pin end: I2C1_SCL_Sensor pin end, I2C1_SDA_Sensor pin end;

[0019] SPI function pins: SPI1_TXD / GPIO7_B7 pin, SPI1_TXD / GPIO7_B6 pin, SPI1_CSNO / GPIO7_B5 pin, SPI1_CLK / GPIO7_B4 pin, SPIO_CSN0 pin;

[0020] RGMII function pins: UARTO_CTS pin, UARTO_RTS pin, MAC_MDC pin, MAC_MDIO pin, MAC_TXD1 pin, MAC_TXD0 pin, MAC_TXEN pin, MAC_RXDV pin, MAC_RXD0 pin, MAC_RXD1 pin, MAC_CLK pin;

[0021] MMC function pins: SDMMC_CMD pin, SDMMC_D2 pin, SDMMC_D3 pin, SDMMC_DET pin, SDMMC_CLK pin, SDMMC_D1 pin, SDMMC_D0 pin, VDD_3V3_RTC pin;

[0022] GPIO function pin ends: GPIO7_C5 pin end, UART3_CTS / GPIO7_B1 pin end, GPIO5_C1 pin end, GPIO4_D7 pin end, GPIO4_D6 pin end, SDICO_D3 / GPIO4_C7 pin end, SDICO_BKPWR / GPIO4_D5 pin end, SDICO_CLK / GPIO4_D1 pin end, SDICO_WRPRT / GPIO4_D3 pin end, SDICO_DET / GPIO4_D2 pin end, SDICO_PWR / GPIO4_D4 pin end, SDIOD_D1 / GPIO4_C5 pin end, SDIOD_D2 / GPIO4_C6 ​​pin end, SDIOD_CMD / GPIO4_D0 pin end, SDIOD_D0 / GPIO4_C4 pin end.

[0023] The pin No. 1 is connected to the HOST2_DM pin end, the pin No. 3 is connected to the HOST2_DP pin end, the pin No. 5 is connected to the OTG_DR pin end, the pin No. 7 is connected to the UART2_RXD pin end, the pin No. 9 is connected to the UART2_TXD pin end, the pin No. 13 is connected to the SPI1_TXD / GPIO7_B7 pin end, the pin No. 15 is connected to the SPI1_TXD / GPIO7_B6 pin end, the pin No. 19 is connected to the I2C1_SCL_Sensor pin end, the pin No. 21 is connected to the I2C1_SDA_Sensor pin end, and the pin No. 17 is connected to the I2C1_SCL_Sensor pin end. The pin end is connected, the pin 25 is connected to the GPIO7_C5 pin end, the pin 27 is connected to the OTG_ID pin end, the pin 29 is connected to the UART3_CTS / GPIO7_B1 pin end, the pin 31 is connected to the SPI1_CSNO / GPIO7_B5 pin end, the pin 33 is connected to the GPIO5_C1 pin end, the pin 37 is connected to the VDD_3V3_RTC pin end, the pin 39 is connected to the SPI1_CLK / GPIO7_B4 pin end, and the pin 43 is connected to the UART3_RXD / GPIO7_A7 pin end , the pin 45 is connected to the UART3_TXD / GPIO7_B0 pin end, the pins 53, 55, 57 and 59 are connected to the VDD_SV_SYS pin end, the pin 6 is connected to the OTG_DM pin end, the pin 8 is connected to the OTG_DP pin end, the pin 12 is connected to the HOST1_DM pin end, the pin 14 is connected to the HOST1_DP pin end, the pin 30 is connected to the UARTO_CTS pin end, the pin 32 is connected to the UARTO_RTS pin end, the pin 34 is connected to the GPIO4_D7 pin end The 36th pin is connected to the GPIO4_D6 pin end, the 40th pin is connected to the MAC_MDC pin end, the 42nd pin is connected to the MAC_MDIO pin end, the 44th pin is connected to the MAC_TXD1 pin end, the 46th pin is connected to the MAC_TXD0 pin end, the 48th pin is connected to the MAC_TXEN pin end, the 50th pin is connected to the MAC_RXDV pin end, the 52nd pin is connected to the MAC_RXD0 pin end, the 54th pin is connected to the MAC_RXD1 pin end, and the 58th pin is connected to the MAC_CLK pin end.

[0024] The pin No. 11, the pin No. 17, the pin No. 23, the pin No. 35, the pin No. 41, the pin No. 47, the pin No. 49, the pin No. 51, the pin No. 2, the pin No. 4, the pin No. 10, the pin No. 16, the pin No. 28, the pin No. 38, the pin No. 56, and the pin No. 60 are grounded,

[0025] The pins 18, 20, 22, 24 and 26 are not connected.

[0026] The sixty-pin is connected to the SDMMC_CMD pin end, the fifty-eighth pin is connected to the SDMMC_D2 pin end, the fifty-sixth pin is connected to the SDMMC_D3 pin end, the fifty-fourth pin is connected to the SDMMC_DET pin end, the fifty-pin is connected to the SDMMC_CLK pin end, the forty-sixth pin is connected to the SDMMC_D1 pin end, the forty-fourth pin is connected to the SDMMC_D0 pin end, the forty-first pin is connected to the SDICO_D3 / GPIO4_C7 pin end, the thirty-eighth pin is connected to the SDICO_BKPWR / GPIO4_D5 pin end, the thirty-fourth pin is connected to the SDICO_CLK / GPIO4_D1 pin end, the thirty-first pin is connected to the SDICO_WRPRT / GPIO4_D3 pin end, the twenty-eighth pin is connected to the SDICO_DET / GPIO4_D2 pin end, the twenty-sixth pin is connected to The SDICO_PWR / GPIO4_D4 pin end is connected, the 59th pin is connected to the SPIO_CSN0 pin end, the 57th pin is connected to the UARTO_RXD pin end, the 55th pin is connected to the UARTD_TXD pin end, the 51st pin is connected to the SDIOD_D1 / GPIO4_C5 pin end, the 49th pin is connected to the SDIOD_D2 / GPIO4_C6 ​​pin end, the 47th pin is connected to the SDIOD_CMD / GPIO4_D0 pin end, the 45th pin is connected to the SDIOD_D0 / GPIO4_C4 pin end, the 41st pin is connected to the UART1_RXD pin end, the 39th pin is connected to the UART1_TXD pin end, the 35th pin is connected to the UART4_TXD / SPI0_TXD pin end, the 33rd pin is connected to the UART4_RXD / SPIO_RXD pin end,

[0027] The pin No. 52, pin No. 48, pin No. 42, pin No. 36, pin No. 32, pin No. 24, pin No. 22, pin No. 4, pin No. 2, pin No. 53, pin No. 43, pin No. 37, pin No. 31, pin No. 23, pin No. 21, pin No. 3, and pin No. 1 are grounded,

[0028] The pin 20, pin 18, pin 16, pin 14, pin 12, pin 10, pin 8, pin 6, pin 19, pin 17, pin 15, pin 13, pin 11, pin 9, pin 7 and pin 5 are not connected.

[0029] The needle holder pins include: USB function pins, UART function pins, IIC function pins, SPI function pins, MII function pins, and GPIO function pins.

[0030] The needle holder pins specifically include:

[0031] USB function pins: USB_HOST2_N pin, USB_HOST2_P pin, USB_OTG_DRV pin, USB_OTG_ID pin, VCC_5V pin, USB_OTG_DM pin, USB_OTG_DP pin, USB_HOST1_DM pin, USB_HOST1_DP pin;

[0032] UART function pins: AM335X_UART0_RXD pin, AM335X_UART0_TXD pin, AM335X_UART1_TXD pin, AM335X_UART1_RXD pin, AM335X_Mil1_RXERR pin, AM335X_Mli1_CRS pin, AM335X_UART0_CTSn pin, AM335X_UART0_RTSn pin, AM335X_LCD_DATA9 pin, AM335X_LCD_DATA8 pin;

[0033] IIC function pins: AM335X_UART1_RTSn pin, AM335X_UART1_CTSn pin;

[0034] SPI function pins: AM335X_SPIO_D1 pin, AM335X_SPIO_D0 pin, AM335X_SPI0_CS0 pin, AM335X_SPI0_SCLK pin, AM335X_LCD_PCLK pin;

[0035] MII function pins: AM335X_Mil1_MDIO_CLK pin, AM335X_Mil1_MDIO_DATA pin, AM335X_Mil1_TXD1 pin, AM335X_Mil1_TXD0 pin, AM335X_Mil1_TXEN pin, AM335X_Mil1_RXDV pin, AM335X_Mil1_RXD0 pin, AM335X_Mil1_RXD1 pin, AM335X_Mil1_TXCLK pin, AM335X_USB0_DRVVBUS pin;

[0036] MMC function pins: AM335X_MMC_D0 pin, AM335X_MMC_D1 pin, AM335X_MMC_CLK pin, AM335X_MMC_D3 pin, AM335X_MMC_D2 pin, AM335X_MMC_CMD pin, AM335X_MCASP0_ACLKX pin;

[0037] GPIO function pins: AM335X_GPMC_CS1n pin, AM335X_CS2n pin, AM335X_GPMC_AD10 pin, AM335X_GPMC_AD8 pin, AM335X_GPMC_AD9 pin, AM335X_GPMC_AD12 pin, AM335X_GPMC_AD11 pin, AM335X_LCD_AC_BIAS_EN pin, AM335X_MCASP0_AHCLKX pin, VBACKUP O pin, AM335X_MCASP0_FSR pin, AM335X_LCD_HSTNC pin, AM335X_LCD_VSYNC pin, AM335X_MCASP0_ACLKR pin, AM335X_MCASP0_AXR1 pin, AM335X_USB1_DRVVBUS pin, AM335X_Mil1_REFCLK pin.

[0038] The No. 1 pin is connected to the USB_HOST2_N pin, the No. 3 pin is connected to the USB_HOST2_P pin, the No. 5 pin is connected to the USB_OTG_DRV pin, the No. 7 pin is connected to the AM335X_UART0_RXD pin, the No. 9 pin is connected to the AM335X_UART0_TXD pin, the No. 13 pin is connected to the AM335X_SPIO_D1 pin, the No. 15 pin is connected to the AM335X_SPIO_D0 pin, and the No. 19 pin is connected to the AM335X_UART1_RT Sn pin is connected, pin 21 is connected to AM335X_UART1_CTSn pin, pin 25 is connected to AM335X_LCD_AC_BIAS_EN pin, pin 27 is connected to USB_OTG_ID pin, pin 29 is connected to AM335X_Mil1_REFCLK pin, pin 31 is connected to AM335X_SPI0_CS0 pin, pin 33 is connected to AM335X_MCASP0_AHCLKX pin, pin 37 is connected to VBACKUP O pin, pin 39 is connected to AM335X_SPI0_SCLK pin, pin 43 is connected to AM335X_LCD_DATA9 pin, pin 45 is connected to AM335X_LCD_DATA8 pin, pins 53, 55, 57 and 59 are connected to VCC_5V pin, pin 6 is connected to USB_OTG_DM pin, pin 8 is connected to USB_OTG_DP pin, pin 12 is connected to USB_HOST1_DM pin, pin 14 is connected to USB_HOST1_DP pin, pin 30 is connected to AM335X_USB0_DRVVBUS pin, pin 32 is connected to AM335X_MCASP0_FSR pin, pin 34 is connected to AM335X_GPMC_AD10 pin Pin 36 is connected to AM335X_USB1_DRVVBUS pin, pin 40 is connected to AM335X_Mil1_MDIO_CLK pin, pin 42 is connected to AM335X_Mil1_MDIO_DATA pin, pin 44 is connected to AM335X_Mil1_TXD1 pin, pin 46 is connected to AM335X_Mil1_TXD0 pin, pin 48 is connected to AM335X_Mil1_TXEN pin, pin 50 is connected to AM335X_Mil1_RXDV pin, pin 52 is connected to AM335X_Mil1_RXD0 pin, pin 54 is connected to AM335X_Mil1_RXD1 pin, and pin 58 is connected to AM335X_Mil1_TXCLK pin.

[0039] The 33rd pin of the CN2 socket is connected to the AM335X_UART0_CTSn pin, the 35th pin is connected to the AM335X_UART0_RTSn pin, the 39th pin is connected to the AM335X_Mil1_RXERR pin, the 41st pin is connected to the AM335X_Mli1_CRS pin, the 45th pin is connected to the AM335X_GPMC_CS1n pin, the 47th pin is connected to the AM335X_CS2n pin, the 49th pin is connected to the M335X_GPMC_AD8 pin, the 51st pin is connected to the AM335X_GPMC_AD9 pin, the 55th pin is connected to the AM335X_UART1_TXD pin, the 57th pin is connected to the AM335X_UART1_RXD pin, the 59th pin is connected to the AM335X_LCD_PCLK pin, the 26th pin is connected to the AM335X_LCD_HST NC pin is connected, pin 28 is connected to AM335X_LCD_VSYNC pin, pin 30 is connected to AM335X_MCASP0_ACLKR pin, pin 34 is connected to AM335X_MCASP0_AXR1 pin, pin 38 is connected to AM335X_GPMC_AD12 pin, pin 40 is connected to AM335X_GPMC_AD11 pin, pin 44 is connected to AM335X_MMC_D0 pin, pin 46 is connected to AM335X_MMC_D1 pin, pin 50 is connected to AM335X_MMC_CLK pin, pin 54 is connected to AM335X_MCASP0_ACLKX pin, pin 56 is connected to AM335X_MMC_D3 pin, pin 58 is connected to AM335X_MMC_D2 pin, and pin 60 is connected to AM335X_MMC_CMD pin.

[0040] The beneficial effects of the present invention are:

[0041] The present invention converts the core board docking end into a needle holder pin by setting a CN1 socket and a CN2 socket, so that the device replaces the original core board with the connection between the domestic chip and the original base plate, thereby improving the reuse rate of product data, reducing costs, and shortening the development cycle without the need to develop chips of the same size. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 It is an assembly structure diagram of the present invention, the core board processor and the baseboard;

[0043] Figure 2 This is a diagram showing the connection relationship between the CN1 socket and the core board docking end of the present invention;

[0044] Figure 3 This is a diagram showing the connection relationship between the CN2 socket and the core board docking end of the present invention;

[0045] Figure 4 A diagram showing the connection relationship between the CN1 socket and the needle holder pins of the present invention;

[0046] Figure 5 It is a connection relationship diagram between the CN2 socket and the needle holder pin of the present invention. DETAILED DESCRIPTION

[0047] It will be clear to those skilled in the art that various modifications to the above embodiments may be made without departing from the overall spirit and concept of the present invention. All of these modifications fall within the scope of protection of the present invention. The protection scheme of the present invention shall be subject to the claims attached to the present invention.

[0048] The present invention provides Figure 1 A circuit switching device for a domestically produced chip is shown, comprising:

[0049] Core board docking terminal, used to connect to the core board processor;

[0050] CN1 and CN2 sockets are used to convert the core board docking pins into needle socket pins;

[0051] Needle header pins, used to connect to the external baseboard;

[0052] The core board docking end is connected to the CN1 socket and the CN2 socket respectively, and the needle holder pins are connected to the CN1 socket and the CN2 socket respectively.

[0053] The CN1 socket has pins 1 to 60;

[0054] The CN2 socket is provided with pins numbered 1 to 60.

[0055] In one embodiment of the present invention, the CN1 socket and the CN2 socket use the SMD female and SMD pin headers produced by Gurui Company, with the specification parameter of BTB0.84-6.5 and the detailed parameters of 0.8mm pitch and 2*30Pin.

[0056] The core board docking end includes: USB function pin end, UART function pin end, IIC function pin end, SPI function pin end, RGMII function pin end, MMC function pin end, and GPIO function pin end.

[0057] The core board docking terminal specifically includes: USB function pin terminal: HOST2_DM pin terminal, HOST2_DP pin terminal, OTG_DR pin terminal, OTG_ID pin terminal, VDD_SV_SYS pin terminal, OTG_DM pin terminal, OTG_DP pin terminal, HOST1_DM pin terminal, HOST1_DP pin terminal;

[0058] UART function pins: UART2_RXD pin, UART2_TXD pin, UART1_RXD pin, UART1_TXD pin, UART3_RXD / GPIO7_A7 pin, UART3_TXD / GPIO7_B0 pin, UART4_TXD / SPI0_TXD pin, UART4_RXD / SPIO_RXD pin, UARTO_RXD pin, UARTD_TXD pin;

[0059] IIC function pin end: I2C1_SCL_Sensor pin end, I2C1_SDA_Sensor pin end;

[0060] SPI function pins: SPI1_TXD / GPIO7_B7 pin, SPI1_TXD / GPIO7_B6 pin, SPI1_CSNO / GPIO7_B5 pin, SPI1_CLK / GPIO7_B4 pin, SPIO_CSN0 pin;

[0061] RGMII function pins: UARTO_CTS pin, UARTO_RTS pin, MAC_MDC pin, MAC_MDIO pin, MAC_TXD1 pin, MAC_TXD0 pin, MAC_TXEN pin, MAC_RXDV pin, MAC_RXD0 pin, MAC_RXD1 pin, MAC_CLK pin;

[0062] MMC function pins: SDMMC_CMD pin, SDMMC_D2 pin, SDMMC_D3 pin, SDMMC_DET pin, SDMMC_CLK pin, SDMMC_D1 pin, SDMMC_D0 pin, VDD_3V3_RTC pin;

[0063] GPIO function pin ends: GPIO7_C5 pin end, UART3_CTS / GPIO7_B1 pin end, GPIO5_C1 pin end, GPIO4_D7 pin end, GPIO4_D6 pin end, SDICO_D3 / GPIO4_C7 pin end, SDICO_BKPWR / GPIO4_D5 pin end, SDICO_CLK / GPIO4_D1 pin end, SDICO_WRPRT / GPIO4_D3 pin end, SDICO_DET / GPIO4_D2 pin end, SDICO_PWR / GPIO4_D4 pin end, SDIOD_D1 / GPIO4_C5 pin end, SDIOD_D2 / GPIO4_C6 ​​pin end, SDIOD_CMD / GPIO4_D0 pin end, SDIOD_D0 / GPIO4_C4 pin end.

[0064] Pin 1 is connected to the HOST2_DM pin, pin 3 is connected to the HOST2_DP pin, pin 5 is connected to the OTG_DR pin, pin 7 is connected to the UART2_RXD pin, pin 9 is connected to the UART2_TXD pin, pin 13 is connected to the SPI1_TXD / GPIO7_B7 pin, pin 15 is connected to the SPI1_TXD / GPIO7_B6 pin, pin 19 is connected to the I2C1_SCL_Sensor pin, pin 21 is connected to the I2C1_SDA_Sensor pin pin end, pin 25 is connected to GPIO7_C5 pin end, pin 27 is connected to OTG_ID pin end, pin 29 is connected to UART3_CTS / GPIO7_B1 pin end, pin 31 is connected to SPI1_CSNO / GPIO7_B5 pin end, pin 33 is connected to GPIO5_C1 pin end, pin 37 is connected to VDD_3V3_RTC pin end, pin 39 is connected to SPI1_CLK / GPIO7_B4 pin end, pin 43 is connected to UART3_RXD / GPIO7_A7 pin end , pin 45 is connected to UART3_TXD / GPIO7_B0, pins 53, 55, 57, and 59 are connected to VDD_SV_SYS, pin 6 is connected to OTG_DM, pin 8 is connected to OTG_DP, pin 12 is connected to HOST1_DM, pin 14 is connected to HOST1_DP, pin 30 is connected to UARTO_CTS, pin 32 is connected to UARTO_RTS, and pin 34 is connected to GPIO4_D7. Pin ends are connected, pin 36 is connected to GPIO4_D6 pin end, pin 40 is connected to MAC_MDC pin end, pin 42 is connected to MAC_MDIO pin end, pin 44 is connected to MAC_TXD1 pin end, pin 46 is connected to MAC_TXD0 pin end, pin 48 is connected to MAC_TXEN pin end, pin 50 is connected to MAC_RXDV pin end, pin 52 is connected to MAC_RXD0 pin end, pin 54 is connected to MAC_RXD1 pin end, pin 58 is connected to MAC_CLK pin end,

[0065] Pin 11, pin 17, pin 23, pin 35, pin 41, pin 47, pin 49, pin 51, pin 2, pin 4, pin 10, pin 16, pin 28, pin 38, pin 56, pin 60 are grounded,

[0066] There is no connection on pins 18, 20, 22, 24 and 26.

[0067] Pin 60 is connected to SDMMC_CMD pin, pin 58 is connected to SDMMC_D2 pin, pin 56 is connected to SDMMC_D3 pin, pin 54 is connected to SDMMC_DET pin, pin 50 is connected to SDMMC_CLK pin, pin 46 is connected to SDMMC_D1 pin, pin 44 is connected to SDMMC_D0 pin, pin 40 is connected to SDICO_D3 / GPIO4_C7 pin, pin 38 is connected to SDICO_BKPWR / GPIO4_D5 pin, pin 34 is connected to SDICO_CLK / GPIO4_D1 pin, pin 30 is connected to SDICO_WRPRT / GPIO4_D3 pin, pin 28 is connected to SDICO_DET / GPIO4_D2 pin, pin 26 is connected to SD ICO_PWR / GPIO4_D4 pin end is connected, pin 59 is connected to SPIO_CSN0 pin end, pin 57 is connected to UARTO_RXD pin end, pin 55 is connected to UARTD_TXD pin end, pin 51 is connected to SDIOD_D1 / GPIO4_C5 pin end, pin 49 is connected to SDIOD_D2 / GPIO4_C6 ​​pin end, pin 47 is connected to SDIOD_CMD / GPIO4_D0 pin end, pin 45 is connected to SDIOD_D0 / GPIO4_C4 pin end, pin 41 is connected to UART1_RXD pin end, pin 39 is connected to UART1_TXD pin end, pin 35 is connected to UART4_TXD / SPI0_TXD pin end, pin 33 is connected to UART4_RXD / SPIO_RXD pin end,

[0068] Pin 52, pin 48, pin 42, pin 36, pin 32, pin 24, pin 22, pin 4, pin 2, pin 53, pin 43, pin 37, pin 31, pin 23, pin 21, pin 3, pin 1 is grounded,

[0069] There is no connection on pin 20, pin 18, pin 16, pin 14, pin 12, pin 10, pin 8, pin 6, pin 19, pin 17, pin 15, pin 13, pin 11, pin 9, pin 7, and pin 5.

[0070] The header pins include: USB function pins, UART function pins, IIC function pins, SPI function pins, MII function pins, and GPIO function pins.

[0071] The header pins include:

[0072] USB function pins: USB_HOST2_N pin, USB_HOST2_P pin, USB_OTG_DRV pin, USB_OTG_ID pin, VCC_5V pin, USB_OTG_DM pin, USB_OTG_DP pin, USB_HOST1_DM pin, USB_HOST1_DP pin;

[0073] UART function pins: AM335X_UART0_RXD pin, AM335X_UART0_TXD pin, AM335X_UART1_TXD pin, AM335X_UART1_RXD pin, AM335X_Mil1_RXERR pin, AM335X_Mli1_CRS pin, AM335X_UART0_CTSn pin, AM335X_UART0_RTSn pin, AM335X_LCD_DATA9 pin, AM335X_LCD_DATA8 pin;

[0074] IIC function pins: AM335X_UART1_RTSn pin, AM335X_UART1_CTSn pin;

[0075] SPI function pins: AM335X_SPIO_D1 pin, AM335X_SPIO_D0 pin, AM335X_SPI0_CS0 pin, AM335X_SPI0_SCLK pin, AM335X_LCD_PCLK pin;

[0076] MII function pins: AM335X_Mil1_MDIO_CLK pin, AM335X_Mil1_MDIO_DATA pin, AM335X_Mil1_TXD1 pin, AM335X_Mil1_TXD0 pin, AM335X_Mil1_TXEN pin, AM335X_Mil1_RXDV pin, AM335X_Mil1_RXD0 pin, AM335X_Mil1_RXD1 pin, AM335X_Mil1_TXCLK pin, AM335X_USB0_DRVVBUS pin;

[0077] MMC function pins: AM335X_MMC_D0 pin, AM335X_MMC_D1 pin, AM335X_MMC_CLK pin, AM335X_MMC_D3 pin, AM335X_MMC_D2 pin, AM335X_MMC_CMD pin, AM335X_MCASP0_ACLKX pin;

[0078] GPIO function pins: AM335X_GPMC_CS1n pin, AM335X_CS2n pin, AM335X_GPMC_AD10 pin, AM335X_GPMC_AD8 pin, AM335X_GPMC_AD9 pin, AM335X_GPMC_AD12 pin, AM335X_GPMC_AD11 pin, AM335X_LCD_AC_BIAS_EN pin, AM335X_MCASP0_AHCLKX pin, VBACKUP O pin, AM335X_MCASP0_FSR pin, AM335X_LCD_HSTNC pin, AM335X_LCD_VSYNC pin, AM335X_MCASP0_ACLKR pin, AM335X_MCASP0_AXR1 pin, AM335X_USB1_DRVVBUS pin, AM335X_Mil1_REFCLK pin.

[0079] Pin 1 is connected to the USB_HOST2_N pin, pin 3 is connected to the USB_HOST2_P pin, pin 5 is connected to the USB_OTG_DRV pin, pin 7 is connected to the AM335X_UART0_RXD pin, pin 9 is connected to the AM335X_UART0_TXD pin, pin 13 is connected to the AM335X_SPIO_D1 pin, pin 15 is connected to the AM335X_SPIO_D0 pin, and pin 19 is connected to the AM335X_UART1_RTS pin. n pin, pin 21 is connected to AM335X_UART1_CTSn pin, pin 25 is connected to AM335X_LCD_AC_BIAS_EN pin, pin 27 is connected to USB_OTG_ID pin, pin 29 is connected to AM335X_Mil1_REFCLK pin, pin 31 is connected to AM335X_SPI0_CS0 pin, pin 33 is connected to AM335X_MCASP0_AHCLKX pin, pin 37 is connected to VBACKUP O pin, pin 39 is connected to AM335X_SPI0_SCLK pin, pin 43 is connected to AM335X_LCD_DATA9 pin, pin 45 is connected to AM335X_LCD_DATA8 pin, pins 53, 55, 57 and 59 are connected to VCC_5V pin, pin 6 is connected to USB_OTG_DM pin, pin 8 is connected to USB_OTG_DP pin, pin 12 is connected to USB_HOST1_DM pin, pin 14 is connected to USB_HOST1_DP pin, pin 30 is connected to AM335X_USB0_DRVVBUS pin, pin 32 is connected to AM335X_MCASP0_FSR pin, pin 34 is connected to AM335X_GPMC_AD10 pin Pin 36 is connected to AM335X_USB1_DRVVBUS pin, pin 40 is connected to AM335X_Mil1_MDIO_CLK pin, pin 42 is connected to AM335X_Mil1_MDIO_DATA pin, pin 44 is connected to AM335X_Mil1_TXD1 pin, pin 46 is connected to AM335X_Mil1_TXD0 pin, pin 48 is connected to AM335X_Mil1_TXEN pin, pin 50 is connected to AM335X_Mil1_RXDV pin, pin 52 is connected to AM335X_Mil1_RXD0 pin, pin 54 is connected to AM335X_Mil1_RXD1 pin, and pin 58 is connected to AM335X_Mil1_TXCLK pin.

[0080] The 33rd pin of CN2 is connected to the AM335X_UART0_CTSn pin, the 35th pin is connected to the AM335X_UART0_RTSn pin, the 39th pin is connected to the AM335X_Mil1_RXERR pin, the 41st pin is connected to the AM335X_Mli1_CRS pin, the 45th pin is connected to the AM335X_GPMC_CS1n pin, the 47th pin is connected to the AM335X_CS2n pin, the 49th pin is connected to the M335X_GPMC_AD8 pin, the 51st pin is connected to the AM335X_GPMC_AD9 pin, the 55th pin is connected to the AM335X_UART1_TXD pin, the 57th pin is connected to the AM335X_UART1_RXD pin, the 59th pin is connected to the AM335X_LCD_PCLK pin, the 26th pin is connected to the AM335X_LCD_HSTN pin C pin, pin No. 28 is connected to AM335X_LCD_VSYNC pin, pin No. 30 is connected to AM335X_MCASP0_ACLKR pin, pin No. 34 is connected to AM335X_MCASP0_AXR1 pin, pin No. 38 is connected to AM335X_GPMC_AD12 pin, pin No. 40 is connected to AM335X_GPMC_AD11 pin, pin No. 44 is connected to AM335X_MMC_D0 pin, pin No. 46 is connected to AM335X_MMC_D1 pin, pin No. 50 is connected to AM335X_MMC_CLK pin, pin No. 54 is connected to AM335X_MCASP0_ACLKX pin, pin No. 56 is connected to AM335X_MMC_D3 pin, pin No. 58 is connected to AM335X_MMC_D2 pin, and pin No. 60 is connected to AM335X_MMC_CMD pin.

[0081] In one embodiment of the present invention, the core board processor adopts the RK3288 domestic processor produced by the domestic Xinwei Company and the SOM3288 core board made by Guangzhou Chuanglong Company based on the 3288 processor to form the core board processor, which can be connected to the core board connection slot of the present invention to replace the AM3352 processor of a foreign IT company to connect the original functional pins of the baseboard.

Claims

1. A circuit switching device for a domestic chip, characterized in that: include: Circuit Boards, A core board docking end, the core board docking end is arranged on the upper layer of the circuit board, and is used to connect the core board processor. The core board docking end includes: a USB function pin end, a UART function pin end, an IIC function pin end, an SPI function pin end, an RGMII function pin end, an MMC function pin end, and a GPIO function pin end; A CN1 socket and a CN2 socket, wherein the CN1 socket and the CN2 socket are arranged on the lower layer of the circuit board, located on both sides of the core board docking end, and are used to convert the core board docking end pins into needle seat pins; The needle holder pins are arranged on the lower layer of the circuit board and are used to connect to the external base plate. The needle holder pins include: USB function pins, UART function pins, IIC function pins, SPI function pins, MII function pins, and GPIO function pins; The core board butt end is connected to the CN1 socket and the CN2 socket respectively, and the needle holder pins are connected to the CN1 socket and the CN2 socket respectively.

2. A circuit switching device for a domestically produced chip as claimed in claim 1, characterized in that: The CN1 socket is provided with pins 1 to 60; The CN2 socket is provided with pins No. 1 to No.

60.

3. A circuit switching device for a domestically produced chip as claimed in claim 2, characterized in that: The core board docking end specifically includes: USB function pin end: HOST2_DM pin end, HOST2_DP pin end, OTG_DR pin end, OTG_ID pin end, VDD_SV_SYS pin end, OTG_DM pin end, OTG_DP pin end, HOST1_DM pin end, HOST1_DP pin end; UART function pins: UART2_RXD pin, UART2_TXD pin, UART1_RXD pin, UART1_TXD pin, UART3_RXD / GPIO7_A7 pin, UART3_TXD / GPIO7_B0 pin, UART4_TXD / SPI0_TXD pin, UART4_RXD / SPIO_RXD pin, UARTO_RXD pin, UARTD_TXD pin; IIC function pin end: I2C1_SCL_Sensor pin end, I2C1_SDA_Sensor pin end; SPI function pins: SPI1_TXD / GPIO7_B7 pin, SPI1_TXD / GPIO7_B6 pin, SPI1_CSNO / GPIO7_B5 pin, SPI1_CLK / GPIO7_B4 pin, SPIO_CSN0 pin; RGMII function pins: UARTO_CTS pin, UARTO_RTS pin, MAC_MDC pin, MAC_MDIO pin, MAC_TXD1 pin, MAC_TXD0 pin, MAC_TXEN pin, MAC_RXDV pin, MAC_RXD0 pin, MAC_RXD1 pin, MAC_CLK pin; MMC function pins: SDMMC_CMD pin, SDMMC_D2 pin, SDMMC_D3 pin, SDMMC_DET pin, SDMMC_CLK pin, SDMMC_D1 pin, SDMMC_D0 pin, VDD_3V3_RTC pin; GPIO function pin ends: GPIO7_C5 pin end, UART3_CTS / GPIO7_B1 pin end, GPIO5_C1 pin end, GPIO4_D7 pin end, GPIO4_D6 pin end, SDICO_D3 / GPIO4_C7 pin end, SDICO_BKPWR / GPIO4_D5 pin end, SDICO_CLK / GPIO4_D1 pin end, SDICO_WRPRT / GPIO4_D3 pin end, SDICO_DET / GPIO4_D2 pin end, SDICO_PWR / GPIO4_D4 pin end, SDIOD_D1 / GPIO4_C5 pin end, SDIOD_D2 / GPIO4_C6 ​​pin end, SDIOD_CMD / GPIO4_D0 pin end, SDIOD_D0 / GPIO4_C4 pin end.

4. A circuit switching device for a domestically produced chip as claimed in claim 3, characterized in that: The pin No. 1 is connected to the HOST2_DM pin end, the pin No. 3 is connected to the HOST2_DP pin end, the pin No. 5 is connected to the OTG_DR pin end, the pin No. 7 is connected to the UART2_RXD pin end, the pin No. 9 is connected to the UART2_TXD pin end, the pin No. 13 is connected to the SPI1_TXD / GPIO7_B7 pin end, the pin No. 15 is connected to the SPI1_TXD / GPIO7_B6 pin end, the pin No. 19 is connected to the I2C1_SCL_Sensor pin end, the pin No. 21 is connected to the I2C1_SDA_Sensor pin end, the pin No. 25 is connected to the GPIO7_C5 pin end The pin 27 is connected to the OTG_ID pin end, the pin 29 is connected to the UART3_CTS / GPIO7_B1 pin end, the pin 31 is connected to the SPI1_CSNO / GPIO7_B5 pin end, the pin 33 is connected to the GPIO5_C1 pin end, the pin 37 is connected to the VDD_3V3_RTC pin end, the pin 39 is connected to the SPI1_CLK / GPIO7_B4 pin end, the pin 43 is connected to the UART3_RXD / GPIO7_A7 pin end, the pin 45 is connected to the UART3_TXD / GPIO7_B0 pin end, the pins 53, 55, and 57 are connected. Pin No. 5 and pin No. 59 are connected to the VDD_SV_SYS pin end, the pin No. 6 is connected to the OTG_DM pin end, the pin No. 8 is connected to the OTG_DP pin end, the pin No. 12 is connected to the HOST1_DM pin end, the pin No. 14 is connected to the HOST1_DP pin end, the pin No. 30 is connected to the UARTO_CTS pin end, the pin No. 32 is connected to the UARTO_RTS pin end, the pin No. 34 is connected to the GPIO4_D7 pin end, the pin No. 36 is connected to the GPIO4_D6 pin end, the pin No. 40 is connected to the MAC_MDC pin end, the pin No. 42 is connected to the MAC_MDIO pin end, and the pin No. 44 is connected to the UARTO_CTS pin end. The pin is connected to the MAC_TXD1 pin end, the pin No. 46 is connected to the MAC_TXD0 pin end, the pin No. 48 is connected to the MAC_TXEN pin end, the pin No. 50 is connected to the MAC_RXDV pin end, the pin No. 52 is connected to the MAC_RXD0 pin end, the pin No. 54 is connected to the MAC_RXD1 pin end, the pin No. 58 is connected to the MAC_CLK pin end, the pin No. 11, the pin No. 17, the pin No. 23, the pin No. 35, the pin No. 41, the pin No. 47, the pin No. 49, the pin No. 51, the pin No. 2, the pin No. 4, the pin No. 10, the pin No. 16, the pin No. 28, the pin No. 38, the pin No. 56, and the pin No. 60 are grounded,The pins 18, 20, 22, 24 and 26 are not connected.

5. The circuit switching device of a domestic chip as claimed in claim 3, characterized in that: The sixty-pin is connected to the SDMMC_CMD pin end, the fifty-eighth pin is connected to the SDMMC_D2 pin end, the fifty-sixth pin is connected to the SDMMC_D3 pin end, the fifty-fourth pin is connected to the SDMMC_DET pin end, the fiftyth pin is connected to the SDMMC_CLK pin end, the forty-sixth pin is connected to the SDMMC_D1 pin end, the forty-fourth pin is connected to the SDMMC_D0 pin end, the fortyth pin is connected to the SDICO_D3 / GPIO4_C7 pin end, the thirty-eighth pin is connected to the SDICO_BKPWR / GPIO4_D The 5th pin is connected to the SDICO_CLK / GPIO4_D1 pin, the 30th pin is connected to the SDICO_WRPRT / GPIO4_D3 pin, the 28th pin is connected to the SDICO_DET / GPIO4_D2 pin, the 26th pin is connected to the SDICO_PWR / GPIO4_D4 pin, the 59th pin is connected to the SPIO_CSN0 pin, the 57th pin is connected to the UARTO_RXD pin, the 55th pin is connected to the UARTD_TXD pin, the 51st pin is connected to the The 49th pin is connected to the SDIOD_D1 / GPIO4_C5 pin end, the 49th pin is connected to the SDIOD_D2 / GPIO4_C6 ​​pin end, the 47th pin is connected to the SDIOD_CMD / GPIO4_D0 pin end, the 45th pin is connected to the SDIOD_D0 / GPIO4_C4 pin end, the 41st pin is connected to the UART1_RXD pin end, the 39th pin is connected to the UART1_TXD pin end, the 35th pin is connected to the UART4_TXD / SPI0_TXD pin end, the 33rd pin is connected to the UART4_RXD / S At the PIO_RXD pin end, the fifty-two pin, forty-eight pin, forty-two pin, thirty-six pin, thirty-two pin, twenty-four pin, twenty-two pin, four pin, two pin, fifty-three pin, forty-three pin, thirty-seven pin, thirty-one pin, twenty-three pin, twenty-one pin, three pin and one pin are grounded, and the twenty pin, eighteen pin, sixteen pin, fourteen pin, twelve pin, ten pin, eight pin, six pin, nineteen pin, seventeen pin, fifteen pin, thirteen pin, eleven pin, nineteen pin, seven pin and five pin are not connected.

6. A circuit switching device for a domestically produced chip as claimed in claim 1, characterized in that: The needle holder pins specifically include: USB function pins: USB_HOST2_N pin, USB_HOST2_P pin, USB_OTG_DRV pin, USB_OTG_ID pin, VCC_5V pin, USB_OTG_DM pin, USB_OTG_DP pin, USB_HOST1_DM pin, USB_HOST1_DP pin; UART function pins: AM335X_UART0_RXD pin, AM335X_UART0_TXD pin, AM335X_UART1_TXD pin, AM335X_UART1_RXD pin, AM335X_Mil1_RXERR pin, AM335X_Mli1_CRS pin, AM335X_UART0_CTSn pin, AM335X_UART0_RTSn pin, AM335X_LCD_DATA9 pin, AM335X_LCD_DATA8 pin; IIC function pins: AM335X_UART1_RTSn pin, AM335X_UART1_CTSn pin; SPI function pins: AM335X_SPIO_D1 pin, AM335X_SPIO_D0 pin, AM335X_SPI0_CS0 pin, AM335X_SPI0_SCLK pin, AM335X_LCD_PCLK pin; MII function pins: AM335X_Mil1_MDIO_CLK pin, AM335X_Mil1_MDIO_DATA pin, AM335X_Mil1_TXD1 pin, AM335X_Mil1_TXD0 pin, AM335X_Mil1_TXEN pin, AM335X_Mil1_RXDV pin, AM335X_Mil1_RXD0 pin, AM335X_Mil1_RXD1 pin, AM335X_Mil1_TXCLK pin, AM335X_USB0_DRVVBUS pin; MMC function pins: AM335X_MMC_D0 pin, AM335X_MMC_D1 pin, AM335X_MMC_CLK pin, AM335X_MMC_D3 pin, AM335X_MMC_D2 pin, AM335X_MMC_CMD pin, AM335X_MCASP0_ACLKX pin; GPIO function pins: AM335X_GPMC_CS1n pin, AM335X_CS2n pin, AM335X_GPMC_AD10 pin, AM335X_GPMC_AD8 pin, AM335X_GPMC_AD9 pin, AM335X_GPMC_AD12 pin, AM335X_GPMC_AD11 pin, AM335X_LCD_AC_BIAS_EN pin, AM335X_MCASP0_AHCLKX pin, VBACKUP O pin, AM335X_MCASP0_FSR pin, AM335X_LCD_HSTNC pin, AM335X_LCD_VSYNC pin, AM335X_MCASP0_ACLKR pin, AM335X_MCASP0_AXR1 pin, AM335X_USB1_DRVVBUS pin, AM335X_Mil1_REFCLK pin.

7. A circuit switching device for a domestically produced chip as claimed in claim 6, characterized in that: The No. 1 pin is connected to the USB_HOST2_N pin, the No. 3 pin is connected to the USB_HOST2_P pin, the No. 5 pin is connected to the USB_OTG_DRV pin, the No. 7 pin is connected to the AM335X_UART0_RXD pin, the No. 9 pin is connected to the AM335X_UART0_TXD pin, the No. 13 pin is connected to the AM335X_SPIO_D1 pin, the No. 15 pin is connected to the AM335X_SPIO_D0 pin, and the No. 19 pin is connected to the AM335X_UART1_RT Sn pin is connected, pin 21 is connected to AM335X_UART1_CTSn pin, pin 25 is connected to AM335X_LCD_AC_BIAS_EN pin, pin 27 is connected to USB_OTG_ID pin, pin 29 is connected to AM335X_Mil1_REFCLK pin, pin 31 is connected to AM335X_SPI0_CS0 pin, pin 33 is connected to AM335X_MCASP0_AHCLKX pin, pin 37 is connected to VBACKUP O pin, pin 39 is connected to AM335X_SPI0_SCLK pin, pin 43 is connected to AM335X_LCD_DATA9 pin, pin 45 is connected to AM335X_LCD_DATA8 pin, pins 53, 55, 57 and 59 are connected to VCC_5V pin, pin 6 is connected to USB_OTG_DM pin, pin 8 is connected to USB_OTG_DP pin, pin 12 is connected to USB_HOST1_DM pin, pin 14 is connected to USB_HOST1_DP pin, pin 30 is connected to AM335X_USB0_DRVVBUS pin, pin 32 is connected to AM335X_MCASP0_FSR pin, pin 34 is connected to AM335X_GPMC_AD10 pin Pin 36 is connected to AM335X_USB1_DRVVBUS pin, pin 40 is connected to AM335X_Mil1_MDIO_CLK pin, pin 42 is connected to AM335X_Mil1_MDIO_DATA pin, pin 44 is connected to AM335X_Mil1_TXD1 pin, pin 46 is connected to AM335X_Mil1_TXD0 pin, pin 48 is connected to AM335X_Mil1_TXEN pin, pin 50 is connected to AM335X_Mil1_RXDV pin, pin 52 is connected to AM335X_Mil1_RXD0 pin, pin 54 is connected to AM335X_Mil1_RXD1 pin, and pin 58 is connected to AM335X_Mil1_TXCLK pin.

8. The circuit switching device of a domestic chip as claimed in claim 1, characterized in that: The 33rd pin of the CN2 socket is connected to the AM335X_UART0_CTSn pin, the 35th pin is connected to the AM335X_UART0_RTSn pin, the 39th pin is connected to the AM335X_Mil1_RXERR pin, the 41st pin is connected to the AM335X_Mli1_CRS pin, the 45th pin is connected to the AM335X_GPMC_CS1n pin, the 47th pin is connected to the AM335X_CS2n pin, the 49th pin is connected to the M335X_GPMC_AD8 pin, the 51st pin is connected to the AM335X_GPMC_AD9 pin, the 55th pin is connected to the AM335X_UART1_TXD pin, the 57th pin is connected to the AM335X_UART1_RXD pin, the 59th pin is connected to the AM335X_LCD_PCLK pin, the 26th pin is connected to the AM335X_LCD_HST NC pin is connected, pin 28 is connected to AM335X_LCD_VSYNC pin, pin 30 is connected to AM335X_MCASP0_ACLKR pin, pin 34 is connected to AM335X_MCASP0_AXR1 pin, pin 38 is connected to AM335X_GPMC_AD12 pin, pin 40 is connected to AM335X_GPMC_AD11 pin, pin 44 is connected to AM335X_MMC_D0 pin, pin 46 is connected to AM335X_MMC_D1 pin, pin 50 is connected to AM335X_MMC_CLK pin, pin 54 is connected to AM335X_MCASP0_ACLKX pin, pin 56 is connected to AM335X_MMC_D3 pin, pin 58 is connected to AM335X_MMC_D2 pin, and pin 60 is connected to AM335X_MMC_CMD pin.

Citation Information

Patent Citations

  • Circuit switching device of domesticated chip

    CN210897907U