A voltage output anti-reverse connection circuit
By designing a voltage output anti-reverse circuit including MOS tube, transistor and resistor in electric vehicle power supply, the problems of high cost and high temperature difference are solved in the traditional solution, the simple structure and rapid response current protection are achieved, and the improvement of Safety performance of electric vehicles.
Patent Information
- Application Number
- CN202010048992.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-01-16
- Publication Date
- 2024-12-31
- Estimated Expiration
- 2040-01-16
AI Technical Summary
The relay scheme used in traditional automotive power supplies to prevent the positive and negative termination of batteries is expensive and not resistant to high temperatures, and cannot meet the safety requirements of high current output.
A voltage output anti-reverse circuit is designed, including MOS tubes, transistors, resistors and diodes. Through the cooperation of MOS tubes and transistors, sampling and overcurrent protection of charging current is achieved, ensuring that the circuit is quickly cut off in the reverse state.
It realizes a simple structure and low-cost anti-reverse connection function, which can quickly detect and prevent battery explosion, provide current limiting and overcurrent protection, and improves the safety performance of electric vehicles.
Smart Images
Figure CN111071049B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of charging, and in particular to a voltage output reverse connection prevention circuit. Background Art
[0002] With the gradual popularization of electric vehicles, the safety performance of high-current car charging power supplies used in cars has also received widespread attention. Among the safety performance of electric vehicles, the most critical is the safety performance of the fuel cell. The car power supply is directly connected to the fuel cell. If the positive and negative terminals of the car power supply are connected in reverse, there will be a risk of battery explosion. In electric vehicles, the cable assembly is complicated, and the positive and negative terminals of the battery are connected in reverse during the assembly and maintenance process. This will directly cause power damage and may also cause battery explosion. Therefore, an anti-reverse connection circuit is added to the car power supply to improve the safety performance of electric vehicles.
[0003] At present, the traditional solution generally uses a relay connected in series at the output end, with a control circuit detecting the voltage at the output end and then controlling the switch of the relay. Since the output current of the automotive power supply is above 100A, even if the relay can meet the requirements, it is resistant to high temperature difference and the cost is very high. Therefore, a new output reverse connection protection solution with high reliability, simple circuit and low cost is needed. Summary of the invention
[0004] The technical problem to be solved by the present invention is to provide a voltage output reverse connection protection circuit, which can realize the reverse connection protection function. At the same time, the second resistor R2 samples the charger output current, which can control the output charging current of the charger and realize overcurrent protection.
[0005] In order to solve the above technical problems, the present invention provides a voltage output reverse connection protection circuit, including a MOS tube Q1, a transistor Q2, a first resistor R1, a first diode D1, a second diode D2 and a second resistor R2;
[0006] The source of the MOS transistor Q1 is connected to the output signal Vout of the transformer, and the drain of the MOS transistor Q1 is connected to the positive output terminal;
[0007] The base of the transistor Q2 is connected to the enable output signal, the collector of the transistor Q2 is connected to the gate of the MOS transistor Q1, and the emitter of the transistor Q2 is grounded;
[0008] A first end of the first resistor R1 is connected to the forward output end, a second end of the first resistor R1 is connected to the cathode of the first diode D1, and both the anode of the first diode D1 and the cathode of the second diode D2 are connected to the base of the transistor Q2;
[0009] The anode of the second diode D2 and the first end of the second resistor R2 are both connected to the emitter of the transistor Q2, and the second end of the second resistor R2 is connected to the negative output end.
[0010] Preferably, a third resistor R3 is further included, and the third resistor R3 is connected in parallel with the second resistor R2.
[0011] Preferably, a fourth resistor R4 is further included, one end of the fourth resistor R4 is connected to the source of the MOS tube Q1 , and the other end of the fourth resistor R4 is connected to the collector of the transistor Q2 .
[0012] Preferably, a third diode D3 is further included, wherein an anode of the third diode D3 is connected to the gate of the MOS transistor Q1 , and a cathode of the third diode D3 is connected to the source of the MOS transistor Q1 .
[0013] Preferably, a fifth resistor R5 is further included, and the fifth resistor R5 is connected in parallel with the third diode D3.
[0014] Preferably, the third diode D3 is a voltage regulator diode.
[0015] Preferably, a sixth resistor R6 is connected between the base of the transistor Q2 and the enable output signal.
[0016] Preferably, a seventh resistor R7 is further included, and the seventh resistor R7 is connected in parallel with the second diode D2.
[0017] Beneficial effects of the present invention:
[0018] 1. The circuit design of the present invention is flexible and simple in structure, and the anti-reverse function can be realized by using only two diodes D1 and D2 and a second resistor R1.
[0019] 2. The second resistor R2 in the present invention can effectively detect the output current of the charger during normal charging, and perform current limiting and overcurrent protection on the charger or battery.
[0020] 3. In the reverse connection state, that is, the positive output end is connected to the negative pole of the rechargeable battery, and the negative output end is connected to the positive end of the rechargeable battery, the MOS tube will be forced to enter the cut-off state, with fast response speed and low cost. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] Figure 1 It is a structural schematic diagram of the anti-reverse connection circuit of the present invention;
[0022] Figure 2 To prevent the reverse connection circuit from being in reverse connection Figure 1 ;
[0023] Figure 3To prevent the reverse connection circuit from being in reverse connection Figure 2 . DETAILED DESCRIPTION
[0024] The present invention is further described below in conjunction with the accompanying drawings and specific embodiments so that those skilled in the art can better understand the present invention and implement it, but the embodiments are not intended to limit the present invention.
[0025] Reference Figure 1 As shown, the present invention discloses a voltage output anti-reverse connection circuit, including a MOS tube Q1, a transistor Q2, a first resistor R1, a first diode D1, a second diode D2 and a second resistor R2. The source of the MOS tube Q1 is connected to the output signal Vout of the transformer, and the drain of the MOS tube Q1 is connected to the positive output terminal BATTERY+. The base of the transistor Q2 is connected to the enable output signal MCU_CONTROL, the collector of the transistor Q2 is connected to the gate of the MOS tube Q1, and the emitter of the transistor Q2 is grounded. The first end of the first resistor R1 is connected to the positive output terminal BATTERY+, the second end of the first resistor R1 is connected to the negative electrode of the first diode D1, and the positive electrode of the first diode D1 and the negative electrode of the second diode D2 are both connected to the base of the transistor Q2. The positive electrode of the second diode D2 and the first end of the second resistor R2 are both connected to the emitter of the transistor Q2, and the second end of the second resistor R2 is connected to the negative output terminal BATTERY-. BATTERY+ and BATTERY- are energy storage load signals such as low-voltage batteries or supercapacitors.
[0026] When the energy storage load is connected normally, the positive output terminal BATTERY+ is connected to the positive electrode of the battery, and the negative output terminal BATTERY- is connected to the negative electrode of the battery. The enable output signal MCU_CONTROL is controlled by the microcontroller. When it works normally, the MCU outputs a high level, and the transistor Q2 is turned on. At this time, the gate-source voltage of the MOS tube Q1 is negative (greater than the MOS turn-on threshold), and its source and drain are turned on. In this way, Vout charges BATTERY+ and BATTERY- through the MOS tube Q1. Figure 1 As shown, normal charging is achieved.
[0027] like Figure 2As shown, when the positive and negative poles of the load battery or supercapacitor are connected in reverse, that is, the positive output terminal BATTERY- is connected to the positive pole of the battery, and the negative output terminal BATTERY+ is connected to the negative pole of the battery. At this time, the load battery or supercapacitor is short-circuited through the current of the second resistor R2, and the second resistor R2 is a sampling resistor. At the same time, D2 is forward biased and turned on, and the conduction voltage drop is 0.7V, that is, the Vbe of the transistor Q2 is -0.7V, and the emitter of the transistor is forced to be reverse biased. At this time, regardless of whether the microcontroller outputs a high level or not, the MOS tube Q1 will be forced to enter the cut-off state. Therefore, the MOS tube Q1 in the main circuit is quickly turned off. At this time, the VOUT inside the charger is physically disconnected from the battery, thereby protecting the charger and the battery itself, such as Figure 3 shown.
[0028] The MOS tube is a P-channel MOSFET.
[0029] The present invention further includes a third resistor R3, which is connected in parallel with the second resistor R2. The third resistor R3 and the second resistor R2 are connected in parallel to facilitate adjusting the size of the sampling resistor, thereby more flexibly controlling the output current of the charger and the size of the sampled output current.
[0030] The present invention further includes a fourth resistor R4, one end of which is connected to the source of the MOS transistor Q1, and the other end of which is connected to the collector of the transistor Q2. The fourth resistor R4 is a voltage dividing resistor.
[0031] The present invention further includes a third diode D3, the anode of the third diode D3 is connected to the gate of the MOS tube Q1, and the cathode of the third diode D3 is connected to the source of the MOS tube Q1. The present invention further includes a fifth resistor R5, which is connected in parallel with the third diode D3. When the transistor Q2 is turned on, the fifth resistor R5 and the fourth resistor R4 form a voltage divider of Vout, and the gate drive voltage of the MOS tube Q1 is controlled within a reasonable range. The third diode D3 connected in parallel is a voltage stabilizing diode, which protects the gate of the MOS tube Q1, thereby enhancing the reliability of the MOS tube Q1 during the charging process.
[0032] A sixth resistor R6 is connected between the base of the transistor Q2 and the enable output signal, so as to facilitate adjusting the magnitude of the base current of the transistor Q2.
[0033] The present invention further includes a seventh resistor R7, which is connected in parallel with the second diode D2. R7 serves as a pull-down resistor for the base of the transistor Q2, and its function is to prevent the transistor Q2 from being mis-turned on when the MCU does not give the transistor Q2 a turn-on signal.
[0034] The above-described embodiments are only preferred embodiments for fully illustrating the present invention, and the protection scope of the present invention is not limited thereto. Equivalent substitutions or changes made by those skilled in the art based on the present invention are within the protection scope of the present invention. The protection scope of the present invention shall be subject to the claims.
Claims
1. A voltage output anti-reverse connection circuit, characterized in that: It includes a MOS tube Q1, a triode Q2, a first resistor R1, a first diode D1, a second diode D2 and a second resistor R2; The source of the MOS transistor Q1 is connected to the output signal Vout of the transformer, and the drain of the MOS transistor Q1 is connected to the positive output terminal; The base of the transistor Q2 is connected to the enable output signal, the collector of the transistor Q2 is connected to the gate of the MOS transistor Q1, and the emitter of the transistor Q2 is grounded; A first end of the first resistor R1 is connected to the forward output end, a second end of the first resistor R1 is connected to the cathode of the first diode D1, and both the anode of the first diode D1 and the cathode of the second diode D2 are connected to the base of the transistor Q2; The anode of the second diode D2 and the first end of the second resistor R2 are both connected to the emitter of the transistor Q2, and the second end of the second resistor R2 is connected to the negative output end; It also includes a third resistor R3, wherein the third resistor R3 is connected in parallel with the second resistor R2; The device further comprises a fourth resistor R4 , one end of which is connected to the source of the MOS transistor Q1 , and the other end of which is connected to the collector of the transistor Q2 .
2. The voltage output anti-reverse connection circuit according to claim 1, characterized in that: The device further comprises a third diode D3 , wherein an anode of the third diode D3 is connected to the gate of the MOS transistor Q1 , and a cathode of the third diode D3 is connected to the source of the MOS transistor Q1 .
3. The voltage output anti-reverse connection circuit according to claim 2, characterized in that: The device further includes a fifth resistor R5 , which is connected in parallel with the third diode D3 .
4. The voltage output anti-reverse connection circuit according to claim 2, characterized in that: The third diode D3 is a voltage stabilizing diode.
5. The voltage output anti-reverse connection circuit according to claim 1, characterized in that: A sixth resistor R6 is connected between the base of the transistor Q2 and the enable output signal.
6. The voltage output anti-reverse connection circuit according to claim 1, characterized in that: The device further includes a seventh resistor R7 , which is connected in parallel with the second diode D2 .