Adaptive storage device supporting multiple protocols

Abstract

The storage device includes a memory device and a controller. The controller includes a programmable logic device, which is reconfigurable based on a request received from outside the storage device to adaptively support multiple protocols according to the request. When the programmable logic device is programmed to support a first protocol among the multiple protocols based on a first request received from outside the storage device, the programmable logic device processes the first request according to the first protocol, and the controller communicates with the memory device based on the first request, so that the memory device stores or outputs data corresponding to the first request.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority of Korean Patent Application No. 10-2018-0134232 filed on November 5, 2018 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] The present disclosure relates to an electronic device, and more particularly, to a configuration and operation of a storage device that stores or outputs data according to a protocol. Background Art

[0004] Nowadays, various types of electronic devices are being used. An electronic device performs its own functions according to the operation of various electronic circuits and devices included in the electronic device. An electronic device can provide services to a user when operating alone or when communicating with another electronic device.

[0005] The storage device is an example of an electronic device. The storage device is configured to store data in a memory device included in the storage device or output the stored data, thereby providing storage services to the user. To this end, the storage device communicates with the host according to the protocol adopted by the storage device.

[0006] A protocol is a communication rule that defines the order of transmitting signals, a signal processing scheme, a data format, an authentication scheme, and / or an error handling scheme, etc. Most electronic devices including storage devices operate while transmitting and receiving data to and from another electronic device in accordance with a given protocol. As protocols have been developed to quickly transmit large amounts of data and reduce data errors, the types and kinds of protocols have become diversified. Summary of the invention

[0007] Example embodiments may provide an electronic device (eg, a storage device) that adaptively supports a plurality of protocols according to a request received from outside the electronic device. The electronic device may include a programmable logic device that is reconfigurable to adaptively support a plurality of protocols.

[0008] In some example embodiments, a storage device may include a memory device and a controller. The controller may include a programmable logic device that is reconfigurable based on a request received from outside the storage device to adaptively support multiple protocols according to the request. When the programmable logic device is programmed to support a first protocol among the multiple protocols based on a first request received from outside the storage device for the first protocol, the programmable logic device may process the first request according to the first protocol, and the controller may communicate with the memory device based on the first request so that the memory device stores or outputs data corresponding to the first request.

[0009] According to the example embodiment, the electronic device (e.g., storage device) can adaptively support the protocol regardless of the type or kind of the protocol, and the applicability of the electronic device can be improved. In addition, no additional resources may be required to support multiple protocols, so the example embodiment may be advantageous in terms of cost and circuit area. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The above and other objects and features of the present disclosure will become apparent by describing in detail example embodiments of the present disclosure with reference to the attached drawings.

[0011] Figure 1 is a block diagram illustrating an example configuration of an electronic system according to some example embodiments.

[0012] Figure 2 is a block diagram illustrating an example configuration of a network system according to some example embodiments.

[0013] Figure 3 is shown with Figure 1 or Figure 2 A block diagram of an example configuration associated with a storage device.

[0014] Figure 4 is shown with Figure 3 A block diagram of an example configuration associated with a controller.

[0015] Figure 5 and Figure 6 Is a description Figure 4 A flowchart of an example operation of a controller.

[0016] Figure 7 Is used to describe Figure 4 A conceptual diagram of an example operation of a protocol manager.

[0017] Figures 8 to 12 It is used to describe Figure 4 The controller Figure 3 A conceptual diagram of an example operation of a storage device.

[0018] Fig.13 Is used to describe Figure 4 Table of example operations for the protocol manager.

[0019] Fig.14 is shown with Figure 3 A block diagram of an example configuration associated with a controller.

[0020] Fig.15 Is a description Fig.14 A flowchart of an example operation of a controller.

[0021] FIG. 16A to FIG. 16C Is used to describe Fig.14 A conceptual diagram of an example operation of a controller.

[0022] Fig.17 is shown with Figure 3 A block diagram of example operations associated with a controller.

[0023] Fig.18 and Fig.19 It is shown Figure 1 or Figure 2 A block diagram of an example configuration of a storage device.

[0024] Fig. 20 is shown with Fig.19 A block diagram of an example configuration associated with a controller.

[0025] Fig.21 Is a description Fig.19 A flowchart of an example operation of a controller.

[0026] Fig. 22 is shown with Fig.19 A block diagram of an example configuration associated with a controller.

[0027] Fig.23 is shown with Figure 1 or Figure 2 A block diagram of an example configuration associated with a storage device.

[0028] Fig.24 is shown with Fig.23 A block diagram of an example configuration associated with a controller.

[0029] Fig.25 is shown with Figure 1 or Figure 2 A block diagram of an example configuration associated with a storage device.

[0030] Fig.26 is shown with Fig.25 A block diagram of an example configuration associated with a controller.

[0031] Fig. 27 and Fig.28 is shown with Figure 1 or Figure 2 A block diagram of an associated example configuration. DETAILED DESCRIPTION

[0032] Hereinafter, some example embodiments will be described in detail and clearly with reference to the accompanying drawings so that those skilled in the art can easily realize the present disclosure.

[0033] Figure 1 is a block diagram illustrating an example configuration of an electronic system 1000 according to some example embodiments.

[0034] The electronic system 1000 may include a main processor 1101, a working memory 1200, a storage device 1300, a communication block 1400, a user interface 1500, and a bus 1900. For example, the electronic system 1000 may be one of the electronic devices such as a desktop computer, a laptop computer, a tablet computer, a smart phone, a wearable device, a video game console, one or more servers, an electric vehicle, a home appliance, and / or a medical device.

[0035] The main processor 1101 may control the overall operation of the electronic system 1000. For example, the main processor 1101 may be implemented in a general-purpose processor including one or more processor cores, a dedicated processor, or an application processor.

[0036] The working memory 1200 may store data used in the operation of the electronic system 1000 (e.g., data processed or to be processed by the main processor 1101). For example, the working memory 1200 may include a volatile memory (such as a static random access memory (SRAM), a dynamic RAM (DRAM), or a synchronous DRAM (SDRAM)), and / or a nonvolatile memory (such as a phase change RAM (PRAM), a magnetoresistive RAM (MRAM), a resistive RAM (ReRAM), or a ferroelectric RAM (FRAM)).

[0037] The storage device 1300 can retain data regardless of whether power is supplied. For example, the storage device 1300 may include a nonvolatile memory such as a flash memory, a PRAM, an MRAM, a ReRAM, or a FRAM, and may be implemented in a storage medium such as a solid state drive (SSD), a card storage device, or an embedded storage device.

[0038] The communication block 1400 may communicate with the outside of the electronic system 1000. The user interface 1500 may arbitrate communication between the user and the electronic system 1000.

[0039] The bus 1900 may provide a communication path between components of the electronic system 1000. The components of the electronic system 1000 may exchange data with each other according to the bus format of the bus 1900. For example, the bus format may include one or more of various interface protocols such as: Universal Serial Bus (USB), Firewire, Small Computer System Interface (SCSI), Peripheral Component Interconnect Express (PCIe), Mobile PCIe (M-PCIe), Serial Advanced Technology Attachment (SATA), Serial Attached SCSI (SAS), Non-Volatile Memory Express (NVMe), Universal Flash Memory (UFS), Double Data Rate (DDR), and / or Low Power DDR (LPDDR), etc.

[0040] The storage device 1300 may provide storage services to the host in response to a command or request received from the host through the bus 1900. In the present disclosure, an object of the electronic system 1000 that can access a component such as the storage device 1300 may be referred to as a "host."

[0041] For example, the main processor 1101 may communicate with the storage device 1300 through the bus 1900, and the storage device 1300 may provide storage services to the main processor 1101. The main processor 1101 may be an example of an object that may operate as a host, but another device such as the communication block 1400, the user interface 1500, a graphics processing unit (GPU), or an image sensor may also operate as a host.

[0042] For example, the host may provide a command including a write request and data including write data to the storage device 1300. The storage device 1300 may store the requested write data in response to the write request. For example, the host may provide a command including a read request to the storage device 1300. The storage device 1300 may output the requested read data to the host in response to the read request.

[0043] The storage device 1300 may include at least one memory device 1310 and a controller 1330 to provide storage services. The memory device 1310 may store or output data requested by a host.

[0044] The controller 1330 may control the overall operation of the storage device 1300. The controller 1330 may control the memory device 1310 so that the memory device 1310 stores or outputs data. The controller 1330 may appropriately process data communicated with the host (e.g., a request received from the host) according to a given protocol. The controller 1330 may include one or more hardware components (e.g., analog circuits and / or logic circuits) configured to perform the operations described in the present disclosure.

[0045] In some example embodiments, the controller 1330 may include one or more processor cores. The operations of the controller 1330 described in the present disclosure may be implemented using a program code of software and / or firmware, and the processor core of the controller 1330 may execute an instruction set of the program code. The processor core of the controller 1330 may process various arithmetic / logic operations to execute the instruction set.

[0046] Figure 2 is a block diagram illustrating an example configuration of a network system 2000 according to some example embodiments.

[0047] The network system 2000 may include a host 2100 and a storage device 2300. The storage device 2300 may be connected to the host 2100 through a network 2005. Figure 2 , and one or more additional components may be connected to the host 2100 and / or the storage device 2300 via the network 2005.

[0048] The host 2100 may be an object capable of accessing components of the network system 2000 (such as the storage device 2300). For example, the host 2100 may be an operation processing device itself (for example, such as Figure 1 The storage device 2300 may be a device including a main processor 1101 of the storage device 2301, or may be a computing device or system including an operation processing device. Figure 1 The storage device 1300 corresponds to the storage device 1300 and can provide storage services to the host 2100.

[0049] The network 2005 may provide short-range or long-range communication paths between components of the network system 2000 (e.g., the host 2100 and the storage device 2300) in accordance with at least one of various wired protocols (e.g., Ethernet, USB, Firewire, PCIe, NVMe, SATA, and SAS) and / or various wireless protocols (e.g., Long Term Evolution (LTE), Global System for Mobile Communications (GSM), Worldwide Interoperability for Microwave Access (WIMAX), Ultra-Wideband (UWB), Wireless Fidelity (Wi-Fi), Near Field Communication (NFC), and Bluetooth).

[0050] For example, the network system 2000 may constitute one of electronic systems such as a server, a data center, a distributed computing system, and a cloud storage. Alternatively, the network system 2000 may be implemented in a single electronic device. The present disclosure is not limited to these examples, and various changes or modifications may be made to the network system 2000 to include components connected via the network 2005.

[0051] As reference Figure 1 and Figure 2As described above, there are various protocols that can be used to facilitate communication between components of the electronic system 1000 and the network system 2000. Each component or device can operate in accordance with the protocol adopted by the component or device, and to this end may include hardware resources configured to perform processing procedures defined by the protocol (e.g., analog circuits at the physical layer, logic circuits at the logic layer, and processors that process the application layer).

[0052] However, due to limitations on hardware resources such as cost and circuit area, it may be difficult for a single electronic device to support all types of protocols. For this reason, some electronic devices may only operate in accordance with the adopted protocols and may not support protocols that are not adopted by the electronic device. As the types and categories of protocols develop and evolve in a variety of ways, the applicability of electronic devices that do not support various protocols may decrease.

[0053] The example embodiments of the present disclosure may provide an electronic device that adaptively supports multiple protocols according to a request received from outside the electronic device. For example, the storage device 1300 or 2300 according to the example embodiments may be configured to adaptively support a protocol suitable for processing data communicated with a host. Therefore, the storage device 1300 or 2300 may appropriately communicate with the host regardless of the type of protocol required by the host, thereby improving the applicability of the storage device 1300 or 2300.

[0054] Will refer to Figures 3 to 28 An example embodiment associated with the storage device 1300 or 2300 is described. However, the present disclosure is not limited thereto and can be applied to any type of device. For example, the example embodiment can be used for the working memory 1200, the main processor 1101, and the host 2100. The following description is provided to facilitate a better understanding and is not intended to limit the present disclosure.

[0055] Figure 3 is shown with Figure 1 The storage device 1300 or Figure 2 In some example embodiments, Figure 1 The storage device 1300 or Figure 2 The storage device 2300 may include Figure 3 Storage device 3000.

[0056] The storage device 3000 may provide storage services to the host 100. The host 100 may be an object that can access the storage device 3000 from the outside of the storage device 3000. The storage device 3000 may include at least one memory device 3100 and a controller 3300. The controller 3300 may include a host interface circuit 3310, a protocol adaptation engine 3320, and a memory interface circuit 3390.

[0057] The host interface circuit 3310 may facilitate communication with the outside of the memory device 3000 (e.g., communication with the host 100). The host interface circuit 3310 may correspond to a physical layer including analog circuits such as a transmitter / receiver, an equalizer, a clock and data recovery (CDR) circuit, and a modulator / demodulator. The memory interface circuit 3390 may provide the memory device 3100 with data to be stored in the memory device 3100, and may receive data output from the memory device 3100.

[0058] The protocol adaptation engine 3320 may correspond to a logic layer between the host interface circuit 3310 and the memory interface circuit 3390. The protocol adaptation engine 3320 may perform logic operations to convert the output of the host interface circuit 3310 into a format required by the memory interface circuit 3390 and convert the output of the memory interface circuit 3390 into a format required by the host interface circuit 3310.

[0059] The protocol adaptation engine 3320 may be employed to adaptively support multiple protocols according to a request received from the host 100. For example, when the host interface circuit 3310 receives a first request according to a first protocol, the protocol adaptation engine 3320 may perform a logic operation associated with the first protocol.

[0060] On the other hand, when the host interface circuit 3310 receives a second request in accordance with a second protocol different from the first protocol, the protocol adaptation engine 3320 may perform a logic operation associated with the second protocol. In other words, the protocol adaptation engine 3320 may adaptively support a protocol in response to the type or kind of protocol required by the host 100.

[0061] Even if a new protocol is proposed or an existing protocol needs to be modified, the protocol adaptation engine 3320 can actively support the new protocol or the modified protocol. Therefore, the storage device 3000 can communicate with any host, and the applicability of the storage device 3000 can be improved.

[0062] In addition, multiple protocols may be supported only by the protocol adaptation engine 3320, and no additional hardware resources may be required to support the various protocols. For example, the controller 3300 may support both the first protocol and the second protocol by using only the protocol adaptation engine 3320, without including a logic circuit that performs logic operations associated with the first protocol and a separate logic circuit that performs logic operations associated with the second protocol. Therefore, employing the protocol adaptation engine 3320 may be advantageous in terms of cost and circuit area.

[0063] Figure 4 is shown with Figure 33300 is a block diagram of an example configuration associated with the controller 3300. In some example embodiments, Figure 3 The controller 3300 may include Figure 4 Controller 3300a.

[0064] Figure 3 The protocol adaptation engine 3320 may include Figure 4 In some example embodiments, the protocol adaptation engine 3320a may include a protocol manager 3321 and a programmable logic device (PLD) 3322.

[0065] The host interface circuit 3310 may receive a signal SIN from the host 100. For example, the host 100 may send the signal SIN to the storage device 3000 to provide the storage device 3000 with a request, response, and / or data expected by the host 100. The signal SIN may be received for a protocol required by the host 100.

[0066] The host interface circuit 3310 may output a packet DIN that may be processed by the protocol adaptation engine 3320a based on the signal SIN. The packet DIN may be obtained based on the signal SIN and may include a request, response and / or data expected by the host 100. The packet DIN may be provided to the protocol manager 3321 and the programmable logic device 3322.

[0067] Here, the term "packet" is provided for better understanding and is not intended to limit the form of the packet DIN. The packet DIN can be variously changed or modified to have a data packet, data, symbol, voltage level and / or bit value, etc., to indicate the request, response and / or data expected by the host 100.

[0068] The protocol manager 3321 may determine a protocol corresponding to a request (e.g., a request included in the packet DIN corresponding to the signal SIN) received from the outside of the storage device 3000 (e.g., from the host 100) based on the packet DIN. The protocol may be determined with reference to the packet DIN, which will refer to Figure 7 Give a description.

[0069] The programmable logic device 3322 can be reconfigured to adaptively support multiple protocols. For example, the programmable logic device 3322 can be implemented in a device (e.g., a complex programmable logic device (CPLD), a field programmable gate array (FPGA), and / or an embedded FPGA (eFPGA), etc.) that can be flexibly programmed according to an image file or external control.

[0070] For example, the programmable logic device 3322 may be programmed to a first state based on the first configuration data (or the first image file). In the first state, the programmable logic device 3322 may perform logic operations for supporting a first protocol. For example, when the programmable logic device 3322 is implemented in an FPGA, programming the programmable logic device 3322 may mean properly arranging and connecting logic gates and lookup tables of the FPGA so that the FPGA generates an expected output based on a specific input.

[0071] For example, the programmable logic device 3322 may be programmed to a second state based on the second configuration data (or the second image file). In the second state, the programmable logic device 3322 may perform logic operations for supporting a second protocol different from the first protocol.

[0072] The programmable logic device 3322 can be reconfigured from the first state to the second state or from the second state to the first state. Therefore, the programmable logic device 3322 can support both the first protocol and the second protocol.

[0073] The protocol manager 3321 may directly or indirectly control the programming of the programmable logic device 3322 so that the programmable logic device 3322 is programmed to a state for supporting the protocol determined by the protocol manager 3321. For example, when it is determined that the first protocol is required, the protocol manager 3321 may control the programming of the programmable logic device 3322 to the first state.

[0074] Therefore, it can be understood that the programmable logic device 3322 is programmed or reconfigured to support the expected protocol based on the request of the host 100 (for example, based on the signal SIN or the packet DIN) under the control of the protocol manager 3321. Since the programmable logic device 3322 is reconfigurable, the programmable logic device 3322 can adaptively support multiple protocols according to the request received from outside the storage device 3000.

[0075] The programmable logic device 3322 may perform a logic operation on the packet DIN. The logic operation may be performed according to a protocol supported by the programming state of the programmable logic device 3322. Therefore, the programmable logic device 3322 may process a request of the host 100 according to a protocol corresponding to the programming state among a plurality of protocols.

[0076] When the programmable logic device 3322 is used, the controller 3300a can operate according to various protocols based on the request of the host 100 (for example, can process the request of the host 100). The controller 3300a can communicate with the memory device 3100 through the memory interface circuit 3390 based on the request of the host 100, so that the memory device 3100 stores or outputs data corresponding to the request of the host 100.

[0077] In some example embodiments, the protocol manager 3321 may be implemented in a hardware circuit (eg, a logic circuit) capable of performing logic operations based on the packet DIN to determine a suitable protocol and control programming of the programmable logic device 3322 .

[0078] In some example embodiments, all or some of the logical operations of the protocol manager 3321 may be implemented in a program code of software or firmware and may be executed by a processor core included in the controller 3300a. The hardware circuit of the protocol manager 3321 and the processor of the controller 3300a may be understood as an operating circuit configured to perform logical operations.

[0079] Figure 5 Is a description Figure 4 Flowchart of example operations of controller 3300a.

[0080] When power is supplied to the storage device 3000, the controller 3300a may start operating (power on) based on the power (S110). Alternatively, when the controller 3300a has been reset (e.g., when power has been turned off and then on) to resolve an error or malfunction or to protect the device, power may be supplied (powered on) to the controller 3300a continuously.

[0081] When power to the programmable logic device 3322 is interrupted, the existing programming state of the programmable logic device 3322 may be lost. In response to power-on of the controller 3300a, the operating circuit (e.g., the protocol manager 3321) may trigger initialization of the programmable logic device 3322 (S120). In response to the triggering, the programmable logic device 3322 may be programmed to a default state or may enter an initial state (S130).

[0082] For example, a reset signal (e.g., a power-on reset (POR) signal after power supply starts or is restored, a controller reset signal after an error or failure occurs, etc.) can be used to trigger a default state or an initial state of the programmable logic device 3322. The protocol manager 3321 can control the initialization of the programmable logic device 3322 based on the reset signal. However, the initialization of the programmable logic device 3322 can be triggered based on another signal, but the present disclosure is not limited to this example.

[0083] Figure 6 Is a description Figure 4 Flowchart of example operations of controller 3300a.

[0084] The controller 3300a may receive a request according to a desired protocol among multiple protocols (eg, a request included in a packet DIN corresponding to a signal SIN) from the host 100 through the host interface circuit 3310 (S210). The protocol manager 3321 may determine a protocol corresponding to the received request based on the packet DIN (S220).

[0085] When the determined protocol is not supported (No of S230), the controller 3300a may output an error report (S235) to the host 100. When the programmable logic device 3322 may support the determined protocol (Yes of S230), the protocol manager 3321 may determine whether the current programming state of the programmable logic device 3322 corresponds to the determined protocol or may determine whether the protocol needs to be changed (S240).

[0086] When the protocol does not need to be changed (No in S240), the controller 3300a can continue to communicate with the host 100 (S245) based on the current programming state of the programmable logic device 3322. When the protocol needs to be changed (Yes in S240), the programmable logic device 3322 can obtain configuration data under the control of the protocol manager 3321 (S250).

[0087] The programmable logic device 3322 may be reconfigured from a current programming state to a new state corresponding to the determined protocol based on the configuration data (S260). When the programmable logic device 3322 is programmed to the new state, the programmable logic device 3322 may support the determined protocol.

[0088] For example, when a first request is received for a first protocol, the programmable logic device 3322 may be programmed to a first state for supporting the first protocol based on the first request. After the programmable logic device 3322 is programmed to the first state, a second request may be received from the host 100 for a second protocol different from the first protocol. The protocol manager 3321 may control the programming of the programmable logic device 3322 based on the second request so that the programmable logic device 3322 is programmed to a second state for supporting the second protocol. Thus, the programmable logic device 3322 may be reconfigured from the first state to the second state.

[0089] Thus, when the protocol corresponding to the request received from the host 100 changes, the programmable logic device 3322 may be reconfigured to support the changed protocol. However, example embodiments may not require additional hardware resources to support the changed protocol. Figure 8 and Fig.12 Describes the process of obtaining configuration data and performing reconfiguration.

[0090] In some example embodiments, the reconfiguration of the programmable logic device 3322 may be performed partially on a portion of the settings of the programmable logic device 3322 (e.g., the arrangement and connection of the logic gates and LUTs of the FPGA). The programmable logic device 3322 may perform reconfiguration only on some of the settings that need to be reprogrammed. In this example embodiment, the time taken to perform the reconfiguration may be shortened.

[0091] For example, the settings of the programmable logic device 3322 in the second state may include a first setting and a second setting, wherein the first setting may be the same as the respective settings of the programmable logic device 3322 in the first state, and the second setting may be different from the respective settings of the programmable logic device 3322 in the first state. The first setting after reconfiguration may be the same as the first setting before reconfiguration, and the second setting after reconfiguration may be different from the second setting before reconfiguration. In this case, during reconfiguration, the first setting may not need to be reprogrammed, and the second setting may need to be reprogrammed. For example, reconfiguration from the first state to the second state may be performed only on the second setting without changing the first setting (partial reconfiguration).

[0092] When the programmable logic device 3322 is programmed to a new state (reconfiguration), the programmable logic device 3322 may not process a request from the host 100. Therefore, in some cases, after the reconfiguration is completed, data synchronization may be required to process a request or packet DIN from the host 100 (Yes in S270), and data synchronization may be performed to process a request or packet DIN from the host 100 at an appropriate timing (S275).

[0093] When data synchronization is not required (No of S270) or after data synchronization is completed, the controller 3300a may communicate with the host 100 based on the reconfigured new state of the programmable logic device 3322 (S280). The controller 3300a may control the memory device 3100 so that the memory device 3100 stores or outputs data corresponding to the request received for the changed protocol.

[0094] Figure 7 Is used to describe Figure 4 A conceptual diagram of example operations of the protocol manager 3321.

[0095] For example, the packet DIN may have a packet form including a header, data, and a trailer. For example, the header of the packet DIN may include a field FD including various information. However, it can be easily understood that various changes or modifications may be made to the form of the packet DIN without limitation. Figure 7 .

[0096] For each protocol, the attributes of the field FD (such as configuration, arrangement, and information) may be different. For example, the attributes of the field FD associated with the first protocol may be different from the attributes of the field FD associated with the second protocol. The protocol manager 3321 may refer to the attributes of the field FD to determine the protocol corresponding to the packet DIN.

[0097] In some examples, the field FD may include a protocol information field PN indicating a protocol corresponding to the packet DIN. In this case, the protocol manager 3321 may refer to the protocol information field PN to determine the protocol corresponding to the packet DIN. However, the determination of the protocol is not limited thereto, and various changes or modifications may be made to adaptively support the protocol corresponding to the packet DIN.

[0098] Figure 8 It is used to describe Figure 4 Controller 3300a Figure 3 A conceptual diagram of an example operation of a storage device 3000.

[0099] The protocol manager 3321 may receive a packet DIN from the host interface circuit 3310 (operation

[01] ). In some example embodiments, whenever a packet DIN is received, the protocol manager 3321 may determine a protocol corresponding to a request received from the host 100. The protocol manager 3321 may determine that the programmable logic device 3322 needs to be programmed to a new state for supporting the determined protocol.

[0100] In some example embodiments, the memory device 3100 may store configuration data CD1 and CD2. The protocol manager 3321 may output a control signal (eg, load) so that configuration data for programming the programmable logic device 3322 to a state for supporting a determined protocol is output from the memory device 3100 (operation

[02] ).

[0101] The output configuration data may be loaded onto the programmable logic device 3322 via the protocol manager 3321, or may be loaded directly onto the programmable logic device 3322 (operation

[03] ). Therefore, the protocol manager 3321 may directly or indirectly control the programming or reconfiguration of the programmable logic device 3322.

[0102] The programmable logic device 3322 may be reconfigured to a state for supporting the determined protocol based on the configuration data. The programmable logic device 3322 may perform a logic operation corresponding to the determined protocol on the packet DIN (operation

[04] ).

[0103] Therefore, the controller 3300a may process the request of the host 100 and may communicate with the memory device 3100 through the memory interface circuit 3390 (operation

[05] ). The memory device 3100 may store or output data corresponding to the request of the host 100.

[0104] In this way, the controller 3300a can receive configuration data from the memory device 3100 so that the programmable logic device 3322 is programmed based on the configuration data. For example, when the controller 3300a is configured to operate according to the first protocol, when a request associated with a second protocol different from the first protocol is received, a transaction between the controller 3300a and the memory device 3100 can be performed based on the received request. The transaction can be performed to read the configuration data from the memory device 3100.

[0105] After executing the transaction, reconfiguration of the programmable logic device 3322 may be performed. Thus, after the transaction is executed and the time for reconfiguration has passed, the controller 3300a may begin processing received requests in accordance with the second protocol. The operation of the controller 3300a may be changed based on the configuration data to process received requests in accordance with the second protocol.

[0106] Fig. 9 It is used to describe Figure 4 Controller 3300a Figure 3 A conceptual diagram of an example operation of a storage device 3000.

[0107] The programmable logic device 3322 may receive the packet DIN (operation

[11] ). In some cases, the current programming state of the programmable logic device 3322 may not be able to process the packet DIN. The programmable logic device 3322 may notify the protocol manager 3321 of the processing failure (operation

[12] ).

[0108] In some example embodiments, the protocol manager 3321 may determine a protocol corresponding to a request received from the host 100 based on the packet DIN in response to the notification of the processing failure (operation

[13] ). The protocol manager 3321 may output a control signal (e.g., load) so that configuration data is output from the memory device 3100 (operation

[14] ).

[0109] The output configuration data may be loaded on the programmable logic device 3322 (operation

[15] ). The programmable logic device 3322 may be reconfigured to a state for supporting the determined protocol based on the configuration data. Thus, the controller 3300a may process the request of the host 100 and may communicate with the memory device 3100 (operation

[16] ).

[0110] Fig.10 It is used to describe Figure 4 Controller 3300a Figure 3 A conceptual diagram of an example operation of a storage device 3000. In some example embodiments, Figure 4 The controller 3300a may include Fig.10 The controller 3300b may include a processor 3330 and an internal memory 3340.

[0111] The protocol manager 3321 may receive the packet DIN (operation

[21] ), and may determine a protocol corresponding to the request received from the host 100 based on the packet DIN. The protocol manager 3321 may provide a notification NTF including information of the determined protocol to the processor 3330 (operation

[22] ).

[0112] The processor 3330 may perform various operations by executing software SW and / or firmware FW on one or more processor cores included in the processor 3330. In some example embodiments, the internal memory 3340 may store configuration data CD1 and CD2. The processor 3330 may output a control signal (e.g., load) so that the configuration data is output from the internal memory 3340 (operation

[23] ).

[0113] The processor 3330 can obtain the configuration data output from the internal memory 3340 (operation

[24] ) and can control the programmable logic device 3322 so that the programmable logic device 3322 is reconfigured to a state for supporting a determined protocol based on the configuration data (operation

[25] ).

[0114] After the reconfiguration is completed, the programmable logic device 3322 may perform a logic operation corresponding to the determined protocol on the packet DIN (operation

[26] ). Thus, the controller 3300b may process the request of the host 100 and may communicate with the memory device 3100 (operation

[27] ).

[0115] exist Fig.10 In an example embodiment, the protocol manager 3321 may be dedicated to determining the protocol, and the processor 3330 may control the reconfiguration of the programmable logic device 3322. In other example embodiments, in the absence of the protocol manager 3321, the processor 3330 may determine the protocol by executing software SW and / or firmware FW.

[0116] Fig.11 It is used to describe Figure 4 Controller 3300a Figure 3 A conceptual diagram of an example operation of a storage device 3000.

[0117] The protocol manager 3321 may receive the packet DIN (operation

[31] ) and may determine a protocol corresponding to the request received from the host 100 based on the packet DIN. In some cases, the protocol manager 3321 may determine that the configuration data CD3 for supporting the determined protocol is not stored in the storage device 3000.

[0118] In some example embodiments, the protocol manager 3321 may actively request the host 100 to provide configuration data required to reconfigure the programmable logic device 3322 (operation

[32] ). For example, the protocol manager 3321 may output a control signal so as to receive configuration data from the host 100 for programming the programmable logic device 3322 to a state for supporting a determined protocol. In some example embodiments, the error report ( Figure 6 S235) can be used as a control signal.

[0119] The controller 3300a may receive configuration data from the host 100 so that the programmable logic device 3322 is programmed based on the configuration data (operation

[33] ). For example, when the controller 3300a is configured to operate in accordance with a first protocol, when a request associated with a second protocol different from the first protocol is received, a transaction between the controller 3300a and the host 100 may be performed based on the received request. The transaction may be performed to receive configuration data from the host 100.

[0120] After executing the transaction, the received configuration data may be loaded on the programmable logic device 3322 through the protocol manager 3321, or may be loaded directly on the programmable logic device 3322. The programmable logic device 3322 may be reconfigured to a state for supporting the determined protocol based on the configuration data (operation

[34] ). Thus, the operation of the controller 3300a may be changed based on the configuration data to process the received request according to the second protocol.

[0121] After the transaction is executed and the reconfigured time has passed, the controller 3300a may begin processing the received request according to the second protocol. The programmable logic device 3322 may perform a logic operation corresponding to the determined protocol on the packet DIN (operation

[35] ). Thus, the controller 3300a may process the request of the host 100 and may communicate with the memory device 3100 (operation

[36] ).

[0122] In some example embodiments, the controller 3300a may receive configuration data from both the memory device 3100 and the host 100. The controller 3300a may perform reconfiguration of the programmable logic device 3322 based on more appropriate configuration data among the configuration data received from the memory device 3100 and the configuration data received from the host 100. For example, the programmable logic device 3322 may be programmed or reconfigured based on configuration data providing a new version of a determined protocol among the configuration data received from the memory device 3100 and the configuration data received from the host 100.

[0123] In some example embodiments, when the configuration data CD3 is received from the host 100 and the configuration data CD3 has not yet been stored in the memory device 3100, the controller 3300a may control the memory device 3100 so that the configuration data CD3 is stored in the memory device 3100 (operation

[39] ). Thereafter, the configuration data CD3 may be read from the memory device 3100 instead of being received from the host 100.

[0124] Fig.12 It is used to describe Figure 4 Controller 3300a Figure 3 A conceptual diagram of an example operation of a storage device 3000.

[0125] The protocol manager 3321 may receive the packet DIN (operation

[41] ). In some example embodiments, the host 100 may actively provide the storage apparatus 3000 with a command for reconfiguring the programmable logic device 3322 and configuration data required for reconfiguration (operations

[42] and

[43] ).

[0126] The protocol manager 3321 may control the reconfiguration of the programmable logic device 3322 based on the command and the configuration data (operation

[44] ). After the reconfiguration is completed, the programmable logic device 3322 may perform a logic operation corresponding to the determined protocol on the packet DIN (operation

[45] ). Thus, the controller 3300a may process the request of the host 100 and may communicate with the memory device 3100 (operation

[46] ).

[0127] Fig.13 Is used to describe Figure 4 A table of example operations of the protocol manager 3321.

[0128] In some example embodiments, the protocol manager 3321 may manage the protocol information PL. The protocol manager 3321 may include a memory for storing the protocol information PL, or the protocol information PL may be stored in the memory device 3100 or the internal memory 3340. The protocol information PL may include a list of a plurality of protocols supported by the programmable logic device 3322.

[0129] The protocol information PL may include various information associated with the protocol (e.g., the name of each protocol, whether each protocol can be supported by the programmable logic device 3322 (availability), whether configuration data for supporting each protocol is stored in the storage device 3000, which protocol is currently supported, etc.).

[0130] When reference Figures 6 to 12 When the described operations are performed, the protocol manager 3321 may modify / change / update the protocol information PL. In some cases, information associated with the new protocol may be added to an empty item of the protocol information PL. The protocol manager 3321 may perform reference based on the protocol information PL. Figures 6 to 12 Describes the various determination operations.

[0131] Fig.14 is shown with Figure 3 3300 is a block diagram of an example configuration associated with the controller 3300. In some example embodiments, Figure 3 The controller 3300 may include Fig.14 Controller 3300c, Figure 3 The protocol adaptation engine 3320 may include Fig.14 Protocol adaptation engine 3320c.

[0132] The protocol adaptation engine 3320c may include a buffer 3323. When the programmable logic device 3322 is programmed to a new state (reconfigured), the programmable logic device 3322 may not be able to process a request of the host 100. When the reconfiguration of the programmable logic device 3322 is performed, the buffer 3323 may temporarily cache data to be provided to the programmable logic device 3322 later.

[0133] For example, the buffer 3323 may buffer a packet DIN to be provided from the host interface circuit 3310 to the programmable logic device 3322 and / or a packet (not limited to having a packet form) to be provided from the memory interface circuit 3390 to the programmable logic device 3322 .

[0134] When performing reconfiguration of the programmable logic device 3322, packets can be retained in the buffer 3323 without being lost. The storage device 3000 can store packets in the buffer 3323 while performing reconfiguration of the programmable logic device 3322 without rejecting the request of the host 100, thereby improving the quality of service (QoS).

[0135] Fig.15 Is a description Fig.14 A flowchart of example operations of controller 3300c. FIG. 16A to FIG. 16C Is used to describe Fig.14A conceptual diagram of example operations of controller 3300c.

[0136] refer to Fig.15 , the protocol manager 3321 may receive the packet DIN from the host interface circuit 3310 (S310) and may control programming or reconfiguration of the programmable logic device 3322. When reconfiguration is performed (Yes of S320), the buffer 3323 may buffer the packet DIN without outputting the packet DIN (S325).

[0137] For example, refer to Fig.16A , the protocol manager 3321 may control the buffer 3323 based on the reconfiguration being performed so that the buffer 3323 does not output the packet. Therefore, the buffer 3323 may cache the packets DIN1, DIN2, and DIN3 without outputting the packets DIN1, DIN2, and DIN3.

[0138] return Fig.15 In some cases, before the reconfiguration is completed, an additional request associated with the determined protocol may be received (S310, Yes of S320). The buffer 3323 may also cache packets obtained from the received additional request without outputting the packets.

[0139] After a period of time has passed, the reconfiguration may be completed (No of S320 ). When there is a buffered packet in the buffer 3323 (Yes of S330 ), the buffer 3323 may output the buffered packet to the programmable logic device 3322 ( S335 ).

[0140] For example, refer to Fig. 16B , the buffer 3323 can output the cached packets DIN1, DIN2, and DIN3 in response to the reconfiguration completion (ie, when the reconfiguration is not performed). Therefore, the programmable logic device 3322 can process the request of the host 100 (eg, packets DIN1, DIN2, and DIN3) according to the determined protocol.

[0141] return Fig.15 , when there is no cached packet in the buffer 3323 (No in S330) or after outputting the cached packet, the buffer 3323 may output the packet DIN to the programmable logic device 3322 without caching the packet DIN (S340). In other words, after the reconfiguration is completed, when an additional request associated with the determined protocol is received, the packet DIN may bypass the buffer 3323. For example, referring to Fig. 16C , buffer 3323 can output packet DIN4 received after reconfiguration is completed without buffering packet DIN4.

[0142] For example, the controller 3300c may perform data synchronization with respect to the timing of the packets buffered in the processing buffer 3323 ( Figure 6 The programmable logic device 3322 may process the cached packets output from the buffer 3323 based on the synchronous timing.

[0143] Fig.17 is shown with Figure 3 3300 is a block diagram of an example configuration associated with the controller 3300. In some example embodiments, Figure 3 The controller 3300 may include Fig.17 The controller 3300d, and Figure 3 The protocol adaptation engine 3320 may include Fig.17 Protocol adaptation engine 3320d.

[0144] The protocol adaptation engine 3320d may include a switch circuit 3324. When the programmable logic device 3322 is being reconfigured to a new state, the switch circuit 3324 may provide a path between the host interface circuit 3310 and the buffer 3323 so that the buffer 3323 may buffer the packet DIN.

[0145] When reconfiguration of the programmable logic device 3322 is not performed, the switch circuit 3324 can provide a path between the host interface circuit 3310 and the programmable logic device 3322 so that the programmable logic device 3322 can process the packet DIN. In this example embodiment, the packet DIN can be transmitted to the programmable logic device 3322 through the switch circuit 3324 instead of bypassing the buffer 3323.

[0146] Fig.18 is shown with Figure 1 The storage device 1300 or Figure 2 In some example embodiments, Figure 3 The controller 3300 may include Fig.18 Controller 3300e.

[0147] The controller 3300e may include the protocol manager 3321 and may not include the programmable logic device 3322. Instead, the programmable logic device 3500 may be provided separately from the controller 3300e. In this example embodiment, wiring may be provided to connect the inside of the controller 3300e to the programmable logic device 3500 outside the controller 3300e. In some example embodiments, the protocol manager 3321 may also be provided separately from the controller 3300e.

[0148] The configuration and operation of the programmable logic device 3500 may be substantially the same as the configuration and operation of the programmable logic device 3322. Figures 4 to 17 The described example embodiments may also be applied to Fig.18 Configuration.

[0149] Fig.19 is shown with Figure 1 The storage device 1300 or Figure 2 In some example embodiments, Figure 1 The storage device 1300 or Figure 2 The storage device 2300 may include Fig.19 Storage device 4000.

[0150] The storage device 4000 may include at least one memory device 4100 and a controller 4300. The controller 4300 may include a host interface circuit 4310, a switch circuit 4313, a protocol adaptation engine 4320, a fixed protocol circuit 4350, a switch circuit 4393, and a memory interface circuit 4390. For the host interface circuit 4310, the protocol adaptation engine 4320, and the memory interface circuit 4390, refer to Figures 3 to 18 The described example embodiments may also be applied to Fig.19 Configuration.

[0151] The fixed protocol circuit 4350 may include a hardware circuit (e.g., a logic circuit) configured to perform logic operations for supporting one or more fixed (or selected) protocols. When the fixed protocol circuit 4350 supports a fixed protocol, the memory device 4100 may store or output data corresponding to a request of the host 100 for the fixed protocol.

[0152] For example, the fixed protocol circuit 4350 may only support the PCIe protocol, and the protocol adaptation engine 4320 may support multiple protocols different from the PCIe protocol. According to the protocol to be supported at the controller 4300, the switch circuit 4313 and the switch circuit 4393 may selectively provide a path through the protocol adaptation engine 4320 or a path through the fixed protocol circuit 4350.

[0153] Fig. 20 is shown with Fig.19 4300 is a block diagram of an example configuration associated with the controller 4300. In some example embodiments, Fig.19 The controller 4300 may include Fig. 20 Controller 4300a.

[0154] For example, the fixed protocol circuit 4350 may include a network layer 4351, a transport layer 4352, a remote direct memory access (RDMA) layer 4353, and a non-volatile memory express fabric (NVMe-oF) layer 4354 to support the Ethernet protocol. The Ethernet protocol and its layers are examples for facilitating better understanding and are not intended to limit the present disclosure. Various changes or modifications may be made to the protocols supported by the fixed protocol circuit 4350.

[0155] For example, the protocol adaptation engine 4320 may include a protocol manager 4321 , a programmable logic device 4322 , and a buffer 4323 to adaptively support multiple protocols. The protocol manager 4321 may determine a suitable protocol based on a packet received through the host interface circuit 4310 .

[0156] The protocol manager 4321 may select one of the path through the protocol adaptation engine 4320 and the path through the fixed protocol circuit 4350 based on the determined protocol control switch circuit 4313 and the switch circuit 4393. When selecting the path through the protocol adaptation engine 4320, the protocol manager 4321 may perform the following operations similar to those described in reference 43. Figures 3 to 18 The described example embodiment controls the programmable logic device 4322 and the buffer 4323.

[0157] Fig.21 Is a description Fig.19 A flowchart of example operations of controller 4300 is provided.

[0158] The protocol manager 4321 may receive a packet from the host interface circuit 4310 (S410), and may determine a protocol based on the received packet (S420).

[0159] When the determined protocol is supported by the fixed protocol circuit 4350 (Yes at S430), the protocol manager 4321 may control the switch circuit 4313 and the switch circuit 4393 so that a path through the fixed protocol circuit 4350 is selected (S440). Therefore, the fixed protocol circuit 4350 may process the request of the host 100 according to the determined protocol (S450).

[0160] In response to determining that the fixed protocol circuit 4350 does not support the determined protocol (No at S430), the protocol manager 4321 may control the switch circuit 4313 and the switch circuit 4393 so that the path through the protocol adaptation engine 4320 is selected (S460). Thereafter, the operation of the controller 4300 may proceed to Figure 6 Therefore, the protocol manager 4321 may control the programming of the programmable logic device 4322 so that the programmable logic device 4322 is programmed to a state for supporting the determined protocol.

[0161] Fig. 22 is shown with Fig.19 4300 is a block diagram of an example configuration associated with the controller 4300. In some example embodiments, Fig.19 The controller 4300 may include Fig. 22 Controller 4300b.

[0162] For example, the controller 4300b may include a fixed protocol circuit 4360. The fixed protocol circuit 4360 may perform logic operations for supporting one or more fixed protocols. The protocols supported by the fixed protocol circuit 4360 may be the same as or different from the protocols supported by the fixed protocol circuit 4350.

[0163] Various changes or modifications may be made to the number of fixed protocol circuits included in the controller 4300 b . The protocol adaptation engine 4320 may support multiple protocols different from the protocol(s) supported by the fixed protocol circuits 4350 and 4360 .

[0164] The controller 4300b can operate in accordance with various protocols simultaneously and can support more fixed protocols. In some cases, the controller 4300b can be more advantageous when the storage device 4000 is configured to communicate through multiple ports (eg, dual ports).

[0165] Fig.23 is shown with Figure 1 The storage device 1300 or Figure 2 In some example embodiments, Figure 1 The storage device 1300 or Figure 2 The storage device 2300 may include Fig.23 Storage device 5000.

[0166] The storage device 5000 may include at least one memory device 5100 and a controller 5300. The controller 5300 may include a host interface circuit 5310, a protocol manager 5321, a buffer 5326, a programmable logic device 5327, and a memory interface circuit 5390, and may be referred to as Figures 3 to 22 The described example embodiments may also be applied to the above-mentioned components.

[0167] The controller 5300 may support protocols that are processed according to the operation of multiple layers. For example, the controller 5300 may include a network layer 5351, a transport layer, an RDMA layer 5353, and an NVMe-oF layer 5354 to support the Ethernet protocol. The Ethernet protocol and its layers are examples for promoting better understanding and are not intended to limit the present disclosure. Various changes or modifications may be made to the protocols supported by the controller 5300.

[0168] The network layer 5351, the RDMA layer 5353, and the NVMe-oF layer 5354 may include hardware circuits (eg, logic circuits) configured to perform logic operations. The layers 5351, 5353, and 5354 may be understood as fixed protocol circuits for supporting operations of the corresponding layers of the Ethernet protocol.

[0169] Meanwhile, the transport layer may be implemented in the programmable logic device 5327. The protocol manager 5321 may determine a protocol based on an output of the host interface circuit 5310 (in some cases, an output of the network layer 5351), and may control the buffer 5326 and the programmable logic device 5327 based on the determined protocol.

[0170] For example, the programmable logic device 5327 may be reconfigurable to perform operations of a determined protocol in a protocol of a transport layer, such as a transmission control protocol (TCP) and / or a user datagram protocol (UDP), etc. The buffer 5326 may buffer packets while performing reconfiguration of the programmable logic device 5327.

[0171] Fig.24 is shown with Fig.23 5300 is a block diagram of an example configuration associated with the controller 5300. In some example embodiments, Fig.23 The controller 5300 may include Fig.24 Controller 5300a.

[0172] In the controller 5300a, the network layer may be implemented in the buffer 5323 and the programmable logic device 5325, and the RDMA layer may be implemented in the buffer 5328 and the programmable logic device 5329. The protocol manager 5321 may control each layer based on a protocol determined for a request of the host 100.

[0173] For example, the programmable logic device 5325 may be reconfigurable to perform operations of a determined protocol in a protocol of a network layer, such as an Internet Protocol (IP) and / or a Routing Information Protocol (RIP), etc. For example, the programmable logic device 5329 may be reconfigurable to perform operations of a determined protocol in a protocol of an RDMA layer, such as RDMA over Converged Ethernet (RoCE) and / or Internet Wide Area RDMA Protocol (iWARP), etc. The buffer 5323 and the buffer 5328 may cache packets while performing reconfiguration of the programmable logic device 5325 and the programmable logic device 5329.

[0174] This disclosure is not limited to Fig.23 and Fig.24 Various changes or modifications may be made to the types of layers implemented in a programmable logic device and the number of layers implemented in a programmable logic device.

[0175] Fig.25 is shown with Figure 1 The storage device 1300 or Figure 2 A block diagram of an example configuration associated with a storage device 2300. Figure 1 The storage device 1300 or Figure 2 The storage device 2300 may include Fig.25 Storage device 6000.

[0176] The storage device 6000 may include one or more memory devices 6100 and a controller 6300. The controller 6300 may include a network layer 6351, a transport layer 6352, an RDMA layer 6353, and an NVMe-oF layer 6354.

[0177] Layers 6351, 6352, 6353, and 6354 may be understood as fixed protocol circuits for supporting at least one fixed (or selected) protocol (e.g., Ethernet protocol) when receiving a request for a fixed protocol from the host 100. Layers 6351, 6352, 6353, and 6354 may include hardware circuits (e.g., logic circuits) configured to perform operations of corresponding layers of the Ethernet protocol.

[0178] The controller 6300 may include a host interface circuit 6310, a protocol manager 6321, buffers 6323, 6326, 6328, and 6371, programmable logic devices 6325, 6327, 6329, and 6372, switch circuits 6313, 6314, 6315, 6316, and 6393, and a memory interface circuit 6390, and reference Figures 3 to 24 The described example embodiments may also be applied to the above-mentioned components.

[0179] The programmable logic devices 6325, 6327, 6329, and 6372 may be reconfigurable and may be programmed to one of one or more states for supporting one or more protocols different from the protocols supported by the fixed protocol circuit according to a request of the host 100 received for one or more protocols. The buffers 6323, 6326, 6328, and 6371 may buffer packets while performing reconfiguration of the programmable logic devices 6325, 6327, 6329, and 6372.

[0180] In some example embodiments, programmable logic devices 6325, 6327, 6329, and 6372 may be provided corresponding to the respective layers of the protocol supported by the fixed protocol circuit. For example, programmable logic devices 6325, 6327, 6329, and 6372 may be reconfigured to perform operations corresponding to layers 6351, 6352, 6353, and 6354, respectively.

[0181] The buffers 6323, 6326, 6328, and 6371 may cache packets while performing reconfiguration of the programmable logic devices 6325, 6327, 6329, and 6372. The buffers 6323, 6326, 6328, and 6371 may not cache packets processed by the layers 6351, 6352, 6353, and 6354 obtained from a request of the host 100.

[0182] The switch circuits 6313, 6314, 6315, 6316, and 6393 may selectively provide paths through the programmable logic devices 6325, 6327, 6329, and 6372 or paths through the fixed protocol circuits of the layers 6351, 6352, 6353, and 6354 according to the protocol to be supported in the controller 6300. For example, when the fixed protocol circuit of the network layer 6351 is required for the network layer and the programmable logic device 6327 is required for the transport layer, the switch circuit 6313 and the switch circuit 6314 may provide a path through the fixed protocol circuit of the network layer 6351, and the switch circuit 6314 and the switch circuit 6315 may provide a path through the programmable logic device 6327.

[0183] The protocol manager 6321 may control components of the controller 6300 and paths through the switch circuits 6313 , 6314 , 6315 , 6316 , and 6393 based on a request of the host 100 .

[0184] Fig.26 is shown with Fig.25 6300 is a block diagram of an example configuration associated with the controller 6300. In some example embodiments, Fig.25 The controller 6300 may include Fig.26 Controller 6300a.

[0185] In the controller 6300a, the transport layer 6352 and the NVMe-oF layer 6354 may be implemented with fixed protocol circuits instead of programmable logic devices. Fig.25 and Fig.26 Each layer of the protocol may be variously changed or modified to be implemented with fixed protocol circuits without programmable logic devices, or using both programmable logic devices and fixed protocol circuits.

[0186] Fig. 27 and Fig.28 is shown with Figure 1 Controller 1330 or Figure 2 A block diagram of an example configuration associated with controller 2330.

[0187] Some example embodiments have been described for the Ethernet protocol, but the present disclosure is not limited thereto. The example embodiments may also be applied to various protocols other than the Ethernet protocol.

[0188] For example, Figure 1 Controller 1330 or Figure 2 The controller 2330 may include Fig. 27 Controller 7300. Reference Fig. 27 , the controller 7300 may include fixed protocol circuits of a link layer 7351, a transaction layer 7352, and an application layer 7355 to support SAS or PCIe protocols. The controller 7300 may include a host interface circuit 7310, a protocol manager 7321, buffers 7323 and 7326, programmable logic devices 7325 and 7327, switch circuits 7313, 7314, and 7393, and a memory interface circuit 7390, and refer to Figures 3 to 26 The described example embodiments may also be applied to the above-mentioned components.

[0189] For example, with Figure 1 Controller 1330 or Figure 2 The controller 2330 may include Fig.28 Controller 8300. Reference Fig.28 , the controller 8300 may include fixed protocol circuits of a PHY adapter layer 8351, a data link layer 8352, a transaction layer 8353, and an application layer 8355. The controller 8300 may include a host interface circuit 8310, a protocol manager 8321, a programmable logic device 8322, a buffer 8323, switch circuits 8313 and 8393, and a memory interface circuit 8390, refer to Figures 3 to 26 The described example embodiments may also be applied to the above-mentioned components.

[0190] In addition, various other protocols may be supported for the example embodiments. In addition, the example embodiments may also be applied to various devices other than storage devices. For example, the main processor 1101 or the working memory 1200 may include a programmable logic device that can adaptively support multiple protocols to flexibly process requests received from the outside.

[0191] As is conventional in the art, embodiments may be described and illustrated with blocks that perform one or more functions described. These blocks (here may be referred to as units or modules, etc.) are physically implemented by analog circuits and / or digital circuits (such as, logic gates, integrated circuits, microprocessors, microcontrollers, memory circuits, passive electronic components, active electronic components, optical components, hard-wired circuits, etc.), and may be optionally driven by firmware and / or software. For example, the circuit may be embodied in one or more semiconductor chips, or embodied on substrate supports such as printed circuit boards, etc. The circuits constituting the blocks may be implemented by dedicated hardware, or by a processor (e.g., one or more programmed microprocessors and associated circuits), or by a combination of dedicated hardware for executing some functions of the blocks and processors for executing other functions of the blocks. Without departing from the scope of the present disclosure, each block of the embodiment may be physically divided into two or more interactive and discrete blocks. Similarly, without departing from the scope of the present disclosure, the blocks of the embodiment may be physically combined into more complex blocks.

[0192] The above description is intended to provide example configurations and operations for implementing the present disclosure. In addition to the above example embodiments, the present disclosure may include implementations that can be obtained by simply changing or modifying the above example embodiments. In addition, the present disclosure may include implementations that can be achieved by simply changing or modifying the above example embodiments in the future.

Claims

1. A storage device, comprising: a non-volatile memory device; as well as a controller including a programmable logic device that is reconfigurable in response to a signal received from an external host device to adaptively implement a plurality of protocols according to the signal, in: When the programmable logic device is programmed to implement a first state of a first protocol indicated by a protocol information field of a first packet corresponding to a first signal received from the external host device among the plurality of protocols based on first configuration data received from the nonvolatile memory device, the programmable logic device performs a first logic operation on the first packet according to the first protocol to process a first request of the first packet, and the controller communicates with the nonvolatile memory device based on the processed first request so that the nonvolatile memory device stores or outputs user data indicated by the processed first request, wherein, after the programmable logic device is programmed to a first state for implementing the first protocol, when a second signal is received from the external host device for a second protocol different from the first protocol, the programmable logic device is further configured to be reconfigured from the first state to the second state as the programmable logic device is programmed to a second state for implementing the second protocol based on second configuration data, and The controller is configured to request the external host device to receive the second configuration data, and store the received second configuration data in the nonvolatile memory device.

2. The storage device according to claim 1, wherein: The controller also includes an operating circuit for: determining a protocol indicated by a packet corresponding to a signal received from the external host device, and Programming of the programmable logic device to a state for implementing a determined protocol is controlled so that the programmable logic device is programmed to the state based on configuration data corresponding to the determined protocol.

3. The storage device according to claim 2, wherein: In response to the controller being powered on, the operation circuit triggers initialization of the programmable logic device based on a reset signal, so that the programmable logic device is programmed into a default state or enters an initial state.

4. The storage device according to claim 1, wherein: The controller receives the first configuration data from at least one of the nonvolatile memory device and the external host device.

5. The storage device according to claim 4, wherein: When the first configuration data has been received from the external host device and the received first configuration data has not been stored in the nonvolatile memory device, the controller controls the nonvolatile memory device so that the received first configuration data is stored in the nonvolatile memory device.

6. A storage device, comprising: a non-volatile memory device; a programmable logic device that, upon receiving a first signal for a first protocol, is programmed to a first state for implementing the first protocol based on first configuration data received from the non-volatile memory device; as well as an operating circuit for controlling programming of the programmable logic device to the first state based on a first packet corresponding to the first signal, wherein The programmable logic device performs a first logic operation on the first packet according to the first protocol to process a first request of the first packet, The nonvolatile memory device performs an operation corresponding to the processed first request, After the programmable logic device is programmed to the first state, when the second signal is received from an external host device for a second protocol different from the first protocol and indicated by a second packet corresponding to the second signal, the operation circuit requests the external host device to receive second configuration data and controls the programmable logic device so that the programmable logic device is reconfigured from the first state to a second state for implementing the second protocol based on the second configuration data, and the programmable logic device causes the nonvolatile memory device to store or output user data indicated by a second request of the second packet according to the second protocol.

7. The storage device according to claim 6, wherein: The operational circuitry manages a list of a plurality of protocols and configuration data associated with the plurality of protocols.

8. The storage device according to claim 6, further comprising a buffer for buffering the second packet without outputting the second packet while performing reconfiguration from the first state to the second state.

9. The storage device according to claim 8, wherein: When a third signal is received for the second protocol before completing the reconfiguration from the first state to the second state, the buffer further buffers a third packet corresponding to the third signal.

10. The storage device according to claim 8, wherein: In response to completion of reconfiguration from the first state to the second state, the buffer outputs the cached second packet to the programmable logic device, so that the programmable logic device performs a second logic operation on the second packet according to the second protocol to process a second request of the second packet.

11. The storage device according to claim 8, wherein: After the reconfiguration from the first state to the second state is completed, when a third signal is received for the second protocol, the buffer outputs a third packet corresponding to the third signal to the programmable logic device without buffering the third packet.

12. The storage device according to claim 6, wherein: Implementing the second protocol according to the operation of the first layer and the operation of the second layer; and The programmable logic device performs operations of a first layer of the second protocol.

13. The storage device according to claim 12, further comprising a fixed protocol circuit for implementing the operation of the second layer of the second protocol.

14. The storage device according to claim 6, wherein: the settings of the programmable logic device in the second state include a first setting and a second setting, the first setting is the same as the corresponding setting of the programmable logic device in the first state, and the second setting is different from the corresponding setting of the programmable logic device in the first state, and Reconfiguration from the first state to the second state is performed only on the second setting without changing the first setting.

15. A storage device, comprising: a non-volatile memory device; as well as a controller for performing a first logic operation on a first packet according to a first protocol to process a first request of the first packet, and for controlling the nonvolatile memory device based on the processed first request, wherein the first packet corresponding to the first signal is received from an external host device for the first protocol, wherein When the controller is configured to operate in accordance with the first protocol, upon receiving the second signal from the external host device for a second protocol different from the first protocol and indicated by a second packet corresponding to the second signal, the controller performs a second logic operation on the second packet in accordance with the second protocol after performing a first transaction between the controller and an external portion of the storage device based on a protocol information field of the second packet, executing the first transaction to receive first configuration data from outside the storage device, changing the operation of the controller based on the first configuration data to perform the second logic operation on the second packet according to the second protocol to process a second request of the second packet, the controller causing the non-volatile memory device to store or output user data indicated by the processed second request according to the second protocol, and The controller is also configured to store the first configuration data in the non-volatile memory device.

16. The storage device according to claim 15, wherein: After a period of time has passed after the first transaction is executed, the controller starts processing the second request.

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