Amplifier

Abstract

The invention is characterized in that it comprises: a circuit pattern providing a plurality of signal paths of different lengths; a transistor chip; pads of a plurality of transistor units electrically connected to the circuit pattern and arranged on the transistor chip; a plurality of transistor units; a plurality of transmission lines connecting the plurality of pads to the plurality of transistor units one-to-one, the plurality of transmission lines being arranged on the transistor chip; and a plurality of harmonic processing circuits connected one-to-one to the plurality of transmission lines and arranged on the transistor chip, the plurality of harmonic processing circuits each comprising a capacitor and an inductor connected in series with a grounding terminal, the longer the length of the signal path to which the capacitor is connected, the smaller the capacitance of the capacitor, so that the product of the capacitance of the capacitor and the inductance of the inductor is constant for each of the plurality of harmonic processing circuits.

Description

Technical Field

[0001] The present invention relates to amplifiers. Background Art

[0002] Patent Document 1 discloses a method of providing a slit in a transmission line connected to a plurality of transistor cells, thereby improving phase deviation and amplitude deviation of a signal transmitted to an output terminal connected to each transistor cell.

[0003] Patent Document 1: Japanese Patent Application Publication No. 2013-115491 Summary of the invention

[0004] In the high-frequency power amplifier shown in Patent Document 1, the layout of the transmission line is restricted. For example, the metal pattern width or the slit width is restricted by manufacturing. In addition, when the number of connection terminals, that is, the number of transistor units, increases, there is a problem that the phase deviation and amplitude deviation of the signal cannot be suppressed.

[0005] Even if an attempt is made to improve the phase deviation of harmonics by configuring a harmonic processing circuit composed of a capacitor and an inductor for each transistor unit, the phase deviation of the fundamental wave cannot be improved. In this case, the maximum performance of the transistor cannot be tapped due to the impedance mismatch caused by the phase deviation of the fundamental wave.

[0006] The present invention is proposed to solve the above-mentioned problems, and its object is to provide an amplifier with improved performance such as efficiency and gain.

[0007] The amplifier according to the present invention is characterized in that it has: a circuit pattern that provides multiple signal paths of different lengths; a transistor chip; pads of multiple transistor units that are electrically connected to the circuit pattern and arranged on the transistor chip; multiple transistor units; multiple transmission lines that connect the multiple pads to the multiple transistor units one-to-one, and the multiple transmission lines are arranged on the transistor chip; and multiple harmonic processing circuits that are connected to the multiple transmission lines one-to-one and arranged on the transistor chip, each of the multiple harmonic processing circuits has a capacitor and an inductor connected in series with a grounding terminal, the longer the length of the signal path to which the capacitor is connected, the smaller the capacitance of the capacitor, so that the product of the capacitance of the capacitor and the inductance of the inductor is constant for each of the multiple harmonic processing circuits.

[0008] Other features of the present invention will become apparent from the following.

[0009] Effects of the Invention

[0010] According to the present invention, it is possible to provide an amplifier having improved performance such as efficiency and gain by adjusting the capacitance of a capacitor in a harmonic processing circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 This is an overall diagram of the amplifier according to the first embodiment.

[0012] Figure 2 This is an enlarged view of the transistor unit.

[0013] Figure 3 This is an enlarged view of a transistor chip.

[0014] Figure 4 is a contour plot of gain relative to fundamental impedance.

[0015] Figure 5 It is a diagram showing a calculation example of the fundamental wave impedance of a comparative example.

[0016] Figure 6 This is a diagram showing a calculation example of fundamental wave impedance when the circuit side is viewed from each transistor cell for the amplifier according to the first embodiment.

[0017] Figure 7 is a contour plot of gain relative to second harmonic impedance.

[0018] Figure 8 It is a diagram showing a calculation example of the second harmonic impedance of a comparative example.

[0019] Fig. 9 This is a diagram showing a calculation example of the second harmonic impedance when the circuit side is viewed from each transistor unit for the amplifier according to the first embodiment.

[0020] Fig.10 This is an overall diagram of an amplifier according to the second embodiment.

[0021] Fig.11 This is an enlarged view of the transistor unit.

[0022] Fig.12 This is an enlarged view of a transistor chip.

[0023] Fig.13 This is a diagram showing a transistor unit included in an amplifier according to a third embodiment.

[0024] Fig.14 This is an enlarged view of a transistor chip.

[0025] Fig.15 This is a diagram showing a transistor unit included in an amplifier according to a fourth embodiment. DETAILED DESCRIPTION

[0026] An amplifier according to an embodiment of the present invention will be described with reference to the accompanying drawings. The same reference numerals are used for the same or corresponding components, and duplicate descriptions may be omitted.

[0027] Implementation method 1.

[0028] Figure 1 1 is an overall diagram of an amplifier 10 according to Embodiment 1. The amplifier 10 includes an input matching circuit substrate 12, a transistor chip 14, and an output matching circuit substrate 16. The input matching circuit substrate 12 includes a circuit pattern 12a formed of metallized wiring. The output matching circuit substrate 16 includes a circuit pattern 16a formed of metallized wiring. The circuit patterns 12a and 16a are matching circuits. The circuit patterns 12a and 16a provide a plurality of signal paths of different lengths. That is, the circuit pattern 12a has one input terminal at the left end and a plurality of output terminals at the right end, thereby providing a plurality of signal paths of different lengths. In addition, the circuit pattern 16a has a plurality of input terminals at the left end and one output terminal at the right end, thereby providing a plurality of signal paths of different lengths.

[0029] The transistor chip 14 has a plurality of transistor cells. The transistor cells constitute a unit transistor cell. Figure 1 In the figure, one transistor unit 14a among the plurality of transistor units is shown surrounded by a dotted line. Figure 1 As shown, eight transistor cells are arranged in a row. The circuit pattern 12a is connected to the transistor cell 14a via a wire 20. The circuit pattern 16a is connected to the transistor cell 14a via a wire 22.

[0030] Figure 2 1 is an enlarged view of transistor unit 14a. Transistor unit 14a has gate pad 30, transmission line 32, synthesis line 34, drain pad 38 and transistor 36 having multiple fingers. Gate pad 30 is connected to circuit pattern 12a through wire 20, and drain pad 38 is connected to circuit pattern 16a through wire 22. Gate pad 30 is connected to transistor 36 through transmission line 32 and synthesis line 34.

[0031] The harmonic processing circuit 40 is connected to the transmission line 32. The harmonic processing circuit 40 includes: a transmission line 40a connected to the transmission line 32; a capacitor 40b connected to the transmission line 40a; a transmission line 40c connected to the capacitor 40b; an inductor 40d connected to the transmission line 40c; a transmission line 40e connected to the inductor 40d; and a grounding terminal 40f. The capacitor 40b is, for example, a MIM capacitor. The inductor 40d is, for example, a spiral inductor. The grounding terminal 40f is, for example, a via formed in a via hole and connected to ground. The harmonic processing circuit 40 of this embodiment is an LC circuit in which the capacitor 40b and the inductor 40d are connected in series between the transmission line 32 and the grounding terminal 40f. That is, the harmonic processing circuit 40 can be constituted by a resonant circuit.

[0032] Figure 3 1 is an enlarged view of the transistor chip 14. As an example, the transistor chip 14 of the first embodiment has eight transistor cells 14a, 14b, 14c, 14d, 14e, 14f, 14g, and 14h. The transistor cells 14a, 14b, 14c, 14d, 14e, 14f, 14g, and 14h are arranged in a row. The basic structure of the transistor cells 14b, 14c, 14d, 14e, 14f, 14g, and 14h is the same as the basic structure of the transistor cell 14a described above. Each transistor cell is connected to a different portion of the circuit pattern 12a through a wire 20, and is connected to a different portion of the circuit pattern 16a through a wire 22.

[0033] The transistor units 14a, 14b, 14c, 14d, 14e, 14f, 14g, and 14h respectively have harmonic processing circuits 40, 41, 42, 43, 44, 45, 46, and 47. The harmonic processing circuit 40 has a capacitor 40b having a capacitance of C1 and an inductor 40d having an inductance of L1. The harmonic processing circuit 41 has a capacitor 41b having a capacitance of C2 and an inductor 41d having an inductance of L2. The harmonic processing circuit 42 has a capacitor 42b having a capacitance of C3 and an inductor 42d having an inductance of L3. The harmonic processing circuit 43 has a capacitor 43b having a capacitance of C4 and an inductor 43d having an inductance of L4.

[0034] The harmonic processing circuit 44 includes a capacitor 44b having a capacitance of C4 and an inductor 44d having an inductance of L4. The harmonic processing circuit 45 includes a capacitor 45b having a capacitance of C3 and an inductor 45d having an inductance of L3. The harmonic processing circuit 46 includes a capacitor 46b having a capacitance of C2 and an inductor 46d having an inductance of L2. The harmonic processing circuit 47 includes a capacitor 47b having a capacitance of C1 and an inductor 47d having an inductance of L1.

[0035] In this embodiment, the above-mentioned capacitors satisfy the relationship of C1<C2<C3<C4. Figure 1 The circuit pattern 12a becomes longer in the order of the length of the signal path from the input terminal to the transistor units 14a and 14h, the length of the signal path from the input terminal to the transistor units 14b and 14g, the length of the signal path from the input terminal to the transistor units 14c and 14f, and the length of the signal path from the input terminal to the transistor units 14d and 14e.

[0036] Therefore, the phase of the signal transmitted from the circuit pattern 12a to the transistor units 14a and 14h is larger than the phase of the signal transmitted from the circuit pattern 12a to other transistor units. To compensate for this phase deviation, the capacitance C1 of the capacitors 40b and 47b of the harmonic processing circuits 40 and 47 is made smaller than the capacitance of other capacitors.

[0037] On the contrary, the phase of the signal transmitted from the circuit pattern 12a to the transistor units 14d and 14e is smaller than the phase of the signal transmitted from the circuit pattern 12a to the other transistor units. Therefore, the capacitance C4 of the capacitors 43b and 44b of the harmonic processing circuits 43 and 44 is made larger than the capacitance of the other capacitors.

[0038] In this way, the capacitance of each capacitor is set to compensate for the phase deviation of the signal generated in the input matching circuit substrate 12. As a result, the above-mentioned capacitance satisfies the relationship of C1<C2<C3<C4. In other words, the longer the length of the signal path connected to the capacitor is, the smaller the capacitance of each capacitor is. Therefore, the capacitance of the capacitor is C1<C2<C3<C4. In addition, Figure 1 In the diagram, capacitors of the same capacitance are arranged symmetrically with respect to the center line of the transistor chip 14.

[0039] Furthermore, the product of the capacitance of the capacitor and the inductance of the inductor associated with each of the plurality of harmonic processing circuits is made constant. That is, L1>L2>L3>L4 is set, and C1×L1, C2×L2, C3×L3, and C4×L4 are made substantially equal. Thus, the resonant frequency of each resonant circuit is substantially constant. In this way, the capacitance of the capacitor and the inductance of the inductor of the harmonic processing circuit are different for each transistor unit.

[0040] As described above, by configuring a capacitor having a capacitance value that compensates for the phase deviation of the fundamental wave generated in the input matching circuit substrate 12 for each transistor unit, the reflection phase of the fundamental wave can be substantially uniform for all transistor units. By suppressing the fluctuation of the phase deviation of the fundamental wave regardless of the number of transistor units, the maximum performance can be tapped for all transistor units, and a high-performance amplifier can be obtained. In addition, by making the resonant frequency of the resonant circuit constant in all harmonic processing circuits, the reflection phase of the harmonic can also be made uniform.

[0041] The matching of fundamental wave impedance will be described in detail. Figure 4 An example of a contour plot of gain relative to fundamental impedance is shown. The point marked with an asterisk is the fundamental impedance at which the maximum gain is obtained, and the ellipse is a contour line indicating the amount of gain reduction from the maximum point. That is, when a matching circuit that realizes the impedance of the part marked with an asterisk is connected to the transistor, the transistor has the maximum gain, and the gain gradually decreases as the impedance moves away from the part marked with an asterisk.

[0042] Figure 5This is a diagram showing a calculation example of fundamental impedance when observing the circuit side from each transistor unit without applying the present invention. In this calculation example, the line length from the signal input end of the high-frequency power amplifier to the input end of the transistor unit varies depending on the transistor unit, so the impedance when observing the circuit side from each transistor unit fluctuates.

[0043] Figure 6 For the amplifier of Embodiment 1, an example of calculating the fundamental impedance when the circuit side is viewed from each transistor unit is shown. By using a harmonic processing circuit to compensate for the mismatch of the fundamental wave for each transistor unit, the impedance when the circuit side is viewed from each transistor unit can be changed to the value of 1 for all transistor units. Figure 4 The impedance of the fundamental wave which obtains the maximum gain is matched near the impedance shown in the figure. Thus, a high-gain amplifier can be obtained compared with the case where the present invention is not applied. In addition, by eliminating the imbalance between the units on the input side, the effect of improving the output power and efficiency can also be obtained.

[0044] Next, the matching of the second harmonic impedance will be described in detail. Figure 7 An example of a contour plot of gain with respect to second harmonic impedance is shown. The point marked with an asterisk is the second harmonic impedance at which the maximum gain is obtained, and the ellipse is a contour line indicating the amount of gain reduction from the maximum point.

[0045] Figure 8 An example of calculating the second harmonic impedance when observing the circuit side from each transistor unit without applying the present invention is shown. By setting the resonant frequency of the resonant circuit composed of capacitors and inductors to twice the operating frequency of the high-frequency power amplifier, a short-circuit point relative to the second harmonic is formed in all transistor units. In this state, if the specifications of the harmonic processing circuit are changed, the second harmonic impedance when observing the circuit side from each transistor unit changes. However, at this time, by setting the capacitance and inductance in a manner that makes Cn×Ln (n=1~4) constant in all resonant circuits, there is no influence on the second harmonic matching.

[0046] Fig. 9 For the amplifier of Embodiment 1, a calculation example of the second harmonic impedance when the circuit side is viewed from each transistor unit is shown. The second harmonic impedance when the circuit side is viewed from each transistor unit maintains the impedance when the present invention is not applied. That is, since there is no mismatch with respect to the optimal load for the second harmonic, there is no performance degradation caused by a change in the specifications of the harmonic processing circuit.

[0047] In this way, the amplifier involved in Embodiment 1 can suppress the phase deviation of both fundamental wave and harmonic signals even when the number of connection terminals of the matching circuit substrate, that is, the number of transistor units, becomes large. As a result, the impedance mismatch generated relative to each transistor unit can be minimized, and a high-performance amplifier with improved efficiency and gain can be obtained. In Embodiment 1, a transistor chip configured with 8 transistor units is used as an amplifying element, but the number of transistor units does not necessarily have to be 8. In addition, in Embodiment 1, the harmonic processing circuit is configured on the transistor chip 14, but as long as the harmonic processing circuit can be configured 1 to 1 relative to each transistor unit, the harmonic processing circuit can also be configured on the matching circuit substrate. In addition, the number of matching circuit substrates and transistor chips can also be changed. The matching circuit substrate can be configured inside the package or outside the package.

[0048] The modifications described in the first embodiment are also applicable to the following embodiments. In addition, since the amplifiers according to the following embodiments have many similarities with the first embodiment, the differences from the first embodiment will be mainly described.

[0049] Implementation method 2.

[0050] Fig.10 2 is an overall diagram of an amplifier 50 according to Embodiment 2. The harmonic processing circuit according to Embodiment 2 includes a resistor in addition to a capacitor and an inductor. The capacitance value of the capacitor and the inductance of the inductor can be set similarly to those of Embodiment 1.

[0051] Fig.11 yes Fig.10 FIG. 1 is an enlarged view of the transistor unit 14a. An in-circuit resistor 40r is provided in the middle of the transmission line 40a. The in-circuit resistor 40r is connected to the transmission line 32 in a shunt manner.

[0052] Fig.12 yes Fig.10 An enlarged view of the transistor chip 14. Each harmonic processing circuit has an in-circuit resistor 40r, 41r, 42r, 43r, 44r, 45r, 46r, and 47r, respectively. The resistance values ​​of the in-circuit resistors 40r, 41r, 42r, 43r, 44r, 45r, 46r, and 47r are R1, R2, R3, R4, R4, R3, R2, and R1, respectively. The resistance value of each in-circuit resistor satisfies R1>R2>R3>R4. That is, the longer the corresponding signal path, the greater the resistance value of the in-circuit resistor. In other words, the longer the length of the signal path connected to the in-circuit resistor, the greater the resistance value of the in-circuit resistor. Therefore, the amplitude deviation of the signal caused by the resistance difference between the signal paths can be compensated by the in-circuit resistor.

[0053] A capacitor having a capacitance value that compensates for the phase deviation of the fundamental wave generated in the input matching circuit substrate 12 is configured for each transistor unit, and an in-circuit resistor having a resistance value that compensates for the amplitude deviation is configured. As a result, the reflection phase and reflection amplitude of the fundamental wave can be made uniform for all transistor units. In addition, by making the resonant frequency of the resonant circuit constant in all harmonic processing circuits, the reflection phase of the harmonic can also be made uniform.

[0054] According to the amplifier 50 of the second embodiment, the phase deviation and amplitude deviation of the fundamental wave can be suppressed regardless of the number of transistor cells. Therefore, it is possible to exploit the maximum performance of all transistor cells better than in the first embodiment, and to obtain an amplifier with higher performance.

[0055] Implementation method 3.

[0056] Fig.13 FIG. 1 is a diagram showing a transistor unit included in an amplifier according to Embodiment 3. The amplifier according to Embodiment 3 is basically the same as the amplifier according to Embodiment 2, but the arrangement position of the resistor is different. The transistor unit according to Embodiment 3 does not have an in-circuit resistor, but is Fig.13 The transmission line 32 is shown to have a line resistance 40r.

[0057] Fig.14 It is an enlarged view of the transistor chip 14 involved in the third embodiment. Each harmonic processing circuit 40, 41, 42, 43, 44, 45, 46, 47 has a line resistor 40r, 41r, 42r, 43r, 44r, 45r, 46r, 47r. The resistance values ​​of the line resistors 40r, 41r, 42r, 43r, 44r, 45r, 46r, 47r are R1, R2, R3, R4, R4, R3, R2, R1, respectively. The resistance value of each line resistor satisfies R1<R2<R3<R4. That is, the longer the corresponding signal path is, the smaller the resistance value of the line resistor is. In other words, the longer the length of the signal path connected to the line resistor is, the smaller the resistance value of the line resistor is. Therefore, the amplitude deviation of the signal generated in the input matching circuit substrate 12 can be compensated by the line resistor.

[0058] In this way, at least one line resistor is provided in each transmission line. And by adjusting the resistance value as described above, the same effect as that of Embodiment 2 can be obtained. In addition, by configuring the resistor on the transmission line, the reduction of the reflection amplitude of the harmonic can be prevented, so that a higher performance amplifier can be obtained.

[0059] Implementation method 4.

[0060] The amplifier according to the fourth embodiment has the same configuration and operation as those of the first embodiment except for the arrangement position of the harmonic processing circuit. Fig.15 1 is a diagram showing a transistor unit included in an amplifier according to Embodiment 4. The drain pad 38 and the transistor 36 are connected via a synthesis line 60 and a transmission line 62. The harmonic processing circuit 40 is connected to the transmission line 62. The harmonic processing circuit 40 can be provided with Figure 2 The same circuit as the harmonic processing circuit 40 of the embodiment. In addition, at each transistor unit, the harmonic processing circuit is connected to the transmission line connecting the drain pad and the transistor. The capacitance of the capacitor and the inductance of the inductor of the harmonic processing circuit can be set in the same manner as in the first embodiment.

[0061] The operation and effect of such an amplifier can be considered to be the same as the amplifier of Embodiment 1. The efficiency or power of the transistor gradually decreases as the impedance of the matching circuit connected to the transistor deviates from the optimal load. By using a harmonic processing circuit to compensate for the mismatch of the fundamental wave for each transistor unit, the impedance when observing the circuit side from each transistor unit can be matched to the fundamental wave impedance near which the maximum efficiency or maximum power is obtained for all transistor units. As a result, a high-efficiency and high-power amplifier can be obtained compared to a case where the present invention is not applied.

[0062] The harmonic processing circuit of the second embodiment may be connected to the transmission line connecting the drain pad and the transistor, or the harmonic processing circuit of the third embodiment and the line resistor may be provided. The harmonic processing circuit may be connected one-to-one to a plurality of transmission lines that connect the pads electrically connected to any of the two circuit patterns 12a and 16a, i.e., the gate pads or the drain pads, to a plurality of transistor units one-to-one. The features of the amplifiers according to the above-mentioned embodiments may be combined.

[0063] Description of the label

[0064] 10: amplifier, 12: input matching circuit substrate, 14: transistor chip, 16: output matching circuit substrate.

Claims

1. An amplifier, characterized in that: have: a circuit pattern providing a plurality of signal paths of varying lengths; Transistor chips; a plurality of pads of transistor units, which are electrically connected to the circuit pattern and are arranged on the transistor chip; a plurality of transistor cells; a plurality of transmission lines connecting the plurality of pads to the transistors of the plurality of transistor units one-to-one, the plurality of transmission lines being arranged on the transistor units; as well as a plurality of harmonic processing circuits, which are connected to the plurality of transmission lines one by one and are arranged on the transistor unit, Each of the plurality of harmonic processing circuits includes a capacitor and an inductor connected in series with a grounding terminal. The longer the length of the signal path to which the capacitor is connected, the smaller the capacitance of the capacitor. A product of the capacitance of the capacitor and the inductance of the inductor is made constant for each of the plurality of harmonic processing circuits.

2. The amplifier according to claim 1, characterized in that The plurality of harmonic processing circuits have in-circuit resistors. The longer the length of the signal path to which the in-circuit resistor is connected, the larger the resistance value of the in-circuit resistor becomes.

3. The amplifier according to claim 1, characterized in that There are a plurality of line resistors, at least one of which is provided in each of the plurality of transmission lines, The longer the length of the signal path to which the line resistor is connected, the smaller the resistance value of the line resistor.

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