Method of manufacturing light sensor

Abstract

A method for manufacturing a photosensor includes: forming a first conductive layer on a substrate, the first conductive layer including a metal layer and a transparent conductive oxide layer formed on the metal layer; forming a photoconductive layer on the first conductive layer; forming a second conductive layer on the photoconductive layer; forming a first photoresist pattern on the second conductive layer; etching the second conductive layer using the first photoresist pattern as an etching mask to form a second electrode; deforming the first photoresist pattern to form a second photoresist pattern; and etching the photoconductive layer and the first conductive layer respectively using the second photoresist pattern to form a photoconductive pattern and a first electrode.

Description

Technical Field

[0001] The present invention relates to a light sensor and more particularly to a method of manufacturing a light sensor for use in a display device. Background Art

[0002] The display device can provide visual information to the user. Recently, mobile devices including display devices (such as smart phones or tablet computers, etc.) are widely used. For example, e-commerce can be implemented through mobile devices. In e-commerce, security is very important.

[0003] Biometric technology (such as fingerprint recognition technology, iris recognition technology, facial recognition technology, etc.) is used for user authentication, security, etc. For example, fingerprint recognition sensors using fingerprint recognition technology are widely used in mobile devices such as smart phones, tablet computers, etc. Fingerprint recognition sensors may include capacitive fingerprint recognition sensors, optical fingerprint recognition sensors, ultrasonic fingerprint recognition sensors, etc. Summary of the invention

[0004] Example embodiments provide a method of manufacturing a photo sensor for reducing the number of photolithography processes.

[0005] According to an exemplary embodiment of the present invention, a method for manufacturing a photosensor includes: forming a first conductive layer on a substrate, the first conductive layer including a metal layer and a transparent conductive oxide layer formed on the metal layer; forming a photoconductive layer on the first conductive layer; forming a second conductive layer on the photoconductive layer; forming a first photoresist pattern on the second conductive layer; etching the second conductive layer using the first photoresist pattern as an etching mask to form a second electrode; deforming the first photoresist pattern to form a second photoresist pattern; and etching the photoconductive layer and the first conductive layer respectively using the second photoresist pattern as an etching mask to form a photoconductive pattern and a first electrode.

[0006] According to an exemplary embodiment of the present invention, a method for manufacturing a photosensor includes: forming a first conductive layer on a substrate; forming a first photoresist pattern on the first conductive layer; etching the first conductive layer using the first photoresist pattern as an etching mask to form a first electrode; forming a photoconductive layer on the first electrode; forming a second conductive layer on the photoconductive layer; forming a second photoresist pattern on the second conductive layer; etching the second conductive layer using the second photoresist pattern as an etching mask to form a second electrode; deforming the second photoresist pattern to form a third photoresist pattern; and etching the photoconductive layer using the third photoresist pattern as an etching mask to form a photoconductive pattern.

[0007] In the method of manufacturing a photosensor according to an embodiment, the second conductive layer, the photoconductive layer, and the first conductive layer may be etched using a single photolithography, or the second conductive layer and the photoconductive layer may be etched using a single photolithography, so that photolithography for forming a photodiode may be performed once or twice. Therefore, the time and cost for manufacturing the photosensor may be reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Illustrative, non-limiting embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[0009] Figure 1 is a cross-sectional view showing a light sensor according to an exemplary embodiment of the present invention.

[0010] Figure 2 , Figure 3 , Figure 4 , Figure 5 , Figure 6 , Figure 7 , Figure 8 , Fig. 9 , Fig.10 , Fig.11 and Fig.12 To illustrate the manufacturing method according to an exemplary embodiment of the present invention Figure 1 A cross-sectional view of a method of using an optical sensor.

[0011] Fig.13 is a cross-sectional view showing a light sensor according to an exemplary embodiment of the present invention.

[0012] Fig.14 , Fig.15 , Fig.16 , Fig.17 , Fig.18 , Fig.19 , Fig. 20 , Fig.21 and Fig. 22 To illustrate the manufacturing method according to an exemplary embodiment of the present invention Fig.13 A cross-sectional view of a method of using an optical sensor. DETAILED DESCRIPTION

[0013] Hereinafter, a light sensor and a method of manufacturing the light sensor according to embodiments will be explained in detail with reference to the accompanying drawings.

[0014] Below, we will refer to Figure 1 A light sensor according to an exemplary embodiment of the present invention is described.

[0015] Figure 1 is a cross-sectional view showing a light sensor according to an exemplary embodiment of the present invention.

[0016] refer to Figure 1, the light sensor according to the embodiment of the present invention may include a photodiode PD, a capacitor CAP, a first transistor TR1 and a second transistor TR2 provided on a substrate 100. The photodiode PD may include a first electrode 160a, a photoconductive pattern 170a and a second electrode 180a. The capacitor CAP may include a first capacitor electrode 142 and a second capacitor electrode 160b. The first transistor TR1 may include a first active layer 121, a first gate electrode 141, a first source electrode 160c and a first drain electrode 201. The second transistor TR2 may include a second active layer 122, a second gate electrode 143, a second source electrode 203 and a second drain electrode 204.

[0017] The photodiode PD may receive light incident thereon and may generate a detection signal corresponding to the light. In an exemplary embodiment, the photodiode PD may be a positive-intrinsic-negative (PIN) diode that converts light into an electrical signal based on a photoelectric effect. The capacitor CAP may be connected in parallel to the photodiode PD. The first transistor TR1 may transmit the detection signal transmitted from the photodiode PD to the signal processor in response to a gate signal. The second transistor TR2 may transmit the gate signal to the first transistor TR1.

[0018] The optical sensor may be used in a display device, etc. For example, the optical sensor may be provided below the display device or above the display device, and may be used as a fingerprint recognition sensor for recognizing a user of the display device, etc.

[0019] Below, we will refer to Figures 1 to 12 A method of manufacturing a light sensor according to an exemplary embodiment of the present invention is described.

[0020] Figure 2 , Figure 3 , Figure 4 , Figure 5 , Figure 6 , Figure 7 , Figure 8 , Fig. 9 , Fig.10 , Fig.11 and Fig.12 To show the manufacturing Figure 1 A cross-sectional view of a method of using an optical sensor.

[0021] refer to Figure 2 , a first active layer 121 and a second active layer 122 may be formed over the substrate 100 .

[0022] First, the buffer layer 110 may be formed on the substrate 100. For example, an inorganic insulating material (such as silicon nitride (SiN x ), silicon oxide (SiO x) etc.) may be deposited on the substrate 100 to form the buffer layer 110. Then, the first active layer 121 and the second active layer 122 may be formed on the buffer layer 110. For example, amorphous silicon may be deposited on the buffer layer 110 to form an amorphous silicon layer, and the amorphous silicon layer may be crystallized by heat treatment using, for example, an excimer laser, etc. to form a polycrystalline silicon layer. Further, the polycrystalline silicon layer may be etched to form the first active layer 121 and the second active layer 122.

[0023] refer to Figure 3 , a first gate electrode 141 , a first capacitor electrode 142 , and a second gate electrode 143 may be formed over the substrate 100 .

[0024] First, the first insulating layer 130 covering the first active layer 121 and the second active layer 122 may be formed on the buffer layer 110. For example, an inorganic insulating material (such as silicon oxide (SiO x ) or the like may be deposited on the buffer layer 110 to cover the first active layer 121 and the second active layer 122 , thereby forming the first insulating layer 130 .

[0025] Then, the first gate electrode 141, the first capacitor electrode 142, and the second gate electrode 143 may be formed on the first insulating layer 130. For example, a conductive material such as molybdenum (Mo), copper (Cu), etc. may be deposited on the first insulating layer 130 to form a conductive layer, and the conductive layer may be etched to form the first gate electrode 141, the first capacitor electrode 142, and the second gate electrode 143. The first gate electrode 141 and the second gate electrode 143 may overlap the first active layer 121 and the second active layer 122, respectively. The first capacitor electrode 142 may be disposed between the first gate electrode 141 and the second gate electrode 143. The first capacitor electrode 142, the first gate electrode 141, and the second gate electrode 143 may be disposed on the same layer of the first insulating layer 130. In an exemplary embodiment, the first capacitor electrode 142 may include an upper surface located lower than an upper surface of each of the first gate electrode 141 and the second gate electrode 143.

[0026] P-type (positive) impurities or N-type (negative) impurities may be implanted into the first active layer 121 and the second active layer 122 using the first gate electrode 141 and the second gate electrode 143 as ion-implantation masks after forming the first gate electrode 141 and the second gate electrode 143. Thus, a first source region and a first drain region may be formed at opposite sides of the first active layer 121, and a second source region and a second drain region may be formed at opposite sides of the second active layer 122.

[0027] refer to Figure 4 , a second insulating layer 150 may be formed on the first gate electrode 141 , the first capacitor electrode 142 , and the second gate electrode 143 .

[0028] First, the second insulating layer 150 covering the first gate electrode 141, the first capacitor electrode 142 and the second gate electrode 143 may be formed on the first insulating layer 130. For example, an inorganic insulating material (such as silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ) or the like) may be deposited on the first insulating layer 130 to cover the first gate electrode 141, the first capacitor electrode 142, and the second gate electrode 143 to form the second insulating layer 150. Then, the first source region contact hole CH1 may be formed in the second insulating layer 150 and the first insulating layer 130. The first source region contact hole CH1 may expose the first source region of the first active layer 121. For example, the first source region contact hole CH1 may penetrate the second insulating layer 150 and the first insulating layer 130 to expose the first source region of the first active layer 121.

[0029] refer to Figure 5 , a first conductive layer 160 , a photoconductive layer 170 , and a second conductive layer 180 may be formed on the second insulating layer 150 .

[0030] First, the first conductive layer 160 filling the first source region contact hole CH1 may be formed on the second insulating layer 150. The first conductive layer 160 may include a metal layer 161 and a transparent conductive oxide layer 162 formed on the metal layer 161. For example, the metal layer 161 may include a first portion filling the first source region contact hole CH1 and a second portion disposed between the transparent conductive oxide layer 162 and the second insulating layer 150. In an exemplary embodiment, a conductive material such as molybdenum (Mo), copper (Cu), etc. may be deposited to fill the first source region contact hole CH1 to form the metal layer 161, and a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), etc. may be deposited on the metal layer 161 to form the transparent conductive oxide layer 162. The first conductive layer 160 may contact the first source region of the first active layer 121 through the first source region contact hole CH1.

[0031] In an exemplary embodiment, the resistivity of the transparent conductive oxide layer 162 may be greater than the resistivity of the metal layer 161. For example, the resistivity of the metal layer 161 may be less than the resistivity of the transparent conductive oxide layer 162. Further, the transparent conductive oxide layer 162 may be formed by a sputtering process. Unlike the sputtering process, when the transparent conductive oxide layer 162 may be formed on the metal layer 161 having a relatively low resistivity using a chemical vapor deposition (CVD) process, an arc or arc discharge may occur. In an exemplary embodiment, the CVD process may include a plasma enhanced CVD (PECVD) process. Thus, the optical sensor and / or the deposition equipment may be damaged. In order to prevent arcing or arc discharge, a sputtering process may be used to form a transparent conductive oxide layer 162 having a relatively high resistivity on the metal layer 161 having a relatively low resistivity.

[0032] In an exemplary embodiment, thickness 162T of transparent conductive oxide layer 162 may be smaller than thickness 161T of metal layer 161. Since resistivity of transparent conductive oxide layer 162 is relatively high, thickness 162T of transparent conductive oxide layer 162 may be small to prevent the amount of resistance of first conductive layer 160 from increasing.

[0033] Then, a photoconductive layer 170 may be formed on the first conductive layer 160. The photoconductive layer 170 may include an N-type (negative) semiconductor layer 171, an I-type (intrinsic) semiconductor layer 172 formed on the N-type semiconductor layer 171, and a P-type (positive) semiconductor layer 173 formed on the I-type semiconductor layer 172.

[0034] In an exemplary embodiment, the photoconductive layer 170 may be formed using a chemical vapor deposition (CVD) process. The photoconductive layer 170 may be formed on the transparent conductive oxide layer 162 having a relatively high resistivity, thereby preventing arcing or arc discharge from occurring during the CVD process. Unlike the formation of the transparent conductive oxide layer 162, the CVD process may be used to form the photoconductive layer 170.

[0035] Then, the second conductive layer 180 may be formed on the photoconductive layer 170. In an exemplary embodiment, the second conductive layer 180 may include a transparent conductive oxide. For example, a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), etc. may be deposited on the photoconductive layer 170 to form the second conductive layer 180.

[0036] refer to Figure 6 , a photoresist pattern 300 may be formed on the second conductive layer 180 .

[0037] For example, a photoresist may be coated on the second conductive layer 180 to form a photoresist layer, and the photoresist layer may be exposed and developed in a photolithography process to form a photoresist pattern 300. The photoresist pattern 300 may overlap at least a portion of the first active layer 121 and at least a portion of the first capacitor electrode 142.

[0038] refer to Figure 7 , the second conductive layer 180 may be etched using the photoresist pattern 300 as an etching mask.

[0039] The second conductive layer 180 may be etched using the photoresist pattern 300 as an etching mask to form a second electrode 180a. In an embodiment, the second conductive layer 180 may be etched by using an isotropic etching process such as wet etching. In an exemplary embodiment, an undercut region UC under the photoresist pattern 300 may be formed in an isotropic etching process such as wet etching.

[0040] The second conductive layer 180 may be etched using the photoresist pattern 300 as an etching mask to form the second electrode 180a. In the etching process, a portion of the second conductive layer 180 below the photoresist pattern 300 may be etched to form an undercut region UC. In an exemplary embodiment, the undercut region UC may have a predetermined width W1 defined between an edge of the photoresist pattern 300 and a sidewall of the second electrode 180a. For example, a relatively large etch skew may be formed in the process of etching the second conductive layer 180. In order to form a relatively large etch skew, the time for exposing the second conductive layer 180 to the etchant may be increased. The second conductive layer 180 may be etched so that the sidewall of the second electrode 180a may be recessed from the edge of the photoresist pattern 300 by a predetermined width W1. The width W2 of the second electrode 180a may be less than the width of the photoresist pattern 300.

[0041] The photoresist pattern 300 may be deformed to form a photoresist pattern 301. Figure 8 In an exemplary embodiment, the photoresist pattern 300 may be reflowed. For example, the photoresist pattern 300 may be reflowed by heat treatment at a temperature of about 130 degrees or more to form a reflowed photoresist pattern 301. In such an embodiment, the reflowed photoresist pattern 301 may cover the side portion 180S of the second electrode 180a, and the undercut region UC may be filled with the reflowed photoresist pattern 301. However, the present invention is not limited thereto. In an exemplary embodiment, the photoresist pattern 300 may not be reflowed.

[0042] refer to Fig. 9, the photoconductive layer 170 and the first conductive layer 160 may be etched using the photoresist pattern 301 .

[0043] The photoconductive layer 170 and the first conductive layer 160 may be etched using the photoresist pattern 301 as an etching mask, so that a photoconductive pattern 170a and a first electrode 160a may be formed. The photoconductive pattern 170a may include an N-type semiconductor pattern 171a, an I-type semiconductor pattern 172a formed on the N-type semiconductor pattern 171a, and a P-type semiconductor pattern 173a formed on the I-type semiconductor pattern 172a. The first electrode 160a may include a metal pattern 161a and a transparent conductive oxide pattern 162a formed on the metal pattern 161a. In an embodiment, the photoconductive layer 170 and the first conductive layer 160 may be etched by an anisotropic etching process using dry etching.

[0044] Each of the photoconductive layer 170 and the first conductive layer 160 may be etched to the edge of the photoresist pattern 301. For example, in a top view, the shape of the photoresist pattern 301 may be transferred to each of the photoconductive layer 170 and the first conductive layer 160 to form a photoconductive pattern 170a and a first electrode 160a stacked on each other. Because each of the photoconductive layer 170 and the first conductive layer 160 is etched to the edge of the photoresist pattern 301, a width W3 of the photoconductive pattern 170a and a width W3 of the first electrode 160a may be greater than a width W2 of the second electrode 180a.

[0045] The first electrode 160a, the photoconductive pattern 170a, and the second electrode 180a may form a photodiode PD. The first capacitor electrode 142 and the second capacitor electrode 160b may form a capacitor CAP. In this case, the second capacitor electrode 160b and the first electrode 160a may be formed integrally. For example, the metal layer 161 may be patterned to form a metal pattern 161a of the first electrode 160a and a second capacitor electrode 160b. A portion of the patterned metal layer may be used as the metal pattern 161a, and another portion of the patterned metal layer may be used as the second capacitor electrode 160b.

[0046] refer to Fig.10 In an implementation, the first electrode 160a may be heat-treated.

[0047] First, the photoresist pattern 301 may be stripped. Then, heat may be supplied to the first electrode 160a to heat-treat the first electrode 160a. For example, heat may be supplied to the first electrode 160a using an oven or the like. As described above, the transparent conductive oxide pattern 162a formed by etching the transparent conductive oxide layer 162 may have a relatively high resistivity, and the first electrode 160a may be heat-treated to reduce the resistivity of the transparent conductive oxide pattern 162a. Therefore, the resistivity of the transparent conductive oxide pattern 162a after the heat treatment may be less than the resistivity of the transparent conductive oxide pattern 162a before the heat treatment.

[0048] In an embodiment, the first electrode 160a may be heat-treated after etching the photoconductive layer 170 and the first conductive layer 160. If the first conductive layer 160 is heat-treated before etching the first conductive layer 160, an excessive amount of residue may be generated when the first conductive layer 160 is etched.

[0049] refer to Fig.11 , a third insulating layer 190 may be formed on the second electrode 180a.

[0050] First, the third insulating layer 190 covering the second electrode 180a may be formed on the second insulating layer 150. For example, an inorganic insulating material (such as silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ) etc.) may be deposited on the second insulating layer 150 to cover the second electrode 180 a , thereby forming a third insulating layer 190 .

[0051] Then, a first drain region contact hole CH21, a second electrode contact hole CH22, a first capacitor electrode contact hole CH23, a second source region contact hole CH24, and a second drain region contact hole CH25 may be formed in the third insulating layer 190. The first drain region contact hole CH21, the second electrode contact hole CH22, the first capacitor electrode contact hole CH23, the second source region contact hole CH24, and the second drain region contact hole CH25 may expose the first drain region of the first active layer 121, the second electrode 180a, the first capacitor electrode 142, the second source region of the second active layer 122, and the second drain region of the second active layer 122, respectively.

[0052] refer to Fig.12, the first drain electrode 201, the connecting electrode 202, the second source electrode 203, and the second drain electrode 204 may be formed on the third insulating layer 190. For example, a conductive material such as aluminum (Al), titanium (Ti), copper (Cu), etc. may be deposited to fill the first drain region contact hole CH21, the second electrode contact hole CH22, the first capacitor electrode contact hole CH23, the second source region contact hole CH24, and the second drain region contact hole CH25 to form a conductive layer, and the conductive layer may be etched to form the first drain electrode 201, the connecting electrode 202, the second source electrode 203, and the second drain electrode 204. The first drain electrode 201 may contact the drain region of the first active layer 121 through the first drain region contact hole CH21, and the connecting electrode 202 may contact the second electrode 180a and the first capacitor electrode 142 through the second electrode contact hole CH22 and the first capacitor electrode contact hole CH23, respectively. The second source electrode 203 may contact the second source region of the second active layer 122 through the second source region contact hole CH24 , and the second drain electrode 204 may contact the second drain region of the second active layer 122 through the second drain region contact hole CH25 .

[0053] The first active layer 121, the first gate electrode 141, the first source electrode 160c, and the first drain electrode 201 may form a first transistor TR1. The first source electrode 160c and the first electrode 160a may be integrally formed. For example, Figure 5 The metal layer 161 may be patterned so that a portion of the patterned metal layer may be used as the metal pattern 161a, and another portion of the patterned metal layer filling the first source region contact hole CH1 may be used as the first source electrode 160c. The second active layer 122, the second gate electrode 143, the second source electrode 203, and the second drain electrode 204 may form a second transistor TR2. The connecting electrode 202 may electrically connect the second electrode 180a of the photodiode PD to the first capacitor electrode 142 of the capacitor CAP.

[0054] refer to Figure 1 , a protective layer 220 may be formed over the second source electrode 203 and the second drain electrode 204 .

[0055] First, a fourth insulating layer 210 covering the first drain electrode 201, the connecting electrode 202, the second source electrode 203, and the second drain electrode 204 may be formed on the third insulating layer 190. For example, an organic insulating material such as polyimide (PI) or the like may be deposited on the third insulating layer 190 to cover the first drain electrode 201, the connecting electrode 202, the second source electrode 203, and the second drain electrode 204, thereby forming the fourth insulating layer 210. The fourth insulating layer 210 may have a planarized upper surface.

[0056] Then, a preliminary protective layer may be formed on the fourth insulating layer 210. For example, a conductive material such as aluminum (Al), titanium (Ti), copper (Cu), etc. may be deposited on the fourth insulating layer 210 to form the preliminary protective layer, and the preliminary protective layer may be etched to form the protective layer 220. The protective layer 220 may overlap the second transistor TR2.

[0057] In the method of manufacturing a photosensor according to an embodiment of the present invention, the second conductive layer 180, the photoconductive layer 170, and the first conductive layer 160 can be etched by a single photolithography, so that the photolithography for forming the photodiode PD can be performed once. Therefore, the time and cost for manufacturing the photosensor can be reduced.

[0058] Below, we will refer to Fig.13 A light sensor according to an embodiment of the present invention is described.

[0059] Fig.13 is a cross-sectional view showing a light sensor according to an embodiment of the present invention.

[0060] refer to Fig.13 , the light sensor according to the embodiment of the present invention may include a photodiode PD, a capacitor CAP, a first transistor TR1 and a second transistor TR2 disposed on a substrate 100. The photodiode PD may include a first electrode 1160a, a photoconductive pattern 170a and a second electrode 180a. The capacitor CAP may include a first capacitor electrode 142 and a second capacitor electrode 1160b. The first transistor TR1 may include a first active layer 121, a first gate electrode 141, a first source electrode 1160c, a first drain connection electrode 1161 and a first drain electrode 1201. The second transistor TR2 may include a second active layer 122, a second gate electrode 143, a second source connection electrode 1163, a second source electrode 1203, a second drain connection electrode 1164 and a second drain electrode 1204.

[0061] Below, we will refer to Figures 13 to 22 A method for manufacturing a light sensor according to an embodiment of the present invention is described. Figures 1 to 12 The description of the elements of the method for manufacturing a light sensor according to the embodiment of the present invention is substantially the same as or similar to the description of the elements of the method for manufacturing a light sensor according to the embodiment of the present invention. Figures 13 to 22 A description of the elements of a method of manufacturing a light sensor according to an embodiment of the present invention is described.

[0062] Fig.14 , Fig.15 , Fig.16 , Fig.17 , Fig.18 , Fig.19 , Fig. 20 , Fig.21 and Fig. 22To show the manufacturing Fig.13 A cross-sectional view of a method of using an optical sensor.

[0063] refer to Fig.14 , a second insulating layer 150 may be formed on the first gate electrode 141 , the first capacitor electrode 142 , and the second gate electrode 143 .

[0064] First, a second insulating layer 150 covering the first gate electrode 141, the first capacitor electrode 142, and the second gate electrode 143 may be formed on the first insulating layer 130. Then, a first source region contact hole CH11, a first drain region contact hole CH12, a first capacitor electrode contact hole CH13, a second source region contact hole CH14, and a second drain region contact hole CH15 may be formed in the second insulating layer 150. The first source region contact hole CH11 and the first drain region contact hole CH12 may expose the first source region and the first drain region of the first active layer 121, respectively. The first capacitor electrode contact hole CH13 may expose the first capacitor electrode 142. The second source region contact hole CH14 and the second drain region contact hole CH15 may expose the second source region and the second drain region of the second active layer 122, respectively.

[0065] refer to Fig.15 , the first conductive layer 1160 may be formed on the second insulating layer 150 .

[0066] A first conductive layer 1160 filling the first source contact hole CH11, the first drain contact hole CH12, the first capacitor electrode contact hole CH13, the second source contact hole CH14, and the second drain contact hole CH15 may be formed on the second insulating layer 150. The first conductive layer 1160 may include a metal. For example, a conductive material such as molybdenum (Mo), copper (Cu), etc. may be deposited to fill the first source contact hole CH11, the first drain contact hole CH12, the first capacitor electrode contact hole CH13, the second source contact hole CH14, and the second drain contact hole CH15, thereby forming the first conductive layer 1160. The first conductive layer 1160 may contact the first source region and the first drain region of the first active layer 121 through the first source contact hole CH11 and the first drain contact hole CH12, respectively. The first conductive layer 1160 may contact the first capacitor electrode 142 through the first capacitor electrode contact hole CH13. The first conductive layer 1160 may contact the second source region and the second drain region of the second active layer 122 through the second source region contact hole CH14 and the second drain region contact hole CH15 , respectively.

[0067] refer to Fig.16 , a first photoresist pattern 310 may be formed on the first conductive layer 1160 .

[0068] For example, a photoresist may be coated on the first conductive layer 1160 to form a photoresist layer, and the photoresist layer may be exposed and developed using a photolithography process to form a first photoresist pattern 310. The first photoresist pattern 310 may overlap at least a portion of the first active layer 121, at least a portion of the first capacitor electrode 142, the first drain region contact hole CH12, the first capacitor electrode contact hole CH13, the second source region contact hole CH14, and the second drain region contact hole CH15.

[0069] refer to Fig.17 , the first conductive layer 1160 may be etched using the first photoresist pattern 310 .

[0070] The first conductive layer 1160 may be etched using the first photoresist pattern 310 as an etching mask to form a first electrode 1160a, a first drain connection electrode 1161, a first connection electrode 1162, a second source connection electrode 1163, and a second drain connection electrode 1164. The first capacitor electrode 142 and the second capacitor electrode 1160b may form a capacitor CAP. In this case, the second capacitor electrode 1160b and the first electrode 1160a may be formed integrally. For example, Fig.15 The first conductive layer 1160 may be patterned such that a portion of the patterned first conductive layer may serve as the first electrode 1160a and another portion of the patterned first conductive layer may serve as the second capacitor electrode 1160b.

[0071] refer to Fig.18 , the photoconductive layer 170 and the second conductive layer 180 may be sequentially formed on the first electrode 1160a, the first drain connection electrode 1161, the first connection electrode 1162, the second source connection electrode 1163, and the second drain connection electrode 1164.

[0072] First, the first photoresist pattern 310 may be stripped. Then, a photoconductive layer 170 covering the first electrode 1160a, the first drain connection electrode 1161, the first connection electrode 1162, the second source connection electrode 1163, and the second drain connection electrode 1164 may be formed on the second insulating layer 150. Then, a second conductive layer 180 may be formed on the photoconductive layer 170.

[0073] refer to Fig.19 , a second photoresist pattern 320 may be formed on the second conductive layer 180 .

[0074] For example, a photoresist may be coated on the second conductive layer 180 to form a photoresist layer, and the photoresist layer may be exposed and developed using a photolithography process to form a second photoresist pattern 320. The second photoresist pattern 320 may overlap at least a portion of the first active layer 121 and at least a portion of the first capacitor electrode 142.

[0075] refer to Fig. 20 , the second conductive layer 180 may be etched using the second photoresist pattern 320 .

[0076] The second conductive layer 180 may be etched using the second photoresist pattern 320 as an etching mask to form a second electrode 180a. In an embodiment, the second conductive layer 180 may be etched by isotropic etching such as wet etching. In an exemplary embodiment, an undercut region UC under the second photoresist pattern 320 may be formed in an isotropic etching process such as wet etching.

[0077] The second conductive layer 180 may be etched using the second photoresist pattern 320 as an etching mask to form a second electrode 180a. In the etching process, a portion of the second conductive layer 180 below the second photoresist pattern 320 may be etched to form an undercut region UC having a predetermined width between an edge of the second photoresist pattern 320 and a sidewall of the second electrode 180a exposed by the undercut region UC. The second conductive layer 180 may be etched so that the sidewall of the second electrode 180a may be recessed by a predetermined width from the edge of the second photoresist pattern 320. The width of the second electrode 180a may be smaller than the width of the second photoresist pattern 320.

[0078] The second photoresist pattern 320 may be deformed to form a third photoresist pattern 321. Fig.21 In an embodiment, the second photoresist pattern 320 may be reflowed to form a reflowed third photoresist pattern 321. For example, the reflowed third photoresist pattern 321 may cover the side portion 180S of the second electrode 180a, and the undercut region UC may be filled with the reflowed third photoresist pattern 321. However, the present invention is not limited thereto. In an exemplary embodiment, the second photoresist pattern 320 may not be reflowed.

[0079] refer to Fig. 22 , the photoconductive layer 170 may be etched using the third photoresist pattern 321 .

[0080] The photoconductive layer 170 may be etched using the third photoresist pattern 321 as an etching mask, so that a photoconductive pattern 170a may be formed. In an implementation, the photoconductive layer 170 may be etched by an anisotropic etching process such as dry etching.

[0081] The photoconductive layer 170 may be etched to the edge of the third photoresist pattern 321. For example, in a top view, the shape of the third photoresist pattern 321 may be transferred to the photoconductive layer 170 to form a photoconductive pattern 170a. Because the photoconductive layer 170 is etched to the edge of the third photoresist pattern 321, the width of the photoconductive pattern 170a may be greater than the width of the second electrode 180a. The first electrode 1160a, the photoconductive pattern 170a, and the second electrode 180a may form a photodiode PD.

[0082] refer to Fig.13 , a third insulating layer 190 may be formed on the second electrode 180a, and a first drain electrode 1201, a second connection electrode 1202, a second source electrode 1203, and a second drain electrode 1204 may be formed on the third insulating layer 190. The first drain electrode 1201, the second connection electrode 1202, the second source electrode 1203, and the second drain electrode 1204 may contact the first drain connection electrode 1161, the first connection electrode 1162, the second source connection electrode 1163, and the second drain connection electrode 1164, respectively, through contact holes formed in the third insulating layer 190.

[0083] The first active layer 121, the first gate electrode 141, the first source electrode 1160c, the first drain connection electrode 1161, and the first drain electrode 1201 may form a first transistor TR1. In this case, the first source electrode 1160c and the first electrode 1160a may be formed integrally. The second active layer 122, the second gate electrode 143, the second source connection electrode 1163, the second source electrode 1203, the second drain connection electrode 1164, and the second drain electrode 1204 may form a second transistor TR2. The first connection electrode 1162 and the second connection electrode 1202 may electrically connect the second electrode 180a of the photodiode PD to the first capacitor electrode 142 of the capacitor CAP.

[0084] In the method of manufacturing a photosensor according to an embodiment of the present invention, the first conductive layer 1160 may be etched by a first photolithography process, and the second conductive layer 180 and the photoconductive layer 170 may be etched by a second photolithography process, so that the photodiode PD may be formed by performing two photolithography processes. Therefore, the time and cost for manufacturing the photosensor may be reduced.

[0085] The optical sensor according to the embodiment may be applied to a fingerprint recognition sensor of a display device included in a computer, a notebook, a mobile phone, a smart phone, a smart tablet, a PMP, a PDA, an MP3 player, etc.

[0086] Although the optical sensor and the method of manufacturing the optical sensor according to the embodiments have been described with reference to the drawings, the illustrated embodiments are examples and may be modified and changed by persons having ordinary knowledge in the relevant technical field without departing from the technical spirit described in the appended claims.

Claims

1. A method for manufacturing a light sensor, the method comprising: forming a first conductive layer on a substrate, wherein the first conductive layer comprises a metal layer and a transparent conductive oxide layer formed on the metal layer; forming a photoconductive layer on the first conductive layer; forming a second conductive layer on the photoconductive layer; forming a first photoresist pattern on the second conductive layer; Using an isotropic etching process, etching the second conductive layer using the first photoresist pattern as an etching mask to form a second electrode; deforming the first photoresist pattern to form a second photoresist pattern; using the second photoresist pattern as an etching mask to etch the photoconductive layer and the first conductive layer respectively to form a photoconductive pattern and a first electrode; as well as after etching the photoconductive layer and the first conductive layer and after stripping the second photoresist pattern, heat-treating the first electrode, The transparent conductive oxide layer is formed by a sputtering process.

2. The method according to claim 1, The resistivity of the transparent conductive oxide layer is greater than that of the metal layer.

3. The method according to claim 1, The thickness of the transparent conductive oxide layer is smaller than the thickness of the metal layer.

4. The method according to claim 1, The photoconductive layer comprises: N-type semiconductor layer; an I-type semiconductor layer formed on the N-type semiconductor layer; as well as A P-type semiconductor layer is formed on the I-type semiconductor layer.

5. The method according to claim 1, The second conductive layer includes a transparent conductive oxide.

6. The method according to claim 1, The etching of the second conductive layer to form the second electrode comprises: forming an undercut region below the first photoresist pattern, and The sidewall of the second electrode is recessed from the edge of the first photoresist pattern by a predetermined width.

7. The method according to claim 6, wherein deforming the first photoresist pattern comprises: performing a heat treatment on the first photoresist pattern to reflow the first photoresist pattern, thereby forming the second photoresist pattern, The second photoresist pattern fills the undercut area.

8. A method of manufacturing a light sensor, the method comprising: forming a first conductive layer on a substrate; forming a first photoresist pattern on the first conductive layer; etching the first conductive layer using the first photoresist pattern as an etching mask to form a first electrode; forming a photoconductive layer on the first electrode; forming a second conductive layer on the photoconductive layer; forming a second photoresist pattern on the second conductive layer; etching the second conductive layer using the second photoresist pattern as an etching mask to form a second electrode; deforming the second photoresist pattern to form a third photoresist pattern; etching the photoconductive layer using the third photoresist pattern as an etching mask to form a photoconductive pattern; as well as after etching the photoconductive layer and after stripping the third photoresist pattern, heat-treating the first electrode, The second conductive layer is etched using an isotropic etching process.

9. The method according to claim 8, The etching of the second conductive layer to form the second electrode comprises: forming an undercut region below the second photoresist pattern, and The sidewall of the second electrode is recessed from the edge of the second photoresist pattern by a predetermined width.

10. The method according to claim 9, wherein deforming the second photoresist pattern to form the third photoresist pattern comprises: performing a heat treatment on the second photoresist pattern to reflow the second photoresist pattern, thereby forming the third photoresist pattern, The third photoresist pattern fills the undercut area.

Images