Substrate support device, heat treatment device, substrate support method, heat treatment method

Abstract

The present invention provides a substrate support device, a heat treatment device, a substrate support method, and a heat treatment method, which can suppress the substrate from breaking even when the substrate is bent by flash irradiation. The substrate support device related to the technology disclosed in the specification of the present application comprises: a holding plate for facing a substrate that can be bent by flash irradiation heating; a plurality of substrate support pins, which are provided on the holding plate and used to support the substrate, and the plurality of substrate support pins are arranged at positions that make the volume of the space between the holding plate and the substrate in a non-bent state equal to the volume of the space between the holding plate and the substrate in a bent state.

Description

Technical Field

[0001] The technology disclosed in this application specification relates to a substrate support device, a heat treatment device, a substrate support method, and a heat treatment method. Background Art

[0002] In the manufacturing process of semiconductor devices, impurity introduction is an essential step for forming pn junctions in thin plate-shaped precision electronic substrates (hereinafter sometimes simply referred to as "substrates") such as semiconductor wafers. Impurity introduction is generally performed by ion implantation and subsequent annealing.

[0003] Ion implantation is a technique for physically implanting impurities by ionizing impurity elements such as boron (B), arsenic (As), and phosphorus (P) and causing them to collide with a semiconductor wafer at a high acceleration voltage.

[0004] The implanted impurities are activated by annealing. If the annealing time is several seconds or longer, the implanted impurities are deeply diffused by heat, resulting in a deeper junction depth than required, which may prevent the formation of a good device.

[0005] Therefore, flash lamp annealing (FLA) has attracted attention as an annealing technology for heating semiconductor wafers in a very short time. FLA is a heat treatment technology that heats only the surface of a semiconductor wafer into which impurities have been injected in a very short time (several milliseconds or less) by irradiating a flash of light onto the surface of a semiconductor wafer using a xenon flash lamp (hereinafter referred to as a "flash lamp").

[0006] The radiation spectrum of the xenon flash lamp is distributed from the ultraviolet region to the near infrared region, and the wavelength is shorter than that of the conventional halogen lamp, and is almost consistent with the basic absorption band of the silicon semiconductor wafer. Therefore, when the xenon flash lamp is irradiated to the semiconductor wafer, less light is transmitted, so the temperature of the semiconductor wafer can be quickly increased. In addition, it is known that if the flash is irradiated in an extremely short time of less than a few milliseconds, it is possible to selectively increase the temperature only near the surface of the semiconductor wafer. Therefore, if the temperature is increased in an extremely short time using the xenon flash lamp, it is possible to activate the impurities without deeply diffusing the impurities.

[0007] For example, Patent Document 1 discloses a flash lamp annealing apparatus that preheats a semiconductor wafer using a hot plate disposed below a processing chamber and then irradiates a surface of the semiconductor wafer with flash light from a flash lamp disposed above the processing chamber.

[0008] Patent Document 1: Japanese Patent Application Publication No. 2004-186542

[0009] However, since the flash emitted from the flash lamp is high-energy light, the surface temperature of a substrate such as a semiconductor wafer irradiated by the flash rises in a short time. Furthermore, if the surface of the substrate irradiated by the flash undergoes rapid thermal expansion, the substrate may bend in a convex shape.

[0010] Therefore, the substrate supported by the support pins may shake due to the bending, and the substrate may bounce off the support pins due to the shaking. There is a possibility that the substrate bounced off the support pins may break when it contacts the support pins again. Summary of the invention

[0011] The technology disclosed in the present specification has been proposed in view of the above-described problems, and is a technology for preventing cracks in a substrate even when the substrate is bent due to flash irradiation.

[0012] The first method of the technology disclosed in the present application specification comprises: a holding plate, which is opposite to a substrate that can be bent by flash irradiation heating; a plurality of substrate support pins, which are provided on the holding plate and are used to support the substrate, and the plurality of substrate support pins are arranged at a position where the volume of the space between the holding plate and the substrate in a non-bent state becomes equal to the volume of the space between the holding plate and the substrate in a bent state.

[0013] A second aspect of the technology disclosed in the present specification is related to the first aspect, and the substrate supporting pins are arranged in a ring shape in a plan view.

[0014] A third aspect of the technology disclosed in the present specification is related to the first or second aspect, and the substrate has a circular shape in a plan view.

[0015] A fourth aspect of the technology disclosed in the present specification is related to any one of the first to third aspects, wherein the height of the substrate support pin is set to h pin , the curvature radius of the substrate in the bent state is R, and the height of the substrate in the bent state is h bow , the diameter of the substrate in the unbent state is D wafer , when the diameter of the substrate in the bent state when viewed from above is c, the distance r between each substrate support pin and the center of the circular substrate when viewed from above pin satisfy

[0016]

[0017] A fifth aspect of the technology disclosed in the present specification includes the above-mentioned substrate support device and a flash lamp for irradiating the substrate with the flash light.

[0018] The sixth method of the technology disclosed in the present application specification includes the process of making a substrate that can be bent by flash irradiation heating face opposite to a holding plate provided with a plurality of substrate supporting pins for supporting the substrate; and the process of arranging the plurality of substrate supporting pins at positions where the volume of the space between the holding plate and the substrate in a non-bent state becomes equal to the volume of the space between the holding plate and the substrate in a bent state.

[0019] A seventh aspect of the technology disclosed in the present specification includes a step of irradiating the substrate supported by the substrate supporting method according to claim 6 with the flash light using a flash lamp.

[0020] According to the first to seventh aspects of the technology disclosed in the present specification, even when the semiconductor wafer is bent due to flash irradiation, it is possible to suppress the semiconductor wafer from jumping off the substrate supporting pins, thereby suppressing cracking of the semiconductor wafer.

[0021] Furthermore, the objects, features, aspects, and advantages associated with the technology disclosed in the present application specification will become more apparent from the detailed description and drawings given below. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is a plan view schematically showing a configuration example of a heat treatment apparatus according to an embodiment.

[0023] Figure 2 It is a front view schematically showing a configuration example of a heat treatment apparatus according to an embodiment.

[0024] Figure 3 It is a cross-sectional view schematically showing the structure of a heat treatment section in the heat treatment apparatus according to the embodiment.

[0025] Figure 4 It is a perspective view showing the overall appearance of the holding portion.

[0026] Figure 5 This is a top view of the base.

[0027] Figure 6 This is a cross-sectional view of the base.

[0028] Figure 7 It is a top view of the transfer mechanism.

[0029] Figure 8 It is a side view of the transfer mechanism.

[0030] Fig. 9 It is a top view showing the arrangement of a plurality of halogen lamps.

[0031] Fig.10It is a diagram showing the positional relationship between the lower radiation thermometer and the semiconductor wafer held on the susceptor.

[0032] Fig.11 This is a functional block diagram showing the relationship between the lower radiation thermometer, the upper radiation thermometer, and the control unit.

[0033] Fig.12 This is a flowchart showing the processing procedure of a semiconductor wafer.

[0034] Fig.13 This is a diagram showing changes in the surface temperature of a semiconductor wafer.

[0035] Fig.14 This is a diagram schematically showing the gap volume when the semiconductor wafer is bent.

[0036] Fig.15 It means V dome 、V disc and V total A diagram showing an example of a simulation result related to the relationship between .

[0037] Fig.16 are r according to formula (9) pin A diagram showing the height at which a semiconductor wafer supported by substrate supporting pins is experimentally jumped under the condition of .

[0038] Fig.17 are r according to formula (9) pin A diagram showing the height at which a semiconductor wafer supported by substrate supporting pins is experimentally jumped under the condition of .

[0039] Fig.18 are respectively expressed according to other r pin A diagram showing the height at which a semiconductor wafer supported by substrate supporting pins is experimentally jumped under the condition of .

[0040] Fig.19 are respectively expressed according to other r pin A diagram showing the height at which a semiconductor wafer supported by substrate supporting pins is experimentally jumped under the condition of .

[0041] [Description of Reference Numerals]

[0042] 3: Control Department

[0043] 4: Halogen heating unit

[0044] 5: Flash heating unit

[0045] 6: Chamber

[0046] 7: Maintaining part

[0047] 10: Transfer mechanism

[0048] 11: Transfer arm

[0049] 12: Lifting pin

[0050] 13: Horizontal movement mechanism

[0051] 14: Lifting mechanism

[0052] 20: Lower radiation thermometer

[0053] 21, 26: Transparent window

[0054] 22, 27: Temperature measurement unit

[0055] 24, 29: Infrared sensor

[0056] 25: Upper radiation thermometer

[0057] 31: Temperature calculation unit

[0058] 33: Display unit

[0059] 34: Input

[0060] 41, 51: Frame

[0061] 43, 52: Reflector

[0062] 53: Light radiation window

[0063] 61: Chamber side

[0064] 61a, 61b, 79: Through holes

[0065] 62: concave part

[0066] 63: Upper chamber window

[0067] 64: Lower chamber window

[0068] 65: Heat treatment space

[0069] 66: Carrying opening

[0070] 68, 69: Reflection ring

[0071] 71: Base ring

[0072] 72: Connection

[0073] 74: Pedestal

[0074] 75: Keep Plate

[0075] 75a: Keep the face

[0076] 76: Guide ring

[0077] 77: Baseboard support pin

[0078] 78: Opening

[0079] 81: Gas supply hole

[0080] 82, 87: Buffer space

[0081] 83: Gas supply pipe

[0082] 84, 89, 192: valve

[0083] 85: Processing gas supply source

[0084] 86: Exhaust hole

[0085] 88, 191: Exhaust pipe

[0086] 100: Heat treatment device

[0087] 101: Indexer

[0088] 110: Loading port

[0089] 120: Handover robot

[0090] 120R, 120S, 150R: Arrow

[0091] 121: Hands

[0092] 130, 140: Cooling unit

[0093] 131: First cooling chamber

[0094] 141: Second cooling chamber

[0095] 150: Handling robot

[0096] 151a, 151b: Handling

[0097] 160: Heat treatment department

[0098] 170: Transport chamber

[0099] 181, 182, 183, 184, 185: Gate valve

[0100] 190: Exhaust

[0101] 230: Positioning unit

[0102] 231: Positioning chamber DETAILED DESCRIPTION

[0103] In the following embodiments, detailed features and the like for technical description are shown, but these are only examples, and not all examples are essential features for enabling the embodiments.

[0104] In addition, the drawings are used for schematic representation, and for the convenience of explanation, the structures of the drawings are appropriately omitted or simplified. In addition, the mutual relationship between the size and position of the structures etc. respectively shown in different drawings is not necessarily accurately represented, and can be appropriately changed. In addition, for drawings such as top views that are not sectional views, hatching is sometimes added to facilitate understanding of the contents of the embodiments.

[0105] In the following description, the same components are denoted by the same reference numerals, and their names and functions are also considered to be the same, so in order to avoid duplication, detailed descriptions of these components may be omitted.

[0106] Furthermore, in the following description, when “having,” “including,” “having” a certain component or the like, it is a non-exclusive expression that does not exclude the presence of other components unless otherwise specified.

[0107] In addition, the expressions indicating relative or absolute positional relationships in the descriptions recorded below, such as "toward a direction", "along a direction", "parallel", "orthogonal", "center", "concentric" or "coaxial", etc., unless otherwise specified, include situations in which the positional relationship is strictly indicated, as well as situations in which there is a tolerance or an angle or distance shift within a range that can achieve the same degree of functionality.

[0108] In addition, in the descriptions recorded below, expressions indicating equivalent states, such as "same", "equal", "equal" or "uniform", etc., unless otherwise specified, include situations in which the positional relationship is strictly indicated, as well as situations in which there is a tolerance or an angle or distance shift within a range that can achieve the same degree of functionality.

[0109] In addition, in the description recorded below, even if there are terms used to indicate specific positions or directions such as "up", "down", "left", "right", "side", "bottom", "front" or "inside", these terms are used to facilitate understanding of the contents of the implementation method and have nothing to do with the position or direction during actual implementation.

[0110] In the following description, when "the upper surface of..." or "the lower surface of..." is described, in addition to the upper surface or the lower surface of the target structural element itself, the state of other structural elements formed on the upper surface or the lower surface of the target structural element is also included. That is, for example, when "B is provided on the upper surface of A", it does not exclude the presence of another structural element "C" between A and B.

[0111] <Implementation Method>

[0112] Hereinafter, a substrate supporting device, a heat treatment device, a substrate supporting method, and a heat treatment method according to the present embodiment will be described.

[0113] <About the structure of heat treatment equipment>

[0114] Figure 1 1 is a top view schematically showing a configuration example of a heat treatment apparatus 100 according to the present embodiment. Figure 2 It is a front view schematically showing a configuration example of a heat treatment apparatus 100 according to the present embodiment.

[0115] like Figure 1 As shown in the example of FIG. 1 , the heat treatment apparatus 100 is a flash lamp annealing apparatus that heats the semiconductor wafer W by irradiating a flash of light onto a disk-shaped semiconductor wafer W as a substrate.

[0116] The size of the semiconductor wafer W to be processed is not particularly limited, and may be, for example, or round shape.

[0117] like Figure 1 and Figure 2 As shown, the heat treatment device 100 includes: a divider part 101, which is used to move an unprocessed semiconductor wafer W from the outside into the device, and to move the processed semiconductor wafer W out of the device; a positioning part 230, which positions the unprocessed semiconductor wafer W; two cooling parts, namely the cooling part 130 and the cooling part 140, which cool the semiconductor wafer W after the heat treatment; a heat treatment part 160, which performs flash heat treatment on the semiconductor wafer W; and a transport robot 150, which transfers the semiconductor wafer W to the cooling part 130, the cooling part 140 and the heat treatment part 160.

[0118] Furthermore, the heat treatment apparatus 100 includes a control unit 3 that controls the operation mechanisms provided in the above-mentioned processing units and the transport robot 150 to perform the flash heating process on the semiconductor wafer W.

[0119] The indexer section 101 includes: a loading port 110 on which a plurality of storage racks C (two in this embodiment) are arranged and loaded; and a transfer robot 120 for taking out unprocessed semiconductor wafers W from each storage rack C and storing processed semiconductor wafers W in each storage rack C.

[0120] The rack C containing unprocessed semiconductor wafers W is transported by an automated guided vehicle (AGV, OHT) or the like and placed on the loading port 110 , and the rack C containing processed semiconductor wafers W is removed from the loading port 110 by an automated guided vehicle.

[0121] In addition, in the loading port 110, the storage rack C is configured to be able to Figure 2 The transfer robot 120 is raised and lowered in the manner shown by the arrow CU, so that any semiconductor wafer W can be put in and out of the storage rack C.

[0122] In addition, as a form of the storage rack C, in addition to a front opening unified pod (FOUP) that stores semiconductor chips W in a closed space, it can also be a standard mechanical interface (SMIF) wafer box, or an open cassette (OC) that exposes the stored semiconductor chips W to external air.

[0123] In addition, the transfer robot 120 is configured to be able to perform the following operations: Figure 1 The transfer robot 120 performs sliding movement as indicated by arrow 120S and rotation and lifting movement as indicated by arrow 120R. Thus, the transfer robot 120 performs semiconductor wafers W in and out of the two receiving racks C, and transfers semiconductor wafers W to the positioning unit 230 and the two cooling units 130 and 140.

[0124] The semiconductor wafer W is loaded and unloaded from the storage rack C by the transfer robot 120 by sliding the hand 121 and lifting the storage rack C. In addition, the semiconductor wafer W is transferred between the transfer robot 120 and the positioning unit 230 or the cooling unit 130 (cooling unit 140) by sliding the hand 121 and lifting the transfer robot 120.

[0125] The positioning unit 230 is connected to the side of the indexer unit 101 along the Y-axis direction. The positioning unit 230 is a processing unit that rotates the semiconductor wafer W in a horizontal plane to orient it in a direction suitable for flash heating. The positioning unit 230 is provided with a mechanism that supports the semiconductor wafer W in a horizontal posture and rotates it, and a mechanism that optically detects a notch or an orientation flat surface formed on the peripheral portion of the semiconductor wafer W, etc., inside a positioning chamber 231, which is a frame made of aluminum alloy.

[0126] The semiconductor wafer W is delivered to the positioning unit 230 by the delivery robot 120. The semiconductor wafer W is delivered from the delivery robot 120 to the positioning chamber 231 so that the center of the wafer is located at a predetermined position.

[0127] In the positioning unit 230, the semiconductor wafer W received from the indexer unit 101 is rotated about a vertical axis with the center of the semiconductor wafer W as the rotation center, and the orientation of the semiconductor wafer W is adjusted by optically detecting the notch, etc. The semiconductor wafer W after the orientation adjustment is taken out from the positioning chamber 231 by the transfer robot 120.

[0128] As a transfer space for semiconductor wafers W using the transfer robot 150, a transfer chamber 170 is provided to accommodate the transfer robot 150. The transfer chamber 170 is connected to the chamber 6 of the heat treatment unit 160, the first cooling chamber 131 of the cooling unit 130, and the second cooling chamber 141 of the cooling unit 140 in a three-way communication.

[0129] The heat treatment unit 160, which is a main part of the heat treatment apparatus 100, is a substrate processing unit that performs flash heating by irradiating flash light from a xenon flash lamp FL onto the preheated (auxiliary heated) semiconductor wafer W. The structure of the heat treatment unit 160 will be described in detail later.

[0130] The two processing units, i.e., the cooling unit 130 and the cooling unit 140, have substantially the same structure. The cooling unit 130 and the cooling unit 140 are respectively provided with a metal cooling plate and a quartz plate (both not shown) placed on the upper surface of the cooling plate in the interior of the first cooling chamber 131 or the second cooling chamber 141, which are frames made of aluminum alloy. The cooling plate is adjusted to a normal temperature (about 23° C.) by a Peltier element or a constant temperature water circulation.

[0131] The semiconductor wafer W subjected to the flash heat treatment in the heat treatment unit 160 is carried into the first cooling chamber 131 or the second cooling chamber 141 , and is placed on the quartz plate to be cooled.

[0132] The first cooling chamber 131 and the second cooling chamber 141 are connected between the indexer portion 101 and the transfer chamber 170 .

[0133] The first cooling chamber 131 and the second cooling chamber 141 are provided with two openings for loading and unloading the semiconductor wafer W. Of the two openings of the first cooling chamber 131 , the opening connected to the indexer unit 101 can be opened and closed by a gate valve 181 .

[0134] On the other hand, the opening of the first cooling chamber 131 connected to the transfer chamber 170 can be opened and closed by the gate valve 183. That is, the first cooling chamber 131 and the indexer unit 101 are connected via the gate valve 181, and the first cooling chamber 131 and the transfer chamber 170 are connected via the gate valve 183.

[0135] When semiconductor wafers W are transferred between the indexer unit 101 and the first cooling chamber 131, the gate valve 181 is opened. When semiconductor wafers W are transferred between the first cooling chamber 131 and the transfer chamber 170, the gate valve 183 is opened. When the gate valves 181 and 183 are closed, the interior of the first cooling chamber 131 becomes a closed space.

[0136] In addition, the opening of the second cooling chamber 141 connected to the indexer unit 101 can be opened and closed by the gate valve 182. On the other hand, the opening of the second cooling chamber 141 connected to the transfer chamber 170 can be opened and closed by the gate valve 184. That is, the second cooling chamber 141 and the indexer unit 101 are connected via the gate valve 182, and the second cooling chamber 141 and the transfer chamber 170 are connected via the gate valve 184.

[0137] When semiconductor wafers W are transferred between the indexer unit 101 and the second cooling chamber 141, the gate valve 182 is opened. When semiconductor wafers W are transferred between the second cooling chamber 141 and the transfer chamber 170, the gate valve 184 is opened. When the gate valves 182 and 184 are closed, the interior of the second cooling chamber 141 becomes a closed space.

[0138] The transport robot 150 provided in the transport chamber 170 provided adjacent to the chamber 6 can be rotated as indicated by an arrow 150R with an axis along the vertical direction as the center. The transport robot 150 has two link mechanisms composed of a plurality of arm portions, and at the top ends of these two link mechanisms are provided a transport hand 151a and a transport hand 151b for holding the semiconductor wafer W. These transport hands 151a and 151b are arranged at a predetermined interval in the upper and lower directions, and can slide and move linearly in the same horizontal direction independently by the link mechanisms.

[0139] The transport robot 150 moves the two transport hands 151 a and 151 b upward and downward while being separated by a predetermined distance by moving the base provided with two link mechanisms upward and downward.

[0140] When the transport robot 150 receives (enters and exits) the semiconductor wafer W from the first cooling chamber 131, the second cooling chamber 141, or the chamber 6 of the heat treatment unit 160 as a receiving object, first, the two transport hands 151a and the transport hand 151b rotate relative to the receiving object, and then (or during the rotation) move up and down until one of the transport hands is at a height for receiving the semiconductor wafer W from the receiving object. Then, the transport hand 151a (151b) slides in a straight line in the horizontal direction to receive the semiconductor wafer W from the receiving object.

[0141] The semiconductor wafer W can be delivered between the transport robot 150 and the delivery robot 120 via the cooling unit 130 and the cooling unit 140. That is, the first cooling chamber 131 of the cooling unit 130 and the second cooling chamber 141 of the cooling unit 140 serve as a path for delivering the semiconductor wafer W between the transport robot 150 and the delivery robot 120. Specifically, the semiconductor wafer W delivered to the first cooling chamber 131 or the second cooling chamber 141 by one of the transport robot 150 and the delivery robot 120 is received by the other, thereby delivering the semiconductor wafer W. The transport mechanism is configured to transport the semiconductor wafer W from the storage rack C to the heat treatment unit 160 using the transport robot 150 and the delivery robot 120.

[0142] As described above, the gate valve 181 or the gate valve 182 is respectively provided between the first cooling chamber 131 and the second cooling chamber 141 and the indexer section 101. In addition, the gate valve 183 or the gate valve 184 is respectively provided between the transfer chamber 170 and the first cooling chamber 131 and the second cooling chamber 141. Furthermore, the gate valve 185 is provided between the transfer chamber 170 and the chamber 6 of the heat treatment section 160. When the semiconductor wafer W is transferred in the heat treatment apparatus 100, these gate valves are appropriately opened.

[0143] Figure 3 It is a cross-sectional view schematically showing the structure of a heat treatment unit 160 in the heat treatment apparatus 100 according to the present embodiment.

[0144] like Figure 3 As shown in the example of FIG. 1 , the heat treatment section 160 is a flash lamp annealing device that heats a semiconductor wafer W having a circular plate shape as a substrate by irradiating the semiconductor wafer W with flash light.

[0145] The size of the semiconductor wafer W to be processed is not particularly limited, and can be, for example, or (In this embodiment, ).

[0146] The heat treatment unit 160 includes a chamber 6 for accommodating a semiconductor wafer W, a flash heating unit 5 for housing a plurality of flash lamps FL, and a halogen heating unit 4 for housing a plurality of halogen lamps HL. The flash heating unit 5 is provided on the upper side of the chamber 6, and the halogen heating unit 4 is provided on the lower side.

[0147] Furthermore, the heat treatment unit 160 includes, inside the chamber 6 , a holding unit 7 for holding the semiconductor wafer W in a horizontal position, and a transfer mechanism 10 for transferring the semiconductor wafer W between the holding unit 7 and the outside of the apparatus.

[0148] The heat treatment unit 160 includes a control unit 3 that controls the halogen heating unit 4 , the flash heating unit 5 , and each operating mechanism provided in the chamber 6 to perform the heat treatment of the semiconductor wafer W.

[0149] The chamber 6 has chamber windows made of quartz installed on the upper and lower parts of the cylindrical chamber side portion 61. The chamber side portion 61 has a substantially cylindrical shape with upper and lower openings, and the upper opening is blocked by installing an upper chamber window 63, and the lower opening is blocked by installing a lower chamber window 64.

[0150] The upper chamber window 63 constituting the top of the chamber 6 is a disk-shaped member formed of quartz, and functions as a quartz window that transmits the flash emitted from the flash heating unit 5 into the chamber 6 .

[0151] Furthermore, the lower chamber window 64 constituting the bottom of the chamber 6 is also a disk-shaped member formed of quartz, and functions as a quartz window that transmits light from the halogen heating unit 4 into the chamber 6 .

[0152] Furthermore, a reflection ring 68 is attached to the upper portion of the inner wall surface of the chamber side portion 61, and a reflection ring 69 is attached to the lower portion. The reflection ring 68 and the reflection ring 69 are both formed in an annular shape.

[0153] The upper reflection ring 68 is installed by being inserted from the upper side of the chamber side portion 61. On the other hand, the lower reflection ring 69 is installed by being inserted from the lower side of the chamber side portion 61 and fixed by screws (not shown). That is, both the reflection ring 68 and the reflection ring 69 can be detachably installed on the chamber side portion 61.

[0154] The inner space of the chamber 6 , that is, the space surrounded by the upper chamber window 63 , the lower chamber window 64 , the chamber side portion 61 , the reflection ring 68 , and the reflection ring 69 is defined as a heat treatment space 65 .

[0155] By installing the reflection ring 68 and the reflection ring 69 on the chamber side portion 61, a recessed portion 62 is formed on the inner wall surface of the chamber 6. That is, the recessed portion 62 is formed, which is surrounded by the central portion of the inner wall surface of the chamber side portion 61 where the reflection ring 68 and the reflection ring 69 are not installed, the lower end surface of the reflection ring 68, and the upper end surface of the reflection ring 69.

[0156] The recess 62 is formed in a horizontal annular shape on the inner wall surface of the chamber 6 to surround the holding portion 7 holding the semiconductor wafer W. The chamber side portion 61 and the reflection rings 68 and 69 are formed of a metal material (eg, stainless steel) having excellent strength and heat resistance.

[0157] In addition, the chamber side portion 61 is provided with a transfer opening (furnace opening) 66 for carrying in and out the semiconductor wafer W from the chamber 6. The transfer opening 66 can be opened and closed by a gate valve 185. The transfer opening 66 is connected to the outer peripheral surface of the recess 62 in a communicating manner.

[0158] Therefore, when the gate valve 185 opens the transfer opening 66, the semiconductor wafer W can be carried into and out of the heat treatment space 65 from the transfer opening 66 through the recess 62. In addition, when the gate valve 185 closes the transfer opening 66, the heat treatment space 65 in the chamber 6 becomes a closed space.

[0159] Furthermore, a through hole 61a and a through hole 61b are provided through the chamber side portion 61. The through hole 61a is a cylindrical hole for guiding infrared light radiated from the upper surface of the semiconductor wafer W held by the susceptor 74 described later to the infrared sensor 29 of the upper radiation thermometer 25. On the other hand, the through hole 61b is a cylindrical hole for guiding infrared light radiated from the lower surface of the semiconductor wafer W to the infrared sensor 24 of the lower radiation thermometer 20. The through hole 61a and the through hole 61b are provided obliquely with respect to the horizontal direction so that the axis of the through direction thereof intersects with the main surface of the semiconductor wafer W held by the susceptor 74.

[0160] Infrared sensor 29 is, for example, a quantum infrared sensor, etc. Infrared sensor 24 is, for example, a thermal infrared sensor such as a pyroelectric sensor using the pyroelectric effect, a thermopile using the Seebeck effect, or a bolometer using resistance change of a semiconductor caused by heat.

[0161] A transparent window 26 made of calcium fluoride material is installed at the end of the through hole 61a facing the heat treatment space 65, and the transparent window 26 transmits infrared light in the wavelength range that can be measured by the upper radiation thermometer 25. In addition, a transparent window 21 made of barium fluoride material is installed at the end of the through hole 61b facing the heat treatment space 65, and the transparent window 21 transmits infrared light in the wavelength range that can be measured by the lower radiation thermometer 20.

[0162] In addition, a gas supply hole 81 for supplying a processing gas to the heat treatment space 65 is provided at the upper portion of the inner wall of the chamber 6. The gas supply hole 81 is provided at a position higher than the recess 62 and may be provided at the reflection ring 68. The gas supply hole 81 is connected to the gas supply pipe 83 via a buffer space 82 formed in an annular shape inside the side wall of the chamber 6.

[0163] The gas supply pipe 83 is connected to a processing gas supply source 85. In addition, a valve 84 is installed in the middle of the path of the gas supply pipe 83. When the valve 84 is opened, the processing gas is supplied from the processing gas supply source 85 to the buffer space 82.

[0164] The processing gas flowing into the buffer space 82 flows in a diffused manner in the buffer space 82 having a smaller fluid resistance than the gas supply hole 81, and is supplied from the gas supply hole 81 to the heat treatment space 65. As the processing gas, an inert gas such as nitrogen (N2), a reactive gas such as hydrogen (H2) or ammonia (NH3), or a mixed gas of these gases (nitrogen in this embodiment) can be used.

[0165] On the other hand, an exhaust hole 86 for exhausting the gas in the heat treatment space 65 is formed at the lower part of the inner wall of the chamber 6. The exhaust hole 86 is formed at a position lower than the recess 62 and can be set in the reflection ring 69. The exhaust hole 86 is connected to the exhaust pipe 88 via the buffer space 87 formed in a circular ring shape inside the side wall of the chamber 6. The exhaust pipe 88 is connected to the exhaust part 190. In addition, a valve 89 is installed in the middle of the path of the exhaust pipe 88. If the valve 89 is opened, the gas in the heat treatment space 65 is discharged from the exhaust hole 86 to the exhaust pipe 88 via the buffer space 87.

[0166] In addition, the gas supply holes 81 and the exhaust holes 86 may be provided in plural numbers or in slits along the circumference of the chamber 6. In addition, the processing gas supply source 85 and the exhaust part 190 may be provided in the heat treatment part 160 or may be a common part of the factory where the heat treatment part 160 is provided.

[0167] Furthermore, an exhaust pipe 191 for exhausting the gas in the heat treatment space 65 is connected to the top end of the transfer opening 66. The exhaust pipe 191 is connected to the exhaust unit 190 via a valve 192. When the valve 192 is opened, the gas in the chamber 6 is exhausted through the transfer opening 66.

[0168] Figure 4 : is a perspective view showing the overall appearance of the holding part 7. The holding part 7 includes a base ring 71, a connecting part 72, and a base 74. The base ring 71, the connecting part 72, and the base 74 are all formed of quartz. That is, the entire holding part 7 is formed of quartz.

[0169] The base ring 71 is a quartz member in an arc shape with a portion of the ring shape missing. The missing portion is provided to prevent interference between the transfer arm 11 of the transfer mechanism 10 described later and the base ring 71. The base ring 71 is placed on the bottom surface of the recess 62 and is supported by the wall surface of the chamber 6 (see Figure 3 ). A plurality of connection parts 72 (four in this embodiment) are provided on the upper surface of the base ring 71 along the circumferential direction of the annular shape. The connection parts 72 are also quartz members and are fixed to the base ring 71 by welding.

[0170] The base 74 is supported by four connecting parts 72 provided on the base ring 71 . Figure 5 It is a top view of the base 74 . Figure 6 is a cross-sectional view of the base 74 .

[0171] The susceptor 74 includes a holding plate 75, a guide ring 76, and a plurality of substrate support pins 77. The holding plate 75 is a substantially circular flat plate-shaped member formed of quartz. The diameter of the holding plate 75 is larger than the diameter of the semiconductor wafer W. That is, the holding plate 75 has a larger plane size than the semiconductor wafer W.

[0172] A guide ring 76 is provided on the peripheral edge of the upper surface of the holding plate 75. The guide ring 76 is a ring-shaped member having an inner diameter larger than the diameter of the semiconductor wafer W. For example, when the diameter of the semiconductor wafer W is In the case of

[0173] The inner peripheral surface of the guide ring 76 is formed into a tapered surface that spreads upward from the holding plate 75. The guide ring 76 is formed of quartz similarly to the holding plate 75.

[0174] The guide ring 76 may be welded to the upper surface of the holding plate 75, or may be fixed to the holding plate 75 by a separately processed pin or the like. Alternatively, the holding plate 75 and the guide ring 76 may be processed as an integral member.

[0175] The area on the upper surface of the holding plate 75 that is closer to the inner side than the guide ring 76 is a planar holding surface 75a for holding the semiconductor wafer W. A plurality of substrate support pins 77 are provided on the holding surface 75a of the holding plate 75. In the present embodiment, a total of 12 substrate support pins 77 are provided in a ring shape at intervals of 30° along a circumference that is concentric with the outer circumference of the holding surface 75a (the inner circumference of the guide ring 76).

[0176] The diameter of the circle on which the 12 substrate support pins 77 are arranged (the distance between the opposing substrate support pins 77) is smaller than the diameter of the semiconductor wafer W. If the diameter of the semiconductor wafer W is Then the diameter of the circle of the substrate support pin 77 is Three or more substrate supporting pins 77 are provided. Each substrate supporting pin 77 is formed of quartz.

[0177] The plurality of substrate support pins 77 may be provided on the upper surface of the holding plate 75 by welding, or may be integrally formed with the holding plate 75 .

[0178] return Figure 4 , the four connecting parts 72 erected on the base ring 71 and the peripheral part of the holding plate 75 of the base 74 are fixed by welding. That is, the base 74 and the base ring 71 are fixedly connected by the connecting parts 72. The base ring 71 of the holding part 7 is supported by the wall surface of the chamber 6, so that the holding part 7 is installed in the chamber 6. When the holding part 7 is installed in the chamber 6, the holding plate 75 of the base 74 is in a horizontal posture (a posture in which the normal line is consistent with the vertical direction). That is, the holding surface 75a of the holding plate 75 is in a horizontal plane.

[0179] The semiconductor wafer W carried into the chamber 6 is placed in a horizontal position on the susceptor 74 installed on the holding part 7 of the chamber 6 and is held. At this time, the semiconductor wafer W is supported by 12 substrate support pins 77 erected on the holding plate 75 and is held on the susceptor 74. More precisely, the upper ends of the 12 substrate support pins 77 contact the lower surface of the semiconductor wafer W to support the semiconductor wafer W.

[0180] Since the heights of the twelve substrate supporting pins 77 (the distance from the upper ends of the substrate supporting pins 77 to the holding surface 75 a of the holding plate 75 ) are uniform, the semiconductor wafer W can be supported in a horizontal posture by the twelve substrate supporting pins 77 .

[0181] Furthermore, the semiconductor wafer W is supported by the plurality of substrate support pins 77 so as to be spaced apart from the holding surface 75a of the holding plate 75 by a predetermined interval. The thickness of the guide ring 76 is greater than the height of the substrate support pins 77. Therefore, the guide ring 76 prevents the horizontal positional deviation of the semiconductor wafer W supported by the plurality of substrate support pins 77.

[0182] In addition, if Figure 4 and Figure 5 As shown in FIG. 1 , an opening 78 is formed in the holding plate 75 of the base 74 and is passed through in the vertical direction. The opening 78 is provided so that the lower radiation thermometer 20 receives the radiation light (infrared light) radiated from the lower surface of the semiconductor wafer W. That is, the lower radiation thermometer 20 receives the light radiated from the lower surface of the semiconductor wafer W through the opening 78 and the transparent window 21 installed in the through hole 61 b ​​of the chamber side portion 61 to measure the temperature of the semiconductor wafer W.

[0183] Furthermore, four through holes 79 are formed through the holding plate 75 of the base 74 , and lift pins 12 of the transfer mechanism 10 described later pass through the through holes 79 to transfer the semiconductor wafer W.

[0184] Figure 7 It is a top view of the transfer mechanism 10 . Figure 8 1 is a side view of the transfer mechanism 10. The transfer mechanism 10 has two transfer arms 11. The transfer arms 11 are substantially in an arc shape along the annular recess 62.

[0185] Two lifting pins 12 are provided on each transfer arm 11. The transfer arm 11 and the lifting pins 12 are made of quartz. Each transfer arm 11 can be rotated by a horizontal movement mechanism 13. The horizontal movement mechanism 13 can move a pair of transfer arms 11 to a transfer operation position ( Figure 7 The solid line position) and the retreat position ( Figure 7 The double-dotted line position)

[0186] As the horizontal moving mechanism 13 , each transfer arm 11 may be rotated by a separate motor, or a link mechanism may be used to rotate a pair of transfer arms 11 in conjunction with each other by a single motor.

[0187] In addition, the pair of transfer arms 11 are moved up and down together with the horizontal moving mechanism 13 by the lifting mechanism 14. When the lifting mechanism 14 raises the pair of transfer arms 11 to the transfer operation position, a total of four lifting pins 12 pass through the through holes 79 (see Figure 4 , 5 ), the upper end of the lifting pin 12 protrudes from the upper surface of the base 74. On the other hand, the lifting mechanism 14 lowers the pair of transfer arms 11 in the transfer operation position, so that the lifting pin 12 is pulled out from the through hole 79, and when the horizontal moving mechanism 13 moves the pair of transfer arms 11 in an open manner, each transfer arm 11 moves to the retracted position.

[0188] The retracted position of the pair of transfer arms 11 is directly above the base ring 71 of the holding portion 7. Since the base ring 71 is placed on the bottom surface of the recessed portion 62, the retracted position of the transfer arms 11 is located inside the recessed portion 62. In addition, an exhaust mechanism (not shown) is also provided near the location where the drive portion (horizontal moving mechanism 13 and lifting mechanism 14) of the transfer mechanism 10 is provided, and the exhaust mechanism exhausts the ambient gas around the drive portion of the transfer mechanism 10 to the outside of the chamber 6.

[0189] return Figure 3 The flash heating unit 5 disposed above the chamber 6 has a light source including a plurality of (30 in this embodiment) flash lamps FL and a reflector 52 disposed to cover the upper side of the light source inside a frame 51 .

[0190] Furthermore, a light radiation window 53 is installed at the bottom of the frame 51 of the flash heating unit 5. The light radiation window 53 constituting the bottom of the flash heating unit 5 is a plate-shaped quartz window formed of quartz. By arranging the flash heating unit 5 above the chamber 6, the light radiation window 53 is opposed to the upper chamber window 63.

[0191] The flash lamp FL irradiates flash light from above the chamber 6 through the light radiation window 53 and the upper chamber window 63 toward the heat treatment space 65 .

[0192] The flash lamps FL are long cylindrical rod-shaped lamps arranged in a plane so that their longitudinal directions are parallel to each other along the main surface (i.e., in the horizontal direction) of the semiconductor wafer W held by the holding portion 7. Therefore, the plane formed by the arrangement of the flash lamps FL is also a horizontal plane.

[0193] The flash lamp FL includes a rod-shaped glass tube (discharge tube) in which xenon gas is sealed and an anode and a cathode connected to a capacitor are arranged at both ends, and a trigger electrode is attached to the outer peripheral surface of the glass tube.

[0194] Since xenon is an electrical insulator, even if there is charge stored in the capacitor, no current will flow in the glass tube under normal conditions. However, when a high voltage is applied to the trigger electrode to break the insulation, the charge stored in the capacitor flows in the glass tube instantaneously, and the xenon atoms or molecules are excited at this time to emit light.

[0195] In such a flash lamp FL, the electrostatic energy previously stored in the capacitor is converted into an extremely short light pulse of 0.1 millisecond to 100 milliseconds, so it has the characteristic of being able to emit extremely strong light compared to a light source that is continuously lit like a halogen lamp HL. That is, the flash lamp FL is a pulse light lamp that emits light instantaneously in an extremely short time of less than 1 second.

[0196] Furthermore, the light emission time of the flash lamp FL can be adjusted by the coil constant of the lamp power supply that supplies power to the flash lamp FL.

[0197] Furthermore, the reflector 52 is provided above the plurality of flash lamps FL in a manner covering the entirety of the plurality of flash lamps FL. The basic function of the reflector 52 is to reflect the flash emitted from the plurality of flash lamps FL toward the heat treatment space 65. The reflector 52 is formed of an aluminum alloy plate, and its surface (the surface facing the flash lamp FL side, that is, the upper surface) is roughened by sandblasting.

[0198] The halogen heating unit 4 disposed below the chamber 6 has a plurality of (40 in this embodiment) halogen lamps HL built inside a frame 41. The halogen heating unit 4 heats the semiconductor wafer W by irradiating light from the plurality of halogen lamps HL into the heat treatment space 65 from below the chamber 6 through the lower chamber window 64.

[0199] Fig. 9 40 halogen lamps HL are arranged in two layers, upper and lower. Twenty halogen lamps HL are arranged in the upper layer close to the holding part 7, and 20 halogen lamps HL are arranged in the lower layer farther from the holding part 7 than the upper layer.

[0200] Each halogen lamp HL is a rod-shaped lamp having a long cylindrical shape. In the upper layer and the lower layer, the 20 halogen lamps HL are arranged so that their respective length directions are parallel to each other along the main surface (i.e., along the horizontal direction) of the semiconductor wafer W held by the holding portion 7. Therefore, in the upper layer and the lower layer, the planes formed by the arrangement of the halogen lamps HL are all horizontal planes.

[0201] In addition, if Fig. 9 As shown in FIG. 1 , in the upper and lower layers, the arrangement density of the halogen lamps HL in the area opposite to the peripheral portion is higher than that in the area opposite to the central portion of the semiconductor wafer W held by the holding portion 7. That is, in the upper and lower layers, the arrangement pitch of the halogen lamps HL in the peripheral portion is shorter than that in the central portion of the lamp arrangement. Therefore, when heating is performed using the light irradiated by the halogen heating portion 4, a larger amount of light can be irradiated to the peripheral portion of the semiconductor wafer W where the temperature drop is likely to occur.

[0202] In addition, the lamp group consisting of the upper halogen lamps HL and the lamp group consisting of the lower halogen lamps HL are arranged crosswise in a lattice shape, that is, a total of 40 halogen lamps HL are arranged in such a way that the length directions of the 20 halogen lamps HL arranged in the upper layer and the length directions of the 20 halogen lamps HL arranged in the lower layer are orthogonal to each other.

[0203] The halogen lamp HL is a filament light source that turns the filament incandescent and emits light by energizing the filament inside a glass tube. A gas containing a small amount of halogen elements (iodine, bromine, etc.) introduced into an inert gas such as nitrogen or argon is sealed inside the glass tube. By introducing the halogen elements, the filament can be prevented from breaking and the temperature of the filament can be set to a high temperature.

[0204] Therefore, the halogen lamp HL has the characteristics of long life and continuous strong light emission compared to a common incandescent lamp. That is, the halogen lamp HL is a continuously lit lamp that emits light continuously for at least 1 second. In addition, since the halogen lamp HL is a rod-shaped lamp and has a long life, the halogen lamp HL is arranged in the horizontal direction, and the efficiency of radiating light to the semiconductor wafer W above is excellent.

[0205] In addition, a reflector 43 ( Figure 3 ). The reflector 43 reflects the light emitted from the plurality of halogen lamps HL toward the heat treatment space 65 side.

[0206] like Figure 3 As shown, two radiation thermometers (pyrometers in this embodiment), an upper radiation thermometer 25 and a lower radiation thermometer 20, are provided in the chamber 6. The upper radiation thermometer 25 is provided obliquely above the semiconductor wafer W held by the susceptor 74, and the lower radiation thermometer 20 is provided obliquely below the semiconductor wafer W held by the susceptor 74.

[0207] Fig.10 A diagram showing the positional relationship between the lower radiation thermometer 20 and the semiconductor wafer W held by the susceptor 74 .

[0208] The light receiving angle θ of the infrared sensor 24 of the lower radiation thermometer 20 relative to the semiconductor wafer W is greater than 60° and less than 89°. The light receiving angle θ is the angle formed between the optical axis of the infrared sensor 24 of the lower radiation thermometer 20 and the normal line (a line perpendicular to the main surface) of the semiconductor wafer W. Similarly, the light receiving angle θ of the infrared sensor 29 of the upper radiation thermometer 25 relative to the semiconductor wafer W is also greater than 60° and less than 89°. In addition, the light receiving angle of the infrared sensor 24 of the lower radiation thermometer 20 relative to the semiconductor wafer W and the light receiving angle of the infrared sensor 29 of the upper radiation thermometer 25 relative to the semiconductor wafer W may be unequal angles.

[0209] The control unit 3 controls the various operating mechanisms provided in the heat treatment unit 160. The hardware structure of the control unit 3 is the same as that of a general computer. That is, the control unit 3 has a CPU as a circuit for performing various calculations, a ROM as a read-only memory for storing basic programs, a RAM as a freely readable and writable memory for storing various information, and a magnetic disk for storing control software and data. The processing in the heat treatment unit 160 is performed by the CPU of the control unit 3 executing a predetermined processing program.

[0210] Fig.11 1 is a functional block diagram showing the relationship between the lower radiation thermometer 20 , the upper radiation thermometer 25 , and the control unit 3 .

[0211] The lower radiation thermometer 20 provided obliquely below the semiconductor wafer W and measuring the temperature of the lower surface of the semiconductor wafer W includes an infrared sensor 24 and a temperature measurement unit 22 .

[0212] The infrared sensor 24 receives infrared light radiated from the lower surface of the semiconductor wafer W held by the susceptor 74 through the opening 78. The infrared sensor 24 is electrically connected to the temperature measurement unit 22, and transmits a signal generated in response to the received light to the temperature measurement unit 22.

[0213] The temperature measuring unit 22 includes an amplifier circuit, an A / D converter, a temperature conversion circuit, etc. (not shown), and converts a signal indicating the intensity of infrared light output from the infrared sensor 24 into a temperature. The temperature obtained by the temperature measuring unit 22 is the temperature of the lower surface of the semiconductor wafer W.

[0214] On the other hand, the upper radiation thermometer 25 for measuring the temperature of the upper surface of the semiconductor wafer W, which is disposed obliquely above the semiconductor wafer W, includes an infrared sensor 29 and a temperature measuring unit 27. The infrared sensor 29 receives infrared light radiated from the upper surface of the semiconductor wafer W held by the susceptor 74. The infrared sensor 29 includes an optical element of InSb (indium antimony) so that it can cope with the rapid temperature change of the upper surface of the semiconductor wafer W at the moment of being irradiated with a flash of light. The infrared sensor 29 is electrically connected to the temperature measuring unit 27, and transmits a signal generated in response to the light to the temperature measuring unit 27. The temperature measuring unit 27 converts the signal indicating the intensity of the infrared light output from the infrared sensor 29 into a temperature. The temperature obtained by the temperature measuring unit 27 is the temperature of the upper surface of the semiconductor wafer W.

[0215] The lower radiation thermometer 20 and the upper radiation thermometer 25 are electrically connected to the controller of the entire heat treatment unit 160, namely the control unit 3, and the temperatures of the lower surface and the upper surface of the semiconductor chip W measured by the lower radiation thermometer 20 and the upper radiation thermometer 25 respectively are transmitted to the control unit 3.

[0216] The control unit 3 includes a temperature calculation unit 31. The temperature calculation unit 31 is a functional processing unit realized by the CPU of the control unit 3 executing a predetermined processing program. The processing contents of the temperature calculation unit 31 will be described in detail later.

[0217] Furthermore, a display unit 33 and an input unit 34 are connected to the control unit 3. The control unit 3 displays various information on the display unit 33. The input unit 34 is a device for an operator of the heat treatment apparatus 100 to input various instructions or parameters to the control unit 3. The operator can confirm the display content of the display unit 33 and perform condition setting of a processing protocol describing the processing sequence and processing conditions of the semiconductor wafer W through the input unit 34.

[0218] As the display unit 33 and the input unit 34 , a touch panel having both functions can be used. In the present embodiment, a liquid crystal touch panel provided on the outer wall of the heat treatment apparatus 100 is used.

[0219] In addition to the above-mentioned structures, the heat treatment apparatus 100 also has various cooling structures for preventing the halogen heating unit 4, the flash heating unit 5 and the chamber 6 from excessively rising in temperature due to the heat energy generated by the halogen lamp HL and the flash lamp FL when the semiconductor wafer W is heat treated.

[0220] For example, a water cooling pipe (not shown) is provided on the wall of the chamber 6. In addition, an air cooling structure for forming airflow and discharging heat is provided inside the halogen heating unit 4 and the flash heating unit 5. In addition, air is supplied to the gap between the upper chamber window 63 and the light radiation window 53 to cool the flash heating unit 5 and the upper chamber window 63.

[0221] <About the operation of heat treatment equipment>

[0222] Next, a processing procedure of the semiconductor wafer W in the heat treatment apparatus 100 will be described. Fig.12 1 is a flowchart showing a processing procedure of the semiconductor wafer W. The processing procedure of the heat treatment apparatus 100 described below is performed by the control unit 3 controlling each operating mechanism of the heat treatment apparatus 100 .

[0223] First, the valve 84 for supplying gas is opened, and the valve 89 and the valve 192 for exhausting gas are opened to start supplying and exhausting gas in the chamber 6. When the valve 84 is opened, nitrogen gas is supplied from the gas supply hole 81 to the heat treatment space 65. Furthermore, when the valve 89 is opened, the gas in the chamber 6 is exhausted from the exhaust hole 86. Thus, the nitrogen gas supplied from the upper part of the heat treatment space 65 in the chamber 6 flows downward and is exhausted from the lower part of the heat treatment space 65.

[0224] In addition, by opening the valve 192, the gas in the chamber 6 is also exhausted from the transfer opening 66. Furthermore, by using an exhaust mechanism (not shown), the ambient gas around the driving part of the transfer mechanism 10 is also exhausted. In addition, during the heat treatment of the semiconductor wafer W in the heat treatment apparatus 100, nitrogen gas is continuously supplied to the heat treatment space 65, and the supply amount is appropriately changed according to the treatment process.

[0225] Next, the gate valve 185 is opened to open the transfer opening 66, and the semiconductor wafer W to be processed is transferred into the heat treatment space 65 in the chamber 6 through the transfer opening 66 by a transfer robot outside the apparatus (step S1). At this time, there is a concern that the ambient gas outside the apparatus may be brought into the chamber 6 with the transfer of the semiconductor wafer W, but since nitrogen gas is continuously supplied to the chamber 6, nitrogen gas flows out from the transfer opening 66, thereby minimizing the external ambient gas brought in.

[0226] The semiconductor wafer W carried in by the transport robot enters the position just above the holding portion 7 and stops. Then, the pair of transfer arms 11 of the transfer mechanism 10 are horizontally moved from the retreat position to the transfer operation position and raised, so that the lift pins 12 pass through the through holes 79 and protrude from the upper surface of the holding plate 75 of the base 74 to receive the semiconductor wafer W. At this time, the lift pins 12 are raised to a position higher than the upper ends of the substrate support pins 77.

[0227] After the semiconductor wafer W is placed on the lifting pins 12, the transport robot withdraws from the heat treatment space 65 and the transport opening 66 is closed by the gate valve 185. Then, the pair of transfer arms 11 descends, so that the semiconductor wafer W is transferred from the transfer mechanism 10 to the base 74 of the holding portion 7 and is held in a horizontal posture from below. The semiconductor wafer W is supported and held on the base 74 by a plurality of substrate support pins 77 erected on the holding plate 75. In addition, the semiconductor wafer W is held on the holding portion 7 with the surface to be processed as the upper surface. A predetermined interval is formed between the back side (the main surface on the opposite side to the surface) of the semiconductor wafer W supported by the plurality of substrate support pins 77 and the holding surface 75a of the holding plate 75. The pair of transfer arms 11 that have descended to the bottom of the base 74 are retreated to the retreat position, that is, the inner side of the recess 62 by the horizontal moving mechanism 13.

[0228] Fig.13 7 is a diagram showing the change in the surface temperature of the semiconductor wafer W. After the semiconductor wafer W is moved into the chamber 6 and held by the susceptor 74, the 40 halogen lamps HL of the halogen heating unit 4 are lit together at time t1 to start preheating (auxiliary heating) (step S2). The halogen light emitted from the halogen lamp HL passes through the lower chamber window 64 and the susceptor 74 formed by quartz, and irradiates the lower surface of the semiconductor wafer W. By receiving the light irradiation from the halogen lamp HL, the semiconductor wafer W is preheated and the temperature rises. In addition, since the transfer arm 11 of the transfer mechanism 10 retreats to the inner side of the recess 62, the heating of the halogen lamp HL is not hindered.

[0229] The temperature of the semiconductor wafer W heated by the light irradiation from the halogen lamp HL is measured by the lower radiation thermometer 20. That is, the infrared light radiated from the lower surface (back surface) of the semiconductor wafer W held by the susceptor 74 through the opening 78 is received by the lower radiation thermometer 20 through the transparent window 21 to measure the back surface temperature of the semiconductor wafer W (step S3). Alternatively, the temperature measurement by the lower radiation thermometer 20 may be started before the preheating by the halogen lamp HL is started.

[0230] However, in many cases, various films are formed on the semiconductor wafer W for processing purposes. For example, a resist film for a photomask, an interlayer insulating film, a high dielectric constant film, etc. are sometimes formed on the semiconductor wafer W. These films are typically formed on the surface (processed surface) of the semiconductor wafer W. In recent years, as the manufacturing process of semiconductor devices has become more complicated, some films are sometimes formed on the back side of the semiconductor wafer W. Moreover, when a film is formed on the back side, the semiconductor wafer W becomes the object of heat treatment in the heat treatment device 100.

[0231] When the temperature of the back surface of the semiconductor wafer W is measured contactlessly by the lower radiation thermometer 20, it is necessary to set the emissivity of the back surface in the lower radiation thermometer 20. If no film is formed on the back surface of the semiconductor wafer W, the emissivity of silicon, which is the wafer base material, can be set in the lower radiation thermometer 20. However, if a film is formed on the back surface of the semiconductor wafer W, the emissivity of the back surface varies with the film.

[0232] The back surface temperature of the semiconductor wafer W measured by the lower radiation thermometer 20 is transmitted to the control unit 3. The control unit 3 monitors whether the temperature of the semiconductor wafer W, which is heated by the light irradiation from the halogen lamp HL, has reached the prescribed preheating temperature T1, and controls the output of the halogen lamp HL. That is, the control unit 3 controls the output of the halogen lamp HL based on the measurement value measured by the lower radiation thermometer 20 so that the temperature of the semiconductor wafer W reaches the preheating temperature T1. In this way, the lower radiation thermometer 20 is also a temperature sensor for controlling the output of the halogen lamp HL in the preheating stage. In addition, the lower radiation thermometer 20 measures the temperature of the back surface of the semiconductor wafer W. In the preheating stage using the halogen lamp HL, no temperature difference is generated between the surface and the back surface of the semiconductor wafer W, and the back surface temperature measured by the lower radiation thermometer 20 is regarded as the temperature of the entire semiconductor wafer W.

[0233] After the temperature of the semiconductor wafer W reaches the preheating temperature T1, the control unit 3 temporarily maintains the semiconductor wafer W at the preheating temperature T1. Specifically, at time t2 when the temperature of the semiconductor wafer W measured by the lower radiation thermometer 20 reaches the preheating temperature T1, the control unit 3 adjusts the output of the halogen lamp HL to maintain the temperature of the semiconductor wafer W approximately at the preheating temperature T1.

[0234] By preheating with the halogen lamp HL, the temperature of the entire semiconductor wafer W is uniformly raised to the preheating temperature T1. In the preheating stage with the halogen lamp HL, the temperature of the peripheral portion of the semiconductor wafer W, which is easier to dissipate heat, tends to be lower than the temperature of the central portion. However, the arrangement density of the halogen lamps HL in the halogen heating unit 4 is higher in the area facing the peripheral portion than in the area facing the central portion of the semiconductor wafer W. Therefore, the amount of light irradiated to the peripheral portion of the semiconductor wafer W, which is easier to dissipate heat, increases, so that the in-plane temperature distribution of the semiconductor wafer W in the preheating stage can be made uniform.

[0235] At time t3 when the temperature of the semiconductor wafer W reaches the preheating temperature T1 and a predetermined time has passed, the flash lamp FL of the flash heating unit 5 flashes the surface of the semiconductor wafer W held by the susceptor 74 (step S4). At this time, a part of the flash emitted from the flash lamp FL directly irradiates the chamber 6, and the other part is reflected by the reflector 52 and then irradiates the chamber 6. The semiconductor wafer W is flash heated by the above-mentioned flash irradiation.

[0236] Since the flash heating is performed by flash irradiation from the flash lamp FL, the surface temperature of the semiconductor wafer W can be increased in a short time. That is, the flash irradiated from the flash lamp FL is an extremely short strong flash with an irradiation time of about 0.1 milliseconds to 100 milliseconds, in which the electrostatic energy previously stored in the capacitor is converted into an extremely short light pulse. Furthermore, the surface temperature of the semiconductor wafer W is rapidly increased in a very short time by the flash irradiation from the flash lamp FL.

[0237] The surface temperature of the semiconductor wafer W is monitored by the upper radiation thermometer 25. However, the upper radiation thermometer 25 does not measure the absolute temperature of the surface of the semiconductor wafer W, but measures the temperature change of the surface. That is, the upper radiation thermometer 25 measures the rising temperature (jump temperature) ΔT of the surface of the semiconductor wafer W from the preheating temperature T1 during the flash irradiation (step S5). In addition, the back surface temperature of the semiconductor wafer W is measured by the lower radiation thermometer 20 during the flash irradiation, but when the flash with a strong intensity and a very short irradiation time is irradiated, only the surface vicinity of the semiconductor wafer W is rapidly heated, so that a temperature difference occurs between the surface and the back surface of the semiconductor wafer W, and the surface temperature of the semiconductor wafer W cannot be measured by the lower radiation thermometer 20. In addition, similar to the lower radiation thermometer 20, the light receiving angle of the upper radiation thermometer 25 relative to the semiconductor wafer W is also greater than 60° and less than 89°, so the rising temperature ΔT of the surface of the semiconductor wafer W can be accurately measured by the upper radiation thermometer 25 regardless of the type of film formed on the surface of the semiconductor wafer W.

[0238] Next, the temperature calculation unit 31 of the control unit 3 calculates the maximum temperature reached by the surface of the semiconductor wafer W during the flash irradiation (step S6). The temperature of the back surface of the semiconductor wafer W is continuously measured by the lower radiation thermometer 20 at least during the preheating period from the time t2 when the semiconductor wafer W reaches a constant temperature to the time t3 when the flash is irradiated. In the preheating stage before the flash irradiation, there is no temperature difference between the surface and the back surface of the semiconductor wafer W, and the back surface temperature of the semiconductor wafer W measured by the lower radiation thermometer 20 before the flash irradiation is also the surface temperature. The temperature calculation unit 31 calculates the maximum temperature T2 reached by the surface by adding the temperature (preheating temperature T1) of the back surface of the semiconductor wafer W measured by the lower radiation thermometer 20 during the period from the time t2 before the flash irradiation to the time t3. The temperature calculation unit 31 may also display the calculated maximum temperature T2 on the display unit 33.

[0239] The light receiving angle θ of the lower radiation thermometer 20 with respect to the semiconductor wafer W is relatively large, being not less than 60° and not more than 89°, so that the temperature of the back surface of the semiconductor wafer W can be accurately measured by the lower radiation thermometer 20 regardless of the type of film formed on the back surface of the semiconductor wafer W. By adding the temperature rise ΔT of the upper surface of the semiconductor wafer W measured by the upper radiation thermometer 25 to the back surface temperature (= surface temperature) of the semiconductor wafer W accurately measured by the lower radiation thermometer 20, the maximum temperature T2 of the surface of the semiconductor wafer W during the flash irradiation can be accurately calculated.

[0240] After the flash irradiation is finished, the halogen lamp HL turns off at time t4 after a predetermined time. As a result, the semiconductor wafer W is rapidly cooled from the preheating temperature T1. The temperature of the semiconductor wafer W being cooled is measured by the lower radiation thermometer 20, and the measurement result is transmitted to the control unit 3. The control unit 3 monitors whether the temperature of the semiconductor wafer W has been cooled to a predetermined temperature based on the measurement result of the lower radiation thermometer 20. Then, after the temperature of the semiconductor wafer W drops below the predetermined temperature, the pair of transfer arms 11 of the transfer mechanism 10 are horizontally moved from the retreat position to the transfer action position again and rise, whereby the lifting pins 12 protrude from the upper surface of the base 74 and receive the heat-treated semiconductor wafer W from the base 74. Next, the transport opening 66 closed by the gate valve 185 is opened, and the semiconductor wafer W placed on the lifting pins 12 is moved out of the chamber 6 by the transport robot outside the device, thereby completing the heating treatment of the semiconductor wafer W (step S7).

[0241] In the present embodiment, the lower radiation thermometer 20 is disposed obliquely below the semiconductor wafer W held by the susceptor 74, and the light receiving angle θ of the lower radiation thermometer 20 relative to the semiconductor wafer W is relatively large, being 60° or more and 89° or less. Therefore, the emissivity of the back surface of the semiconductor wafer W is less dependent on the type of film, and the temperature of the back surface of the semiconductor wafer W can be accurately measured by the lower radiation thermometer 20 regardless of the type of film formed on the back surface of the semiconductor wafer W.

[0242] Furthermore, the upper radiation thermometer 25 is disposed obliquely above the semiconductor wafer W held by the susceptor 74, and the light receiving angle of the upper radiation thermometer 25 relative to the semiconductor wafer W is also not less than 60° and not more than 89°. Therefore, the temperature rise ΔT of the surface of the semiconductor wafer W can be accurately measured by the upper radiation thermometer 25 regardless of the type of film formed on the surface of the semiconductor wafer W.

[0243] The lower radiation thermometer 20 measures the back surface temperature of the semiconductor wafer W during the period from time t2 before the flash irradiation to time t3. The upper radiation thermometer 25 measures the surface temperature rise ΔT of the semiconductor wafer W during the flash irradiation. By adding the surface temperature rise ΔT of the semiconductor wafer W measured by the upper radiation thermometer 25 to the back surface temperature of the semiconductor wafer W accurately measured by the lower radiation thermometer 20, the surface temperature of the semiconductor wafer W during the flash irradiation can be accurately obtained.

[0244] <Regarding the Arrangement Position of the Substrate Support Pins 77>

[0245] By flash lamp annealing using flash irradiation, the temperature of the upper surface of the semiconductor wafer W irradiated with the flash rises in a short time, so that rapid thermal expansion occurs on the upper surface of the semiconductor wafer W. Furthermore, the semiconductor wafer W bends due to the thermal expansion, so that the upper surface of the semiconductor wafer W becomes convex.

[0246] When the space between the semiconductor wafer W and the holding plate 75 facing the semiconductor wafer W is extended (or compressed) due to the bending of the semiconductor wafer W, a force to return to the original volume is generated, that is, a restoring force is generated in the space. Moreover, the greater the change in the volume (gap volume) of the space between the semiconductor wafer W and the holding plate 75 before and after the bending of the semiconductor wafer W, the greater the restoring force.

[0247] The restoring force generated by the bending of the semiconductor wafer W causes the semiconductor wafer W supported by the substrate support pins 77 to wobble, thereby increasing the possibility that the semiconductor wafer W bounces off the substrate support pins 77 .

[0248] Based on the above premise, if the restoring force is reduced by suppressing the change in the gap volume before and after the semiconductor wafer W is bent, it is possible to suppress the semiconductor wafer W from bouncing off the substrate support pins 77. In this embodiment, a substrate support device is described, and the substrate support device sets the configuration of the substrate support pins 77 so that the change in the volume (gap volume) between the semiconductor wafer W and the holding plate 75 before and after the semiconductor wafer W is bent is as small as possible, and preferably the gap volume before and after the semiconductor wafer W is bent is equal.

[0249] Here, “the gap volumes are equal” is not limited to the case where the volumes are strictly equal, and includes, for example, the case where there is a difference within the range where the functions are performed to an overlapping or equal degree.

[0250] First, the gap volume in a state where the semiconductor wafer W is not bent is calculated. When the diameter of the semiconductor wafer W in a state where it is not bent is taken as D wafer , the height of the substrate support pin 77 provided on the holding plate 75 is h pin In the case of flat It is represented by the following formula (1).

[0251]

[0252] Next, refer to Fig.14 , calculate the gap volume when the semiconductor wafer W is bent. Here, Fig.14 1 is a diagram showing an overview of the gap volume when the semiconductor wafer W is bent. Fig.14 As shown, the gap volume V when the semiconductor wafer W is bent total It can be considered as the sum of the volume of the upper dome and the volume of the lower cylinder. In addition, assume Fig.14 The warped state shown is a state in which the degree of warping of the semiconductor wafer W is the greatest.

[0253] Assuming that the semiconductor wafer W is bent (flexed) so as to form an ideal spherical surface, the height of the semiconductor wafer W in the bent state (i.e., the distance between the vertex formed in the center of the semiconductor wafer W in the normal direction of the center of the semiconductor wafer W and the outer edge of the semiconductor wafer W in the bent state) is set to h bow The radius of curvature of the spherical surface of the curved semiconductor wafer W is set to R, and the volume of the dome portion of the upper part is V dome As shown in the following formula (2).

[0254]

[0255] On the other hand, the distance between the outer edge of the semiconductor wafer W in the bent state and the holding plate 75 is denoted as h. gap, the area covered by the semiconductor wafer W in the bent state when viewed from above is c, and the volume of the lower cylindrical part is V disc It is expressed by the following formula (3).

[0256]

[0257] Here, h gap 、h bow and h pin The relationship is expressed by the following formula (4).

[0258] h gap +h bow =h pin +X…(4)

[0259] Note that x corresponds to the distance between the vertex formed by the center portion of the semiconductor wafer W in a curved state and the upper ends of the substrate supporting pins 77 in the normal direction of the center portion of the semiconductor wafer W.

[0260] In addition, the relationship between R and x is expressed by the following formula (5).

[0261] R=k+X…(5)

[0262] Then, the distance between the substrate support pin 77 and the center of the semiconductor wafer W is defined as r pin , the following formula (6) can be derived.

[0263] R 2 =k 2 +r 2 pin …(6)

[0264] Then, by introducing equations (5) and (6) into equation (4), the following equation (7) can be derived.

[0265]

[0266] Furthermore, by substituting equation (7) into equation (3), the following equation (8) can be derived.

[0267]

[0268] Then, if it is assumed that the gap volume before and after the bending of the semiconductor wafer W is equal, then r pin It is expressed by the following formula (9).

[0269]

[0270] Fig.15 It means V dome 、V disc and Vtotal Figure 1 shows an example of a simulation result related to the relationship between Fig.15 The vertical axis represents volume [mm 3 ], the horizontal axis represents h bow [mm]. Fig.15 In the example, D wafer Set to 300mm, h pin Set to 1 mm, and set r according to formula (9) pin (i.e., 106 mm) is represented by a solid line, and the other r pin (i.e., 135 mm) are indicated by dashed lines. total , represented by a thick line.

[0271] exist Fig.15 The second thin solid line from the bottom is the 106mm V disc The third thin dotted line from the bottom is the 135mm V disc The fourth solid line from the bottom is the 106mm V total The thick dashed line at the top is the 135mm V total The thin solid line at the bottom is the 106mm V dome It is 135mm V dome The sum of the bottom thin solid line (volume value) and the third thin dashed line (volume value) from the bottom is the top thick dashed line (volume value). The sum of the bottom thin solid line (volume value) and the second thin solid line (volume value) from the bottom is the fourth thick solid line (volume value) from the bottom.

[0272] like Fig.15 As shown in the examples, in the case of solid and dashed lines, V dome With h bow In addition, Fig.15 In the figure, the solid and dashed lines V dome On the one hand, in the case of solid and dashed lines, V disc With h bow Increase and decrease.

[0273] However, in the case of the solid line, the r pin In this case, it can be seen that V total With h bow remains constant regardless of the substrate bending (i.e., h bow is 0 and h bow is a value other than 0), the gap volumes are equal.

[0274] <Regarding Suppression of Jumping of Semiconductor Wafer W>

[0275] Next, refer to Fig.16 , Fig.17 , Fig.18 and Fig.19 , according to formula (9) pin The situation and other pin In the case of FIG. 1 , the height of the semiconductor wafer W supported by the substrate supporting pins 77 is compared when the semiconductor wafer W jumps (jumps) from the substrate supporting pins 77 due to the bending during the heat treatment.

[0276] Fig.16 are respectively represented by r according to formula (9) pin (ie, 106 mm), and a height at which the semiconductor wafer W supported by the substrate supporting pins 77 is experimentally jumped. Fig.16 The results shown are equivalent to the case where a flash lamp with adjustable irradiation time is used to irradiate a relatively short time, usually between 0.4 ms and 100 ms. Fig.16 In the graph, the vertical axis represents the height of the jump (relative value for comparison), and the horizontal axis represents the time (relative value for comparison).

[0277] exist Fig.16 3 graphs corresponding to the case where three modes of voltage values ​​are applied to the flash lamp are shown (the voltage values ​​are in the order of A, B, and C modes from low to high), and the jumping height of the semiconductor wafer W is suppressed to a relatively low value. In the following figures, the A mode is represented by a solid line, the B mode is represented by a dotted line, and the C mode is represented by a bold line.

[0278] Fig.17 are respectively represented by r according to formula (9) pin (ie, 106 mm), and a height at which the semiconductor wafer W supported by the substrate supporting pins 77 is experimentally jumped. Fig.17 The results shown are equivalent to Fig.16 The situation shown is the case of a longer flash. Fig.17 In the graph, the vertical axis represents the height of the jump (relative value for comparison), and the horizontal axis represents the time (relative value for comparison).

[0279] exist Fig.17 3 shows three graphs corresponding to the cases where three patterns of voltage values, A, B, and C, are applied to the flash lamp. In each case, the height of the jump of the semiconductor wafer W is suppressed to a relatively low value.

[0280] Fig.18 are the other r pin (ie, 135 mm), and a height at which the semiconductor wafer W supported by the substrate supporting pins 77 is experimentally jumped. Fig.18 The results shown are equivalent to irradiation with Fig.16The same flashing situation is shown. Fig.18 In the graph, the vertical axis represents the height of the jump (relative value for comparison), and the horizontal axis represents the time (relative value for comparison).

[0281] exist Fig.18 The figure shows three graphs corresponding to the cases where the voltage values ​​of three modes A, B, and C are applied to the flash lamp. In each case, the jumping height of the semiconductor wafer W is greater than Fig.16 Jump heights shown.

[0282] Fig.19 are the other r pin (ie, 135 mm), and a height at which the semiconductor wafer W supported by the substrate supporting pins 77 is experimentally jumped. Fig.19 The results shown are equivalent to irradiation with Fig.17 The same flashing situation is shown. Fig.19 In the graph, the vertical axis represents the height of the jump (relative value for comparison), and the horizontal axis represents the time (relative value for comparison).

[0283] exist Fig.19 The figure shows three graphs corresponding to the cases where the voltage values ​​of three modes A, B, and C are applied to the flash lamp. In each case, the height of the semiconductor chip W jumping is greater than Fig.17 The situation shown.

[0284] like Fig.16 , Fig.17 , Fig.18 and Fig.19 As shown, according to formula (9) pin In the case of , the jumping height of the semiconductor wafer W becomes lower than that in other rpin cases.

[0285] <Effects of the above-described embodiments>

[0286] Next, examples of the effects produced by the above-described embodiments are described. In addition, in the following description, the effects are recorded based on the specific structures of the examples in the above-described embodiments, and other specific structures of the examples in the present application specification can be used to replace them within the scope of producing the same effects.

[0287] According to the above-described embodiment, the substrate support device includes a holding plate 75 and a plurality of substrate support pins 77. The holding plate 75 is opposite to the substrate. Here, the substrate corresponds to, for example, a semiconductor wafer W, and can be bent by heating by flash irradiation. The substrate support pins 77 are provided on the holding plate 75. In addition, the substrate support pins 77 support the semiconductor wafer W. Moreover, the plurality of substrate support pins 77 are arranged at positions such that the volume of the space between the holding plate 75 and the semiconductor wafer W in a non-bent state is equal to the volume of the space between the holding plate 75 and the semiconductor wafer W in a bent state.

[0288] According to such a configuration, even when the semiconductor wafer W is bent due to flash irradiation, it is possible to suppress the semiconductor wafer W from jumping off the substrate supporting pins 77 , and thus, as a result, it is possible to suppress the semiconductor wafer W from being broken.

[0289] In addition, even when other structures of the examples shown in the specification of the present application are appropriately added to the above-mentioned structure, that is, when other structures in the specification of the present application that are not mentioned as the above-mentioned structure are appropriately added, the same effect can be produced.

[0290] According to the above-described embodiment, the substrate support pins 77 are arranged in a ring shape in a plan view. With such a configuration, when the semiconductor wafer W is curved to form an ideal spherical surface, the substrate support pins 77 can appropriately support the curved semiconductor wafer W.

[0291] Furthermore, according to the above-described embodiment, the semiconductor wafer W has a circular shape in a plan view. According to such a configuration, when the semiconductor wafer W is curved so as to form an ideal spherical surface, it is possible to suppress the semiconductor wafer W from jumping off the substrate supporting pins 77 .

[0292] According to the above-described embodiment, when the height of the substrate support pins 77 is set to h pin , the curvature radius of the semiconductor wafer W in the curved state is R, and the height of the semiconductor wafer W in the curved state is h bow , the diameter of the semiconductor wafer W in the state without bending is D wafer , when the diameter of the semiconductor wafer W in the bent state when viewed from above is c, the distance r between each substrate supporting pin 77 and the center of the circular semiconductor wafer W when viewed from above is pin According to such a structure, the volume of the space between the holding plate 75 and the semiconductor wafer W becomes equal before and after the semiconductor wafer W is bent, thereby suppressing the restoring force generated during bending, thereby suppressing the semiconductor wafer W from jumping from the substrate support pins 77.

[0293] Furthermore, according to the above-described embodiment, the heat treatment apparatus includes the above-described substrate support device and the flash lamp FL for irradiating the semiconductor wafer W with flash light. According to such a structure, even if the upper surface of the semiconductor wafer W irradiated with flash light undergoes rapid thermal expansion and the upper surface of the semiconductor wafer W is bent into a convex shape, the semiconductor wafer W can be prevented from jumping from the substrate support pins 77.

[0294] According to the above-described embodiment, in the substrate supporting method, the semiconductor wafer W that can be bent by flash irradiation heating is placed opposite to the holding plate 75 provided with a plurality of substrate supporting pins 77 that support the semiconductor wafer W. Furthermore, the plurality of substrate supporting pins 77 are arranged at positions where the volume of the space between the holding plate 75 and the semiconductor wafer W in a non-bent state is equal to the volume of the space between the holding plate 75 and the semiconductor wafer W in a bent state.

[0295] According to such a configuration, even when the semiconductor wafer W is bent due to the flash irradiation, it is possible to suppress the semiconductor wafer W from jumping off the substrate supporting pins 77 , and thus, as a result, it is possible to suppress the semiconductor wafer W from being cracked.

[0296] Furthermore, the order in which each process is performed can be changed without particular limitation.

[0297] In addition, even when other structures of the examples shown in the specification of the present application are appropriately added to the above-mentioned structure, that is, when other structures in the specification of the present application that are not mentioned as the above-mentioned structure are appropriately added, the same effect can be produced.

[0298] Furthermore, according to the above-described embodiment, in the heat treatment method, the flash lamp FL is used to irradiate the semiconductor wafer W supported by the above-described substrate support method with flash light. According to such a structure, even if the upper surface of the semiconductor wafer W irradiated with the flash light undergoes rapid thermal expansion and the upper surface of the semiconductor wafer W is bent into a convex shape, it is possible to suppress the semiconductor wafer W from jumping off the substrate support pins 77.

[0299] <Regarding Modifications of the Embodiments Described Above>

[0300] In the above-described embodiments, the material, size, shape, relative configuration relationship or implementation conditions of each structural element are sometimes described, but these are examples in all aspects and are not limited to the contents described in the specification of this application.

[0301] Therefore, numerous modifications and equivalents not shown in the examples are foreseeable within the technical scope disclosed in the present specification. For example, the case where at least one structural element is changed includes the case where an addition or an omission occurs.

[0302] In the above-described embodiments, when a material name or the like is described without particular designation, the material is assumed to contain other additives, for example, an alloy, unless there is any contradiction.

Claims

1. A substrate support device, wherein: have: A holding plate for opposing a substrate that is capable of bending by heating through flash irradiation; a plurality of substrate support pins, provided on the holding plate and used for supporting the substrate, The plurality of substrate support pins are arranged at positions where the volume of a space between the holding plate and the substrate in a non-bent state becomes equal to the volume of a space between the holding plate and the substrate in a bent state.

2. The substrate supporting device according to claim 1, wherein: The substrate supporting pins are arranged in a ring shape in a plan view.

3. The substrate support device according to claim 1 or 2, wherein: The substrate is circular in a plan view.

4. The substrate support device according to claim 1 or 2, wherein: The height of the substrate support pin is defined as h pin , the curvature radius of the substrate in the bent state is R, and the height of the substrate in the bent state is h bow , the diameter of the substrate in the unbent state is D wafer , the diameter of the substrate in the bent state when viewed from above is c, and the volume of the space between the retaining plate and the substrate in the unbent state is V flat The volume of the dome portion surrounded by the substrate in the volume of the space between the holding plate and the substrate in the bent state is V dome In the case of pin satisfy 5. A heat treatment device, wherein: have: The substrate support device according to claim 1 or 2, The substrate support device includes a flash lamp for irradiating the substrate with the flash light.

6. A substrate supporting method, wherein: include: A step of placing a substrate that can be bent by flash irradiation and heating opposite to a holding plate provided with a plurality of substrate support pins for supporting the substrate; The step of arranging the plurality of substrate supporting pins at positions where the volume of a space between the holding plate and the substrate in a non-bent state becomes equal to the volume of a space between the holding plate and the substrate in a bent state.

7. A heat treatment method, wherein: have: A step of irradiating the substrate supported by the substrate supporting method according to claim 6 with the flash light using a flash lamp.

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