Method for avoiding parasitic oscillation in parallel semiconductor switches and corresponding device

Abstract

The disclosed embodiment provides a method and a corresponding device for avoiding parasitic oscillation in a parallel semiconductor switch. The method according to the disclosed embodiment includes: setting an unbalanced driving impedance for a plurality of parallel power devices so that only one power device controls the on transition of the switch and only one power device controls the off transition of the switch. According to the disclosed embodiment, parasitic oscillation during switch conversion is avoided, impedance matching is not required, and the impact on switching characteristics is small.

Description

Technical Field

[0001] The present invention relates to parallel semiconductor switches, and more particularly to a method for avoiding parasitic oscillation in parallel semiconductor switches and a corresponding device. Background Art

[0002] A switching power supply is a high-frequency electric energy conversion device that mainly uses power semiconductor devices (including but not limited to metal semiconductor field effect transistors MOSFET, bipolar transistors BJT and insulated gate bipolar transistors IGBT, etc.) to periodically "turn on" and "turn off" electronic switching devices through control circuits, allowing power semiconductor devices (hereinafter referred to as power devices) to pulse modulate the input voltage, thereby achieving voltage conversion and adjustable output voltage and automatic voltage regulation. Switching power supplies are therefore also called power converters.

[0003] In applications requiring high current, it is sometimes necessary to operate power semiconductor devices (such as MOSFETs) used as switches in a power converter in parallel (hereinafter such switches are also referred to as parallel semiconductor switches, and the corresponding power supply is referred to as a parallel switch-operated power supply) because this can reduce conduction losses, increase surface area to reduce thermal resistance to the heat sink, and is scalable for high power processing.

[0004] It is not uncommon for power supplies operated in parallel to fail, and these failures appear to occur randomly. The problem is sometimes resolved after replacing the failed semiconductor switch, and sometimes it still exists in the failed converter unit. Overstress is usually not observed in the power devices during steady-state operation. Detailed analysis shows that parasitic oscillations may occur during the transition period of switching transitions, depending on the combination of power devices installed for parallel operation. Parasitic oscillations generate internal overstress, which is not easily observed outside the device. When parasitic oscillations occur, the internal overstress can damage the relatively weak control terminal, such as the junction between the gate and source of the MOSFET, causing failure.

[0005] One of the reasons why parasitic oscillations are easily generated in the parallel operation of power devices is that during the switching transition that triggers the parasitic oscillation, the switching current is redistributed between the power devices, triggering the parasitic oscillation. The redistribution of switching current is usually caused by slight differences in the turn-on or turn-off times between the devices (due to different turn-on and turn-off thresholds of the devices and / or different driving impedances), resulting in each device adding switching action at different times in the linear operation region during the switching transition. Since parasitic oscillations depend on the parasitic parameters of the power devices operated in parallel, potential problems may not be observed during the development stage, but usually only appear after mass production begins. This makes the parallel operation of power devices have potential reliability issues.

[0006] One existing solution is to propose matching all driving impedances of the power devices so as to turn on and off all the power devices in parallel at the same time, but this solution is impractical in case of mass production.

[0007] Another existing solution is to increase the driving resistance to suppress the parasitic oscillation, but this solution will increase the switching loss and switching time.

[0008] Therefore, a solution is needed to avoid parasitic oscillation in parallel semiconductor switches. Summary of the invention

[0009] Contrary to the idea of ​​matching impedance in the prior art, the embodiments of the present disclosure propose introducing unbalanced driving impedance in parallel semiconductor switches to ensure that only one power device among multiple power devices operating in parallel is turned on and off during the transition period of the switch conversion, thereby ensuring that there is no switching current redistribution in the linear operating region, thereby preventing parasitic oscillations between the power devices operating in parallel.

[0010] According to a first aspect of the present disclosure, a control method for a semiconductor switch is provided, wherein the semiconductor switch comprises a plurality of power devices connected in parallel. The method comprises: setting an unbalanced driving impedance for the plurality of power devices connected in parallel, so that only one power device controls a turn-on transition of the switch and only one power device controls a turn-off transition of the switch.

[0011] According to a second aspect of the present disclosure, a semiconductor switch is provided, which includes a plurality of power devices connected in parallel, and is characterized in that: the plurality of power devices connected in parallel have an unbalanced control end driving impedance, so that only one power device controls the opening transition of the switch and only one power device controls the closing transition of the switch.

[0012] In some embodiments, the power device may be a MOSFET. In other embodiments, the power device may be a bipolar transistor. In still other embodiments, the power device may be an IGBT.

[0013] In some embodiments, enabling only one power device to control the on transition of the switch and only one power device to control the off transition of the switch may include any one of the following:

[0014] When the switch is turned on, the power device that controls the turn-on transition of the switch is turned on first, and other power devices start to turn on after the power device is in the saturation region; and

[0015] When the switch is turned off, the power device that controls the closing transition of the switch starts to be turned off only after the other power devices are in the cut-off region.

[0016] In some embodiments, when a switch is turned on, the power device that controls the on-transition of the switch is turned on first, and other power devices start to turn on after it is in the saturation region by setting the on-drive impedance of the power device that controls the on-transition of the switch to be smaller than the on-drive impedance of other power devices. The on-drive impedance is the drive impedance of the control terminal of the power device when the switch is turned on.

[0017] Optionally, the on-state driving impedance of the plurality of parallel-connected power devices satisfies the following condition:

[0018]

[0019] Among them, R g_on is the on-state drive impedance of the power device that controls the turn-on transition of the switch, R g_other_on is the on-state drive impedance of other power devices, V drv is the on-state drive voltage of the power device, V th_min and V th_max are the minimum and maximum conduction thresholds of the power device, C dg_min and C dg_max are the minimum and maximum reverse transfer capacitance of the power device, respectively.

[0020] In some embodiments, the following method can be used to achieve that when the switch is turned off, the power device that controls the shutdown transition of the switch starts to shut down only after other power devices are in the cut-off region: the shutdown drive impedance of the power device that controls the shutdown transition of the switch is set to be greater than the shutdown drive impedance of other power devices, wherein the shutdown drive impedance is the drive impedance of the control end of the power device when the switch is turned off.

[0021] Optionally, the turn-off driving impedance of the plurality of parallel-connected power devices satisfies the following condition:

[0022]

[0023] Among them, R g_off is the off drive impedance of the power device that controls the off transition of the switch, R g_other_off is the off drive impedance of other power devices, V th_min and V th_max are the minimum and maximum conduction thresholds of the power device, C dg_min and C dg_max are the minimum and maximum reverse transfer capacitance of the power device, respectively.

[0024] In some embodiments, a control terminal of at least one of the plurality of parallel power devices that controls the conduction transition of the switch is connected to a parallel drive circuit, and the parallel drive circuit includes:

[0025] a first branch consisting of a diode and a first impedance, and

[0026] The second branch is formed by a diode and a second impedance.

[0027] In some embodiments, the control terminal of at least one of the plurality of parallel power devices that controls the shutdown transition of the switch is connected to a parallel drive circuit, and the parallel drive circuit includes:

[0028] a first branch consisting of a diode and a third impedance, and

[0029] The second branch is formed by a diode and a fourth impedance.

[0030] In some embodiments, the power device that controls the turn-on transition of the switch and the power device that controls the turn-off transition of the switch are different power devices.

[0031] In other embodiments, the power device that controls the turn-on transition of the switch and the power device that controls the turn-off transition of the switch may be the same power device.

[0032] According to the embodiments of the present disclosure, parasitic oscillation of the parallel semiconductor switch during switching conversion is avoided, impedance matching is not required, and the impact on switching characteristics (such as switching loss and switching speed) is small. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The above and other features of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0034] Figure 1 The schematic diagram of a parallel semiconductor switch according to an embodiment of the present invention is schematically shown.

[0035] Figure 2 A schematic diagram of a parallel semiconductor switch according to another embodiment of the present invention is schematically shown.

[0036] In the drawings, the same reference numbers refer to the same or similar elements. DETAILED DESCRIPTION

[0037] The scheme of the present disclosure is described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the present disclosure should not be limited to the specific embodiments described below. In addition, for the sake of simplicity, detailed descriptions of known technologies that are not directly related to the present disclosure are omitted to prevent confusion in the understanding of the present disclosure.

[0038] In order to avoid parasitic oscillation in the parallel semiconductor switch, the embodiment of the present disclosure proposes: ensuring that during the transition period of the switch conversion of the parallel semiconductor switch, only one power device among the multiple power devices operated in parallel is turned on and off. That is, only one power device controls the switch on transition, and only one power device controls the switch off transition.

[0039] The power device used to control the turn-on transition of the switch and the power device used to control the turn-off transition of the switch can be the same or different. Since the switching loss will be concentrated on the selected devices for controlling the turn-on transition and the turn-off transition, in most cases, it is preferred but not limited to select different devices to control the turn-on transition and the turn-off transition respectively to share the heat generated by the switching loss.

[0040] In the following embodiments, MOSFET will be mainly used as an example of a power semiconductor device for description, but it should be understood that the embodiments of the present invention are also applicable to switches formed by connecting other types of power semiconductor devices in parallel, such as an insulated gate bipolar transistor IGBT or a bipolar junction transistor BJT.

[0041] Figure 1 The figure schematically shows a schematic diagram of a parallel semiconductor switch according to an embodiment of the present invention.

[0042] As shown in the figure, the parallel semiconductor switch includes a plurality of power devices Q1, Q2...Qn. Figure 1 Only three power devices are shown in FIG. 1 , and the parallel semiconductor switch may include more or fewer (such as two) power devices. The present disclosure is not limited to the number of power devices shown in the figure. Figure 1 The medium power device is shown as a MOSFET, but in other embodiments it may also be other power semiconductor devices, such as a bipolar junction transistor (BJT).

[0043] exist Figure 1 In the example of FIG. 1 , an example of using unbalanced (i.e., different) driving impedances to select power devices for controlling the conduction transition and the turn-off transition is shown. Specifically, in this example, Q1 is selected as the power device for controlling the conduction transition, and Qn is selected as the power device for controlling the turn-off transition.

[0044] For the convenience of design and description, the driving circuit of each power device Qi (i=1, 2...) includes two branches, and the two branches are respectively functional during the on-time and off-time of the switch through the configuration of the diode. As shown in the figure, due to the configuration of the diode in the driving circuit, Rg_on is the on-drive impedance of the power device Q1 selected to control the conduction transition, and Rg_other_on is the on-drive impedance of all other power devices connected in parallel. In this article, the on-drive impedance refers to the drive impedance of the control end of the power device when the switch is turned on, such as Figure 1 The driving impedance of the gate of MOSFET Qi (i=1, 2, ...) during the switch-on period.

[0045] Rg_off is the off drive impedance of the selected power device Qn that controls the off transition, and Rg_other_off is the off drive impedance of all other power devices connected in parallel. In this article, the off drive impedance refers to the drive impedance of the control end of the power device when the switch is turned off, such as Figure 1 The driving impedance of the gate of MOSFET Qi (i=1, 2, ...) during the switch off period.

[0046] To ensure that the device Q1 selected to control the conduction transition in this example is the only device that will be turned on during the switch conduction transition, the device's on-drive impedance can be determined based on the Miller effect equation. The basic idea is that when the selected power device Q1 is in the conduction transition, the falling slope of the voltage VDS across the drain and source of Q1 should keep all other parallel power devices Qj (j≠1) off due to the Miller effect. This will result in the following formula:

[0047]

[0048] Where R g_on is the on-state drive impedance of the power device (Q1 in this example) that controls the on-state transition of the switch, R g_other_on is the on-state drive impedance of other power devices, V drv is the on-state drive voltage of the power device, V th_min and V th_max are the minimum and maximum conduction thresholds of the power device, C dg_min and C dg_max are the minimum and maximum reverse transfer capacitance of the power device, respectively.

[0049] When equation (1) is satisfied, only the selected power device Q1 will participate in the conduction transition of the switch, while all other power devices connected in parallel will be turned on with zero voltage switching (ZVS) only after the conduction transition is completed.

[0050] It should be understood that Figure 1 The on-state drive impedance R of other power devices shown in g_other_on can be the same or different, as long as the on-state drive impedance R g_other_on Satisfying equation (1) ensures that the device Q1 selected to control the conduction transition is the only device that will conduct during the switch conduction transition.

[0051] To ensure that the device Qn selected to control the turn-off transition in this example is the only device that will be turned off during the switch turn-off transition, the device Qn should be the last device to be turned off with the maximum turn-off drive impedance Rg_off. This means that all other devices connected in parallel have lower turn-off drive impedance and will be turned off with ZVS before Qn starts to turn off. In addition, to prevent other devices from being turned on during the turn-off transition of the selected device Qn, the turn-off drive impedance can also be determined according to the Miller effect equation. The basic idea is that when the selected power device Qn is in the turn-off transition, due to the Miller effect, the rising slope of Qn's VDS should keep all other parallel devices Qj (j≠n) in the off state. This will result in the following formula:

[0052]

[0053] Among them, R g_off is the turn-off drive impedance of the power device (Qn in this example) that controls the turn-off transition of the switch, R g_other_off is the off drive impedance of other power devices, V th_min and V th_max are the minimum and maximum conduction thresholds of the power device, C dg_min and C dg_max are the minimum and maximum reverse transfer capacitance of the power device, respectively.

[0054] When equation (2) is satisfied, only the selected power device Qn will participate in the turn-off transition of the switch, and all other power devices connected in parallel have been turned off in ZVS before Qn starts the turn-off transition.

[0055] It should be understood that Figure 1 The turn-off drive impedance R of other power devices shown in g_other_off can be the same or different, as long as the off drive impedance R g_other_off Satisfying equation (2) ensures that the device Qn selected to control the turn-off transition is the only device that will turn off during the switch turn-off transition.

[0056] By this embodiment, parasitic oscillation caused by parallel operation of power devices can be avoided. In addition, for parallel operation, it is not necessary to sacrifice switching characteristics, such as not significantly affecting switching losses and switching speed. The desired on-characteristics can be determined only by Rg_on and Rg_other_on according to formula (1), and the desired off-characteristics can be determined only by Rg_off and Rg_other_off according to formula (2).

[0057] It should be understood that Figure 1 The structure is only used as an example. The driving circuit of the parallel power devices is not limited to Figure 1 The configuration shown uses diodes and resistors, but may be any configuration that can provide a drive impedance that satisfies equations (1) and (2).

[0058] For example, in Figure 1 In the example, the on-drive impedance and the off-drive impedance are designed and described separately by arranging diodes for the convenience of design and description. However, in practice, Rg_other_on and Rg_other_off may not be designed separately but have the same impedance, such as Figure 2 shown.

[0059] Figure 2 A schematic diagram of a parallel semiconductor switch according to another embodiment of the present invention is schematically shown.

[0060] and Figure 1 Similar to the above, Q1 is selected as the power device for controlling the conduction transition, and Qn is selected as the power device for controlling the turn-off transition. The driving circuit of the control end of Q1 and Qn still includes two branches, and the two branches are respectively effective during the on-time and off-time of the switch through the configuration of the diode. Figure 1 The difference between the circuit in is that the drive circuit of the power device not selected for controlling the conduction transition and the shutdown transition is simplified and no longer has two branches, and its drive impedance Rg_other_on and Rg_other_off when the switch is turned on and off are the same, both Rg_other.

[0061] Replace Rg_other_on and Rg_other_off in formulas (1) and (2) with Rg_other. The following formulas (3) and (4) can be obtained:

[0062]

[0063]

[0064] Among them, R g_on is the on-state drive impedance of the power device (Q1 in this example) that controls the on-state transition of the switch, Rg_off is the turn-off drive impedance of the power device (Qn in this example) that controls the turn-off transition of the switch, R g_other is the driving impedance of other power devices, V drv is the on-state drive voltage of the power device, V th_min and V th_max are the minimum and maximum conduction thresholds of the power device, C dg_min and C dg_max are the minimum and maximum reverse transfer capacitance of the power device, respectively.

[0065] When formulas (3) and (4) are satisfied, it can be ensured that only the selected power device Q1 will participate in the conduction transition of the switch, and all other power devices connected in parallel are turned on with zero voltage switching (ZVS) only after the conduction transition is completed, and it can be ensured that only the selected power device Qn will participate in the turn-off transition of the switch, and before Qn starts the turn-off transition, all other power devices connected in parallel have been turned off with ZVS.

[0066] In the above embodiments, MOSFET is used as an example of a power semiconductor device for explanation, but it should be understood that the embodiments of the present invention are also applicable to switches formed by other types of power semiconductor devices connected in parallel, such as insulated gate bipolar transistors IGBT or bipolar transistors, etc. When other power semiconductor devices are used in parallel as switches, the drive circuit will change accordingly with the type of power device, but still follow the basic idea of ​​the present disclosure, that is, to set an unbalanced drive impedance for multiple parallel power devices, so that only one power device controls the switch on transition and only one power device controls the switch off transition.

[0067] According to another aspect of the present disclosure, a control method for parallel semiconductor switches is also provided, which includes setting unbalanced driving impedances for the plurality of parallel power devices so that only one power device controls the switch's on transition and only one power device controls the switch's off transition.

[0068] In some embodiments, the power device may be a MOSFET. In other embodiments, the power device may be a bipolar junction transistor (BJT). In still other embodiments, the power device may be an IGBT.

[0069] In some embodiments, enabling only one power device to control the on transition of the switch and only one power device to control the off transition of the switch may include any one of the following:

[0070] When the switch is turned on, the power device that controls the turn-on transition of the switch is turned on first, and other power devices start to turn on after the power device is in the saturation region; and

[0071] When the switch is turned off, the power device that controls the closing transition of the switch starts to be turned off only after the other power devices are in the cut-off region.

[0072] In some embodiments, when a switch is turned on, the power device that controls the on-transition of the switch is turned on first, and other power devices start to turn on after it is in the saturation region by setting the on-drive impedance of the power device that controls the on-transition of the switch to be smaller than the on-drive impedance of other power devices. The on-drive impedance is the drive impedance of the control terminal of the power device when the switch is turned on.

[0073] Optionally, the on-state driving impedance of the plurality of parallel-connected power devices satisfies the following condition:

[0074]

[0075] Among them, R g_on is the on-state drive impedance of the power device that controls the turn-on transition of the switch, R g_other_on is the on-state drive impedance of other power devices, V drv is the on-state drive voltage of the power device, V th_min and V th_max are the minimum and maximum conduction thresholds of the power device, C dg_min and C dg_max are the minimum and maximum reverse transfer capacitance of the power device, respectively.

[0076] In some embodiments, the following method can be used to achieve that when the switch is turned off, the power device that controls the shutdown transition of the switch starts to shut down only after other power devices are in the cut-off region: the shutdown drive impedance of the power device that controls the shutdown transition of the switch is set to be greater than the shutdown drive impedance of other power devices, wherein the shutdown drive impedance is the drive impedance of the control end of the power device when the switch is turned off.

[0077] Optionally, the turn-off driving impedance of the plurality of parallel-connected power devices satisfies the following condition:

[0078]

[0079] Among them, R g_off is the off drive impedance of the power device that controls the off transition of the switch, R g_other_off is the off drive impedance of other power devices, V th_min and V th_max are the minimum and maximum conduction thresholds of the power device, C dg_min and C dg_maxare the minimum and maximum reverse transfer capacitance of the power device, respectively.

[0080] In some embodiments, a control terminal of at least one of the plurality of parallel power devices that controls the conduction transition of the switch is connected to a parallel drive circuit, and the parallel drive circuit includes:

[0081] a first branch consisting of a diode and a first impedance, and

[0082] The second branch is formed by a diode and a second impedance.

[0083] In some embodiments, the control terminal of at least one of the plurality of parallel power devices that controls the shutdown transition of the switch is connected to a parallel drive circuit, and the parallel drive circuit includes:

[0084] a first branch consisting of a diode and a third impedance, and

[0085] The second branch is formed by a diode and a fourth impedance.

[0086] In some embodiments, the power device that controls the turn-on transition of the switch and the power device that controls the turn-off transition of the switch are different power devices.

[0087] In other embodiments, the power device that controls the turn-on transition of the switch and the power device that controls the turn-off transition of the switch may be the same power device.

[0088] The control method for a parallel semiconductor switch according to an embodiment of the present disclosure can avoid parasitic oscillation of the parallel semiconductor switch during switching. Figure 1 and Figure 2 The description of the circuit shown will not be repeated here.

[0089] It should be understood that in the above description, the technical solution of the present application is shown only by way of example, but it does not mean that the present application is limited to the above-mentioned circuit structure and method steps. Where possible, the circuit structure and method steps can be adjusted and selected as needed. Therefore, some steps and units are not elements necessary for implementing the overall inventive concept of the present application. Therefore, the technical features necessary for the present application are only limited to the minimum requirements for realizing the overall inventive concept of the present application, and are not limited by the above specific examples.

[0090] According to the embodiments of the present disclosure, parasitic oscillation of the parallel semiconductor switch during switching conversion is avoided, impedance matching is not required, and the impact on switching characteristics (such as switching loss and switching speed) is small.

[0091] The present application has been described so far in conjunction with the preferred embodiments. It should be understood that those skilled in the art may make various other changes, substitutions and additions without departing from the spirit and scope of the present application. Therefore, the scope of the present application is not limited to the above-mentioned specific embodiments, but should be limited by the appended claims.

Claims

1. A control method for a semiconductor switch, wherein: The semiconductor switch includes a plurality of power devices connected in parallel, and the plurality of power devices connected in parallel are of the same type. The method includes: Setting unbalanced driving impedances for the plurality of parallel-connected power devices so that only one power device controls a turn-on transition of the switch and only one power device controls a turn-off transition of the switch, The power device that controls the on transition of the switch and the power device that controls the off transition of the switch are different power devices.

2. The method according to claim 1, wherein: The power devices include metal semiconductor field effect transistors MOSFET, bipolar junction transistors BJT and insulated gate bipolar transistors IGBT.

3. The method according to claim 1 or 2, wherein: The method of enabling only one power device to control the on transition of the switch and only one power device to control the off transition of the switch includes any one of the following: When the switch is turned on, the power device that controls the turn-on transition of the switch is turned on first, and other power devices start to turn on after the power device is in the saturation region; and When the switch is turned off, the power device that controls the closing transition of the switch starts to be turned off only after the other power devices are in the cut-off region.

4. The method according to claim 3, wherein: The following method is used to realize that when the switch is turned on, the power device that controls the turn-on transition of the switch is turned on first, and other power devices start to turn on after it is in the saturation region: The on-drive impedance of the power device controlling the on-transition of the switch is set to be smaller than the on-drive impedance of other power devices, wherein the on-drive impedance is the drive impedance of the control terminal of the power device when the switch is turned on.

5. The method according to claim 4, wherein: The on-state drive impedance of the plurality of parallel-connected power devices satisfies the following conditions: Among them, R g_on is the on-state drive impedance of the power device that controls the turn-on transition of the switch, R g_other_on is the on-state drive impedance of other power devices, V drv is the on-state drive voltage of the power device, V th_min and V th_max are the minimum and maximum conduction thresholds of the power device, C dg_min and C dg_max are the minimum and maximum reverse transfer capacitance of the power device, respectively.

6. The method according to claim 3, wherein: The following method is used to achieve that when the switch is turned off, the power device that controls the turn-off transition of the switch starts to turn off only after the other power devices are in the cut-off region: The off drive impedance of the power device controlling the off transition of the switch is set to be greater than the off drive impedance of other power devices, wherein the off drive impedance is the drive impedance of the control terminal of the power device when the switch is turned off.

7. The method according to claim 6, wherein: The shutdown drive impedance of the plurality of parallel-connected power devices meets the following conditions: Among them, R g_off is the off drive impedance of the power device that controls the off transition of the switch, R g_other_off is the off drive impedance of other power devices, V th_min and V th_max are the minimum and maximum conduction thresholds of the power device, C dg_min and C dg_max are the minimum and maximum reverse transfer capacitance of the power device, respectively.

8. The method according to claim 1 or 2, wherein: The control terminal of at least one of the plurality of parallel power devices that controls the on transition of the switch is connected to a parallel drive circuit, and the parallel drive circuit includes: a first branch consisting of a diode and a first impedance, and The second branch is formed by a diode and a second impedance.

9. The method according to claim 1 or 2, wherein: A control terminal of at least one of the plurality of parallel power devices that controls the closing transition of the switch is connected to a parallel drive circuit, and the parallel drive circuit includes: a first branch consisting of a diode and a third impedance, and The second branch is formed by a diode and a fourth impedance.

10. A semiconductor switch, comprising a plurality of power devices connected in parallel, wherein the plurality of power devices connected in parallel are of the same type, characterized in that: The plurality of parallel-connected power devices have unbalanced control terminal driving impedances, so that only one power device controls the on transition of the switch and only one power device controls the off transition of the switch. The power device that controls the on transition of the switch and the power device that controls the off transition of the switch are different power devices.

11. The switch according to claim 10, wherein: The power devices include metal semiconductor field effect transistors MOSFET, bipolar junction transistors BJT and insulated gate bipolar transistors IGBT.

12. The switch according to claim 10 or 11, wherein: The on-drive impedance of the power device that controls the on-transition of the switch is set to be smaller than the on-drive impedance of other power devices, wherein the on-drive impedance is the drive impedance of the control terminal of the power device when the switch is turned on.

13. The switch according to claim 12, wherein: The on-state drive impedance of the plurality of parallel-connected power devices satisfies the following conditions: Among them, R g_on is the on-state drive impedance of the power device that controls the turn-on transition of the switch, R g_other_on is the on-state drive impedance of other power devices, V drv is the on-state drive voltage of the power device, V th_min and V th_max are the minimum and maximum conduction thresholds of the power device, C dg_min and C dg_max are the minimum and maximum reverse transfer capacitance of the power device, respectively.

14. The switch according to claim 10 or 11, wherein: The off drive impedance of the power device that controls the off transition of the switch is set to be greater than the off drive impedance of other power devices, wherein the off drive impedance is the drive impedance of the control terminal of the power device when the switch is turned off.

15. The switch according to claim 14, wherein: The shutdown drive impedance of the plurality of parallel-connected power devices meets the following conditions: Among them, R g_off is the off drive impedance of the power device that controls the off transition of the switch, R g_other_off is the off drive impedance of other power devices, V th_min and V th_max are the minimum and maximum conduction thresholds of the power device, C dg_min and C dg_max are the minimum and maximum reverse transfer capacitance of the power device, respectively.

16. The switch according to claim 10 or 11, wherein: The control terminal of at least one of the plurality of parallel power devices that controls the on transition of the switch is connected to a parallel drive circuit, and the parallel drive circuit includes: a first branch consisting of a diode and a first impedance, and The second branch is formed by a diode and a second impedance.

17. The switch according to claim 10 or 11, wherein: A control terminal of at least one of the plurality of parallel power devices that controls the closing transition of the switch is connected to a parallel drive circuit, and the parallel drive circuit includes: a first branch consisting of a diode and a first impedance, and The second branch is formed by a diode and a second impedance.

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