Structure of a three-dimensional chip and method for manufacturing a three-dimensional chip

Abstract

The present invention provides a structure of a three-dimensional chip and a method for manufacturing the three-dimensional chip, belonging to the technical field of integrated circuits. It includes a plurality of metal pillars disposed on the surface of a substrate. A registration mark is provided between at least two of the plurality of metal pillars. A registration mark protection member is provided at the edge of the registration mark. During grinding, the registration mark protection member serves as a sacrificial layer to protect the metal pillars around the registration mark, thereby preventing the grinding process from damaging the metal pillars. The present invention transfers the original grinding pressure applied to the metal pillars outside the registration mark to the registration mark protection member, that is, sacrifices the registration mark protection member to protect the metal pillars (signal contact areas).

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuits, and relates to the stacking technology of three-dimensional metal wires in the chip processing process. Specifically, it is a structure of a three-dimensional chip and a preparation method of a three-dimensional chip. Background Art

[0002] A chip is formed by stacking and accumulating multiple metal layers and multiple passivation layers at intervals. During the chip manufacturing process, due to the presence of protrusions on the surface of the chip substrate, when a metal layer is grown on the surface of the substrate, the metal layer corresponding to the protrusion structure will protrude. As a result, the metal layer grown on the protrusion structure is high, and the metal layer grown on the non-protrusion part is low, resulting in uneven heights of the metal layers, which affects the flatness of the chip. Therefore, the general approach is to polish the passivation layer to make the first passivation layer above the surface of the chip substrate flat.

[0003] The existing passivation layer polishing mainly adopts the method of chemical mechanical planarization. After the polished passivation layer, a metal layer is grown continuously. The metal layer grown above this passivation layer will be at the same height. When multiple metal layers are grown repeatedly, each corresponding metal layer can also be at the same height. For 3D integrated chips, alignment marks are set on the main chip to facilitate the alignment of multiple chips during stacking; the alignment marks are placed in the scribe lane, that is, in the gap between two adjacent metal layers. There is no any pattern in the entire alignment mark, that is, no metal layer is grown inside the alignment mark. However, the area occupied by the alignment mark is relatively large, resulting in extremely uneven pattern density at this part. At the same time, affected by the polishing pressure, there is a large density difference between the part where the alignment mark is located and the part where the metal layer is grown. However, during chemical mechanical polishing, the polishing rate of the part where the metal layer is grown is higher than that of the part where no metal layer is grown, resulting in the part where the metal layer is grown being higher than the part where no metal layer is grown after polishing, causing the metal layer and the passivation layer outside the part near the alignment mark to be excessively removed, forming a depression, which still leads to uneven heights of each metal layer corresponding to each metal layer. Summary of the Invention

[0004] Aiming at the problem in the prior art that when the passivation layer is polished by chemical mechanical planarization, the metal layer and the passivation layer outside the part near the alignment mark are excessively removed, forming a depression, resulting in uneven heights of each metal layer corresponding to each metal layer, the present invention proposes a structure of a three-dimensional chip and a preparation method of a three-dimensional chip.

[0005] The present invention mainly adopts the method of setting an alignment mark protection member at the position of the alignment mark to protect the metal layer outside the part near the alignment mark through the alignment mark protection member, preventing the metal layer outside the part near the alignment mark from being excessively removed. The specific technical solution is as follows:

[0006] The structure of a three-dimensional chip includes a plurality of metal pillars disposed on the surface of a substrate. A registration mark is provided between at least two of the plurality of metal pillars. A registration mark protection member is provided at the edge of the registration mark. During polishing, the registration mark protection member serves as a sacrificial layer to protect the metal pillars around the registration mark, thereby preventing the polishing process from damaging the metal pillars.

[0007] Further defined, the registration mark protection member surrounds the edge of the registration mark for one week to form a closed annular structure.

[0008] Further defined, the registration mark protection member includes multiple layers of annular structures sleeved on each other in sequence.

[0009] Further defined, a plurality of convex structures are provided on the substrate, and one metal pillar is correspondingly provided on each convex structure;

[0010] Wherein, a passivation layer is filled between adjacent convex structures and between adjacent metal pillars.

[0011] Further defined, the metal pillar includes multiple layers of metal wires; the multiple layers of metal wires are stacked in a direction perpendicular to the plane where the substrate is located, and a passivation layer is provided between adjacent metal wires; and a conductive through hole is provided at a position of the passivation layer corresponding to the metal wire, and the conductive through hole conducts adjacent metal wires.

[0012] Further defined, on the same horizontal plane, the width of the annular structure of the registration mark protection member is greater than or equal to the width of the metal wire, and the distance between the registration mark protection member and the metal pillar is greater than or equal to the distance between adjacent two metal pillars.

[0013] Further defined, the innermost annular structure of the registration mark protection member is in contact with the edge of the registration mark.

[0014] Further defined, the material of the registration mark protection member is the same as that of the metal wire.

[0015] Further defined, the cross-section of the annular structure of the registration mark protection member is rectangular.

[0016] A method for manufacturing a three-dimensional chip formed based on the above structure of a three-dimensional chip includes the following steps:

[0017] 1) Grow metal pillars on the convex structures on the surface of the substrate, set a registration mark protection member at the edge of the registration mark between at least two adjacent metal pillars, and fill a passivation layer between adjacent two metal pillars and between the metal pillar and the registration mark protection member;

[0018] 2) After the passivation layer solidifies, the passivation layer is polished. During the polishing process, the metal columns around the alignment mark are protected by sacrificial alignment mark protection parts, and the polishing pressure originally applied to the metal columns outside the alignment mark is transferred to the alignment mark protection parts, thereby avoiding damage to the metal columns by the grinding process.

[0019] Further defined, the steps also include:

[0020] 3) After polishing is completed, a recessed layer is formed at the positions corresponding to the alignment mark protection member and the alignment mark; a conductive via and a metal wire are grown above the protruding structure corresponding to the metal column, and at the same time, the alignment mark protection member is grown to the same height as the corresponding metal wire; a passivation layer is filled between two adjacent metal columns, between the metal column and the alignment mark protection member, and in the recessed layer. After the passivation layer solidifies, step 2) is repeated to polish the passivation layer until the growth of each metal column is completed.

[0021] It is further defined that the polishing process is to fix the substrate plate on a rotating arm of a chemical mechanical polishing device, and polish the passivation layer by controlling the rotation speed and polishing pressure of the rotating arm.

[0022] Compared with the prior art, the present invention has the following beneficial effects:

[0023] 1. The present invention provides a three-dimensional chip structure, in which a registration mark protection member is provided at the edge of the registration mark, and the registration mark protection member can be used as a sacrificial layer to protect the metal column provided outside the registration mark. Figure 7 When the passivation layer corresponding to the raised structure on the surface of the substrate is polished, under the action of the polishing pressure, the area within the alignment mark and the location of the alignment mark protection piece are removed transitionally, and a depression is formed by polishing; while the metal column (signal contact area) outside the alignment mark is not removed transitionally, and the metal column is intact; the present invention transfers the polishing pressure originally applied to the metal column outside the alignment mark to the alignment mark protection piece, that is, the alignment mark protection piece is sacrificed to protect the metal column (signal contact area); after the polishing is completed, the passivation layer is filled in the depressed part, so that the depressed part and the metal layer are on the same plane, thereby ensuring the flatness of the chip.

[0024] 2. The registration mark protection piece surrounds the edge of the registration mark to form a closed ring structure. A multi-layer ring structure is arranged on the registration mark protection piece; it can achieve more adequate protection for the metal columns around the outer side of the registration mark.

[0025] 3. The width of the annular structure on the alignment mark protection part is greater than or equal to the width of the metal line; the distance between the outermost annular structure on the alignment mark protection part and the metal column is greater than or equal to the distance between adjacent metal columns; the material of the annular structure on the alignment mark protection part is the same as that of the metal line; such settings can ensure uniform density of the metal material on the surface of the substrate, and better eliminate the influence of chemical mechanical polishing on the metal columns around the alignment mark. Description of the Drawings

[0026] Figure 1 It is a schematic diagram of stacked metal lines and a passivation layer on a chip;

[0027] Figure 2 It is a schematic diagram of polished metal lines and a passivation layer;

[0028] Figure 3 It is a schematic diagram of the positions of the metal line and the alignment mark;

[0029] Figure 4 It is a schematic diagram of the pressure on each metal line and the alignment mark during chemical mechanical polishing;

[0030] Figure 5 It is a schematic diagram of the recessed part formed after chemical mechanical polishing;

[0031] Figure 6 It is a schematic diagram of setting an alignment mark protection part at the alignment mark position;

[0032] Figure 7 It is a schematic diagram of the recessed part formed after setting the alignment mark protection part;

[0033] Figure 8 It is a schematic diagram of the positions of multiple layers of metal lines and alignment marks;

[0034] Figure 9 For Figure 8 Based on this, it is a schematic diagram of adding an alignment mark protection part;

[0035] 1 - Passivation layer, 2 - Metal line, 3 - Substrate, 4 - Alignment mark, 5 - Alignment mark protection part. Detailed Implementation Manner

[0036] To make the technical solution of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the embodiments and the drawings. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely represents the selected embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts fall within the protection scope of the present invention.

[0037] The structure of a three-dimensional chip of the present invention includes a plurality of metal pillars disposed on the surface of a substrate 3. A registration mark 4 is provided between at least two of the plurality of metal pillars. A registration mark protection member 5 is provided at the edge of the registration mark 4. During grinding, the registration mark protection member 5 serves as a sacrificial layer to protect the metal pillars around the registration mark 4, thereby preventing the grinding process from damaging the metal pillars. The registration mark protection member 5 surrounds the edge of the registration mark 4 for one week to form a closed annular structure. The registration mark protection member 5 includes a plurality of layers of annular structures sleeved in sequence. A plurality of convex structures are provided on the substrate. One metal pillar is correspondingly provided on each convex structure. Among them, a passivation layer 1 is filled between adjacent convex structures and between adjacent metal pillars of a three-dimensional chip structure. The metal pillar includes a plurality of layers of metal wires 2. The plurality of layers of metal wires 2 are stacked in a direction perpendicular to the plane where the substrate 3 is located. A passivation layer 1 is provided between adjacent metal wires 2. And a conductive through hole is provided at the position of the passivation layer corresponding to the metal wire 2 of a three-dimensional chip structure to conduct adjacent metal wires 2. On the same horizontal plane, the width of the annular structure of the registration mark protection member 5 is greater than or equal to the width of the metal wire 2, and the distance between the registration mark protection member 5 and the metal pillar is greater than or equal to the distance between adjacent two metal pillars. The innermost annular structure of the registration mark protection member 5 is in contact with the edge of the registration mark 4. The material of the registration mark protection member 5 is the same as that of the metal wire 2. The cross section of the annular structure of the registration mark protection member 5 is rectangular.

[0038] The preparation method of a three-dimensional chip formed based on the above-mentioned structure of a three-dimensional chip of the present invention includes the following steps:

[0039] 1) Grow metal pillars on the convex structures on the surface of the substrate 3, provide a registration mark protection member 5 at the edge of the registration mark 4 between at least two adjacent metal pillars, and fill a passivation layer 1 between adjacent two metal pillars and between the metal pillar and the registration mark protection member 5;

[0040] 2) After the passivation layer 1 solidifies, polish the passivation layer 1. During the polishing process, protect the metal pillars around the alignment mark 4 through the alignment mark protection part 5, and transfer the original polishing pressure applied to the metal pillars outside the alignment mark 4 to the alignment mark protection part 5, so as to avoid damaging the metal pillars by the grinding process.

[0041] The above steps further include:

[0042] 3) After polishing, form a recessed layer at the positions corresponding to the alignment mark protection part 5 and the alignment mark 4; grow conductive vias and metal wires 2 above the protruding structures corresponding to the metal pillars, and at the same time grow the alignment mark protection part 5 to be as high as the corresponding metal wires 2; fill the passivation layer 1 between two adjacent metal pillars, between the metal pillar and the alignment mark protection part 5, and in the recessed layer. After the passivation layer 1 solidifies, repeat step 2) to polish the passivation layer 1 until all the metal pillars are grown.

[0043] The above polishing process is to fix the substrate 3 on the rotating arm of the chemical mechanical polishing equipment and polish the passivation layer 1 by controlling the rotation speed and polishing pressure of the rotating arm.

[0044] See Figure 1 , there are two metal pillars arranged on the upper surface of the substrate 3, and two metal layers (M1 and M2) are grown on the two metal pillars respectively. The passivation layer 1 is filled between the two metal layers. S on the figure represents the source end, D represents the drain end, and G represents the gate; See Figure 2 , for the metal wires 2 and the passivation layer formed after polishing the structure of a three-dimensional chip of the present invention, the recessed parts formed after polishing are filled with the passivation layer, so that each layer of metal wires 2 on the two metal pillars is in the same horizontal plane.

[0045] See Figures 3 - 5 , there are 4 metal pillars arranged on the upper surface of the substrate 3, and an alignment mark 4 is arranged between the third metal pillar and the fourth metal pillar. During chemical mechanical polishing, due to the uneven distribution of the metal pillars on the upper surface of the substrate 3, the metal pillars in the area of the alignment mark 4 and near the outside of the alignment mark 4 are subjected to greater polishing pressure, and the metal pillars far from the outside of the alignment mark 4 are subjected to smaller polishing pressure. After polishing, the metal pillars near the outside of the alignment mark 4 are over-polished to form a recessed area.

[0046] Example 1

[0047] See Figure 7, The structure of a three-dimensional chip in this embodiment includes a plurality of metal posts disposed on the surface of a substrate 3. A registration mark 4 is provided between at least two of the plurality of metal posts. A registration mark protection member 5 is provided at the edge of the registration mark 4. When grinding the passivation layer 1 above the surface of the substrate 3, the registration mark protection member 5 serves as a sacrificial layer to protect the metal posts disposed outside the registration mark 4; that is, during grinding, the grinding pressure originally applied to the metal posts outside the registration mark 4 is transferred to the registration mark protection member 5, sacrificing the registration mark protection member 5 to protect the metal posts (signal contact areas), thereby avoiding damage to the metal posts during the grinding process.

[0048] Preferably, the registration mark 4 in this embodiment is provided on the upper end surface of the substrate 3.

[0049] It should be noted that the number of metal posts in this embodiment can be 2, 3, 4, 5, 6, or even more. The plurality of metal posts are arranged side by side on the surface of the substrate 3 in a direction perpendicular to the panel of the substrate 3.

[0050] Embodiment 2

[0051] See Figure 6 , The structure of a three-dimensional chip in this embodiment, based on Embodiment 1, has the registration mark protection member 5 surrounding the edge of the registration mark 4 for one week to form a closed annular structure.

[0052] In this embodiment, 4 metal posts are provided on the upper surface of the substrate 3. A registration mark 4 is provided between the third metal post and the fourth metal post. The registration mark protection member 5 forms an annular structure with a rectangular cross-section at the edge of the registration mark 4. It should be noted that this cross-section is described based on the orientation shown in the accompanying drawings of the specification and does not represent the actual installation orientation or the normal use orientation of the product.

[0053] It should be noted that the cross-sectional shape of the registration mark protection member 5 in this embodiment can also be an annular structure such as a triangle or a circle, and its specific shape can be matched and designed according to the cross-sectional shape of the registration mark 4.

[0054] The width K2 of the annular structure on the registration mark protection member 5 in this embodiment is greater than or equal to the width K1 of the metal line 2; preferably, the width K2 of the annular structure on the registration mark protection member 5 in this embodiment is equal to the width K1 of the metal line 2.

[0055] The distance L2 between the outermost annular structure on the registration mark protection member 5 and the metal post in this embodiment is greater than or equal to the distance L1 between adjacent two metal posts; preferably, the distance L2 between the outermost annular structure on the registration mark protection member 5 and the metal post in this embodiment is equal to the distance L1 between adjacent two metal posts.

[0056] Preferably, the edge of the innermost ring-shaped structure on the alignment mark protection member 5 just contacts the edge of the alignment mark 4.

[0057] The material of the ring-shaped structure on the alignment mark protection member 5 can be a metal material, a plastic material or other wear-resistant materials. Preferably, the material of the ring-shaped structure on the alignment mark protection member 5 is the same as the material of the metal wire 2, which is a metal material, specifically copper, aluminum, silver, etc.

[0058] Embodiment 3

[0059] See Figure 9 , in the structure of a three-dimensional chip in this embodiment, on the basis of Embodiment 2, the alignment mark protection member 5 has two layers, and the two layers of alignment mark protection members 5 are sequentially arranged from the inside to the outside along the horizontal plane at the central position of the alignment mark 4.

[0060] It should be noted that the alignment mark protection member 5 in this embodiment can also be 3 layers, 4 layers, 5 layers, or even multiple layers, and its specific number is specifically set according to the size of the outside of the alignment mark 4.

[0061] In this embodiment, 4 convex structures are provided on the surface of the substrate 3, and the metal columns are correspondingly arranged on the convex structures.

[0062] It should be noted that the number of convex structures on the surface of the substrate 3 in this embodiment can be 2, 3, 4, 5, 6, or even more, and the specific number of convex structures corresponds one-to-one with the number of metal columns; the space between two adjacent convex structures is filled with the passivation layer 1.

[0063] The metal column in this embodiment includes three layers of metal wires 2 (M1, M2, and M3) and two conductive vias (V1 and V2). The three layers of metal wires 2 are the first metal wire, the second metal wire, and the third metal wire from bottom to top in sequence; the conductive vias are the first conductive via and the second conductive via from bottom to top in sequence; the bottom end of the first metal wire is connected to the upper surface of the substrate 3 through the convex structure, the top end of the first metal wire is connected to the bottom end of the second metal wire through the first conductive via, the top end of the second metal wire is connected to the bottom end of the second metal wire through the second conductive via, and the signal is output through the top end of the second metal wire.

[0064] It should be noted that see Figure 8 , in this embodiment, the number of layers of the metal wire 2 and the number of layers of the conductive via on the metal column can both be 2 layers, 3 layers, 4 layers, 5 layers, or even more layers, that is, the metal wire 2 includes M1, M2, M3, M4,...; the conductive vias include V1, V2, V3, V4,...; the metal wire 2 and the conductive vias are sequentially arranged at intervals along the axial direction of the metal column, that is, the adjacent two layers of metal wires 2 are spaced by the conductive via, and the space between the adjacent two layers of metal wires 2 is filled with the passivation layer 1.

[0065] Example 4

[0066] The preparation method of the three-dimensional chip in this embodiment is formed based on the structure of the three-dimensional chip in Embodiment 3, and specifically includes the following steps:

[0067] 1) Grow metal pillars on the convex structures on the upper surface of the substrate plate 3, set alignment mark protection parts 5 at the edge positions of the alignment marks 4 between at least two adjacent metal pillars, and fill the passivation layer 1 between two adjacent metal pillars and between the metal pillar and the alignment mark protection part 5;

[0068] 2) After the passivation layer 1 solidifies, polish the passivation layer 1. During the polishing process, protect the metal pillars around the alignment mark 4 by sacrificing the alignment mark protection part 5, and transfer the original polishing pressure applied to the metal pillars outside the alignment mark 4 to the alignment mark protection part 5, so as to avoid damaging the metal pillars by the grinding process;

[0069] 3) After polishing, form a concave layer at the positions corresponding to the alignment mark protection part 5 and the alignment mark 4; grow conductive vias and metal wires 2 above the convex structures corresponding to the metal pillars, and at the same time grow the alignment mark protection part 5 to the same height as the corresponding metal wire 2; fill the passivation layer 1 between two adjacent metal pillars, between the metal pillar and the alignment mark protection part 5, and in the concave layer. After the passivation layer 1 solidifies, repeat step 2) to polish the passivation layer 1 until all metal pillars are grown.

[0070] Preferably, the polishing process in this embodiment is: fix the substrate plate 3 on the rotating arm of the chemical mechanical planarization equipment, and polish the passivation layer 1 by controlling the rotation speed and polishing pressure of the rotating arm.

[0071] The removal rate of the passivation layer 1 follows the Princeton equation: S = Kp x Speed x Pressure; where S is the removal rate of the passivation layer 1; Kp is the Princeton coefficient, which is a constant; Speed is the rotation rate of the rotating arm; Pressure is the pressure applied to the surface of the passivation layer 1.

[0072] The above are only the preferred embodiments of the present invention and are not used to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. Structure of a three-dimensional chip, characterized in that, it includes a plurality of metal pillars disposed on the surface of a substrate plate (3), a registration mark (4) is disposed between at least two of the plurality of metal pillars, a registration mark protection member (5) is disposed at the edge of the registration mark (4), during grinding, the registration mark protection member (5) serves as a sacrificial layer to protect the metal pillars around the registration mark (4), and transfers the original grinding pressure applied to the metal pillars outside the registration mark (4) to the registration mark protection member, thereby preventing the grinding process from damaging the metal pillars; After grinding is completed, a recessed layer is formed at the position corresponding to the registration mark protection member (5) and the registration mark (4); conductive vias and metal wires (2) are grown above the protruding structures corresponding to the metal pillars, and at the same time, the registration mark protection member (5) is grown to be level with the corresponding metal wires (2).

2. The structure of a three-dimensional chip according to claim 1, characterized in that, the registration mark protection member (5) surrounds the edge of the registration mark (4) for one week to form a closed annular structure.

3. The structure of a three-dimensional chip according to claim 2, characterized in that, the registration mark protection member (5) includes a plurality of nested annular structures.

4. The structure of a three-dimensional chip according to claim 3, characterized in that, a plurality of protruding structures are disposed on the substrate plate (3), and one metal pillar is correspondingly disposed on each protruding structure; wherein, a passivation layer (1) is filled between adjacent protruding structures and between adjacent metal pillars.

5. The structure of a three-dimensional chip according to claim 4, characterized in that, the metal pillar includes a plurality of layers of metal wires (2); the plurality of layers of metal wires (2) are stacked in a direction perpendicular to the plane where the substrate plate (3) is located, a passivation layer (1) is disposed between adjacent metal wires (2); and a conductive via is disposed at the position of the passivation layer corresponding to the metal wire (2), and the conductive via conducts adjacent metal wires (2).

6. The structure of a three-dimensional chip according to claim 5, characterized in that, on the same horizontal plane, the width of the annular structure of the registration mark protection member (5) is greater than or equal to the width of the metal wire (2), and the distance between the registration mark protection member (5) and the metal pillar is greater than or equal to the distance between adjacent two metal pillars.

7. The structure of a three-dimensional chip according to claim 6, characterized in that, the innermost annular structure of the registration mark protection member (5) contacts the edge of the registration mark (4).

8. The structure of a three-dimensional chip according to claim 7, characterized in that, the material of the registration mark protection member (5) is the same as the material of the metal wire (2).

9. The structure of a three-dimensional chip according to claim 8, characterized in that, the cross-section of the annular structure of the registration mark protection member (5) is rectangular.

10. A method for manufacturing a three-dimensional chip formed based on the structure of a three-dimensional chip according to claim 9, characterized in that, it includes the following steps: 1) Grow metal pillars on the protruding structures on the surface of the substrate board (3). At the edges of the alignment marks (4) between at least two adjacent metal pillars, set alignment mark protection parts (5). Fill the passivation layer (1) between two adjacent metal pillars and between the metal pillar and the alignment mark protection part (5). 2) After the passivation layer (1) solidifies, polish the passivation layer (1). During the polishing process, protect the metal pillars around the alignment marks (4) by sacrificing the alignment mark protection parts (5), and transfer the polishing pressure originally applied to the metal pillars outside the alignment marks (4) to the alignment mark protection parts (5), so as to avoid damaging the metal pillars by the grinding process. 3) After polishing, form a recessed layer at the positions corresponding to the alignment mark protection parts (5) and the alignment marks (4). Grow conductive vias and metal wires (2) above the protruding structures corresponding to the metal pillars, and at the same time grow the alignment mark protection parts (5) to the same height as the corresponding metal wires (2). Fill the passivation layer (1) between two adjacent metal pillars, between the metal pillar and the alignment mark protection part (5), and in the recessed layer. After the passivation layer (1) solidifies, repeat step 2) to polish the passivation layer (1) until all the metal pillars are grown.

11. The method for manufacturing a three-dimensional chip according to claim 10, characterized in that in the polishing process, the substrate board (3) is fixed on the rotating arm of a chemical mechanical planarization device, and the passivation layer (1) is polished by controlling the rotation speed and polishing pressure of the rotating arm.

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