MCM packaging structure and manufacturing method thereof

Abstract

The present invention provides an MCM packaging structure and a manufacturing method thereof, wherein the packaging structure comprises: a first bare chip assembly, a conductive column, a plastic sealing layer, a first conductive trace, a second conductive trace, a first conductive bump, a second conductive bump, a pre-wiring substrate, a passive device, a first dielectric layer, and a second dielectric layer. The pre-wiring substrate can transfer the wiring layer that needs to be formed on the active surface of the bare chip to the pre-wiring substrate, and the pre-wiring substrate includes complex multi-circuits, which are embedded in the packaging structure by being electrically connected to the pads on the active surface of the bare chip, thereby improving the performance of the entire MCM packaging structure and incorporating passive devices into the packaging structure. The pre-wiring substrate can be tested before packaging to avoid using a known bad pre-wiring substrate. The pre-wiring substrate is a prefabricated substrate, and its manufacturing process is independent of the packaging process, which can save the packaging time of the entire packaging process.

Description

Technical Field

[0001] The present invention relates to the technical field of chip packaging, and in particular to an MCM packaging structure and a manufacturing method thereof. Background Art

[0002] During the packaging process, bare chips with different functions are often packaged in a packaging structure to form a specific function, which is called a multi-chip module (MCM). It has the advantages of small size, high reliability, high performance and multi-function.

[0003] As electronic devices become smaller and lighter, chip packages with compact structures and small volumes are increasingly favored by the market.

[0004] In MCM, the internal circuit structure of the chip is often complex, and the wiring density in the wiring layer is high, which makes wiring difficult because the chip surface area is too small. In addition, due to the overly dense wiring, it is easy to cause short circuits in fine wiring, thus affecting the yield of the product. At the same time, the service life of the chip is also low; especially when it is necessary to form multiple wiring layers, the process is difficult to control due to the complexity of the process. Summary of the invention

[0005] The object of the present invention is to provide a MCM packaging structure and a manufacturing method thereof to solve the problems in the related art.

[0006] To achieve the above object, a first aspect of the present invention provides an MCM packaging structure, comprising:

[0007] A first die assembly at least comprising: a first die and a second die, wherein the first die comprises a plurality of first pads, the first pads being located on an active surface of the first die, and the second die comprises a plurality of second pads, the second pads being located on an active surface of the second die; the active surface of the second die is covered with a second protective layer, the second protective layer exposes the second pads; the active surface of the first die faces opposite to the active surface of the second die;

[0008] A plurality of conductive pillars are located on the side of the first die assembly, the conductive pillars comprising a first end and a second end opposite to each other;

[0009] A plastic encapsulation layer, covering the first bare chip assembly and the plurality of conductive pillars, wherein the back side of the plastic encapsulation layer exposes the second protective layer, the second pad, and the second end of the conductive pillar, and the front side of the plastic encapsulation layer exposes the active surface of the first bare chip and the first end of the conductive pillar;

[0010] A first conductive trace, located on the first pad, the first end of the conductive column and the front surface of the plastic layer, for electrically connecting the first die and the conductive column;

[0011] a first conductive bump connected to the first conductive trace;

[0012] a first dielectric layer, embedding the first conductive trace and the first conductive bump, wherein the first conductive bump is exposed outside the first dielectric layer;

[0013] A second conductive trace, located on the second pad, the second end of the conductive column and the back side of the plastic layer, for electrically connecting the second die and the conductive column;

[0014] a second conductive bump connected to the second conductive trace;

[0015] a second dielectric layer, embedding the second conductive trace and the second conductive bump, wherein the second conductive bump is exposed outside the second dielectric layer;

[0016] a pre-wiring substrate, located on the second conductive bump and the second dielectric layer; a pre-wiring circuit is provided in the pre-wiring substrate, the pre-wiring circuit includes a front electrical connection point and a back electrical connection point, the front electrical connection point is connected to the second conductive bump; and

[0017] A passive device is electrically connected to the back electrical connection point of the pre-wiring substrate.

[0018] Optionally, the first bare die assembly is a bare die stacking structure.

[0019] Optionally, the pre-wiring substrate being located on the second conductive bump and the second dielectric layer is replaced by: the pre-wiring substrate being located on the first conductive bump and the first dielectric layer.

[0020] Optionally, it also includes: a fourth dielectric layer, located on the active surface of the first bare chip, the first end of the conductive column and the front side of the plastic layer; the fourth dielectric layer exposes the first pad and the first end of the conductive column; the first conductive trace is located on the first pad, the first end of the conductive column and the fourth dielectric layer.

[0021] Optionally, it further includes: a first protective layer covering the active surface of the first bare chip, the first protective layer exposing the first pad; and a front side of the plastic packaging layer exposing the first protective layer and the first pad.

[0022] Optionally, the material of the second protective layer is an organic polymer insulating material, an inorganic insulating material or a composite material; and / or the material of the first dielectric layer is an organic polymer insulating material, an inorganic insulating material or a composite material; and / or the material of the second dielectric layer is an organic polymer insulating material, an inorganic insulating material or a composite material.

[0023] Optionally, the first conductive trace includes a metal pattern layer; and / or the second conductive trace includes a metal pattern layer.

[0024] A second aspect of the present invention provides a method for manufacturing an MCM packaging structure, comprising:

[0025] A carrier and a plurality of groups of components to be packaged carried on the carrier are provided, each group of components to be packaged includes: a first bare chip assembly, and a plurality of conductive pillars located on the side of the first bare chip assembly; the first bare chip assembly at least includes: a first bare chip and a second bare chip, the first bare chip includes a plurality of first pads, the first pads are located on the active surface of the first bare chip, the second bare chip includes a plurality of second pads, the second pads are located on the active surface of the second bare chip; the active surface of the second bare chip is covered with a second protective layer; the active surface of the first bare chip and the active surface of the second bare chip face each other; the conductive pillar includes a first end and a second end opposite to each other; the active surface of the first bare chip and the first end of the conductive pillar face the carrier;

[0026] Forming a plastic encapsulation layer on the surface of the carrier board to bury each group of the components to be encapsulated; thinning the plastic encapsulation layer until the second protective layer and the second end of the conductive column are exposed;

[0027] The carrier is removed to expose the active surface of the first bare die, the first end of the conductive column and the front side of the plastic layer; a first conductive trace is formed on the first pad, the first end of the conductive column and the front side of the plastic layer to electrically connect the first bare die and the conductive column in the group; a first conductive bump is formed on the first conductive trace and a first dielectric layer is formed to bury the first conductive trace and the first conductive bump, wherein the first conductive bump is exposed outside the first dielectric layer;

[0028] A second opening is formed in the second protection layer to expose the second pad; a second conductive trace is formed on the second protection layer, the second pad, the second end of the conductive column and the back of the plastic layer to electrically connect the second die in the group with the conductive column; a second conductive bump is formed on the second conductive trace and a second dielectric layer is formed to bury the second conductive trace and the second conductive bump, wherein the second conductive bump is exposed outside the second dielectric layer;

[0029] A pre-wiring substrate is arranged on the second conductive bump and the second dielectric layer, wherein a pre-wiring circuit is arranged in the pre-wiring substrate, wherein the pre-wiring circuit includes a front electrical connection point and a back electrical connection point, wherein the front electrical connection point is connected to the second conductive bump; a third dielectric layer is formed to bury the pre-wiring substrate, wherein the back electrical connection point is exposed outside the third dielectric layer;

[0030] electrically connecting a passive device to the back electrical connection point of the pre-wiring substrate;

[0031] Cutting to form a plurality of MCM packaging structures, each of the MCM packaging structures includes a group of the components to be packaged.

[0032] Optionally, the second conductive trace is formed first, a second conductive bump is formed on the second conductive trace, and a second dielectric layer is formed to bury the second conductive trace and the second conductive bump, and the second conductive bump is exposed outside the second dielectric layer; then the carrier is removed to form the first conductive trace, a first conductive bump is formed on the first conductive trace, and a first dielectric layer is formed to bury the first conductive trace and the first conductive bump, and the first conductive bump is exposed outside the first dielectric layer, and a pre-wiring substrate is arranged on the first conductive bump and the first dielectric layer, and the front electrical connection point of the pre-wiring substrate is connected to the second conductive bump.

[0033] Optionally, the step of thinning the plastic packaging layer until the second protection layer and the second end of the conductive column are exposed is performed after the step of forming the first dielectric layer and before the step of forming the second conductive trace.

[0034] Optionally, after removing the carrier, a fourth dielectric layer is formed on the exposed active surface of the first bare chip, the first end of the conductive column and the front side of the plastic layer; a plurality of third openings are formed in the fourth dielectric layer, the third openings exposing the first solder pad and the first end of the conductive column; and the first conductive trace is formed on the first solder pad, the first end of the conductive column and the fourth dielectric layer.

[0035] Optionally, in the first bare chip assembly, the active surface of the first bare chip is covered with a first protective layer; the first protective layer faces the carrier; a first opening exposing the first pad is provided in the first protective layer, or after the step of removing the carrier and before the step of forming the first conductive trace, a first opening is formed in the first protective layer to expose the first pad.

[0036] Optionally, the pre-wiring substrates of each group of the components to be packaged are connected together and are cut apart in the step of cutting to form a plurality of MCM packaging structures.

[0037] A third aspect of the present invention provides an MCM packaging structure, comprising:

[0038] A bare die, the bare die comprising a plurality of pads, wherein the pads are located on an active surface of the bare die;

[0039] A plurality of conductive pillars are located on the side of the die, the conductive pillars comprising a first end and a second end opposite to each other;

[0040] A plastic encapsulation layer, covering the bare die and the plurality of conductive pillars, wherein the back side of the plastic encapsulation layer exposes the second ends of the conductive pillars, and the front side of the plastic encapsulation layer exposes the active surface of the bare die and the first ends of the conductive pillars;

[0041] A conductive trace, located on the pad, the first end of the conductive column and the front side of the plastic layer, for electrically connecting the bare die and the conductive column;

[0042] a first conductive bump connected to the conductive trace;

[0043] A first dielectric layer, embedding the conductive trace and the first conductive bump, wherein the first conductive bump is exposed outside the first dielectric layer;

[0044] A second conductive bump connected to the second end of the conductive column;

[0045] a second dielectric layer, embedding the second conductive bump, wherein the second conductive bump is exposed outside the second dielectric layer;

[0046] a pre-wiring substrate, located on the first conductive bump and the first dielectric layer; a pre-wiring circuit is provided in the pre-wiring substrate, the pre-wiring circuit includes a front electrical connection point and a back electrical connection point, the front electrical connection point is connected to the first conductive bump; and

[0047] A passive device is electrically connected to the back electrical connection point of the pre-wiring substrate.

[0048] Optionally, the die is replaced by a second die assembly, the second die assembly comprising a plurality of dies, and active surfaces of the plurality of dies face the same direction.

[0049] A fourth aspect of the present invention provides a method for manufacturing an MCM packaging structure, comprising:

[0050] A carrier board and a plurality of groups of components to be packaged carried on the carrier board are provided, each group of components to be packaged includes: a bare chip and a plurality of conductive pillars located on the side of the bare chip; the bare chip includes a plurality of pads, and the pads are located on the active surface of the bare chip; the conductive pillars include a first end and a second end opposite to each other; the active surface of the bare chip and the first end of the conductive pillars face the carrier board;

[0051] Forming a plastic encapsulation layer on the surface of the carrier board to bury each group of the components to be encapsulated; thinning the plastic encapsulation layer until the second end of the conductive column is exposed;

[0052] forming a second conductive bump on the second end of the conductive column and the back side of the plastic packaging layer and forming a second dielectric layer that buries the second conductive bump, wherein the second conductive bump is exposed outside the second dielectric layer;

[0053] The carrier is removed to expose the active surface of the bare die, the first end of the conductive column and the front side of the plastic layer; a conductive trace is formed on the pad, the first end of the conductive column and the front side of the plastic layer to electrically connect the bare die and the conductive column in the group; a first conductive bump is formed on the conductive trace and a first dielectric layer is formed to bury the conductive trace and the first conductive bump, wherein the first conductive bump is exposed outside the first dielectric layer;

[0054] A pre-wiring substrate is arranged on the first conductive bump and the first dielectric layer, wherein a pre-wiring circuit is arranged in the pre-wiring substrate, wherein the pre-wiring circuit includes a front electrical connection point and a back electrical connection point, wherein the front electrical connection point is connected to the first conductive bump; a third dielectric layer is formed to bury the pre-wiring substrate, wherein the back electrical connection point is exposed outside the third dielectric layer;

[0055] electrically connecting a passive device to the back electrical connection point of the pre-wiring substrate;

[0056] Cutting to form a plurality of MCM packaging structures, each of the MCM packaging structures includes a group of the components to be packaged.

[0057] Optionally, the die is replaced by a second die assembly, the second die assembly comprising a plurality of dies, and active surfaces of the plurality of dies face the same direction.

[0058] Compared with the prior art, the present invention has the following beneficial effects:

[0059] First, the pre-wiring substrate can transfer the wiring layer that needs to be formed on the active surface of the die to the pre-wiring substrate. The pre-wiring substrate includes complex multi-circuits. These complex multi-circuits are embedded in the packaging structure by being electrically connected to the pads on the active surface of the die, which can improve the performance of the entire MCM packaging structure and can also incorporate passive devices into the MCM packaging structure. Second, the fine wiring in the rewiring layer is transferred to the pre-wiring substrate, which reduces the probability of short circuits and increases the product yield. At the same time, the number of layers of the first conductive trace and / or the second conductive trace can be reduced, and the complexity of the process can be reduced. Third, a pre-formed pre-wiring substrate is provided, and the pre-wiring substrate can be tested before packaging to avoid the use of known bad pre-wiring substrates. Fourth, the pre-wiring substrate is a prefabricated substrate, and its production process is independent of the packaging process, which can save the packaging time of the entire packaging process.

[0060] In addition, bare die components with active surfaces facing the same or opposite directions can achieve the effect of small volume and compact structure of MCM packaging structure. For bare die components with active surfaces facing opposite directions, the pre-wiring substrate and the conductive pillars can not only realize the electrical connection between the first bare die and the second bare die, but also realize wiring on both sides of the front and back of the plastic packaging layer. Compared with wiring on only one side, the density of wiring can be improved, forming a MCM packaging structure with more complex wiring and smaller volume. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] Figure 1 is a schematic cross-sectional structural diagram of an MCM packaging structure according to a first embodiment of the present invention;

[0062] Figure 2 yes Figure 1 A flow chart of a method for making an MCM packaging structure;

[0063] Figures 3 to 10 yes Figure 2 Schematic diagram of the intermediate structure corresponding to the process in;

[0064] Fig.11 is a schematic cross-sectional structural diagram of an MCM packaging structure according to a second embodiment of the present invention;

[0065] Fig.12 is a schematic cross-sectional structural diagram of an MCM packaging structure according to a third embodiment of the present invention;

[0066] Fig.13 FIG. 4 is a schematic cross-sectional view of an MCM packaging structure according to a fourth embodiment of the present invention.

[0067] To facilitate understanding of the present invention, all reference numerals appearing in the present invention are listed below:

[0068] MCM packaging structure 1, 6, 7, 8 first bare chip assembly 10

[0069] First bare chip 11 First protective layer 110

[0070] First pad 111 Back side 11b of first die

[0071] The active surface 11a of the first die and the second die 12

[0072] Second protection layer 120 Second pad 121

[0073] Back side 12b of the second die Active side 12a of the second die

[0074] Conductive pillar 13 The first end 13a of the conductive pillar

[0075] The second end 13b of the conductive column and the plastic encapsulation layer 14

[0076] The front side 14a of the plastic sealing layer and the back side 14b of the plastic sealing layer

[0077] First conductive trace 15 First conductive bump 16

[0078] First dielectric layer 17 Second conductive trace 18

[0079] Second conductive bump 19 Second dielectric layer 20

[0080] Pre-wiring substrate 21 Pre-wiring circuit 210

[0081] Front electrical connection point 211 Back electrical connection point 212

[0082] Front surface 21a of pre-wiring substrate Back surface 21b of pre-wiring substrate

[0083] Passive device 22 Third dielectric layer 23

[0084] The fourth dielectric layer 24 has a first opening 110a

[0085] Second opening 120a Third opening 24a

[0086] Metal pattern blocks 15a, 18a Carrier board 2

[0087] Component to be packaged 3 First support plate 4

[0088] Second support plate 5 DETAILED DESCRIPTION

[0089] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0090] Figure 1 FIG. 1 is a schematic cross-sectional view of the MCM packaging structure according to the first embodiment of the present invention.

[0091] Reference Figure 1 As shown, the MCM packaging structure 1 includes:

[0092] The first die assembly 10 at least comprises: a first die 11 and a second die 12, the first die 11 comprises a plurality of first pads 111, the first pads 111 are located on the active surface 11a of the first die 11, the second die 12 comprises a plurality of second pads 121, the second pads 121 are located on the active surface 12a of the second die 12; the active surface 12a of the second die 12 is covered with a second protective layer 120, the second protective layer 120 exposes the second pads 121; the active surface 11a of the first die 11 and the active surface 11b of the second die 12 face opposite to each other;

[0093] A plurality of conductive pillars 13 are located on the side of the first die assembly 10 , and the conductive pillars 13 include a first end 13 a and a second end 13 b opposite to each other;

[0094] The plastic encapsulation layer 14 covers the first bare chip assembly 10 and the plurality of conductive pillars 13, the back side 14b of the plastic encapsulation layer 14 exposes the second protection layer 120, the second pad 121 and the second end 13b of the conductive pillar 13, and the front side 14a of the plastic encapsulation layer 14 exposes the active surface 11a of the first bare chip 11 and the first end 13a of the conductive pillar 13;

[0095] A first conductive trace 15 is located on the first pad 111, the first end 13a of the conductive pillar 13 and the front surface 14a of the plastic layer 14, and is used to electrically connect the first bare chip 11 and the conductive pillar 13;

[0096] A first conductive bump 16 connected to the first conductive trace 15;

[0097] A first dielectric layer 17 burying the first conductive trace 15 and the first conductive bump 16 , wherein the first conductive bump 16 is exposed outside the first dielectric layer 17 ;

[0098] The second conductive trace 18 is located on the second pad 121, the second end 13b of the conductive pillar 13 and the back surface 14b of the plastic layer 14, and is used to electrically connect the second die 12 and the conductive pillar 13;

[0099] A second conductive bump 19 connected to the second conductive trace 18;

[0100] A second dielectric layer 20 embeds the second conductive trace 18 and the second conductive bump 19 , and the second conductive bump 19 is exposed outside the second dielectric layer 20 ;

[0101] A pre-wiring substrate 21 is located on the second conductive bump 19 and the second dielectric layer 20; a pre-wiring circuit 210 is provided in the pre-wiring substrate 21, and the pre-wiring circuit 210 includes a front electrical connection point 211 and a back electrical connection point 212, and the front electrical connection point 211 is connected to the second conductive bump 19; and

[0102] The passive device 22 is electrically connected to the back surface electrical connection point 212 of the pre-wiring substrate 21 .

[0103] The first die 11 and the second die 12 may be die that need to be electrically interconnected, and their respective functions are not limited. In some embodiments, the first die 11 and the second die 12 may be a power die (POWER DIE), a memory die (MEMORY DIE), a sensor die (SENSOR DIE), or a radio frequency die (RADIO FREQUENCE DIE) or a corresponding control chip.

[0104] Reference Figure 1 As shown, the first die 11 includes an active surface 11a and a back surface 11b opposite to each other. The first pad 111 is exposed on the active surface 11a. The first die 11 may include a variety of devices formed on a semiconductor substrate, and an electrical interconnection structure electrically connected to each device. The first pad 111 is connected to the electrical interconnection structure for inputting / outputting electrical signals of each device.

[0105] It should be noted that, in the present invention, “ / ” means “or”.

[0106] The second die 12 includes an active surface 12a and a back surface 12b opposite to each other. A second pad 121 is exposed to the active surface 12a. The second die 12 may include a variety of devices formed on a semiconductor substrate, and an electrical interconnection structure electrically connected to each device. The second pad 121 is connected to the electrical interconnection structure for inputting / outputting electrical signals of each device.

[0107] Continue to refer to Figure 1 As shown, in this embodiment, the first die assembly 10 is a die stacking structure, that is, the first die 11 and the second die 12 are arranged back to back. The first die 11 and the second die 12 are arranged back to back means that the back side 11b of the first die 11 and the back side 12b of the second die 12 are attached together.

[0108] In other embodiments, the first die assembly 10 may include one or more first die 11, and may also include one or more second die 12. The first die 11 and the second die 12 may be arranged in a staggered manner, or even arranged side by side, that is, the front side 14a of the plastic encapsulation layer 14 also exposes the back side 12b of the second die 12.

[0109] In this embodiment, the area of ​​the first die 11 is larger than the area of ​​the second die 12. In other embodiments, the area of ​​the second die 12 may also be larger than the area of ​​the first die 11.

[0110] In this embodiment, the active surface 11 a of the first die 11 is provided with a first protective layer 110 . In some embodiments, the active surface 11 a of the first die 11 may also omit the first protective layer 110 .

[0111] The first protective layer 110 and / or the second protective layer 120 are insulating materials, which may be organic high molecular polymer insulating materials, inorganic insulating materials or composite materials. Examples of organic high molecular polymer insulating materials include polyimide, epoxy resin, ABF (Ajinomoto buildup film), PBO (Polybenzoxazole), organic polymer films or other organic materials with similar insulating properties. Examples of inorganic insulating materials include at least one of silicon dioxide and silicon nitride. The composite material is an inorganic-organic composite material, which may be an inorganic-organic polymer composite material, such as a SiO2 / resin polymer composite material.

[0112] The conductive pillar 13 may be made of a metal with good conductivity such as copper.

[0113] The number and position of the conductive pillars 13 may be determined according to a preset circuit layout.

[0114] The material of the plastic encapsulation layer 14 can be epoxy resin, polyimide resin, benzocyclobutene resin, polybenzoxazole resin, polybutylene terephthalate, polycarbonate, polyethylene terephthalate, polyethylene, polypropylene, polyolefin, polyurethane, polyolefin, polyether sulfone, polyamide, polyurethane, ethylene-vinyl acetate copolymer or polyvinyl alcohol, etc. The material of the plastic encapsulation layer 14 can also be various polymers or composite materials of resins and polymers.

[0115] The plastic encapsulation layer 14 includes a front side 14a and a back side 14b opposite to each other. In the present embodiment, the front side 14a of the plastic encapsulation layer 14 exposes the first protective layer 110, the first pad 111 and the first end 13a of the conductive column 13, and the back side 14b of the plastic encapsulation layer 14 exposes the second protective layer 120, the second pad 121 and the second end 13b of the conductive column 13.

[0116] Figure 1In the illustrated embodiment, the first conductive trace 15 includes a plurality of metal pattern blocks 15a, which have a layer. A portion of the metal pattern blocks 15a selectively electrically connects the first end 13a of the conductive pillar 13 with the first pad 111 to achieve electrical connection between the conductive pillar 13 and the first die 11. In addition, a portion of the metal pattern blocks 15a selectively electrically connects a plurality of first pads 111 to achieve circuit layout or electrical conduction of the first pads 111.

[0117] The layout of the first conductive traces 15 may be determined according to a predetermined circuit layout.

[0118] In some embodiments, the first conductive trace 15 may further include two or more metal pattern layers.

[0119] Reference Figure 1 As shown, in this embodiment, the first conductive bump 16 on the first conductive trace 15 serves as an external connection terminal of the MCM packaging structure 1 .

[0120] In some embodiments, an anti-oxidation layer may be formed on the first conductive bump 16 .

[0121] The anti-oxidation layer may include: b1) a tin layer, or b2) a nickel layer and a gold layer stacked from bottom to top, or b3) a nickel layer, a palladium layer and a gold layer stacked from bottom to top. The material of the first conductive bump 16 may be copper, and the anti-oxidation layer may prevent copper oxidation, thereby preventing the electrical connection performance from being deteriorated due to copper oxidation.

[0122] Figure 1 In the illustrated embodiment, the second conductive trace 18 includes a plurality of metal pattern blocks 18a, which have a layer. A portion of the metal pattern blocks 18a selectively electrically connects the second end 13b of the conductive pillar 13 with the second pad 121 to achieve electrical connection between the conductive pillar 13 and the second die 12. In addition, a portion of the metal pattern blocks 18a selectively electrically connects a plurality of second pads 121 to achieve circuit layout or electrical conduction of the second pads 121.

[0123] The layout of the second conductive traces 18 may be determined according to a predetermined circuit layout.

[0124] In some embodiments, the second conductive trace 18 may further include two or more metal pattern layers.

[0125] The second conductive bumps 19 are used to electrically connect the pre-wiring substrate 21 and the passive device 22 to the first die 11 and the second die 12 .

[0126] The materials of the first dielectric layer 17 and the second dielectric layer 20 can be organic high molecular polymer insulating materials or inorganic insulating materials or composite materials. Examples of organic high molecular polymer insulating materials are polyimide, epoxy resin, ABF (Ajinomoto buildup film), PBO (Polybenzoxazole), organic polymer film or other organic materials with similar insulating properties. Examples of inorganic insulating materials are at least one of silicon dioxide and silicon nitride. The composite material is an inorganic-organic composite material, which can be an inorganic-organic polymer composite material, such as SiO2 / resin polymer composite material. Compared with inorganic insulating materials, the tensile stress of organic high molecular polymer insulating materials and composite materials is smaller, which can prevent the surface of the MCM packaging structure 1 from warping.

[0127] The pre-wiring substrate 21 includes a pre-wiring circuit 210 and an insulating material layer filled between the pre-wiring circuits 210. Compared with the solution of making a rewiring layer on the plastic package of the first bare chip 11 and the second bare chip 12, the advantages of using the pre-wiring substrate 21 in this solution are: first, the fine wiring in the rewiring layer is transferred to the pre-wiring substrate 21, which reduces the probability of short circuit and increases the product yield. At the same time, the number of layers of the first conductive trace 15 and / or the second conductive trace 18 can be reduced, and the complexity of the process can be reduced. Second, a pre-formed pre-wiring substrate 21 is provided, and the pre-wiring substrate 21 can be tested before packaging to avoid the use of a known bad pre-wiring substrate 21. Third, the pre-wiring substrate 21 is a prefabricated substrate, and its manufacturing process is independent of the packaging process, which can save the packaging time of the entire packaging process.

[0128] In addition, the wiring layer to be formed on the active surfaces 11a and 12a of the die is transferred to the pre-wiring substrate 21. The pre-wiring substrate 21 includes complex multi-circuits, which are embedded in the package structure 1 by being electrically connected to the pads 111 and 121 on the active surfaces 11a and 12a of the die, thereby improving the performance of the entire package structure 1. Through the pre-wiring substrate 21 on the back side 14b of the plastic packaging layer, the passive device 22 can also be incorporated into the MCM package structure 1, thereby enriching the function of the MCM package structure 1.

[0129] The pre-wiring substrate 21 may include a front side 21a and a back side 21b opposite to each other, the front side electrical connection point 211 is exposed on the front side 21a of the pre-wiring substrate 21, and the back side electrical connection point 212 is exposed on the back side 21b of the pre-wiring substrate 21. There may be a plurality of front side electrical connection points 211 exposed on the front side 21a of the pre-wiring substrate, and there may also be a plurality of back side electrical connection points 212 exposed on the back side 21b of the pre-wiring substrate.

[0130] The passive device 22 may include resistors, inductors and capacitors, and their common feature is that they can work when there is a signal without adding power to the circuit. The passive device 22 includes an electrical connection point, which is connected to the back electrical connection point 212 of the pre-wiring substrate 21 to achieve the electrical signal input / output of the passive device 22.

[0131] This embodiment does not limit the number and types of the first bare chip components 10 and the passive components 22 .

[0132] In the MCM packaging structure 1, on the one hand, the first bare chip assembly 10 with the active surface facing away from each other realizes the effect of small volume and compact structure of the MCM packaging structure 1. On the other hand, the pre-wiring substrate 21 and the conductive pillars 13 not only realize the electrical connection between the first bare chip 11 and the second bare chip 12, but also realize the wiring on both sides of the front side 14a and the back side 14b of the plastic packaging layer 14. Compared with the wiring on only one side, the density of the wiring can be improved, forming a MCM packaging structure 1 with more complex wiring and smaller volume.

[0133] One embodiment of the present invention provides Figure 1 A method for manufacturing the MCM packaging structure 1. Figure 2 It is a flowchart of the production method. Figures 3 to 10 yes Figure 2 Schematic diagram of the intermediate structure corresponding to the process in .

[0134] First, refer to Figure 2 Step S1 in Figure 3 and Figure 4 As shown, a carrier board 2 and a plurality of groups of components to be packaged 3 carried on the carrier board 2 are provided, each group of components to be packaged 3 includes: a first die assembly 10, and a plurality of conductive pillars 13 located on the side of the first die assembly 10; the first die assembly 10 includes at least: a first die 11 and a second die 12, the first die 11 includes a plurality of first solder pads 111, the first solder pads 111 are located on the active surface 11a of the first die 11, the second die 12 includes a plurality of second solder pads 121, the second solder pads 121 are located on the active surface 12a of the second die 12; the active surface 12a of the second die 12 is covered with a second protective layer 120; the active surface 11a of the first die 11 and the active surface 12a of the second die 12 face opposite to each other; the conductive pillar 13 includes a first end 13a and a second end 13b opposite to each other; the active surface 11a of the first die 11 and the first end 13a of the conductive pillar 13 face the carrier board 2. Wherein, Figure 3 is a top view of a carrier board and multiple groups of components to be packaged; Figure 4 It is along Figure 3 Sectional view along line AA.

[0135] The first die 11 and the second die 12 may be die that need to be electrically interconnected, and their respective functions are not limited. In some embodiments, the first die 11 and the second die 12 may be a power die (POWER DIE), a memory die (MEMORY DIE), a sensor die (SENSOR DIE), or a radio frequency die (RADIO FREQUENCE DIE) or a corresponding control chip.

[0136] Reference Figure 4 As shown, the first die 11 includes an active surface 11a and a back surface 11b opposite to each other. The first die 11 may include a variety of devices formed on a semiconductor substrate, and an electrical interconnection structure electrically connected to each device. A first pad 111 exposed to the active surface 11a of the first die 11 is connected to the electrical interconnection structure for inputting / outputting electrical signals of each device.

[0137] The second die 12 includes an active surface 12a and a back surface 12b opposite to each other. A second pad 121 is exposed on the active surface 12a. The second die 12 may also include a variety of devices formed on a semiconductor substrate, and an electrical interconnection structure electrically connected to each device. The second pad 121 exposed to the active surface 12a of the second die 12 is connected to the electrical interconnection structure for inputting / outputting electrical signals of each device.

[0138] Continue to refer to Figure 4 As shown, in this embodiment, the first die assembly 10 is a die stacking structure, that is, the first die 11 and the second die 12 are arranged back to back. In other embodiments, the first die assembly 10 may include a first or multiple first die 11, and may also include one or more second die 12. The first die 11 and the second die 12 may be arranged in a staggered manner, or even arranged side by side, that is, the front side 14a of the plastic encapsulation layer 14 also exposes the back side 12b of the second die 12.

[0139] In this embodiment, the area of ​​the first die 11 is larger than the area of ​​the second die 12. In other embodiments, the area of ​​the second die 12 may also be larger than the area of ​​the first die 11.

[0140] The second protection layer 120 covers the second pad 121 to protect the second pad 121 when the plastic layer 14 is thinned.

[0141] In this embodiment, the active surface 11a of the first die 11 is also provided with a first protective layer 110 to buffer stress on the first pad 111 when the plastic layer 14 is thinned. In some embodiments, the first protective layer 110 may also be omitted from the active surface 11a of the first die 11.

[0142] The first die 11 and the second die 12 are both formed by dividing the wafer. Taking the first die 11 as an example, the wafer includes an active surface of the wafer and a back surface of the wafer, and the active surface of the wafer exposes the first pad 111 and an insulating layer (not shown) protecting the first pad 111. After the wafer is cut, the first die 11 is formed. Accordingly, the first die 11 includes an active surface 11a and a back surface 11b, and the first pad 111 and the insulating layer electrically insulating the adjacent first pad 111 are exposed on the active surface 11a of the die.

[0143] A first protective layer 110 is applied on the active surface 11a of the first bare chip 11. The application process of the first protective layer 110 can be: applying the first protective layer 110 on the active surface of the wafer before the wafer is cut into the first bare chip 11, and cutting the wafer with the first protective layer 110 to form the first bare chip 11 with the first protective layer 110. It can also be: after the wafer is cut into the first bare chip 11, applying the first protective layer 110 on the active surface 11a of the first bare chip 11.

[0144] The first protective layer 110 and / or the second protective layer 120 are insulating materials, which may be organic high molecular polymer insulating materials, inorganic insulating materials or composite materials. Organic high molecular polymer insulating materials are, for example, polyimide, epoxy resin, ABF (Ajinomoto buildup film), PBO (Polybenzoxazole), organic polymer film or other organic materials with similar insulating properties. The composite material is an inorganic-organic composite material, which may be an inorganic-organic polymer composite material, such as SiO2 / resin polymer composite material.

[0145] The organic high molecular polymer insulating material can be a) pressed onto the insulating layer between the first pad 111 and the adjacent first pad 111 / on the insulating layer between the second pad 121 and the adjacent second pad 121 by a lamination process, or b) first coated or printed on the insulating layer between the first pad 111 and the adjacent first pad 111 / on the insulating layer between the second pad 121 and the adjacent second pad 121 and then cured, or c) cured on the insulating layer between the first pad 111 and the adjacent first pad 111 / on the insulating layer between the second pad 121 and the adjacent second pad 121 by an injection molding process.

[0146] When the material of the first protective layer 110 and / or the second protective layer 120 is an inorganic material such as silicon dioxide or silicon nitride, it can be formed on the first pad 111 and the insulating layer between adjacent first pads 111 / on the second pad 121 and the insulating layer between adjacent second pads 121 through a deposition process.

[0147] The first protective layer 110 and / or the second protective layer 120 may include one or more layers.

[0148] The wafer may be thinned from the back side before dicing to reduce the thickness of the first die 11 and / or the second die 12 .

[0149] The conductive pillar 13 may be made of a metal with good conductivity such as copper.

[0150] The number and position of the conductive pillars 13 may be determined according to a preset circuit layout.

[0151] The carrier plate 2 is a hard plate, which may include a plastic plate, a glass plate, a ceramic plate or a metal plate.

[0152] The height of the conductive pillar 13 is greater than the thickness of the first die assembly 10 .

[0153] In some embodiments, the conductive pillar 13 is a prefabricated part, which is directly bonded to a predetermined position on the surface of the carrier 2. In other embodiments, a metal sheet may be bonded to the carrier 2 first, and then etched at a predetermined position on the carrier 2 by etching.

[0154] When multiple groups of components 3 to be packaged are arranged on the surface of the carrier 2, a solution may include:

[0155] a) the first protective layer 110 on the plurality of first bare chips 11 faces another carrier board, the plurality of first bare chips 11 are arranged on the carrier board 2, the second protective layer 120 on the plurality of second bare chips 12 faces another carrier board, the plurality of second bare chips 12 are arranged on another carrier board, specifically, a whole-surface adhesive layer can be coated on the surfaces of the two carrier boards; an adhesive layer is provided on the back sides 11b of the plurality of first bare chips 11 and / or the back sides 12b of the plurality of second bare chips 12, the two carrier boards are aligned, the back sides 11b of the first bare chips 11 and the back sides 12b of the second bare chips 12 are bonded together, and a bare chip stacking structure is formed; the other carrier board is removed;

[0156] The adhesive layer may be made of an easily peelable material so as to peel the plurality of first bare chips 11 from the carrier 2, for example, a thermal separation material that can lose its stickiness by heating or a UV separation material that can lose its stickiness by ultraviolet irradiation may be used;

[0157] b) A plurality of conductive pillars 13 are arranged on a transfer carrier and then transferred to the carrier 2 .

[0158] A group of components to be packaged 3 is located in an area on the surface of the carrier 2, which is convenient for subsequent cutting. Multiple groups of components to be packaged 3 are fixed on the surface of the carrier 2 to simultaneously manufacture multiple MCM packaging structures 1, which is conducive to mass production and cost reduction.

[0159] Next, refer to Figure 2 Step S2 in Figure 5 As shown, a plastic sealing layer 14 is formed on the surface of the carrier board 2 to embed each group of components 3 to be packaged; Figure 6As shown, the plastic encapsulation layer 14 is thinned until the second protection layer 120 and the second end 13 b of the conductive column 13 are exposed.

[0160] The material of the plastic layer 14 can be epoxy resin, polyimide resin, benzocyclobutene resin, polybenzoxazole resin, polybutylene terephthalate, polycarbonate, polyethylene terephthalate, polyethylene, polypropylene, polyolefin, polyurethane, polyolefin, polyethersulfone, polyamide, polyurethane, ethylene-vinyl acetate copolymer or polyvinyl alcohol. The material of the plastic layer 14 can also be various polymers or composite materials of resin and polymer. Correspondingly, the encapsulation can be performed by filling liquid plastic material between each first bare chip assembly 10 and each conductive column 13, and then curing it at high temperature through a plastic mold. In some embodiments, the plastic layer 14 can also be formed by plastic material molding methods such as hot pressing molding and transfer molding.

[0161] The molding layer 14 may include a front surface 14 a and a back surface 14 b opposite to each other.

[0162] Reference Figure 6 As shown, the plastic encapsulation layer 14 is thinned from the back side 14 b by mechanical grinding, such as grinding with a grinding wheel, to expose the second end 13 b of the conductive column 13 and the second protective layer 120 .

[0163] Specifically, when the plastic encapsulation layer 14 is thinned, the height of the conductive pillar 13 is greater than the height of the first bare chip assembly 10 . When the plastic encapsulation layer 14 is thinned, part of the height of the conductive pillar 13 is removed.

[0164] During the process of forming and grinding the plastic encapsulation layer 14 , the second protective layer 120 can prevent the second pad 121 , the second die 12 , and the electrical interconnection structure and devices in the first die 11 from being damaged; the first protective layer 110 can perform stress buffering on the first pad 111 .

[0165] This step forms a plastic package body for each group of components 3 to be packaged.

[0166] Afterwards, refer to Figure 2 Step S3 in Figure 7 As shown, the carrier 2 is removed to expose the active surface 11a of the first bare chip 11, the first end 13a of the conductive column 13 and the front side 14a of the plastic layer 14; a first conductive trace 15 is formed on the first pad 111, the first end 13a of the conductive column 13 and the front side 14a of the plastic layer 14 to electrically connect the first bare chip 11 and the conductive column 13 in the group; a first conductive bump 16 is formed on the first conductive trace 15 and a first dielectric layer 17 is formed to embed the first conductive trace 15 and the first conductive bump 16, and the first conductive bump 16 is exposed outside the first dielectric layer 17.

[0167] Reference Figure 7As shown, after removing the carrier plate 2 , a first support plate 4 may be disposed on the back surface 14 b of the plastic packaging layer 14 .

[0168] The carrier board 2 may be removed by conventional removal methods such as laser stripping and UV irradiation.

[0169] The first support plate 4 may play a supporting role in the subsequent steps of forming the first conductive trace 15 , and / or forming the first conductive bump 16 , and / or forming the first dielectric layer 17 .

[0170] The first support plate 4 is a hard plate, which may include a glass plate, a ceramic plate, a metal plate, etc.

[0171] In this embodiment, the first protective layer 110 is disposed on the active surface 11a of the exposed first die 11, so after the carrier 2 is removed, the first protective layer 110 is exposed. Before making the first conductive trace 15, a first opening 110a is formed in the first protective layer 110 to expose the first pad 111.

[0172] If the material of the first protective layer 110 is a laser-reactive material, such as epoxy resin, etc., the first opening 110a can be formed by modifying it by laser irradiation. If the material of the first protective layer 110 is a photosensitive material, such as polyimide, etc., the first opening 110a can be formed by first exposing and then developing. If the material of the first protective layer 110 is a material that can be dry-etched or wet-etched, such as silicon dioxide, silicon nitride, etc., the first opening 110a can be formed by dry-etching or wet-etching.

[0173] In some embodiments, in the plurality of groups of components 3 to be packaged in step S1 , specifically in the first bare chip assembly 10 , the first protective layer 110 may also have a first opening 110 a exposing the first pad 111 .

[0174] In this embodiment, the first conductive trace 15 includes a layer. Forming the first conductive trace 15 includes the following steps S311 to S318.

[0175] Step S311 : forming a photoresist layer on the first protection layer 110 of each first bare chip 11 , the first end 13 a of each conductive pillar 13 , and the front surface 14 a of the plastic layer 14 .

[0176] In this step S311, in an optional solution, the photoresist layer formed may be a photosensitive film. The photosensitive film may be torn off from the tape and applied to the first protective layer 110 of each first bare chip 11, the first end 13a of each conductive column 13, and the front surface 14a of the plastic layer 14. In other optional solutions, the photoresist layer may also be formed by first applying a liquid photoresist and then heating and curing it.

[0177] Step S312: exposing and developing the photoresist layer to form a patterned photoresist layer.

[0178] In this step S312, the photoresist layer is patterned. In other optional solutions, other easily removable sacrificial materials can also be used to replace the photoresist layer.

[0179] Step S313: Using the patterned photoresist layer as a mask, dry-etch or wet-etch the first protection layer 110 to form a plurality of first openings 110a to expose a portion of each first pad 111. One first opening 110a may expose a portion of one first pad 111. In other embodiments, one first opening 110a may also expose portions of two or more first pads 111.

[0180] If the material of the first protective layer 110 is a laser-reactive material, such as epoxy resin, etc., the first opening 110a can be formed by modifying it by laser irradiation. If the material of the first protective layer 110 is a photosensitive material, such as polyimide, etc., the first opening 110a can be formed by first exposing and then developing. If the material of the first protective layer 110 is a material that can be dry-etched or wet-etched, such as silicon dioxide, silicon nitride, etc., the first opening 110a can be formed by dry-etching or wet-etching.

[0181] Step S314: removing the remaining photoresist layer by ashing.

[0182] Step S315 : forming a photoresist layer on the first protection layer 110 of each first bare chip 11 , the first pad 111 exposed by the first protection layer 110 , the first end 13 a of each conductive pillar 13 , and the front surface 14 a of the plastic layer 14 .

[0183] The method for forming the photoresist layer may refer to the method for forming the photoresist layer in step S311 .

[0184] Step S316: exposing and developing the photoresist layer, and retaining the photoresist layer in a first predetermined area, the first predetermined area being complementary to the area where the metal pattern block 15a of the first conductive trace 15 to be formed is located.

[0185] Step S317 : filling a metal layer in a complementary region of the first predetermined region to form a metal pattern block 15 a of the first conductive trace 15 .

[0186] A portion of the metal pattern blocks 15a selectively electrically connects the first end 13a of the conductive pillar 13 and the first pad 111 to achieve electrical connection between the conductive pillar 13 and the first die 11. In addition, a portion of the metal pattern blocks 15a selectively electrically connects a plurality of first pads 111 to achieve circuit layout or electrical conduction of the first pads 111.

[0187] This step S317 can be completed by using an electroplating process. The process of electroplating copper or aluminum is relatively mature.

[0188] Specifically, before forming the photoresist layer in step S315, a seed layer (Seed Layer) can be formed by physical vapor deposition or chemical vapor deposition on the first protection layer 110 of each first bare chip 11, the first pad 111 exposed by the first protection layer 110, the first end 13a of each conductive column 13, and the front surface 14a of the plastic layer 14. The seed layer can be used as a power supply layer for electroplating copper or aluminum.

[0189] Electroplating may include electrolytic plating or electrodeless plating. Electrolytic plating is to use the workpiece to be plated as a cathode to electrolyze the electrolyte, thereby forming a layer of metal on the workpiece to be plated. Electroless plating is a method of reducing and precipitating metal ions in the solution to form a metal layer on the workpiece to be plated. In some embodiments, the metal pattern block 15a may also be formed by a method of first sputtering and then etching.

[0190] Step S318: removing the remaining photoresist layer in the first predetermined area by ashing.

[0191] After ashing, the seed layer in the first predetermined area is removed by dry etching or wet etching.

[0192] The metal pattern block 15 a of the first conductive trace 15 may be polished, for example, by chemical mechanical polishing to achieve a smooth upper surface.

[0193] It should be noted that the metal pattern blocks 15a of the first conductive traces 15 in step S3 are arranged according to design requirements, and the distribution of the first conductive traces 15 in different groups of components 3 to be packaged may be the same or different.

[0194] Furthermore, in some embodiments, the first conductive trace 15 may include two or more layers, that is, may include two or more metal pattern layers.

[0195] Forming the first conductive bump 16 and the first dielectric layer 17 may include steps S321 - S325 .

[0196] Step S321 : forming a photoresist layer on the metal pattern block 15 a , the first protection layer 110 exposed by the metal pattern block 15 a , and the front surface 14 a of the plastic layer 14 .

[0197] In this step S321, in an optional solution, the photoresist layer formed can be a photosensitive film. The photosensitive film can be torn off from the tape and applied to the metal pattern block 15a, the first protective layer 110 exposed by the metal pattern block 15a, and the front side 14a of the plastic layer 14. In other optional solutions, the photoresist layer can also be formed by first applying a liquid photoresist and then heating and curing.

[0198] Step S322: exposing and developing the photoresist layer to retain the photoresist in the second predetermined area. The second predetermined area is complementary to the area where the first conductive bump 16 is to be formed.

[0199] In this step S322, the photoresist layer is patterned. In other optional solutions, other easily removable sacrificial materials can also be used to replace the photoresist layer.

[0200] Step S323 : filling a metal layer in a complementary region of the second predetermined region to form a first conductive bump 16 .

[0201] This step S323 can be completed by electroplating. The process of electroplating copper or aluminum is relatively mature. Before electroplating copper or aluminum, a seed layer (Seed Layer) can be firstly physically vapor deposited or chemically vapor deposited as a power supply layer.

[0202] Step S324: removing the remaining photoresist layer in the second predetermined area by ashing.

[0203] The first conductive bump 16 can be smoothed on its upper surface by a polishing process, such as chemical mechanical polishing.

[0204] Step S325: Refer to Figure 8 As shown, a first dielectric layer 17 is formed on the first conductive bump 16, the metal pattern block 15a, the first protection layer 110 exposed by the metal pattern block 15a, and the front surface 14a of the plastic layer 14; the first dielectric layer 17 is thinned until the first conductive bump 16 is exposed.

[0205] In the step of forming the first dielectric layer 17 , in order to prevent the plastic encapsulation layer 14 from being scratched during the process, the first dielectric layer 17 may also be formed on the front side 14 a of the plastic encapsulation layer 14 .

[0206] The first dielectric layer 17 is an insulating material, which may be an organic high molecular polymer insulating material, or an inorganic insulating material or a composite material. The organic high molecular polymer insulating material may be, for example, polyimide, epoxy resin, ABF (Ajinomoto buildup film), PBO (Polybenzoxazole), an organic polymer film or other organic materials with similar insulating properties. The composite material may be an inorganic-organic composite material, which may be an inorganic-organic polymer composite material, such as a SiO2 / resin polymer composite material.

[0207] The organic high molecular polymer insulating material can be pressed onto the first conductive trace 15, the first conductive bump 16, the first protective layer 110 not covering the first conductive trace 15, and the front side 14a of the plastic encapsulation layer 14 by a) a lamination process, or b) first coated on the first conductive trace 15, the first conductive bump 16, the first protective layer 110 not covering the first conductive trace 15, and the front side 14a of the plastic encapsulation layer 14 and then cured, or c) cured on the first conductive trace 15, the first conductive bump 16, the first protective layer 110 not covering the first conductive trace 15, and the front side 14a of the plastic encapsulation layer 14 by an injection molding process.

[0208] When the first dielectric layer 17 is made of inorganic insulating materials such as silicon dioxide or silicon nitride, it can be formed on the first conductive traces 15 , the first conductive bumps 16 , the first protection layer 110 not covering the first conductive traces 15 , and the front surface 14 a of the plastic layer 14 by a deposition process.

[0209] Compared with inorganic insulating materials, organic high molecular polymer insulating materials and composite materials have smaller tensile stress, which can prevent the plastic package from warping when the first dielectric layer 17 is formed over a large area.

[0210] The first dielectric layer 17 may include one or more layers.

[0211] When the first dielectric layer 17 covers the first conductive bump 16 , the first dielectric layer 17 is polished until the first conductive bump 16 is exposed.

[0212] After the first conductive bump 16 is exposed, in the optional solution a), refer to Figure 8 As shown, the conductive protrusion 16 serves as an external connection terminal of the MCM package structure 1 .

[0213] b) In an optional solution, after the first conductive bump 16 is exposed, an anti-oxidation layer is further formed on the first conductive bump 16 .

[0214] The anti-oxidation layer may include: b1) a tin layer, or b2) a nickel layer and a gold layer stacked from bottom to top, or b3) a nickel layer, a palladium layer and a gold layer stacked from bottom to top. The anti-oxidation layer may be formed by an electroplating process. The material of the first conductive bump 16 may be copper, and the anti-oxidation layer may prevent copper oxidation, thereby preventing the electrical connection performance from being deteriorated due to copper oxidation.

[0215] After the first conductive bump 16 is exposed, refer to Figure 8 As shown, the first support plate 4 is removed.

[0216] The first support plate 4 can be removed by conventional removal methods such as laser stripping and UV irradiation.

[0217] Next, refer to Figure 2 Step S4 in Figure 8As shown, a second opening 120a is formed in the second protective layer 120 to expose the second pad 121; a second conductive trace 18 is formed on the second protective layer 120, the second pad 121, the second end 13b of the conductive column 13 and the back side 14b of the plastic layer 14 to electrically connect the second bare chip 12 and the conductive column 13 in the group; a second conductive bump 19 is formed on the second conductive trace 18 and a second dielectric layer 20 is formed to embed the second conductive trace 18 and the second conductive bump 19, and the second conductive bump 19 is exposed outside the second dielectric layer 20.

[0218] Reference Figure 8 As shown, after removing the first support plate 4 , a second support plate 5 may be disposed on the first conductive bump 16 and the first dielectric layer 17 .

[0219] The second support plate 5 may play a supporting role in the subsequent steps of forming the second conductive trace 18 , and / or forming the second conductive bump 19 , and / or forming the second dielectric layer 20 .

[0220] The second support plate 5 is a hard plate, which may include a glass plate, a ceramic plate, a metal plate, etc.

[0221] In some embodiments, the plastic encapsulation layer 14 is thinned until the second protection layer 120 and the second end 13 b of the conductive pillar 13 are exposed. This may also be performed after step S3 and before step S4 .

[0222] The method for forming the metal pattern block 18a in the second conductive trace 18 may refer to the method for forming the metal pattern block 15a in the first conductive trace 15. The layout of the second conductive trace 18 may be determined according to a predetermined layout.

[0223] In this embodiment, the second conductive trace 18 includes one layer.

[0224] A portion of the metal pattern blocks 18a selectively electrically connects the second end 13b of the conductive pillar 13 and the second pad 121 to achieve electrical connection between the conductive pillar 13 and the second die 12. In addition, a portion of the metal pattern blocks 18a selectively electrically connects a plurality of second pads 121 to achieve circuit layout or electrical conduction of the second pads 121.

[0225] In other embodiments, the second conductive trace 18 may include two or more layers.

[0226] The material and forming method of the second conductive bump 19 may refer to the material and forming method of the first conductive bump 16 .

[0227] The material and forming method of the second dielectric layer 20 may refer to the material and forming method of the first dielectric layer 17 .

[0228] In the step of forming the second dielectric layer 20 , in order to prevent the plastic encapsulation layer 14 from being scratched during the process, the second dielectric layer 20 may also be formed on the back surface 14 b of the plastic encapsulation layer 14 between adjacent groups of components 3 to be packaged.

[0229] When the second dielectric layer 20 covers the second conductive bump 19 , the second dielectric layer 20 is polished until the second conductive bump 19 is exposed.

[0230] The second dielectric layer 20 may include one or more layers.

[0231] Afterwards, refer to Figure 2 Step S5 in Fig. 9 As shown, a pre-wiring substrate 21 is arranged on the second conductive bump 19 and the second dielectric layer 20, and a pre-wiring circuit 210 is arranged in the pre-wiring substrate 21. The pre-wiring circuit 210 includes a front electrical connection point 211 and a back electrical connection point 212. The front electrical connection point 211 is connected to the second conductive bump 19; a third dielectric layer 23 is formed to bury the pre-wiring substrate 21, and the back electrical connection point 212 is exposed outside the third dielectric layer 23.

[0232] The pre-wiring substrate 21 includes pre-wiring lines 210 and insulating materials filled between the pre-wiring lines 210 .

[0233] In this embodiment, refer to Fig. 9 As shown, the pre-wiring substrates 21 of each group of components to be packaged 3 are separated. In some embodiments, the pre-wiring substrates 21 of each group of components to be packaged 3 can also be connected together, which can be a) connected together by connecting strips, or b) when the pre-wiring substrates 21 are manufactured, the pre-wiring circuits 210 of each group of components to be packaged 3 are formed in a whole insulating material layer. In the b) solution, the manufacturing step of the third dielectric layer 23 can be omitted.

[0234] The pre-wiring substrate 21 may include a front side 21a and a back side 21b opposite to each other, a front side electrical connection point 211 is exposed on the front side 21a of the pre-wiring substrate 21, and a back side electrical connection point 212 is exposed on the back side 21b of the pre-wiring substrate 21. There may be a plurality of front side electrical connection points 211 exposed on the front side 21a of the pre-wiring substrate, and there may also be a plurality of back side electrical connection points 212 exposed on the back side 21b of the pre-wiring substrate. The front side electrical connection point 211 and the second conductive bump 19 may be connected together by solder.

[0235] The material and forming method of the third dielectric layer 23 may refer to the material and forming method of the first dielectric layer 17 .

[0236] Next, refer to Figure 2 Step S6 in Fig. 9 As shown, the passive device 22 is electrically connected to the back electrical connection point 212 of the pre-wiring substrate 21.

[0237] The passive device 22 may include resistors, inductors, and capacitors, and their common feature is that they can work when there is a signal without adding power to the circuit. The passive device 22 includes an electrical connection point, which is connected to the back electrical connection point 212 of the pre-wiring substrate 21 to achieve the electrical signal input / output of the passive device 22. The electrical connection point of the passive device 22 and the back electrical connection point 212 of the pre-wiring substrate 21 can be connected together by soldering.

[0238] Afterwards, refer to Figure 2 Step S7 in Fig.10 and Figure 1 As shown, a plurality of MCM packaging structures 1 are formed by cutting, and each MCM packaging structure 1 includes a group of components 3 to be packaged.

[0239] For the embodiment in which the pre-wiring substrates 21 of each group of components to be packaged 3 are connected together, the pre-wiring substrates 21 are cut apart during the cutting process in step S6 .

[0240] In the MCM packaging structure 1 formed through the above steps, on the one hand, the first bare chip assembly 10 with the active surface facing away from each other realizes the effect of small volume and compact structure of the MCM packaging structure 1. On the other hand, the pre-wiring substrate 21 and the connecting column 13 not only realize the electrical connection between the first bare chip 11 and the second bare chip 12, but also realize the wiring on both sides of the front side 14a and the back side 14b of the plastic packaging layer 14. Compared with the wiring on only one side, the density of the wiring can be improved, forming a MCM packaging structure 1 with more complex wiring and smaller volume.

[0241] The advantages of using the pre-wiring substrate 21 are: first, the fine wiring in the rewiring layer is transferred to the pre-wiring substrate 21, which reduces the probability of short circuits and increases the product yield. At the same time, the number of layers of the first conductive traces 15 and / or the second conductive traces 18 can be reduced, reducing the complexity of the process. Second, a pre-formed pre-wiring substrate 21 is provided, and the pre-wiring substrate 21 can be tested before packaging to avoid using a known bad pre-wiring substrate 21. Third, the pre-wiring substrate 21 is a prefabricated substrate, and its manufacturing process is independent of the packaging process, which can save the packaging time of the entire packaging process.

[0242] In addition, the wiring layer to be formed on the active surfaces 11a and 12a of the die is transferred to the pre-wiring substrate 21. The pre-wiring substrate 21 includes complex multi-circuits, which are embedded in the package structure 1 by being electrically connected to the pads 111 and 121 on the active surfaces 11a and 12a of the die, thereby improving the performance of the entire package structure 1. Through the pre-wiring substrate 21 on the back side 14b of the plastic packaging layer, the passive device 22 can also be incorporated into the MCM package structure 1, thereby enriching the function of the MCM package structure 1.

[0243] Fig.11 FIG. 2 is a schematic cross-sectional view of the MCM packaging structure of the second embodiment of the present invention. Fig.11 As shown, the MCM packaging structure 6 in this embodiment is substantially the same as the MCM packaging structure 1 in the aforementioned embodiment, with the only difference being that: the first protection layer 110 is omitted, the active surface 11a of the first bare chip 11, the first end 13a of the conductive column 13 and the front surface 14a of the plastic layer 14 are provided with a fourth dielectric layer 24; the fourth dielectric layer 24 has a third opening 24a exposing the first pad 111 and the first end 13a of the conductive column 13; and the first conductive trace 15 is located on the first pad 111, the first end 13a of the conductive column 13 and the fourth dielectric layer 24.

[0244] Correspondingly, the manufacturing method is different from the aforementioned embodiment in that: in step S3, after removing the carrier 2 to expose the active surface 11a of the first bare chip 11, the first end 13a of the conductive column 13 and the front side 14a of the plastic encapsulation layer 14: a fourth dielectric layer 24 is formed on the exposed active surface 11a of the first bare chip 11, the first end 13a of the conductive column 13 and the front side 14a of the plastic encapsulation layer 14; a plurality of third openings 24a are formed in the fourth dielectric layer 24, and the third openings 24a expose the first pad 111 and the first end 13a of the conductive column 13; and then a first conductive trace 15 is formed on the first pad 111, the first end 13a of the conductive column 13 and the fourth dielectric layer 24.

[0245] The material of the fourth dielectric layer 24 refers to the material of the first dielectric layer 17 and the second dielectric layer 20 .

[0246] If the material of the fourth dielectric layer 24 is a laser-reactive material, such as epoxy resin, etc., the third opening 24a can be formed by modifying it by laser irradiation. If the material of the fourth dielectric layer 24 is a photosensitive material, such as polyimide, etc., the third opening 24a can be formed by first exposing and then developing. If the material of the fourth dielectric layer 24 is a dry-etchable or wet-etchable material, such as silicon dioxide, silicon nitride, etc., the third opening 24a can be formed by dry-etching or wet-etching.

[0247] Fig.12 FIG. 1 is a schematic cross-sectional view of the MCM packaging structure of the third embodiment of the present invention. Fig.12 As shown, the MCM package structure 7 in this embodiment is substantially the same as the MCM package structures 1 and 6 in the aforementioned embodiments, with the only difference being that the pre-wiring substrate 21 is located on the first conductive bump 16 and the first dielectric layer 17. In other words, the second conductive bump 19 on the second conductive trace 18 serves as the external connection terminal of the MCM package structure 7.

[0248] Correspondingly, the manufacturing method is different from the above two embodiments in that: first, step S4 is performed to form a second conductive trace 18, a second conductive bump 19 is formed on the second conductive trace 18, and a second dielectric layer 20 is formed to embed the second conductive trace 18 and the second conductive bump 19, and the second conductive bump 19 is exposed outside the second dielectric layer 20; then steps S3 and S5 are performed to remove the carrier 2 to form a first conductive trace 15, a first conductive bump 16 is formed on the first conductive trace 15, and a first dielectric layer 17 is formed to embed the first conductive trace 15 and the first conductive bump 16, and the first conductive bump 16 is exposed outside the first dielectric layer 17, and a pre-wiring substrate 21 is set on the first conductive bump 16 and the first dielectric layer 17, and the front electrical connection point 211 of the pre-wiring substrate 21 is connected to the first conductive bump 16.

[0249] Fig.13 FIG. 4 is a schematic cross-sectional view of the MCM packaging structure according to the fourth embodiment of the present invention. Fig.13 As shown, the MCM package structure 8 in this embodiment is substantially the same as the MCM package structure 7 in the previous embodiment, except that the first die assembly 10 is replaced by a die, for example, the first die 11. Accordingly, the second conductive bump 19 is connected to the second end 13b of the conductive column 13.

[0250] In other embodiments, the first die assembly 10 may also be replaced by the second die 12, or by the second die assembly, the second die assembly including a plurality of first die 11, or a plurality of second die 12. In other words, in the second die assembly, the active surfaces of the dies face the same direction.

[0251] Accordingly, the manufacturing method is different from the above-mentioned embodiment in that the manufacturing step of the second conductive trace 18 is omitted.

[0252] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. An MCM packaging structure, characterized in that: include: A first die assembly at least comprising: a first die and a second die, wherein the first die comprises a plurality of first pads, the first pads being located on an active surface of the first die, and the second die comprises a plurality of second pads, the second pads being located on an active surface of the second die; the active surface of the second die is covered with a second protective layer, the second protective layer exposes the second pads; the active surface of the first die faces opposite to the active surface of the second die; A plurality of conductive pillars are located on the side of the first bare chip assembly, the conductive pillars comprising a first end and a second end opposite to each other; A plastic encapsulation layer, covering the first bare chip assembly and the plurality of conductive pillars, wherein the back side of the plastic encapsulation layer exposes the second protective layer, the second pad, and the second end of the conductive pillar, and the front side of the plastic encapsulation layer exposes the active surface of the first bare chip and the first end of the conductive pillar; A first conductive trace, located on the first pad, the first end of the conductive column and the front surface of the plastic layer, for electrically connecting the first die and the conductive column; a first conductive bump connected to the first conductive trace; a first dielectric layer, embedding the first conductive trace and the first conductive bump, wherein the first conductive bump is exposed outside the first dielectric layer; A second conductive trace, located on the second pad, the second end of the conductive column and the back side of the plastic layer, for electrically connecting the second die and the conductive column; a second conductive bump connected to the second conductive trace; a second dielectric layer, embedding the second conductive trace and the second conductive bump, wherein the second conductive bump is exposed outside the second dielectric layer; a pre-wiring substrate, located on the second conductive bump and the second dielectric layer; a pre-wiring circuit is provided in the pre-wiring substrate, the pre-wiring circuit includes a front electrical connection point and a back electrical connection point, the front electrical connection point is connected to the second conductive bump; and A passive device is electrically connected to the back electrical connection point of the pre-wiring substrate.

2. The MCM packaging structure according to claim 1, characterized in that: The first bare die assembly is a bare die stacking structure.

3. The MCM packaging structure according to claim 1, characterized in that: The pre-wiring substrate is located on the second conductive bump and the second dielectric layer instead of: the pre-wiring substrate is located on the first conductive bump and the first dielectric layer.

4. The MCM packaging structure according to claim 1, characterized in that: Also includes: a fourth dielectric layer, located on the active surface of the first bare chip, the first end of the conductive column and the front surface of the plastic packaging layer; The fourth dielectric layer exposes the first pad and the first end of the conductive column; the first conductive trace is located on the first pad, the first end of the conductive column and the fourth dielectric layer.

5. The MCM packaging structure according to claim 1, characterized in that: Also includes: A first protective layer covers the active surface of the first bare chip, and the first protective layer exposes the first pad; the front side of the plastic packaging layer exposes the first protective layer and the first pad.

6. The MCM packaging structure according to claim 1, characterized in that: The material of the second protective layer is an organic polymer insulating material, an inorganic insulating material or a composite material; and / or the material of the first dielectric layer is an organic polymer insulating material, an inorganic insulating material or a composite material; and / or the material of the second dielectric layer is an organic polymer insulating material, an inorganic insulating material or a composite material.

7. A method for manufacturing an MCM packaging structure, characterized in that: include: A carrier and a plurality of groups of components to be packaged carried on the carrier are provided, each group of components to be packaged includes: a first bare chip assembly, and a plurality of conductive pillars located on the side of the first bare chip assembly; the first bare chip assembly at least includes: a first bare chip and a second bare chip, the first bare chip includes a plurality of first pads, the first pads are located on the active surface of the first bare chip, the second bare chip includes a plurality of second pads, the second pads are located on the active surface of the second bare chip; the active surface of the second bare chip is covered with a second protective layer; the active surface of the first bare chip and the active surface of the second bare chip face opposite to each other; the conductive pillar includes a first end and a second end opposite to each other; the active surface of the first bare chip and the first end of the conductive pillar face the carrier; Forming a plastic encapsulation layer on the surface of the carrier board to bury each group of the components to be encapsulated; thinning the plastic encapsulation layer until the second protective layer and the second end of the conductive column are exposed; The carrier is removed to expose the active surface of the first bare die, the first end of the conductive column and the front side of the plastic layer; a first conductive trace is formed on the first pad, the first end of the conductive column and the front side of the plastic layer to electrically connect the first bare die and the conductive column in the group; a first conductive bump is formed on the first conductive trace and a first dielectric layer is formed to bury the first conductive trace and the first conductive bump, wherein the first conductive bump is exposed outside the first dielectric layer; A second opening is formed in the second protection layer to expose the second pad; a second conductive trace is formed on the second protection layer, the second pad, the second end of the conductive column and the back of the plastic layer to electrically connect the second die in the group with the conductive column; a second conductive bump is formed on the second conductive trace and a second dielectric layer is formed to bury the second conductive trace and the second conductive bump, wherein the second conductive bump is exposed outside the second dielectric layer; A pre-wiring substrate is arranged on the second conductive bump and the second dielectric layer, wherein a pre-wiring circuit is arranged in the pre-wiring substrate, wherein the pre-wiring circuit includes a front electrical connection point and a back electrical connection point, wherein the front electrical connection point is connected to the second conductive bump; a third dielectric layer is formed to bury the pre-wiring substrate, wherein the back electrical connection point is exposed outside the third dielectric layer; electrically connecting a passive device to the back electrical connection point of the pre-wiring substrate; Cutting to form a plurality of MCM packaging structures, each of the MCM packaging structures includes a group of the components to be packaged.

8. The method for manufacturing the MCM packaging structure according to claim 7, characterized in that: Firstly, forming the second conductive trace, forming a second conductive bump on the second conductive trace, and forming a second dielectric layer that buries the second conductive trace and the second conductive bump, wherein the second conductive bump is exposed outside the second dielectric layer; The carrier is then removed to form the first conductive trace, a first conductive bump is formed on the first conductive trace, and a first dielectric layer is formed to bury the first conductive trace and the first conductive bump, the first conductive bump is exposed outside the first dielectric layer, a pre-wiring substrate is arranged on the first conductive bump and the first dielectric layer, and the front electrical connection point of the pre-wiring substrate is connected to the second conductive bump.

9. The method for manufacturing the MCM packaging structure according to claim 7, characterized in that: The step of thinning the plastic packaging layer until the second protection layer and the second end of the conductive column are exposed is performed after the step of forming the first dielectric layer and before the step of forming the second conductive trace.

10. The method for manufacturing the MCM packaging structure according to claim 7, characterized in that: After removing the carrier, a fourth dielectric layer is formed on the exposed active surface of the first bare chip, the first end of the conductive column and the front side of the plastic layer; a plurality of third openings are formed in the fourth dielectric layer, and the third openings expose the first pad and the first end of the conductive column; and the first conductive trace is formed on the first pad, the first end of the conductive column and the fourth dielectric layer.

11. The method for manufacturing the MCM packaging structure according to claim 7, characterized in that: In the first bare chip assembly, the active surface of the first bare chip is covered with a first protective layer; the first protective layer faces the carrier; a first opening is provided in the first protective layer to expose the first pad, or after the step of removing the carrier and before the step of forming the first conductive trace, a first opening is formed in the first protective layer to expose the first pad.

12. The method for manufacturing the MCM packaging structure according to any one of claims 7 to 11, characterized in that: The pre-wiring substrates of each group of the components to be packaged are connected together and are cut apart in the step of cutting to form a plurality of MCM packaging structures.

13. An MCM packaging structure, characterized in that: include: A bare die, the bare die comprising a plurality of pads, wherein the pads are located on an active surface of the bare die; A plurality of conductive pillars are located on the side of the die, the conductive pillars comprising a first end and a second end opposite to each other; A plastic encapsulation layer, covering the bare die and the plurality of conductive pillars, wherein the back side of the plastic encapsulation layer exposes the second ends of the conductive pillars, and the front side of the plastic encapsulation layer exposes the active surface of the bare die and the first ends of the conductive pillars; A conductive trace, located on the pad, the first end of the conductive column and the front side of the plastic layer, for electrically connecting the bare die and the conductive column; a first conductive bump connected to the conductive trace; A first dielectric layer, embedding the conductive trace and the first conductive bump, wherein the first conductive bump is exposed outside the first dielectric layer; A second conductive bump connected to the second end of the conductive column; a second dielectric layer, embedding the second conductive bump, wherein the second conductive bump is exposed outside the second dielectric layer; a pre-wiring substrate, located on the first conductive bump and the first dielectric layer; a pre-wiring circuit is provided in the pre-wiring substrate, the pre-wiring circuit includes a front electrical connection point and a back electrical connection point, the front electrical connection point is connected to the first conductive bump; and A passive device is electrically connected to the back electrical connection point of the pre-wiring substrate.

14. The MCM packaging structure according to claim 13, characterized in that: The die is replaced by a second die assembly, the second die assembly comprising a plurality of dies, the active surfaces of the plurality of dies facing the same direction.

15. A method for manufacturing an MCM packaging structure, characterized in that: include: A carrier board and a plurality of groups of components to be packaged carried on the carrier board are provided, each group of components to be packaged includes: a bare chip and a plurality of conductive pillars located on the side of the bare chip; the bare chip includes a plurality of pads, and the pads are located on the active surface of the bare chip; the conductive pillars include a first end and a second end opposite to each other; the active surface of the bare chip and the first end of the conductive pillars face the carrier board; Forming a plastic encapsulation layer on the surface of the carrier board to bury each group of the components to be encapsulated; thinning the plastic encapsulation layer until the second end of the conductive column is exposed; forming a second conductive bump on the second end of the conductive column and the back side of the plastic packaging layer and forming a second dielectric layer that buries the second conductive bump, wherein the second conductive bump is exposed outside the second dielectric layer; The carrier is removed to expose the active surface of the bare die, the first end of the conductive column and the front side of the plastic layer; a conductive trace is formed on the pad, the first end of the conductive column and the front side of the plastic layer to electrically connect the bare die and the conductive column in the group; a first conductive bump is formed on the conductive trace and a first dielectric layer is formed to bury the conductive trace and the first conductive bump, wherein the first conductive bump is exposed outside the first dielectric layer; A pre-wiring substrate is arranged on the first conductive bump and the first dielectric layer, wherein a pre-wiring circuit is arranged in the pre-wiring substrate, wherein the pre-wiring circuit includes a front electrical connection point and a back electrical connection point, wherein the front electrical connection point is connected to the first conductive bump; a third dielectric layer is formed to bury the pre-wiring substrate, wherein the back electrical connection point is exposed outside the third dielectric layer; electrically connecting a passive device to the back electrical connection point of the pre-wiring substrate; Cutting to form a plurality of MCM packaging structures, each of the MCM packaging structures includes a group of the components to be packaged.

16. The method for manufacturing the MCM packaging structure according to claim 15, characterized in that: The die is replaced by a second die assembly, the second die assembly comprising a plurality of dies, the active surfaces of the plurality of dies facing the same direction.

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