A method for preparing a microchannel plate and a microchannel plate prepared by the method
By using prefabricated mold post-processing method during the preparation of silicon-based microchannel plates, a columnar array is formed and electron multiplication and insulating materials are deposited, the problems of uneven etching, substrate deformation and uneven film layer are solved in the preparation of microchannel plates, and a more efficient and economical microchannel plate preparation is achieved.
Patent Information
- Application Number
- CN202111515816.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-12-13
- Publication Date
- 2025-03-18
- Estimated Expiration
- 2041-12-13
AI Technical Summary
During the preparation process of existing silicon-based microchannel plates, there are problems such as uneven etching of large depth-width-bias pores, deformation of substrates caused by long-term oxidation at high temperatures, uneven film layers for the inner wall of microchannel vias and material limitations.
Prefabricating microchannel plates using a prefabricated mold followed by processing includes forming a cylindrical array on the substrate, depositing electron multiplier material and insulating material, removing the substrate and cylindrical array, forming an insulating layer structure with through-holes, and depositing conductive material thereon to form input and output electrodes.
This method simplifies the process flow, reduces costs, avoids the mutual influence of material limitations and process, achieves better structural and device performance, and avoids high-temperature deformation problems.
Smart Images

Figure CN114496712B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of vacuum electronic technology, and more specifically, to a method for preparing a microchannel plate and a microchannel plate prepared by the method. Background Art
[0002] Microchannel plate is a two-dimensional channel electron multiplier with the advantages of high gain, high resolution, low noise, low power consumption and long life. It is widely used in micro-light tubes, photomultiplier tubes, cathode ray tubes, camera tubes and X-ray detectors.
[0003] The main body of traditional microchannel plate preparation is based on glass tube stretching technology: lead silicate glass tube is used as channel glass, acid-soluble glass rod core is inserted into the glass tube, the glass tube is densely packed and compressed horizontally, stretched longitudinally, and then cut into thin slices to become slabs. The slabs are ground and polished, and the glass rod core is dissolved by acid corrosion to form the microchannel plate matrix. The matrix is heated by hydrogen to reduce the lead in the silicate glass matrix, and a conductive layer and an emission layer are formed on the inner wall of the micro glass tube. Finally, metal is evaporated at both ends of the microchannel plate matrix to form input and output electrodes to complete the production. Voltage is applied to both ends of the microchannel plate, and the input electrons continuously hit the emission layer in the microchannel to generate additional secondary electrons, thereby multiplying or amplifying the weak two-dimensional electron image.
[0004] However, the traditional microchannel plate process has relatively fixed materials and there is a contradiction between the multi-fiber drawing of lead silicate glass materials and the hydrogen reduction treatment, which makes it difficult to fully tap the potential in terms of service life, dynamic range, spatial resolution and signal-to-noise ratio, limiting its application in many directions, especially in space detection, low-light night vision, and large-screen display.
[0005] With the development of micro-electromechanical system technology, it is possible to use micro-machining technology to prepare micro-channel plates. 5997713 respectively proposed a micromachining process method for preparing a microchannel plate based on silicon material, and its basic process flow is shown in Figure 1: first, dry deep reactive ion etching (DRIE) technology, or electrochemical and photoelectrochemical corrosion technology, is used to prepare densely packed high aspect ratio through holes as electron transmission channels 202 on a silicon wafer, and the silicon material is not removed to form a microchannel plate substrate 201; then, through thermal oxidation or chemical vapor deposition (CVD), an oxidized insulating layer 203 is formed on the surface of the semiconductor silicon microchannel plate substrate 201 including the outer surface and the inner wall of the electron transmission channel 202, or 201 is completely thermally oxidized to form overall insulation; then, through chemical vapor deposition (CVD) or atomic layer deposition (ALD) method, an electron multiplying layer 204 is formed on the surface of the oxidized insulating layer 203 including the outer surface and the inner wall of the electron transmission channel 202; finally, through a thin film deposition method, an input electrode 205 and an output electrode 206 are formed only on the upper and lower end surfaces of the substrate structure to complete the preparation.
[0006] The above patented method is used to prepare silicon-based microchannel plates. The process flow is compatible with micromachining technology, and it is easy to realize high aspect ratio microchannel array structures of various shapes and sizes, with good process repeatability and batch production capabilities. In addition, this method separates the microchannel substrate from the electron multiplication in terms of materials and processes, which solves the contradiction between glass multi-fiber drawing and hydrogen reduction treatment, and provides conditions for the use of new materials and new processes to produce secondary electron emission layers. Therefore, this method for preparing silicon-based microchannel plates has the advantages of small channel aperture, large working area, wide dynamic range, wide spectral response range, and high temperature resistance compared to traditional glass methods.
[0007] However, the above patented method for preparing silicon-based microchannel plates also has inherent disadvantages that affect its performance improvement, which are mainly manifested in:
[0008] 1) Deep reactive ion etching (DRIE) technology is used to prepare microchannel through holes. Most of the process flow of high aspect ratio hole (HARP) structure etching is in deep and narrow blind holes. The transport of gas and gaseous products has only one degree of freedom in the depth direction. The resistance to gas movement increases sharply with the depth of the hole, which will cause the etching speed to become slower and slower, resulting in serious longitudinal strip-like uneven distribution, serious non-uniformity in the middle and lower parts of the channel, and the existence of size effect, making the DRIE process extremely challenging.
[0009] 2) The microchannel plate requires excellent high voltage resistance, and the silicon-based substrate needs to be insulated. However, the withstand voltage of silicon dioxide or silicon nitride insulating films made on the silicon surface by low-pressure chemical vapor deposition (LPCVD) is usually 300-400V, which cannot meet the requirements. The thermal oxidation method completely oxidizes the silicon substrate or makes silicon dioxide with a thickness of more than a few microns, which requires at least dozens of hours at 1100°C, which can easily cause the microchannel plate to deform and lead to preparation failure. The larger the area and the thinner the substrate, the more serious the deformation.
[0010] 3) When making an electron multiplying material layer on the inner wall of the microchannel through-hole, it is difficult to achieve uniform film coverage on the inner wall of a thin tube with a large aspect ratio and consistency between each microtube by using the chemical vapor deposition (CVD) method. Although a uniform film layer can be obtained by using the atomic layer deposition (ALD) method, the method is applicable only when a suitable precursor is required, and can only be limited to a small amount of specific materials, which greatly limits the types of available materials.
[0011] In view of the above situation, the present invention provides a method for preparing a microchannel plate, which solves the problems existing in the above-mentioned silicon-based microchannel plate micromachining patent, such as uneven micropores with large aspect ratio due to deep silicon etching, deformation of the microchannel plate substrate caused by long-term oxidation at high temperature, and uneven film layer production on the inner wall of the microchannel through hole and material limitations. Summary of the invention
[0012] Based on the above facts, the purpose of the present invention is to provide a method for preparing a microchannel plate and a microchannel plate prepared by the method, so as to solve the problems existing in the prior art in the preparation process of the microchannel plate, such as micropore etching of large aspect ratio holes, deformation of the substrate due to long-term high-temperature treatment, and difficulty in uniformly manufacturing the thin film material of the inner wall of the microchannel.
[0013] In one aspect, the present invention provides a method for preparing a microchannel plate, the method comprising the following steps:
[0014] providing a substrate;
[0015] forming an array of pillars at preselected locations on a surface of a substrate;
[0016] Depositing electron multiplying materials on the surfaces of the substrate and the columnar array to form an electron multiplying layer;
[0017] Applying an insulating material on the electron multiplying layer until the columnar array is completely covered to form an insulating layer;
[0018] The surface of the obtained structure where the insulating layer is located is ground and polished until the top of the columnar array is exposed;
[0019] removing the substrate and grinding and polishing the surface of the structure combined with the substrate until the bottom end of the columnar array is exposed;
[0020] The columnar array is removed to obtain an insulating layer structure having through holes and an electron multiplying layer coated on the through holes;
[0021] Depositing conductive materials on the upper and lower surfaces of the insulating layer structure except for the through holes to form input electrodes and output electrodes;
[0022] The microchannel plate is obtained.
[0023] Furthermore, the columnar array is formed by micromachining.
[0024] Furthermore, the columnar array is in the shape of a cylinder, a square column or a hexagonal column.
[0025] Furthermore, in the columnar array, the column gap is 4-6 microns, the diameter or opposite side length of a single column is 6-40 microns, the column height is 160-400 microns, and the aspect ratio of the column is 10-40.
[0026] Furthermore, the material of the columnar array is the same as that of the substrate or is selected from thick photoresist.
[0027] Furthermore, the electron multiplying material is selected from one or more of doped / undoped polysilicon and metal oxides.
[0028] Furthermore, the thickness of the electron multiplying layer is 10-100 nm.
[0029] Furthermore, the insulating material is an insulating material resistant to high electric field breakdown.
[0030] Furthermore, the method of applying the insulating material is selected from one of filling and curing, filling and sintering, chemical vapor deposition, and vacuum coating.
[0031] Furthermore, the substrate is a silicon sheet, a metal sheet or a glass sheet with a smooth and flat surface.
[0032] Furthermore, the thickness of the substrate is 400-2000 microns.
[0033] Furthermore, the method of removing the substrate is selected from corrosion, grinding and polishing.
[0034] Furthermore, the method of removing the columnar array is etching.
[0035] Furthermore, the method of depositing the conductive material is a thin film deposition method.
[0036] Furthermore, the conductive material is selected from one of chromium-nickel, titanium-nickel, chromium-gold and titanium-gold.
[0037] Furthermore, the thickness of the input electrode and the output electrode are each independently selected from 100-300 nm.
[0038] In another aspect, the present invention provides a microchannel plate prepared by the preparation method described above.
[0039] The beneficial effects of the present invention are as follows:
[0040] In the preparation method of the present invention, a method of using a prefabricated mold and then processing the microchannel plate is used, which effectively overcomes the problem that the existing microchannel plate micromachining method can only rely on silicon materials and the constraints of the specific process flow of silicon materials. In the preparation method of the present invention, not only the process is simple and the cost is low, but also the material limitation and the mutual influence between the preparation processes caused by the difference in material properties are theoretically avoided. The materials and processing techniques have a variety of choices, which can achieve better structure and device performance. BRIEF DESCRIPTION OF THE DRAWINGS
[0041] The specific implementation modes of the present invention are further described in detail below in conjunction with the accompanying drawings.
[0042] FIG. 1 shows a flow chart of a conventional silicon microchannel plate preparation process.
[0043] Among them, 201 is a microchannel plate substrate, 202 is an electron transmission channel, 203 is an oxide insulating layer, 204 is an electron multiplying layer, 205 is an input electrode, and 206 is an output electrode.
[0044] Figure 2a-2c The comparison between deep reactive ion etching deep hole, deep reactive ion etching high column, thick photoresist lithography high column micro-machined high aspect ratio hole structure and micro-machined high aspect ratio column structure is shown respectively.
[0045] Figure 3a-3f The flowchart of the microchannel plate preparation process of the present invention is shown.
[0046] Among them, 301-substrate, 302-column array, 401-electron multiplying layer, 402-microchannel plate substrate (ie, insulating layer), 403-electron transmission channel (ie, through hole), 404-input electrode, 405-output electrode.
[0047] Figure 3g A schematic structural diagram of the microchannel plate of the present invention is shown. DETAILED DESCRIPTION
[0048] In order to more clearly illustrate the present invention, the present invention is further described below in conjunction with preferred embodiments and accompanying drawings. Similar components in the accompanying drawings are represented by the same reference numerals. It should be understood by those skilled in the art that the content specifically described below is illustrative rather than restrictive, and should not be used to limit the scope of protection of the present invention.
[0049] In the description of the present invention, unless otherwise specified, “plurality” means two or more than two; the orientations or positional relationships indicated by terms such as “upper”, “lower”, “left”, “right”, “inside”, “outside”, “front end”, “rear end”, “head” and “tail” are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.
[0050] According to a specific embodiment of the present invention, a method for preparing a microchannel plate is provided, such as Figure 3a-3f As shown in , the following steps are included:
[0051] 1) Provide a substrate 301.
[0052] The substrate 301 suitable for use in this embodiment may be a smooth and flat substrate. Exemplary substrates 301 include but are not limited to surface-polished silicon wafers, metal wafers, glass wafers, or other materials whose flatness and roughness meet the requirements of micro-machining, especially photolithography.
[0053] The size of the substrate 301 is preferably a standard size for micromachining, such as 2 inches, 3 inches, 4 inches, 6 inches, or a standard substrate or non-standard substrate larger than 6 inches that can be achieved by micromachining.
[0054] The suitable thickness of the substrate 301 is preferably 400-2000 microns.
[0055] 2) Forming a columnar array 302 at a preselected position on one surface of the substrate 301, such as Figure 3a shown.
[0056] The size and shape of the column array 302 correspond to the size and shape of the through hole in the microchannel plate to be finally prepared (i.e., the effective practical area in the microchannel plate). In the column array 302, the column shape corresponds to the inner hole of the microchannel plate, the column gap corresponds to the channel wall thickness of the microchannel plate, and the column height corresponds to the thickness of the microchannel plate.
[0057] The shape of the columnar array 302 includes but is not limited to a circular column, a square column or a hexagonal column.
[0058] In the column array 302, the column gap is preferably about 4 microns, the diameter or opposite side length of a single column is preferably 6-40 microns, the column height is preferably 160-400 microns, and the aspect ratio of the column is preferably 10-40.
[0059] The material forming the pillar array 302 is the same as the substrate 301 or is selected from thick photoresists (such as SU8 and KMPR) or other materials suitable for forming pillar structures with a large aspect ratio.
[0060] The method for forming the columnar array 302 may be a micromachining method, specifically, deep reactive ion etching (DRIE, processing silicon), thick resist photolithography (processing thick resist SU8 or KMPR), or other applicable micromachining technologies such as femtosecond laser.
[0061] The pattern of the columnar array 302 can be designed in a size range as required, or the pattern of the columnar array 302 can be densely distributed over the entire substrate and cut into suitable sizes as required after preparation.
[0062] Compared with the existing micro-machining methods of silicon microchannel plates, the preparation method of the present invention has more processing technologies to choose from, such as thick-resist photolithography, etc. Even if the same deep reactive ion etching technology is used to process the microchannel array, because the processing structure is changed from deep hole processing to high column processing, the corresponding high aspect ratio hole (HARP) structure etching is changed to high aspect ratio groove (HART) structure etching, and the transport of gas and gaseous products is changed from only one degree of freedom in the depth direction to two degrees of freedom in the depth and columnar gap lateral direction, which greatly improves the structural processing quality, that is, the column structure processing quality is better than the hole processing. Figure 2a In the prior art, a micro-machined hole structure with a large aspect ratio is obtained by deep reactive ion etching. Figure 2b The micro-machined high aspect ratio pillar structure by deep reactive ion etching in this embodiment, and Figure 2c This is a micro-fabricated high aspect ratio pillar structure using thick photolithography in this embodiment. Figure 2a It can be seen from the above that the depth of the large aspect ratio holes obtained by the prior art is inconsistent and has poor uniformity. In addition, due to the high temperature involved in the processing process, the material is prone to high temperature deformation. Figure 2b and 2c It can be seen that in the present application, a highly uniform column structure with a large aspect ratio is first prepared, and then an outer covering material is formed on this basis, and then the through hole obtained by removing the column structure with a high aspect ratio is naturally highly consistent and uniform. In addition, the method of this embodiment does not involve a high temperature process and there is no deformation, so it is more conducive to preparing highly consistent and uniform through holes.
[0063] 3) Depositing electron multiplying material on the surface of the substrate 301 and the columnar array 302 to form an electron multiplying layer 401, such as Figure 3b shown.
[0064] The method for depositing the electron multiplying material may be a thin film deposition method, which may specifically include but is not limited to a solution ultrasonic precipitation method, a sol-gel method, a vacuum coating method, a chemical vapor deposition method, and the like.
[0065] Through deposition, it can be known that electron multiplying materials are deposited on both the upper surface of the substrate 301 and the outer surface of the columnar array 302 .
[0066] The electron multiplying material is conventional doped / undoped polysilicon, metal oxides or other novel materials having both conductive and electron multiplying properties; wherein the metal oxides preferably include but are not limited to magnesium oxide, indium tin oxide, antimony tin oxide, and the like.
[0067] The thickness of the electron multiplying layer 401 is preferably 10-100 nm.
[0068] In the preparation method of this embodiment, the electron multiplying layer preparation process flow is changed from the existing large aspect ratio pipeline inner wall coating to the structure outer surface application, which greatly reduces the process difficulty, is conducive to the selection of more material types, achieves better coating uniformity and consistency, and improves the performance of the microchannel plate.
[0069] 4) Applying insulating material on the electron multiplying layer 401 to completely cover the columnar array 302 to form an insulating layer 402 (i.e., a microchannel plate substrate), such as Figure 3c shown.
[0070] The method of applying the insulating material is preferably one of filling and curing, filling and sintering, chemical vapor deposition, and vacuum coating.
[0071] The insulating material may be applied by filling / depositing the insulating material in the gaps of the pillar array 302 on the substrate 301 until the pattern structure of the pillar array 302 is completely covered. The insulating material is used as a material for subsequently forming a microchannel plate base structure.
[0072] The applied insulating material completely covers the pattern structure of the pillar array 302 , so that the thickness of the insulating layer 402 is greater than the height of the pillar array 302 .
[0073] Insulating materials that are easy to form densely, have strong strength, and can withstand high electric field breakdown include but are not limited to resin, glass, quartz, ceramics, etc.
[0074] Directly using insulating materials to prepare the microchannel plate substrate avoids the high-temperature and long-term oxidation process of the existing silicon microchannel plate micromachining method, as well as the resulting substrate deformation; even if a high-temperature process is used, since the substrate and the microchannel structure are unrelated to each other, the degree of deformation can be effectively reduced by increasing the substrate thickness.
[0075] 5) The surface of the insulating layer 402 in the obtained structure is ground and polished until the top of the columnar array 302 is exposed, such as Figure 3d shown.
[0076] It can be understood that, through grinding and polishing, a portion of the insulating layer 402 and the entire electron multiplying layer 401 located at the top of the columnar array 302 are removed in sequence, so that the top of the columnar array 302 is just exposed on the surface obtained after grinding and polishing.
[0077] The method of planarizing and polishing is preferably chemical mechanical polishing (CMP).
[0078] Through this method, the separation of the insulating layer 402 (microchannel plate substrate) and the electron multiplying material is achieved, and the contradiction between the multi-fiber drawing of lead silicate glass materials and the hydrogen reduction treatment in the traditional microchannel plate tube drawing technology preparation method is overcome. The diversity of material selection is also conducive to improving the performance of the microchannel plate.
[0079] 6) removing the substrate 301 and grinding and polishing the surface of the structure combined with the substrate 301 until the bottom of the columnar array 302 is exposed; and further removing the columnar array 302 to obtain an insulating layer structure having a through hole 403 (i.e., an electron transmission channel) and an electron multiplying layer 401 coated on the through hole 403, such as Figure 3e shown.
[0080] Methods for removing the substrate 301 include, but are not limited to, etching, grinding, and polishing.
[0081] The surface of the structure combined with the substrate 301 is ground and polished, that is, the portion of the electron multiplying layer 401 combined with the substrate 301 is removed.
[0082] Among them, the above-mentioned grinding and polishing method is preferably chemical mechanical polishing (CMP).
[0083] The method for further removing the columnar array 302 can be etching, and the etching method is wet chemical etching. According to whether the materials of the substrate 301 and the columnar array 302 are the same or different, the same / different chemical etching solution is selected. The etching solution should have good corrosion selectivity for other materials, that is, the etching removal process cannot damage the microchannel plate insulating substrate and the electron multiplication layer 401.
[0084] 7) Depositing conductive materials on the upper and lower surfaces of the insulating layer structure except for the through hole 403 to form an input electrode 404 and an output electrode 405, such as Figure 3f shown.
[0085] The method for depositing the conductive material is preferably a thin film deposition method. An exemplary thin film deposition method is a vacuum evaporation coating method in which the microchannel plate rotates around the end surface normal, deposits at a grazing angle, and has good directionality. To ensure that the deposited layer is only located on the upper and lower end surfaces of the microchannel plate and does not enter the electron channel, the evaporation source is kept away from the end surface of the microchannel plate and maintained at a very small grazing angle for inclined evaporation. At the same time, to ensure uniformity, the microchannel plate rotates around the end surface normal during the evaporation process.
[0086] In order to achieve both reliable bonding and good conductivity, the conductive material includes but is not limited to one selected from chromium nickel, titanium nickel, chromium gold, and titanium gold.
[0087] The thickness of the input electrode 404 and the output electrode 405 are each independently selected from 100-300 nm.
[0088] Another specific embodiment of the present invention provides a microchannel plate prepared by the above method, the structure of which is as follows: Figure 3g shown.
[0089] Example 1
[0090] A microchannel plate, as shown in FIG3 , includes an electron multiplying layer 401 , a microchannel plate substrate 402 , an electron transmission channel 403 , an input electrode 404 and an output electrode 405 .
[0091] The preparation method thereof comprises the following steps:
[0092] 1) Selection <100> A crystal-polished silicon wafer is used as a substrate 301, with a diameter of 4 inches, a thickness of 500 microns, and a surface flatness and warpage better than 10 microns; 0.5 microns of silicon dioxide are thermally oxidized and 1 micron of metal aluminum is magnetron sputtered on the surface of the silicon wafer, and standard photolithography is used to etch the silicon dioxide and metal aluminum as a mask layer; the silicon substrate is etched using the patented deep silicon etching technology of Bosch of STS Company to form a columnar array 302; the etching power is 600W / 15W, the etching rate is 1.5μm / min, the etching time is 200min, and the etching depth is 300 microns; according to the design pattern, a dense hexagonal columnar array 302 is obtained on the silicon wafer, with a distance of 15 microns between opposite sides of the column, a columnar gap of 4-6 microns, a columnar height of 300 microns, and a columnar aspect ratio of 20.
[0093] 2) Using a magnetron sputtering method, argon and oxygen are used as discharge gases, and magnesium and gold are deposited simultaneously to obtain a magnesium oxide / gold composite film layer as the electron multiplying layer 401, wherein the magnesium oxide layer is used for electron multiplication and the gold layer enhances conductivity. The substrate is heated to 500°C, the argon flow rate is 25sccm, the oxygen flow rate is 5sccm, the magnesium target power is 100W, the gold target power is 7W, the film deposition rate is about 10nm / min, and the electron multiplying layer 401 thickness is about 100nm after deposition for 10 minutes.
[0094] 3) Using electron beam evaporation, 95% alumina ceramics were evaporated into the gap between the substrate and the columnar array to form a microchannel plate substrate 402. The evaporation power was 2 kW, the evaporation rate was 2 μm / min, and the evaporation time was 160 min. The alumina ceramic microchannel plate substrate 402 was obtained to have a thickness of about 320 μm and completely cover the columnar array 302 with a height of 300 μm.
[0095] 4) A chemical mechanical polishing method is used to grind and polish the alumina ceramic microchannel plate substrate 402 using diamond powder as an abrasive. Initially, a 10-micron abrasive is used at a speed of 200 RPM to reduce the thickness of the alumina ceramic substrate to 300 microns; then a 1-micron abrasive is used at a speed of 60 RPM to polish slowly until the alumina ceramic substrate 402 and the magnesium oxide / gold composite electron multiplying layer 401 on the top of the silicon-based columnar array 302 are ground through to expose the silicon material.
[0096] 5) Use potassium hydroxide solution to etch the silicon material, completely remove the substrate 301 and the columnar array 302, and grind and polish the electron multiplying layer 401 on the lower surface until the alumina ceramic microchannel plate substrate 402 is exposed. Use a potassium hydroxide solution with a concentration of 30%, an etching temperature of 80°C, and a silicon material etching rate of about 1 μm / min; use a 200-micron substrate 301 and a 300-micron columnar array 302 for this structure, and perform 300 minutes of over-etching (double-sided etching) to ensure that all silicon materials are removed (the columnar array has narrow channels that are difficult to remove), and an electron transmission channel 403 is formed at the original columnar array 302 due to material removal. Thus, a microchannel plate structure consisting of an electron multiplying layer 401, a microchannel plate substrate 402, and an electron transmission channel 403 is obtained. The shape of the honeycomb electron transmission channel 403 corresponds to the columnar array, the hexagonal through hole has a side distance of 15 microns, a wall thickness of 4 microns, and a depth of 300 microns.
[0097] 6) Conductive material is deposited on the upper end of the microchannel plate by electron beam evaporation deposition to make input electrode 404. During evaporation, the target source is away from the microchannel plate and has an incident grazing angle of 15 degrees with the end. At the same time, the microchannel plate rotates along the normal direction of the end to ensure that the evaporated material is evenly deposited on the surface without entering the electron transmission channel 403. The input electrode 404 is a composite film layer of 20nm titanium and 100nm nickel. The output electrode 405 is prepared on the lower end of the microchannel plate by the same method.
[0098] Example 2
[0099] A microchannel plate comprises an electron multiplying layer 401, a microchannel plate substrate 402, an electron transmission channel 403, an input electrode 404 and an output electrode 405.
[0100] The preparation method is the same as that of Example 1, except that:
[0101] Select in step 1) <100> The substrate 301 is a crystal-polished silicon wafer with a diameter of 4 inches, a thickness of 500 microns, and a surface flatness and warpage better than 10 microns. SU8-2150 photoresist with a thickness of 300 microns is spin-coated on the surface of the substrate 301 at a speed of 800 RPM, pre-baked at 95°C for 60 minutes, and 600 mJ / cm according to the design pattern. 2 After dose exposure, post-baking at 95°C for 60 minutes and developing with SU8 Developer for 45 minutes, a densely distributed hexagonal column array 302 is obtained on the silicon wafer, with a columnar opposite side distance of 15 microns, a columnar gap of 4 microns, a columnar height of 300 microns and a columnar aspect ratio of 20.
[0102] In step 3), silicon dioxide is deposited in the gap between the substrate and the columnar array using chemical vapor deposition to form a microchannel plate substrate 402. The obtained alumina ceramic microchannel plate substrate 402 has a thickness of about 320 μm and completely covers the columnar array 302 with a height of 300 μm.
[0103] In step 5), a potassium hydroxide solution is used to corrode and remove the substrate 301, and the electron multiplying layer 401 is ground and polished on the lower surface until the alumina ceramic microchannel plate substrate 402 is exposed. A debonding agent is used to remove the columnar array 302. A potassium hydroxide solution with a concentration of 30%, an etching temperature of 80°C, and a silicon material etching rate of about 1μm / min are used. The substrate 301 with a thickness of 500 microns is completely removed in about 500 minutes; Remover PG, a special debonding agent for SU8, is used to ensure that all SU8-2150 photoresists are removed. Due to the removal of material, an electron transmission channel 403 is formed at the original columnar array 302 position. Thus, a microchannel plate structure consisting of an electron multiplying layer 401, a microchannel plate substrate 402 and an electron transmission channel 403 is obtained. The shape of the honeycomb electron transmission channel 403 corresponds to the columnar array, the hexagonal through hole has a side distance of 15 microns, a wall thickness of 4 microns, and a depth of 300 microns.
[0104] Conclusion: The present invention unexpectedly found that the use of a prefabricated mold post-processing method to prepare a microchannel plate is not only simple in process and low in cost, but also theoretically avoids material limitations and the mutual influence between preparation processes caused by differences in material properties, and can maximize the optimization of the process method to obtain high-quality results. The method proposed by the present invention is simple, easy to operate, low in cost, and has a wide range of optional materials, which meets the urgent needs of scientific research and practical application.
[0105] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not limitations on the implementation methods of the present invention. For ordinary technicians in the relevant field, other different forms of changes or modifications can be made based on the above description. It is impossible to list all the implementation methods here. All obvious changes or modifications derived from the technical solution of the present invention are still within the protection scope of the present invention.
Claims
1. A method for preparing a microchannel plate, characterized in that: It consists of the following steps: providing a substrate; forming an array of pillars at preselected locations on a surface of a substrate; Depositing electron multiplying materials on the surfaces of the substrate and the columnar array to form an electron multiplying layer; Applying an insulating material on the electron multiplying layer until the columnar array is completely covered to form an insulating layer; The surface of the obtained structure where the insulating layer is located is ground and polished until the top of the columnar array is exposed; removing the substrate and grinding and polishing the surface of the structure combined with the substrate until the bottom end of the columnar array is exposed; The columnar array is removed to obtain an insulating layer structure having through holes and an electron multiplying layer coated on the through holes; Depositing conductive materials on the upper and lower surfaces of the insulating layer structure except for the through holes to form input electrodes and output electrodes; obtaining the microchannel plate; The material of the columnar array is selected from thick photoresist; The insulating material is an insulating material resistant to high electric field breakdown; The polishing method is chemical mechanical polishing, through which the separation of the insulating layer and the electron multiplying material is achieved.
2. The preparation method according to claim 1, characterized in that: The pillar array is formed by micromachining.
3. The preparation method according to claim 1, characterized in that: The column array is in the shape of a cylinder, a square column or a hexagonal column.
4. The preparation method according to claim 1, characterized in that: In the columnar array, the column gap is 4-6 microns, the diameter or opposite side length of a single column is 6-40 microns, the column height is 160-400 microns, and the aspect ratio of the column is 10-40.
5. The preparation method according to claim 1, characterized in that: The electron multiplying material is selected from one or more of doped / undoped polysilicon and metal oxides.
6. The preparation method according to claim 1, characterized in that: The thickness of the electron multiplying layer is 10-100 nm.
7. The preparation method according to claim 1, characterized in that: The method of applying the insulating material is selected from one of filling and curing, filling and sintering, chemical vapor deposition, and vacuum coating.
8. The preparation method according to claim 1, characterized in that: The substrate is a silicon sheet, a metal sheet or a glass sheet with a smooth and flat surface.
9. The preparation method according to claim 1, characterized in that: The thickness of the substrate is 400-2000 microns.
10. The preparation method according to claim 1, characterized in that: The method of removing the substrate is selected from etching, grinding and polishing.
11. The preparation method according to claim 1, characterized in that: The method of removing the pillar array is etching.
12. The preparation method according to claim 1, characterized in that: The method of depositing the conductive material is a thin film deposition method; The conductive material is selected from one of chromium nickel, titanium nickel, chromium gold and titanium gold.
13. The preparation method according to claim 1, characterized in that: The thickness of the input electrode and the output electrode are each independently selected from 100-300 nm.
14. A microchannel plate prepared by the preparation method according to any one of claims 1 to 13.
Citation Information
Patent Citations
Microchannel electron multipliers
US5086248A
Silicon etching process for making microchannel plates
US5997713A
Method for preparing organic microchannel plate by employing MEMS technology
CN106206213A
Electron multiplier element
JP1994176734A
Electron multipliers and radiation detectors
US20040256967A1