Overlay deviation compensation system and method

Abstract

A compensation system and method for overlay deviation, including: providing a number of historically processed wafers; obtaining a wafer prediction compensation database based on the number of historically processed wafers, the wafer prediction compensation database including: a first process path corresponding to the historically processed wafers, and a first deviation compensation value corresponding to each historically processed wafer; providing a wafer to be compensated; obtaining a second process path of the wafer to be compensated; and obtaining a second deviation compensation value of the wafer to be compensated based on the comparison between the second process path and the wafer prediction compensation database. The compensation value of the wafer to be compensated can be predicted in advance through the wafer prediction compensation database, which effectively improves production efficiency. In addition, the first process path of each historically processed wafer in the wafer prediction compensation database is introduced as an influencing variable into the compensation of overlay deviation, which effectively improves the final compensation accuracy, reduces the risk of re-detection and compensation, and thus reduces production costs.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing, and in particular to a compensation system and method for overlay deviation. Background Art

[0002] Overlay (OVL) refers to the accuracy of the overlap between the current layer pattern and the previous layer pattern in the photolithography manufacturing process. Since the integrated circuit chip is manufactured by stacking multiple circuit layers, if the current layer and the previous layer are not aligned, the chip will not work properly. Therefore, in the process of forming the current layer, it is extremely important to reduce the overlay accuracy and ensure that the overlay accuracy is within the deviation range.

[0003] In the prior art, the overlay deviation compensation process is usually performed several times to continuously improve the overlay accuracy of the current batch of wafers. The overlay deviation compensation process includes: obtaining a wafer to be tested from a previous batch of wafers; performing an overlay accuracy test on the wafer to be tested to obtain the overlay accuracy information of the previous batch; obtaining an overlay deviation model based on the overlay accuracy information of the previous batch; and performing overlay deviation compensation on the wafers of the current batch based on the overlay deviation model.

[0004] However, there are still many problems in the overlay deviation compensation process in the prior art. Summary of the invention

[0005] The technical problem solved by the present invention is to provide a compensation system and method for overlay deviation, which can effectively reduce cost expenditure and improve production capacity.

[0006] In order to solve the above technical problems, the technical solution of the present invention provides a method for compensating for overlay deviation, including: providing several historically processed wafers; obtaining a wafer prediction compensation database based on the several historically processed wafers, and the wafer prediction compensation database includes: a first process path corresponding to each of the historically processed wafers, and a first deviation compensation value corresponding to each of the historically processed wafers; providing a wafer to be compensated; obtaining a second process path of the wafer to be compensated; comparing the second process path of the wafer to be compensated with the wafer prediction compensation database to obtain a second deviation compensation value of the wafer to be compensated.

[0007] Optionally, the wafer prediction compensation database also includes: a wafer group corresponding to each of the historically processed wafers.

[0008] Optionally, the method for obtaining the second deviation compensation value of the wafer to be compensated by comparing the second process path of the wafer to be compensated with the wafer prediction compensation database includes: when the obtained second process path of the wafer to be compensated is the same as the first process path of a historically processed wafer in the wafer prediction compensation database, then the second deviation compensation value of the wafer to be compensated is the first deviation compensation value of the historically processed wafer.

[0009] Optionally, the method for obtaining the wafer prediction compensation database includes: grouping a number of the historically processed wafers to obtain a number of wafer groups, each of the wafer groups including at least one historically processed wafer; obtaining a first process path for each of the historically processed wafers in the wafer group, and associating the first process path with the wafer group; and obtaining a first deviation compensation value corresponding to each of the historically processed wafers in the wafer group.

[0010] Optionally, the method for grouping the plurality of historically processed wafers includes: normalizing the plurality of historically processed wafers to obtain a plurality of normalized wafers; stripping the plurality of normalized wafers for compensation values ​​to obtain a plurality of initial state wafers; re-compensating the plurality of initial state wafers to obtain a pure compensation value corresponding to each of the initial state wafers; and grouping the plurality of historically processed wafers according to the pure compensation values.

[0011] Optionally, the historically processed wafer includes a plurality of first measurement points, and each of the first measurement points corresponds to a first measurement value.

[0012] Optionally, the method for obtaining the normalized wafer includes: providing a data fitting model; performing data fitting operation on the first measurement point and the first measurement value according to the data fitting model to obtain the normalized wafer, wherein the normalized wafer includes a plurality of second measurement points, and each second measurement point corresponds to a second measurement value.

[0013] Optionally, the method for obtaining the initial state wafer includes: obtaining the historical compensation value corresponding to each of the normalized wafers at each of the second measurement points; subtracting the corresponding historical compensation value from each of the second measurement values ​​on the normalized wafer to obtain the initial state wafer, wherein the initial state wafer includes a plurality of third measurement points, the third measurement points corresponding to the second measurement points, and each of the third measurement points has an initial deviation value.

[0014] Optionally, the method for obtaining the pure compensation value corresponding to each of the initial-state wafers includes: providing a re-compensation model; and obtaining the pure compensation value corresponding to each of the initial-state wafers according to the re-compensation model.

[0015] Optionally, the method for grouping the plurality of historically processed wafers according to the pure compensation value includes: generating a corresponding visualization image based on the pure compensation value corresponding to each of the initial state wafers; performing image recognition processing on the plurality of visualization images, and grouping the plurality of historically processed wafers according to the image recognition processing.

[0016] Optionally, the method for obtaining the first deviation compensation value corresponding to each historically processed wafer in the wafer group includes: providing a weight distribution model; and performing calculation processing on the pure compensation value of each historically processed wafer in the wafer group according to the weight distribution model to obtain the first deviation compensation value.

[0017] Optionally, in the process of acquiring the first process path, the method further includes: removing a first interfering process path in the first process path.

[0018] Optionally, the first interfering process path includes: a first process path that does not produce overlay deviation when the wafer to be compensated is subjected to a semiconductor process.

[0019] Optionally, in the process of acquiring the second process path, the method further includes: removing a second interfering process path in the second process path.

[0020] Optionally, the second interfering process path includes: the second process path that does not produce overlay deviation when the historically processed wafer is subjected to a semiconductor process.

[0021] Optionally, after obtaining the first deviation compensation value of the wafer to be compensated, the method further includes: performing deviation compensation processing on the wafer to be compensated using the first deviation compensation value to obtain a compensated wafer.

[0022] Correspondingly, the present invention also provides a compensation system for overlay deviation, comprising: a database acquisition unit, which acquires a wafer prediction compensation database based on a number of historically processed wafers, the wafer prediction compensation database comprising: a first process path corresponding to each of the historically processed wafers, and a first deviation compensation value corresponding to each of the historically processed wafers, for providing a predicted deviation compensation value for the wafer to be compensated; a second path acquisition unit, which is used to acquire a second process path of the wafer to be compensated; and a processing unit, which is used to compare the second process path of the wafer to be compensated with the wafer prediction compensation database to acquire the second deviation compensation value of the wafer to be compensated.

[0023] Optionally, the wafer prediction compensation database also includes: a wafer group corresponding to each of the historically processed wafers.

[0024] Optionally, the processing unit includes: a comparison module, used to compare the wafer to be compensated with the wafer prediction compensation database, and generate a data extraction signal when the acquired second process path of the wafer to be compensated is the same as the first process path of a historically processed wafer in the wafer prediction compensation database; a search module, used to receive the extraction signal, search for the first deviation compensation value corresponding to the historically processed wafer, and output the first deviation compensation value of the historically processed wafer as the second deviation compensation value of the wafer to be compensated.

[0025] Optionally, the database acquisition unit includes: a grouping unit, used to group a number of the historically processed wafers to obtain a number of wafer groups, each of the wafer groups including at least one historically processed wafer; a first path acquisition unit, used to obtain the first process path of each of the historically processed wafers in the wafer group, and to associate the first process path with the wafer group; and a deviation compensation value acquisition unit, used to obtain the first deviation compensation value corresponding to each of the historically processed wafers in the wafer group.

[0026] Optionally, the grouping unit includes: a normalization processing module, used to perform normalization processing on several of the historically processed wafers to obtain several normalized wafers; a compensation value stripping module, used to perform compensation value stripping processing on several of the normalized wafers to obtain several initial state wafers; and a pure compensation value acquisition module, used to perform re-compensation processing on several of the initial state wafers to obtain the pure compensation value corresponding to each of the initial state wafers.

[0027] Optionally, the historically processed wafer includes a plurality of first measurement points, and each of the first measurement points corresponds to a first measurement value.

[0028] Optionally, the normalization processing module includes: a data fitting model, used to perform data fitting operation on the first measurement point and the first measurement value to obtain the normalized wafer, wherein the normalized wafer includes a plurality of second measurement points, and each second measurement point corresponds to a second measurement value.

[0029] Optionally, the compensation value stripping module includes: a historical compensation value acquisition module, used to obtain the historical compensation value corresponding to each of the normalized wafers at each of the second measurement points; a calculation module, used to subtract the corresponding historical compensation value from each of the second measurement values ​​on the normalized wafer to obtain the initial state wafer, wherein the initial state wafer includes a plurality of third measurement points, the third measurement points corresponding to the second measurement points, and each of the third measurement points corresponds to an initial deviation value.

[0030] Optionally, the pure compensation value acquisition module includes: a re-compensation model, used to obtain the pure compensation value corresponding to each of the initial state wafers.

[0031] Optionally, the grouping unit also includes: an image generation module, used to generate a corresponding visual image based on the pure compensation value corresponding to each of the initial state wafers; an image recognition processing module, used to perform image recognition processing on several of the visual images, and group several of the historically processed wafers according to the image recognition processing.

[0032] Optionally, the deviation compensation value acquisition unit includes: a weight distribution model, which is used to perform calculation processing on the pure compensation value of each of the historically processed wafers in the wafer group to obtain the first deviation compensation value.

[0033] Optionally, it also includes: a first path removal unit, used to remove a first interfering process path in the first process path.

[0034] Optionally, the first interfering process path includes: the first process path that does not produce overlay deviation when the wafer to be compensated is subjected to a semiconductor process.

[0035] Optionally, it also includes: a second path removal unit, used to remove the second interfering process path in the second process path.

[0036] Optionally, the second interfering process path includes: the second process path that does not produce overlay deviation when the historically processed wafer is subjected to a semiconductor process.

[0037] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0038] In the method for compensating for overlay deviation provided by the technical solution of the present invention, the second process path of the wafer to be compensated is obtained, and the second deviation compensation value of the wafer to be compensated is obtained by comparing the second process path of the wafer to be compensated with the wafer prediction compensation database. The compensation value of the wafer to be compensated can be predicted in advance through the wafer prediction compensation database, which effectively improves production efficiency. In addition, the first process path of each of the historically processed wafers in the wafer prediction compensation database is introduced as an influencing variable into the compensation for overlay deviation, which effectively improves the final compensation accuracy, reduces the risk of re-detection and compensation, and thus reduces production costs.

[0039] In the compensation system for overlay deviation provided by the technical solution of the present invention, a wafer prediction compensation database is obtained through a number of historically processed wafers, and is used to provide a predicted deviation compensation value for the wafer to be compensated; a second path acquisition unit is used to obtain the second process path of the wafer to be compensated; and a processing unit is used to compare the second process path of the wafer to be compensated with the wafer prediction compensation database to obtain the second deviation compensation value of the wafer to be compensated. The compensation value of the wafer to be compensated can be predicted in advance through the wafer prediction compensation database, which effectively improves production efficiency. In addition, the first process path of each of the historically processed wafers in the wafer prediction compensation database is introduced as an influencing variable into the compensation of overlay deviation, which effectively improves the final compensation accuracy, reduces the risk of re-detection and compensation, and thus reduces production costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 is a flow chart of a method for compensating overlay deviation according to an embodiment of the present invention;

[0041] Figures 2 to 10 It is a structural schematic diagram of each step in a method for compensating overlay deviation according to an embodiment of the present invention;

[0042] Fig.11 It is a schematic diagram of the structure of an overlay deviation compensation system according to an embodiment of the present invention. DETAILED DESCRIPTION

[0043] As described in the background art, there are still many problems in the prior art overlay deviation compensation process, which will be described in detail below.

[0044] The prior art overlay deviation compensation method simply associates the previous layer lithography exposure machine with the current layer lithography exposure machine, uses the feedback of the past measurement records of these combinations, and adopts a unified compensation amount to compensate the overlay deviation of all wafers.

[0045] Since the same batch of wafers undergo different process paths when undergoing semiconductor processes, such as thermal effect processes or etching processes, these different process paths will affect the morphology of the wafers themselves, and these effects will also cause certain overlay deviations. However, the prior art does not take the overlay deviation caused by the process path into account when performing compensation. Therefore, when a uniform compensation amount is used to compensate for the overlay deviation of all wafers in the batch, the overlay deviation compensation of some wafers will not meet the requirements, and re-detection and compensation are required. This process will not only result in high cost expenditures, but will also affect production capacity.

[0046] In order to solve the technical problem, an embodiment of the present invention provides a method for compensating for overlay deviation, obtaining the second process path of the wafer to be compensated, and comparing the first process path of the wafer to be compensated with the wafer prediction compensation database to obtain the second deviation compensation value of the wafer to be compensated. The wafer prediction compensation database can predict the compensation value of the wafer to be compensated in advance, which effectively improves production efficiency. In addition, the first process path of each of the historically processed wafers in the wafer prediction compensation database is introduced as an influencing variable into the compensation of overlay deviation, which effectively improves the final compensation accuracy, reduces the risk of re-detection and compensation, and thus reduces production costs.

[0047] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0048] Figure 1 It is a flow chart of a method for compensating overlay deviation according to an embodiment of the present invention.

[0049] Please refer to Figure 1 , the compensation method of the overlay deviation includes:

[0050] Step S11, providing a number of historically processed wafers;

[0051] Step S12, acquiring a wafer prediction compensation database according to the plurality of historically processed wafers, wherein the wafer prediction compensation database includes: a first process path corresponding to each of the historically processed wafers, and a first deviation compensation value corresponding to each of the historically processed wafers;

[0052] Step S13, providing a wafer to be compensated;

[0053] Step S14, obtaining a second process path of the wafer to be compensated;

[0054] Step S15, comparing the second process path of the wafer to be compensated with the wafer prediction compensation database to obtain a second deviation compensation value of the wafer to be compensated.

[0055] The following is a detailed description with reference to the accompanying drawings.

[0056] Figures 2 to 10 It is a structural schematic diagram of each step in the method for compensating overlay deviation in an embodiment of the present invention.

[0057] Please refer to Figure 2 , providing several historically processed wafers 100.

[0058] In this embodiment, the historically processed wafer 100 is a processed wafer used before the present compensation method. The compensation method for the historically processed wafer 100 is to use the previous layer lithography exposure machine and the current layer lithography exposure machine as an associated combination, and utilize the feedback of past measurement records of these combinations to use a unified compensation amount to perform overlay deviation compensation for all wafers.

[0059] In this embodiment, the historically processed wafer 100 is used to provide data samples for subsequent acquisition of a wafer prediction compensation database.

[0060] In this embodiment, the first historically processed wafer 100 provided has four different measurement methods, corresponding to four types of wafer morphologies as shown in the figure.

[0061] A plurality of historically processed wafers 100 are provided, and a wafer prediction compensation database is obtained according to the plurality of historically processed wafers 100. The wafer prediction compensation database includes: a first process path corresponding to each of the historically processed wafers 100, a first deviation compensation value corresponding to each of the historically processed wafers 100, and a wafer group corresponding to each of the historically processed wafers 100. For the specific process of obtaining the wafer prediction compensation database, please refer to Figures 3 to 8 .

[0062] The plurality of historically processed wafers are grouped to obtain a plurality of wafer groups, each of which includes at least one historically processed wafer. For the specific process of obtaining the wafer group, please refer to Figures 3 to 6 .

[0063] Please refer to Figure 3 , normalizing the plurality of historically processed wafers 100 to obtain a plurality of normalized wafers 200 .

[0064] In this embodiment, the historically processed wafer 100 includes a plurality of first measurement points, each of which corresponds to a first measurement value, wherein the first measurement value is a measurement value of the historically processed wafer after deviation compensation.

[0065] Since there may be many ways to select points when measuring several of the historically processed wafers 100, in this embodiment, the wafer morphology of 4 different measurement points is selected as an example. If the historically processed wafers 100 with different measurement points are not normalized, it is impossible to use subsequent image recognition to group the several historically processed wafers. Therefore, through the normalization process, the point selection methods of several historically processed wafers are unified, so that the position and number of the selected points of each of the historically processed wafers 100 are consistent, so that it is convenient to group them through subsequent image recognition.

[0066] In this embodiment, the method for obtaining the normalized wafer 200 includes: providing a data fitting model; performing data fitting operation on the first measurement point and the first measurement value according to the data fitting model to obtain the normalized wafer 200, wherein the normalized wafer 200 includes a plurality of second measurement points, and each second measurement point corresponds to a second measurement value.

[0067] Please refer to Figure 4 , performing compensation value stripping processing on the normalized wafers 200 to obtain a plurality of initial state wafers 300 .

[0068] In this embodiment, since the first measurement value is the measurement value of the historically processed wafer 100 after deviation compensation, the second measurement value obtained through the data fitting operation is also the measurement value after deviation compensation. Considering the variability of the compensation conditions used by each of the historically processed wafers 100 during exposure, the first measurement value finally obtained itself has a small difference and cannot reflect the difference before compensation. Therefore, it is necessary to strip off the compensation value of each of the historically processed wafers 100 and restore the initial state of each historically processed wafer 100. This is the true state of each historically processed wafer 100 after passing through a specific processing path and before exposure.

[0069] In this embodiment, the method for obtaining the initial state wafer 300 includes: obtaining the historical compensation value corresponding to each of the normalized wafers 200 at each of the second measurement points; subtracting the corresponding historical compensation value from each of the second measurement values ​​on the normalized wafer 200 to obtain the initial state wafer 300, wherein the initial state wafer 300 includes a plurality of third measurement points, the third measurement points corresponding to the second measurement points, and each of the third measurement points corresponds to an initial deviation value.

[0070] Please refer to Figure 5 , re-compensation processing is performed on a plurality of the initial state wafers 300 to obtain a pure compensation value 400 corresponding to each of the initial state wafers 300 .

[0071] In this embodiment, a unified compensation model is used to obtain a pure compensation value 400 for each historically processed wafer. The pure compensation value 400 results in compensating each of the historically processed wafers 100 to an optimal state as much as possible, or maintaining the difference from the optimal state at an acceptably low level.

[0072] In this embodiment, the method for obtaining the pure compensation value 400 corresponding to each of the initial-state wafers 300 includes: providing a re-compensation model; and obtaining the pure compensation value 400 corresponding to each of the initial-state wafers 300 according to the re-compensation model.

[0073] Please refer to Figure 6 , a plurality of the historically processed wafers 100 are grouped and processed according to the pure compensation value 400 .

[0074] In this embodiment, the method for grouping the plurality of historically processed wafers 100 according to the pure compensation value 400 includes: generating a corresponding visualization image for the pure compensation value 400 corresponding to each of the initial state wafers 300; performing image recognition processing on the plurality of visualization images, and grouping the plurality of historically processed wafers 100 according to the image recognition processing.

[0075] In this embodiment, not only can the pure compensation value 400 be used for grouping processing, but also the corresponding first deviation compensation value of each wafer group needs to be obtained according to the pure compensation value 400 later.

[0076] In this embodiment, the plurality of historically processed wafers 100 are divided into three groups, namely, group 1, group 2, and group 3, according to the pure compensation value 400.

[0077] In this embodiment, the method of generating a corresponding visualization image from the pure compensation value 400 corresponding to each of the initial state wafers 300 includes: producing an initial visualization image from the pure compensation value 400; adjusting the image size of the initial visualization image; removing redundant information on the initial visualization image and retaining only the line segments and arrows on the initial visualization image; and bolding the line segments and arrows on the initial visualization image to form the visualization image.

[0078] In this embodiment, the method for performing image recognition processing on the plurality of visualization images includes: using a deep convolutional embedded clustering (DCEC) method to extract features from the visualization images; and using a DBSCAN (Density-Based Spatial Clustering of Applications with Noise) method to cluster and group the extracted features.

[0079] Please refer to Figure 7 , obtaining a first process path of each of the historically processed wafers 100 in the wafer group, and associating the first process path with the wafer group.

[0080] In this embodiment, the first process path of the historically processed wafer 100 refers to the process technology performed on the historically processed wafer during the semiconductor process, such as a thermal effect process or an etching process, etc. These process technologies will also cause a certain overlay deviation. Therefore, by introducing the first process path as an influencing variable into the compensation of the overlay deviation, the final compensation accuracy is effectively improved, the risk of re-detection and compensation is reduced, and the production cost is reduced.

[0081] In this embodiment, the method of associating the first process path with the wafer group includes: obtaining the first process path of each of the historically processed wafers 100 in the wafer group; using the first process path of the identical historically processed wafers 100 that occupy the majority as the first process path associated with the wafer group, and removing the historically processed wafers 100 corresponding to the first process paths of the different historically processed wafers 100 that occupy the minority from the wafer group.

[0082] Through the association method, it can be ensured that the wafer group and the first process path form a unique corresponding relationship.

[0083] In this embodiment, the first process paths of several historically processed wafers 100 in group 1 are all path 1, the first process paths of several historically processed wafers 100 in group 2 are all path 2, and the first process paths of several historically processed wafers 100 in group 3 are all path 3.

[0084] In this embodiment, the process of acquiring the first process path further includes: removing a first interfering process path in the first process path.

[0085] In the present embodiment, the first interfering process path includes: a first process path that does not generate overlay deviation when the wafer to be compensated undergoes a semiconductor process.

[0086] According to process experience, in the semiconductor process, some process technologies will obviously not produce overlay deviation. If these first process paths that will not produce overlay deviation are also taken into account, a large number of historically processed wafers 100 are required to support the establishment of the wafer prediction compensation database. Therefore, the first process path corresponding to the process technology can be removed, thereby reducing the number of historically processed wafers 100 required to establish the wafer prediction compensation database, and also improving the efficiency of establishing the wafer prediction compensation database.

[0087] Please refer to Figure 8 , obtaining a first deviation compensation value corresponding to each historically processed wafer 100 in the wafer group.

[0088] Since there are a number of historically processed wafers 100 in each wafer group, it is not possible to use the pure compensation value 400 corresponding to a certain historically processed wafer 100 as the final first deviation compensation value. Therefore, in this embodiment, the method for obtaining the first deviation compensation value corresponding to each historically processed wafer 100 in the wafer group includes: providing a weight distribution model; performing calculation processing on the pure compensation value 400 of each historically processed wafer 100 in the wafer group according to the weight distribution model to obtain the first deviation compensation value.

[0089] In this embodiment, the obtained wafer prediction compensation database is shown in the following table:

[0090]

[0091]

[0092] Among them, Wafer#01~Wafer#07 are the numbers of the historically processed wafers 100, P1~P7 are the first process path numbers of each of the historically processed wafers 100, G1~G7 are the wafer group numbers of each of the historically processed wafers 100, and S1~S7 are the numbers of the first deviation compensation values ​​of each of the historically processed wafers 100.

[0093] Please refer to Fig. 9 After acquiring the wafer prediction compensation database, a wafer 500 to be compensated is provided.

[0094] In this embodiment, the wafer 500 to be compensated is a wafer that has undergone a semiconductor process. Each measuring point on the wafer 500 to be compensated has an overlay deviation, which needs to be compensated so that the overlay accuracy is within the deviation range.

[0095] Please refer to Fig.10 , obtaining a second process path of the wafer 500 to be compensated.

[0096] In this embodiment, the second process path of the wafer 500 to be compensated refers to the process technology performed on the wafer 500 to be compensated during the semiconductor process, such as a thermal effect process or an etching process.

[0097] In this embodiment, the process of acquiring the second process path further includes: removing a second interfering process path in the second process path.

[0098] In this embodiment, the second interference process path includes: the second process path that does not generate overlay deviation when the historically processed wafer is subjected to a semiconductor process.

[0099] Since the first interfering process path is removed in the process of establishing the wafer prediction compensation database, the second interfering process path in the second process path also needs to be removed accordingly.

[0100] After the second process path of the wafer 500 to be compensated is obtained, the second deviation compensation value of the wafer 500 to be compensated is obtained by comparing the second process path of the wafer 500 to be compensated with the wafer prediction compensation database.

[0101] In this embodiment, according to the comparison between the second process path of the wafer 500 to be compensated and the wafer prediction compensation database, the method for obtaining the second deviation compensation value of the wafer 500 to be compensated includes: when the obtained second process path of the wafer 500 to be compensated is the same as the second process path of a historically processed wafer in the wafer prediction compensation database, then the second deviation compensation value of the wafer 500 to be compensated is the first deviation compensation value of the historically processed wafer.

[0102] In this embodiment, the second process path of the wafer 500 to be compensated is obtained, and the second deviation compensation value of the wafer to be compensated is obtained by comparing the second process path of the wafer 500 to be compensated with the wafer prediction compensation database. The compensation value of the wafer 500 to be compensated can be predicted in advance through the wafer prediction compensation database, which effectively improves production efficiency. In addition, the first process path of each of the historically processed wafers 100 is introduced as an influencing variable into the compensation of the overlay deviation in the wafer prediction compensation database, which effectively improves the final compensation accuracy, reduces the risk of re-detection compensation, and thus reduces production costs.

[0103] After the first deviation compensation value of the wafer 500 to be compensated is obtained, the first deviation compensation value is used to perform deviation compensation processing on the wafer 500 to be compensated, so as to obtain a compensated wafer.

[0104] Correspondingly, an embodiment of the present invention further provides a compensation system for overlay deviation, please refer to Fig.11 , including: a database acquisition unit 100, which acquires a wafer prediction compensation database according to a number of historically processed wafers, wherein the wafer prediction compensation database includes: a first process path corresponding to each of the historically processed wafers, and a first deviation compensation value corresponding to each of the historically processed wafers, which is used to provide a predicted deviation compensation value for the wafer to be compensated; a second path acquisition unit 200, which is used to acquire a second process path of the wafer to be compensated; and a processing unit 300, which is used to compare the second process path of the wafer to be compensated with the wafer prediction compensation database to acquire the second deviation compensation value of the wafer to be compensated.

[0105] In this embodiment, the wafer prediction compensation database further includes: a wafer group corresponding to each of the historically processed wafers.

[0106] In this embodiment, the processing unit 300 includes: a comparison module 301, which is used to compare the wafer to be compensated with the wafer prediction compensation database, and generate a data extraction signal when the acquired second process path of the wafer to be compensated is the same as the first process path of a historically processed wafer in the wafer prediction compensation database; a search module 302, which is used to receive the extraction signal, search for the first deviation compensation value corresponding to the historically processed wafer, and output the first deviation compensation value of the historically processed wafer as the second deviation compensation value of the wafer to be compensated.

[0107] In this embodiment, the database acquisition unit 100 includes: a grouping unit 101, used to group a number of the historically processed wafers to obtain a number of wafer groups, each of the wafer groups including at least one historically processed wafer; a first path acquisition unit 102, used to obtain the first process path of each of the historically processed wafers in the wafer group, and associate the first process path with the wafer group; a deviation compensation value acquisition unit 103, used to obtain the first deviation compensation value corresponding to each of the historically processed wafers in the wafer group.

[0108] In this embodiment, the grouping unit 101 includes: a normalization processing module 1011, which is used to perform normalization processing on several of the historically processed wafers to obtain several normalized wafers; a compensation value stripping module 1012, which is used to perform compensation value stripping processing on several of the normalized wafers to obtain several initial state wafers; a pure compensation value acquisition module 1013, which is used to perform re-compensation processing on several of the initial state wafers to obtain the pure compensation value corresponding to each of the initial state wafers.

[0109] In this embodiment, the historically processed wafer includes a plurality of first measurement points, and each of the first measurement points corresponds to a first measurement value.

[0110] In this embodiment, the normalization processing module 1011 includes: a data fitting model, used to perform data fitting operation on the first measurement point and the first measurement value to obtain the normalized wafer, wherein the normalized wafer includes a plurality of second measurement points, and each second measurement point corresponds to a second measurement value.

[0111] In this embodiment, the compensation value stripping module 1012 includes: a historical compensation value acquisition module 10121, used to obtain the historical compensation value corresponding to each of the normalized wafers at each of the second measurement points; a calculation module 10122, used to subtract the corresponding historical compensation value from each of the second measurement values ​​on the normalized wafer to obtain the initial state wafer, wherein the initial state wafer includes a plurality of third measurement points, the third measurement points corresponding to the second measurement points, and each of the third measurement points corresponds to an initial deviation value.

[0112] In this embodiment, the pure compensation value acquisition module 1013 includes: a re-compensation model, which is used to obtain the pure compensation value corresponding to each of the initial state wafers.

[0113] In this embodiment, the grouping unit 101 also includes: an image generation module 1014, which is used to generate a corresponding visualization image according to the pure compensation value corresponding to each of the initial state wafers; an image recognition processing module 1015, which is used to perform image recognition processing on a number of the visualization images, and group a number of the historically processed wafers according to the image recognition processing.

[0114] In this embodiment, the deviation compensation value acquisition unit 103 includes: a weight distribution model, which is used to perform calculation processing on the pure compensation value of each of the historically processed wafers in the wafer group to obtain the first deviation compensation value.

[0115] In this embodiment, the method further includes: a first path removing unit 104, configured to remove a first interfering process path in the first process path.

[0116] In the present embodiment, the first interfering process path includes: the first process path that does not generate overlay deviation when the wafer to be compensated undergoes a semiconductor process.

[0117] In this embodiment, it further includes: a second path removing unit 201, which is used to remove a second interfering process path in the second process path.

[0118] In this embodiment, the second interference process path includes: the second process path that does not generate overlay deviation when the historically processed wafer is subjected to a semiconductor process.

[0119] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A method for compensating overlay deviation, characterized in that: include: Provides several historically processed wafers; A wafer prediction compensation database is obtained according to a number of the historically processed wafers, wherein the wafer prediction compensation database includes: a first process path corresponding to each of the historically processed wafers, and a first deviation compensation value corresponding to each of the historically processed wafers; wherein, The first process path refers to the process technology performed by the historically processed wafer during the semiconductor process; Providing a wafer to be compensated; Obtaining a second process path of the wafer to be compensated; wherein, The second process path refers to the process technology performed by the wafer to be compensated during the semiconductor process; According to the comparison between the second process path of the wafer to be compensated and the wafer prediction compensation database, a second deviation compensation value of the wafer to be compensated is obtained; wherein, The method for obtaining the second deviation compensation value of the wafer to be compensated by comparing the second process path of the wafer to be compensated with the wafer prediction compensation database includes: When the acquired second process path of the wafer to be compensated is the same as the first process path of a historically processed wafer in the wafer prediction compensation database, the second deviation compensation value of the wafer to be compensated is the first deviation compensation value of the historically processed wafer; The wafer prediction compensation database also includes: a wafer group corresponding to each of the historically processed wafers; a method for obtaining the wafer prediction compensation database includes: grouping a number of the historically processed wafers to obtain a number of wafer groups, each of which includes at least one of the historically processed wafers; obtaining a first process path of each of the historically processed wafers in the wafer group, and associating the first process path with the wafer group; obtaining a first deviation compensation value corresponding to each of the historically processed wafers in the wafer group; The method for grouping the plurality of historically processed wafers comprises: performing normalization processing on the plurality of historically processed wafers to obtain a plurality of normalized wafers; performing compensation value stripping processing on the plurality of normalized wafers to obtain a plurality of initial state wafers; performing re-compensation processing on the plurality of initial state wafers to obtain a pure compensation value corresponding to each of the initial state wafers; and grouping the plurality of historically processed wafers according to the pure compensation values; The historically processed wafer includes a plurality of first measurement points, each of which corresponds to a first measurement value; The method for obtaining the normalized wafer includes: providing a data fitting model; performing a data fitting operation on the first measurement point and the first measurement value according to the data fitting model to obtain the normalized wafer, wherein the normalized wafer includes a plurality of second measurement points, and each second measurement point corresponds to a second measurement value; The method for obtaining the initial state wafer includes: obtaining a historical compensation value corresponding to each of the normalized wafers at each of the second measurement points; subtracting the corresponding historical compensation value from each of the second measurement values ​​on the normalized wafer to obtain the initial state wafer, wherein the initial state wafer includes a plurality of third measurement points, the third measurement points correspond to the second measurement points, and each of the third measurement points corresponds to an initial deviation value; The method for obtaining the pure compensation value corresponding to each of the initial-state wafers includes: providing a re-compensation model; The pure compensation value corresponding to each of the initial-state wafers is obtained according to the re-compensation model.

2. The method for compensating overlay deviation as claimed in claim 1, characterized in that: The method for grouping several of the historically processed wafers according to the pure compensation value includes: generating a corresponding visualization image based on the pure compensation value corresponding to each of the initial state wafers; performing image recognition processing on several of the visualization images, and grouping several of the historically processed wafers according to the image recognition processing.

3. The method for compensating overlay deviation as claimed in claim 1, characterized in that: The method for obtaining the first deviation compensation value corresponding to each historically processed wafer in the wafer group includes: providing a weight distribution model; and performing calculation processing on the pure compensation value of each historically processed wafer in the wafer group according to the weight distribution model to obtain the first deviation compensation value.

4. The method for compensating overlay deviation as claimed in claim 1, characterized in that: The process of acquiring the first process path also includes: removing a first interfering process path in the first process path.

5. The method for compensating overlay deviation as claimed in claim 4, characterized in that: The first interfering process path includes: a first process path that will not generate overlay deviation when the wafer to be compensated undergoes a semiconductor process.

6. The method for compensating overlay deviation as claimed in claim 1, characterized in that: The process of acquiring the second process path also includes: removing a second interfering process path in the second process path.

7. The method for compensating overlay deviation as claimed in claim 6, characterized in that: The second interference process path includes: the second process path that will not produce overlay deviation when the historically processed wafer is subjected to a semiconductor process.

8. The method for compensating overlay deviation as claimed in claim 1, characterized in that: After obtaining the first deviation compensation value of the wafer to be compensated, the method further includes: performing deviation compensation processing on the wafer to be compensated by using the first deviation compensation value to obtain a compensated wafer.

9. A compensation system for overlay deviation, characterized in that: include: A database acquisition unit acquires a wafer prediction compensation database according to a number of historically processed wafers, wherein the wafer prediction compensation database includes: a first process path corresponding to each of the historically processed wafers, and a first deviation compensation value corresponding to each of the historically processed wafers, for providing a prediction deviation compensation value for the wafer to be compensated; wherein, The first process path refers to the process technology performed by the historically processed wafer during the semiconductor process; The second path acquisition unit is used to acquire the second process path of the wafer to be compensated; wherein, The second process path refers to the process technology performed by the wafer to be compensated during the semiconductor process; A processing unit, used to compare the second process path of the wafer to be compensated with the wafer prediction compensation database to obtain a second deviation compensation value of the wafer to be compensated; wherein the processing unit includes: A comparison module, used for comparing the wafer to be compensated with the wafer prediction compensation database, and generating a data extraction signal when the acquired second process path of the wafer to be compensated is the same as the first process path of a historically processed wafer in the wafer prediction compensation database; A search module, configured to receive the extraction signal, search for a first deviation compensation value corresponding to the historically processed wafer, and output the first deviation compensation value of the historically processed wafer as a second deviation compensation value of the wafer to be compensated; The wafer prediction compensation database also includes: a wafer group corresponding to each of the historically processed wafers; the database acquisition unit includes: a grouping unit, used to group a number of the historically processed wafers to obtain a number of wafer groups, each of which includes at least one of the historically processed wafers; a first path acquisition unit, used to obtain a first process path of each of the historically processed wafers in the wafer group, and associate the first process path with the wafer group; a deviation compensation value acquisition unit, used to obtain a first deviation compensation value corresponding to each of the historically processed wafers in the wafer group; The grouping unit includes: a normalization processing module, used to perform normalization processing on a number of the historically processed wafers to obtain a number of normalized wafers; a compensation value stripping module, used to perform compensation value stripping processing on a number of the normalized wafers to obtain a number of initial state wafers; a pure compensation value acquisition module, used to perform re-compensation processing on a number of the initial state wafers to obtain a pure compensation value corresponding to each of the initial state wafers; The historically processed wafer includes a plurality of first measurement points, each of which corresponds to a first measurement value; The normalization processing module includes: a data fitting model, which is used to perform a data fitting operation on the first measurement point and the first measurement value to obtain the normalized wafer, wherein the normalized wafer includes a plurality of second measurement points, and each second measurement point corresponds to a second measurement value; The compensation value stripping module includes: a historical compensation value acquisition module, used to acquire the historical compensation value corresponding to each of the normalized wafers at each of the second measurement points; a calculation module, used to subtract the corresponding historical compensation value from each of the second measurement values ​​on the normalized wafer to acquire the initial state wafer, wherein the initial state wafer includes a plurality of third measurement points, the third measurement points correspond to the second measurement points, and each of the third measurement points corresponds to an initial deviation value; The pure compensation value acquisition module includes: a re-compensation model, which is used to obtain the pure compensation value corresponding to each of the initial state wafers.

10. The overlay deviation compensation system according to claim 9, characterized in that: The grouping unit also includes: an image generation module, which is used to generate a corresponding visual image from the pure compensation value corresponding to each of the initial state wafers; an image recognition processing module, which is used to perform image recognition processing on a number of the visual images, and group a number of the historically processed wafers according to the image recognition processing.

11. The overlay deviation compensation system according to claim 9, characterized in that: The deviation compensation value acquisition unit includes: a weight distribution model, which is used to perform calculation processing on the pure compensation value of each of the historically processed wafers in the wafer group to obtain the first deviation compensation value.

12. The overlay deviation compensation system according to claim 9, characterized in that: Also includes: The first path removing unit is used to remove a first interfering process path in the first process path.

13. The overlay deviation compensation system according to claim 12, characterized in that: The first interfering process path includes: the first process path that will not generate overlay deviation when the wafer to be compensated is subjected to a semiconductor process.

14. The overlay deviation compensation system according to claim 9, characterized in that: Also includes: The second path removing unit is used to remove a second interfering process path in the second process path.

15. The overlay deviation compensation system according to claim 14, characterized in that: The second interference process path includes: the second process path that will not produce overlay deviation when the historically processed wafer is subjected to a semiconductor process.

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