An automatic signal sampling circuit

Abstract

The present invention relates to a signal automatic sampling circuit, belonging to the field of DC control protection devices. The signal automatic sampling circuit provided by the present invention includes three sampling terminals: a positive sampling terminal, a negative sampling terminal, and a self-checking terminal. The positive sampling terminal is connected to a gating device, which is controlled by a controller. The self-checking terminal can detect the on / off state of the sampling circuit in real time, and thus can control the resistance value of the resistor connected to the sampling circuit, so as to dynamically expand the signal range of the signal automatic sampling circuit at any time and realize the sampling of current or voltage signals of different magnitudes. The present invention can realize signal acquisition without signal amplification or attenuation, thus ensuring the accuracy and continuity of the acquired signal. It can also realize seamless connection between large signals and small signals. Moreover, the hardware circuit adopted by the present invention has a simple structure and low cost.

Description

Technical Field

[0001] The present invention relates to a signal automatic sampling circuit, belonging to the field of DC control and protection devices. Background Art

[0002] For the design of the sampling circuit of DC protection devices and the current and voltage sampling circuits of new energy power systems, currently, high-precision sampling is mainly achieved through the following three methods:

[0003] 1) Embedding a high-precision, low zero-drift, multi-sampling-bit AD sampling chip inside the device's hardware. Although this method uses a high-precision, low zero-drift multi-bit AD chip, it results in the complexity of the hardware design circuit, expands the spatial position, and increases the hardware cost. Moreover, it requires a relatively large hardware volume and high cost, restricting the application space and scope of the chip.

[0004] 2) Using a multi-channel operational amplifier circuit chip in the device's hardware sampling circuit to first amplify and condition the input current and voltage signals, and then perform sampling in a way of reducing and conditioning for restoration. Although this method realizes sampling through the method of amplification and reduction for restoration, due to the inherent problems of the AD chip itself, the sampling process cannot be restored 100%, thus restricting and attenuating the precision range of the AD chip and reducing the precision value.

[0005] 3) Through the method of multi-channel resampling of the same current and voltage signal, sampling a section of sampling values for each channel to ensure the real-time stability of the current and voltage signals. Although this method can achieve high-precision sampling, it also uses a multi-channel sampling circuit, increasing the number of external wiring, increasing the external cost, and increasing the probability of accidents.

[0006] The Chinese patent document with the authorization announcement number CN108693495B discloses a sampling adaptive DC electronic current transformer detection converter, which realizes the conversion of large current signals into small voltage signals for input and keeps small current or small voltage signals input to the circuit at their original numerical values by controlling the switching between multiple channels of a multiplexer through a control module. However, the sampling switching between large current and small current in this comparative document cannot be carried out continuously, resulting in some defects in the circuit during the sampling process. Summary of the Invention

[0007] The purpose of the present invention is to provide a signal automatic sampling circuit to solve the problem that the existing sampling circuit cannot continuously sample between large signals and small signals.

[0008] To achieve the above purpose, the technical solutions of the present invention and the corresponding beneficial effects include:

[0009] An automatic signal sampling circuit of the present invention includes a controller, a positive sampling terminal, a negative sampling terminal, a switch gating device, a voltage dividing branch, and two operational amplifiers. Two voltage dividing resistors are serially arranged on the voltage dividing branch. The two operational amplifiers are a first operational amplifier and a second operational amplifier respectively, and the two voltage dividing resistors are a first voltage dividing resistor and a second voltage dividing resistor respectively. The switch gating device includes a fixed terminal, a first gating terminal, and a second gating terminal. The controller is connected to control the switch gating device to achieve the connection between the fixed terminal and the first gating terminal or the connection between the fixed terminal and the second gating terminal. The fixed terminal of the switch gating device is connected to the positive sampling terminal. One end of the voltage dividing branch is connected to the first gating terminal of the switch gating device. The voltage dividing point of the voltage dividing branch is connected to the second gating terminal of the switch gating device. The other end of the voltage dividing branch is connected to the negative sampling terminal. The two ends of the first voltage dividing resistor are respectively connected to the non-inverting input terminal and the inverting input terminal of the first operational amplifier. The two ends of the second voltage dividing resistor are respectively connected to the non-inverting input terminal and the inverting input terminal of the second operational amplifier. The output terminals of the first operational amplifier and the second operational amplifier are both connected to the controller.

[0010] The beneficial effects of the above technical solution are as follows: The automatic signal sampling circuit provided by the present invention includes two sampling terminals: a positive sampling terminal and a negative sampling terminal. The positive sampling terminal is connected to the gating device. By controlling the gating device with the controller, the resistance value connected to the sampling circuit can be controlled, so that the signal path of the automatic signal sampling circuit can be switched at any time, realizing the extension of the sampling current or voltage signal range. The present invention can realize signal acquisition without signal amplification and reduction, thus ensuring the accuracy of the acquired signal. It can also realize seamless sampling between large signals and small signals. Moreover, the hardware circuit adopted by the present invention has a simple structure and low cost.

[0011] Further, when the signal values sampled by the positive sampling terminal and the negative sampling terminal are less than the set value, the controller controls the connection between the fixed terminal and the second gating terminal of the switch gating device; when the signal values sampled by the positive sampling terminal and the negative sampling terminal are greater than or equal to the set value, the controller controls the connection between the fixed terminal and the first gating terminal of the switch gating device.

[0012] The beneficial effects of the above technical solution are as follows: According to the size of the sampled signal, the controller controls the gating device to work in different working states, so as to ensure timely and accurate conversion when sampling large signals to sampling small signals or sampling small signals to sampling large signals.

[0013] Further, the controller is connected to the switch gating device through a seamless sampling switching device. The seamless sampling switching device includes a third operational amplifier and a logic gate. The non-inverting input terminal of the third operational amplifier is connected to the output terminal of the first operational amplifier. The inverting input terminal of the third operational amplifier is connected to the controller. The output terminal of the third operational amplifier is connected to the first input terminal of the logic gate. The controller is connected to the second input terminal of the logic gate. The output terminal of the logic gate is controllably connected to the switch gating device. When the signal output by the first operational amplifier is less than the set value, the fixed terminal is connected to the first gating terminal; when the signal output by the first operational amplifier is greater than or equal to the set value, the fixed terminal is connected to the second gating terminal.

[0014] The beneficial effect of the above technical solution is that the level signal output by the controller and the level signal output by the first operational amplifier are compared in real time through the third operational amplifier, avoiding the occurrence of sampling error phenomena during short-circuit power-on.

[0015] Further, the switch gating device includes a first control switch and a second control switch. Both the first control switch and the second control switch include a control terminal, an input terminal, and an output terminal. The control terminals of the first control switch and the second control switch are both connected to the controller, and the controller controls to make the first control switch conduct and the second control switch turn off, or the second control switch conduct and the first control switch turn off. The output terminal of the first control switch is connected to the voltage dividing point of the voltage dividing branch. The output terminal of the second control switch is connected to one end of the voltage dividing branch. The input terminals of the first control switch and the second control switch are both connected to the positive sampling terminal.

[0016] Further, both the first control switch and the second control switch are triodes. The control terminal, input terminal, and output terminal included in both the first control switch and the second control switch respectively correspond to the base, collector, and emitter of the triode.

[0017] Further, it also includes a self-checking test terminal, and the self-checking test terminal is connected to one end of the voltage dividing branch.

[0018] The beneficial effect of the above technical solution is that the present invention additionally designs a self-checking test terminal, so that internal self-checking of the circuit can be realized. Through the self-checking test terminal, the continuity, integrity, and effectiveness of the circuit current and voltage signal paths can be verified, thus ensuring the stability and reliability of the circuit.

[0019] Further, the logic gate is a NAND gate.

[0020] The beneficial effect of the above technical solution is that the logic gate controls the triode in the form of a NAND gate, and the controller is used to control the NAND gate to achieve seamless, high-precision, and continuous sampling of current and voltage.

[0021] Further, the output terminals of the first operational amplifier and the second operational amplifier are both connected to the controller through a VF conversion module.

[0022] The beneficial effects of the above technical solution are as follows: The VF conversion circuit is used to convert the signal output by the operational amplifier into a frequency signal and send it to the controller, instead of using traditional AD sampling, which saves costs and reduces the PCB space, achieving wide-range signal sampling.

[0023] Further, a protection branch is also provided between the positive sampling terminal and the negative sampling terminal. A first reverse protection diode is connected in series on the protection branch, and the anode of the first reverse protection diode is connected to the negative sampling terminal; a second reverse protection diode is connected in series on the connection line between the self-checking terminal and one end of the voltage dividing branch, and the anode of the second reverse protection diode is connected to the self-checking terminal.

[0024] The beneficial effects of the above technical solution are as follows: By setting a reverse protection diode between the positive sampling terminal and the negative sampling terminal, it can effectively prevent the reverse current from flowing into the positive sampling terminal and ensure the safety of the circuit. At the same time, by setting a reverse protection diode at the self-checking terminal, it can prevent the current and voltage signals in the sampling circuit from being reversely input into the self-checking port.

[0025] Further, a first filtering module is provided on the connection line between the first voltage dividing resistor and the first operational amplifier; a second filtering module is provided on the connection line between the second voltage dividing resistor and the second operational amplifier; a third filtering module is provided on the connection line between the output terminals of the first operational amplifier and the second operational amplifier and the VF conversion module.

[0026] The beneficial effects of the above technical solution are as follows: By setting a filtering circuit between the voltage dividing branch and the operational amplifier, the output signal of the operational amplifier can be made more accurate. At the same time, by setting a filtering circuit between the operational amplifier and the VF conversion circuit, the current and voltage signals entering the VF conversion circuit can be made more accurate, thereby ensuring the accuracy of current and voltage sampling. Description of the Drawings

[0027] Figure 1 is the principle block diagram of the signal automatic sampling circuit of the present invention;

[0028] Figure 2 is the electrical circuit diagram of the signal automatic sampling circuit of the present invention;

[0029] Figure 3 is the circuit timing diagram of the signal automatic sampling circuit of the present invention. Detailed Embodiments

[0030] The present invention will be further described in detail below with reference to the drawings and embodiments.

[0031] Embodiment:

[0032] The present invention provides a signal automatic sampling circuit, the schematic diagram Figure 1 is shown as follows, including an inspection circuit, a two-stage sampling input circuit (the two-stage sampling input circuit is a seamlessly extended sampling input circuit), and a one-stage sampling input circuit (the one-stage sampling input circuit is a high-precision sampling input circuit). The sampling input control circuit is connected to the one-stage sampling input circuit and the two-stage sampling input circuit in a controlled manner. The one-stage sampling input circuit is connected to a one-stage sampling filter conditioning circuit, and after filtering and conditioning, it is output to a VF conversion circuit through a one-stage sampling output circuit. The two-stage sampling input circuit is connected to a two-stage sampling filter conditioning circuit, and after filtering and conditioning, it is output to the VF conversion circuit through a two-stage sampling output circuit. The inspection circuit is connected to the two-stage sampling filter circuit through a protection circuit, and the effectiveness of the internal current and voltage signal paths of the circuit is verified through the inspection circuit.

[0033] By controlling the one-stage sampling input circuit and the two-stage sampling input circuit through a sampling input control single path, the signal paths of the current and voltage sampling currents can be freely switched at any time, and the current and voltage signals output by the two-stage sampling output circuit and the one-stage sampling output circuit no longer need to be amplified or reduced. The high-precision sampling of the current and voltage is ensured through the VF conversion circuit.

[0034] Specifically, the circuit diagram of the signal automatic sampling circuit of the present invention is as Figure 2As shown in the figure, the signal automatic sampling circuit of the present invention is mainly used for sampling current or voltage. The A1 terminal and the COM terminal are the positive sampling terminal and the negative sampling terminal respectively. The A1 terminal is sequentially connected to the first triode Q100, the resistor R100 and the COM terminal to form a section of sampling input circuit; the A1 terminal is sequentially connected to the second triode Q200, the resistor R200, the resistor R100 and the COM terminal to form a second section of sampling input circuit. The bases of the first triode Q100 and the second triode Q200 are connected to VC through R103. At the same time, the bases of the first triode Q100 and the second triode Q200 are also connected to the input terminal of the NAND gate. A section of sampling filter conditioning circuit (also called the first filter module) composed of the resistor R102 and the capacitor C102, and a second section of sampling filter conditioning circuit (also called the second filter module) composed of the resistor R101 and the capacitor C100. The output terminal of the first triode Q100 in the first section of sampling input circuit is connected to the non-inverting input terminal of the first operational amplifier (the first operational amplifier is a high-precision operational amplifier) U11 through the first section of sampling filter circuit, and the inverting input terminal of the first operational amplifier U11 is connected to the COM terminal; the output terminal of the second triode Q200 in the second section of sampling input circuit is connected to the non-inverting input terminal of the second operational amplifier U12 through the second section of sampling filter circuit, and the inverting input terminal of the second operational amplifier (the second operational amplifier is a seamless extended operational amplifier) U12 is connected to the COM terminal through the resistor R102 and the resistor R100. The output terminal of the first operational amplifier U11 is connected to the I2 terminal of the VF conversion circuit through a filter circuit composed of the resistor R106 and the capacitor C103, and the output terminal of the second operational amplifier U12 is connected to the I1 terminal of the VF conversion circuit through a filter circuit composed of the resistor R105 and the capacitor C104. The output terminal of the first operational amplifier U11 is also connected to the non-inverting input terminal of the third operational amplifier (the third operational amplifier is a rail-to-rail operational amplifier) at the same time. The inverting input terminal of the third operational amplifier forms a stable level signal through voltage division by the pull-up resistor R109 and the pull-down resistor R110. This level signal is controlled by the controller, and this level signal needs to be filtered through the filter module formed by R108 and C105. The output terminal of the third operational amplifier is connected to the first input terminal of the NAND gate. The second input terminal of the NAND gate is connected to VC through R111 and is also directly connected to the controller. The level signal sent by the controller is filtered through the filter module formed by R104 and C101 and then input. The VF conversion circuit converts the current and voltage signals sampled by the first section of sampling input circuit and the second section of sampling input circuit into frequency signals and sends them to the CPU.

[0035] Among them, the first triode Q100 is an NPN type triode, and the second triode Q200 is a PNP type triode. The VC power supply connected to the second input terminal of the NAND gate, the VC power supply connected to the third operational amplifier, and the VC power supply connected to the output terminal of the NAND gate are the same VC power supply.

[0036] The signal automatic sampling circuit of the present invention further includes a self-check test terminal A2, and the A2 terminal is connected to the output terminal of the second triode Q200 through a second anti-reverse diode D1. And to protect the safety of the circuit, the present invention also sets a protection branch between the A1 terminal and the COM terminal. A first anti-reverse diode D3 is connected in series on the protection branch, and an anti-reverse diode D2 is connected in the circuit between the control terminal of the first triode Q100 and the resistor R103. The anode of the second anti-reverse diode D1 is connected to the A2 terminal, the anode of the first anti-reverse diode D3 is connected to the COM terminal, and the anode of the anti-reverse diode D2 is connected to one end where the logic gate is located. The second anti-reverse diode D1 is used to prevent the sampling circuit from inverting and outputting to the self-check test port, avoiding the introduction of misoperation electrical signals. The first anti-reverse diode D3 is used to ensure direct conduction of the circuit and avoid the generation of error signals. The anti-reverse diode D2 is used to prevent the sampling voltage from being connected in series to the internal power supply system of the device.

[0037] The signal automatic sampling circuit of the present invention is connected to the high-precision follower circuit of the DC protection device. When the DC protection device is powered on and the sampled current or voltage is less than the set value, a VCC power supply is generated inside the DC protection device. The VCC power supply is a high-level signal. At this time, the level signal connected to the inverting input terminal of the third operational amplifier is greater than the level signal of the non-inverting input terminal, so the third operational amplifier is not turned on. Then, the input of the first input terminal of the NAND gate is at a low level, and the input of the second input terminal of the NAND gate is at a high level. After performing the NAND operation on the two, the output is at a high level. The output terminal of the NAND gate and the VC power supply connected to the output terminal of the NAND gate are both at a high level, making the first triode Q100 turned on and the second triode Q200 turned off, thus ensuring that the first-stage sampling input circuit is turned on and the second-stage sampling input circuit is cut off. At this time, the first-stage sampling input circuit is used to sample the current and voltage. The current and voltage signals generated by the resistor R100 in the first-stage sampling input circuit are applied to the non-inverting input terminal of the first operational amplifier U11 through the first-stage sampling filter conditioning circuit. The sampled current or voltage is input to the VF conversion circuit through the first operational amplifier U11, and the current or voltage signal is converted into a frequency by the VF conversion circuit and sent to the CPU.

[0038] When the sampled current or voltage is greater than the set value, the level signal at the non-inverting input terminal of the third operational amplifier is greater than the level signal of the input VCC at the inverting input terminal, and the third operational amplifier conducts. Then, the output terminal of the third operational amplifier outputs a high level. At this time, the first input terminal of the NAND gate is at a high level, and the second input terminal is at a high level. After performing NAND processing on the two, the output is a low level. The low level output from the output terminal of the NAND gate directly turns off the first triode Q100 and turns on the second triode Q200, thereby ensuring that the first-stage sampling input circuit is cut off and the second-stage sampling input circuit is turned on, realizing the automatic switching from small-signal sampling to large-signal sampling. At this time, the current and voltage are sampled using the second-stage sampling input circuit. The current and voltage signals generated by the second-stage sampling input circuit at the resistor R200 are applied to the non-inverting input terminal of the second operational amplifier U12 through the second-stage sampling filter conditioning circuit, and the sampled current or voltage is input to the VF conversion circuit through the second operational amplifier U12; the current and voltage signals generated by the second-stage sampling input circuit at the resistor R100 are applied to the non-inverting input terminal of the first operational amplifier U11 through the first-stage sampling filter conditioning circuit, and the sampled current or voltage is input to the VF conversion circuit through the first operational amplifier U11. The current or voltage signal is converted into a frequency by the VF conversion circuit and sent to the CPU.

[0039] An analog sampling signal is directly applied between the A2 terminal and the COM terminal, which can generate an input signal between both the first operational amplifier U11 and the second operational amplifier U12. When there is no large sampling signal during the circuit debugging process, the A2 terminal is used to verify the correctness of the signal automatic sampling circuit.

[0040] As Figure 3 Shown is the circuit timing diagram of the signal automatic sampling circuit of the present invention. The voltage sampling linearly increases with time. When in the first-stage sampling input circuit, the sampled current or voltage is less than the set value, and the frequency converted by the VF conversion circuit is slower; when in the second-stage sampling input circuit, the sampled current or voltage is greater than the set value, and the frequency converted by the VF conversion circuit is faster.

[0041] The signal automatic sampling circuit provided by the present invention can achieve high-precision current and voltage sampling, and only uses a method of sampling one path of current and voltage signals with three terminals. There is no signal attenuation problem in the present invention, and no external leads need to be added, which not only reduces costs but also saves layout space.

[0042] In this embodiment, both the first operational amplifier U11 and the second operational amplifier U12 are connected to the controller CPU through the VF conversion circuit. As other embodiments, both the first operational amplifier U11 and the second operational amplifier U12 can also be connected to the controller CPU through the AD conversion circuit.

[0043] In this embodiment, the switch gating device includes two triodes, namely the first triode Q100 and the second triode Q200. During the operation of the entire sampling circuit, the controller CPU controls one of the two triodes to conduct. As another implementation, the two triodes can be replaced with other power devices, such as field effect transistors, etc., and their working mode is also to conduct alternately, and the function of the switch gating device can also be achieved.

[0044] In this embodiment, multiple filter conditioning circuits are provided, all of which are RC filter circuits. As another implementation, these filter conditioning circuits can be set as other filter circuits in the prior art, such as LCL filter circuits.

[0045] The signal automatic sampling circuit provided by the present invention can achieve seamless and continuous sampling between different input signals, and can also achieve 1:1 sampling, avoiding signal distortion; moreover, the sampling circuit of the present invention saves costs and reduces the PCB space, and the VF conversion circuit used in the sampling circuit can achieve wide-range signal sampling; in addition, the self-checking terminal of the present invention can detect the conduction and disconnection of the sampling circuit.

Claims

1. An automatic signal sampling circuit, characterized in that, It includes a controller, a positive sampling terminal, a negative sampling terminal, a switch gating device, a voltage dividing branch, and two operational amplifiers. Two voltage dividing resistors are serially arranged on the voltage dividing branch. The two operational amplifiers are the first operational amplifier and the second operational amplifier respectively, and the two voltage dividing resistors are the first voltage dividing resistor and the second voltage dividing resistor respectively; The switch gating device includes a fixed terminal, a first gating terminal, and a second gating terminal. The controller controls and connects the switch gating device through a seamless sampling switching device to realize the connection between the fixed terminal and the first gating terminal or the connection between the fixed terminal and the second gating terminal; The fixed terminal of the switch gating device is connected to the positive sampling terminal, one end of the voltage dividing branch is connected to the first gating terminal of the switch gating device, the voltage dividing point of the voltage dividing branch is connected to the second gating terminal of the switch gating device, and the other end of the voltage dividing branch is connected to the negative sampling terminal; The seamless sampling switching device includes a third operational amplifier and a NAND gate. The non-inverting input terminal of the third operational amplifier is connected to the output terminal of the first operational amplifier. The controller controls the level signal to connect to the inverting input terminal of the third operational amplifier through this level signal. The output terminal of the third operational amplifier is connected to the first input terminal of the NAND gate. The controller issues a level signal to connect to the second input terminal of the NAND gate. The output terminal of the NAND gate is connected to the switch gating device; When the signal output by the first operational amplifier is less than the set value, the third operational amplifier outputs a low level, and the NAND gate outputs a high level, and the fixed terminal and the second gating terminal are connected; Otherwise, the third operational amplifier outputs a high level, the NAND gate outputs a low level, and the fixed terminal and the first gating terminal are connected; The two ends of the first voltage dividing resistor are respectively connected to the non-inverting input terminal and the inverting input terminal of the first operational amplifier. The two ends of the second voltage dividing resistor are respectively connected to the non-inverting input terminal and the inverting input terminal of the second operational amplifier. The output terminals of the first operational amplifier and the second operational amplifier are both connected to the controller.

2. The signal automatic sampling circuit according to claim 1, wherein The inverting input terminal of the third operational amplifier is also connected to the power supply through a pull-up resistor and grounded through a pull-down resistor.

3. The signal automatic sampling circuit according to claim 1, wherein The switch gating device includes a first control switch and a second control switch. The first control switch and the second control switch both include a control terminal, an input terminal, and an output terminal; The control terminals of the first control switch and the second control switch are both connected to the output terminal of the NAND gate. It is controlled by the NAND gate to realize the conduction of the first control switch and the cut-off of the second control switch, or the conduction of the second control switch and the cut-off of the first control switch. The output terminal of the first control switch is connected to the voltage dividing point of the voltage dividing branch. The output terminal of the second control switch is connected to one end of the voltage dividing branch. The input terminals of the first control switch and the second control switch are both connected to the positive sampling terminal.

4. The signal automatic sampling circuit according to claim 3, wherein The first control switch and the second control switch are both triodes. The control terminal, the input terminal, and the output terminal included in the first control switch and the second control switch respectively correspond to the base, the collector, and the emitter of the triode.

5. The signal automatic sampling circuit according to claim 1, wherein It also includes a self-checking terminal, and the self-checking terminal is connected to one end of the voltage dividing branch.

6. The signal automatic sampling circuit according to claim 1, wherein The second input terminal of the NAND gate is also connected to the power supply through a resistor and grounded through a capacitor.

7. The signal automatic sampling circuit according to claim 1, wherein The output terminals of the first operational amplifier and the second operational amplifier are both connected to the controller through a VF conversion module.

8. The signal automatic sampling circuit according to claim 5, wherein, A protection branch is also provided between the positive electrode sampling terminal and the negative electrode sampling terminal. A first reverse protection diode is connected in series on the protection branch, and the anode of the first reverse protection diode is connected to the negative electrode sampling terminal; a second reverse protection diode is connected in series on the connection line between the self-check test terminal and one end of the voltage division branch, and the anode of the second reverse protection diode is connected to the self-check test terminal.

9. The signal automatic sampling circuit according to claim 7, wherein A first filtering module is provided on the connection line between the first voltage dividing resistor and the first operational amplifier; a second filtering module is provided on the connection line between the second voltage dividing resistor and the second operational amplifier; a third filtering module is provided on the connection line between the output terminals of the first operational amplifier and the second operational amplifier and the VF conversion module.

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