TAS asynchronous call implementation system and method
The TAS asynchronous call implementation addresses the inefficiencies in existing technologies by reducing delay and jitter in TSN networks, thereby enhancing network scalability and bandwidth efficiency.
Patent Information
- Application Number
- CN202210236697.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-03-10
- Publication Date
- 2024-12-17
- Estimated Expiration
- 2042-03-10
AI Technical Summary
Existing TSN implementations suffer from increased delay and jitter due to queuing and scheduling, particularly when the number of channels or queues is large, leading to restricted network capacity and reduced effective data transmission bandwidth.
The TAS asynchronous call implementation system separates the TAS algorithm from the queue scheduling module and incorporates FIFOs and gates in independent TAS modules at each sending port, asynchronously executing the TAS algorithm to reduce delay and jitter.
This approach significantly reduces jitter and maintains effective network bandwidth, enhances network scalability and expands the effective network bandwidth, and improves the effective network bandwidth.
Smart Images
Figure CN114866493B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of Ethernet time-sensitive network (TSN) implementation, and in particular to a TAS asynchronous call implementation system and method. Background Art
[0002] The IEEE 802.1 TSN task group defines a time-sensitive network, which builds a highly reliable deterministic network with ultra-low latency and jitter through a set of protocol specifications. Based on 802.1AS time synchronization, 802.1Qci, 802.1Qbv and other protocol specifications achieve time determinism and the simultaneous transmission of periodic and non-periodic data by simulating time division multiplexing (TDM).
[0003] 802.1Qbv describes the time-sensitive scheduling algorithm (TAS), which mainly sets a gate switch for each queue in the outbound direction. Through the opening and closing operations of the gate, a time window sequence for message transmission is formed, and periodic time-sensitive data is sent out from the queue within the corresponding time window to avoid interference from non-time-sensitive data and other time-sensitive data, thereby reducing the delay while ensuring the maximum delay.
[0004] When the protocol is implemented using hardware (such as ASIC / FPGA / NPU, etc.) in the switching node, gating and queue scheduling are usually implemented together, such as Figure 1 As shown in the system structure, after RxMac (receiving port) receives the message, RxArbiter selects a message according to the arbitration algorithm in the incoming direction and inserts it into the Packet Processing Pipeline (data packet processing pipeline) for message processing, and then sends it to the Queue / Schedule / TxSelector module, and implements the gating function in this module, such as Figure 2 As shown in the queue gating structure, after the message enters the queue, a scheduling module executes the message scheduling algorithm. The implementation of the scheduling module is generally to add gated scheduling (TAS) on the basis of the original message scheduling algorithm such as CBS (credit-based scheduling algorithm) and SP (strict priority scheduling), that is, to assign a gate to each queue, and schedule the message by polling the gate or gate timer event (gate switch event). The scheduled message is sent out through TxMac (sending port).
[0005] The above prior art generally selects a channel between channels (channels usually correspond to ports or virtual ports) through WFQ (weighted fair queuing) or approximate algorithms such as WDRR (weighted difference round robin), and then schedules the valid messages under the channel according to the scheduling algorithm configured on the queue and the gate switch state.
[0006] This method will generate certain delay and jitter due to round-robin, namely queuing delay and jitter, especially when the number of channels or queues is large. For example, in a system with 64 channels, in the worst case, at the same time, except for channel 0, all other channels have TSN messages to be sent. The scheduler is currently working on channel 0. Queue 6 on channel 0 contains the TSN message to be sent. The gate of the queue where the TSN message is located can be opened with a difference of 30ns, thus missing this round of scheduling. If each channel is scheduled annel takes 50ns, so when it is scheduled to channel0 again, 3.15us (63*50ns) has passed. Therefore, the TSN message of queue6 on channel0 can be scheduled out 3.1us (3.15us-50ns) later than the ideal situation. In order to correctly schedule the TSN message on queue6 in this round of scheduling, it is necessary to increase the TSN window to cover the maximum delay caused by round-robin scheduling when configuring and planning the TSN window. The result of this is to increase the TSN message delay and jitter, and also reduce the effective data transmission bandwidth. The jitter will accumulate with the increase of the number of hops. If the jitter brought by each switching node is 3us, then after passing through 7 switching devices, the jitter will increase to 21us, which means that the TSN window configuration of the TSN flow at the last switching node will be 21us larger than that of the first node, so the number of TSN flows that can be configured in the entire network is subject to certain restrictions.
[0007] If the timer event method is used to implement gated scheduling, that is, a timer is assigned to each Channel, the above situation still exists in extreme cases. For example, multiple timers generate gated open events at the same time. In this case, all Channels have messages that need to be sent, which is similar to the round-robin case. Summary of the invention
[0008] In order to solve the above technical problems, the present invention discloses a TAS asynchronous call implementation system and method. When implementing the TSN time scheduling algorithm, the present invention can greatly reduce the delay and jitter caused by message queuing and scheduling. At the same time, when the queue (or port) scale is expanded, the delay and jitter will not increase proportionally, thereby indirectly increasing the effective network bandwidth and expanding the network scale. It can be effectively applied to the deployment and planning of large-scale TSN flows on high-speed ports (such as 2.5Gbps, 10Gbps, etc.).
[0009] To achieve the above-mentioned purpose, the technical solution of the present invention provides a TAS asynchronous call implementation system, which includes: a data packet processing pipeline module, a queue scheduling module and multiple sending port modules, wherein a TAS algorithm implementation module is also correspondingly set at the front end of each sending port module, and the message processed by the data packet processing pipeline module is sent to the queue scheduling module, and is scheduled to the TAS algorithm implementation module by the queue scheduling module, so as to execute the asynchronous TAS algorithm on the message in each TAS algorithm implementation module.
[0010] In a further technical solution, each TAS algorithm implementation module includes multiple FIFOs and multiple gates, wherein each FIFO corresponds to a queue, and each gate corresponds to a FIFO.
[0011] In a further technical solution, the queue scheduling module includes a primary scheduling structure and a secondary scheduling structure, the primary scheduling structure is multiple queues, and the secondary scheduling structure is multiple channels, wherein a channel is selected by weighted fair queuing or an approximate algorithm, and the valid messages under the channel are scheduled to the corresponding FIFO of the TAS algorithm implementation module according to the scheduling algorithm configured on the queue.
[0012] In a further technical solution, when performing queue scheduling, when it comes to a certain channel, as long as the FIFO in the TAS algorithm implementation module allows, the message will be scheduled into the FIFO of the TAS algorithm implementation module, and the TAS algorithm will be asynchronously executed on the messages in multiple FIFOs of each module in the TAS algorithm implementation module.
[0013] In a further technical solution, messages in multiple FIFOs are scheduled through a time window sequence or a timer.
[0014] In a further technical solution, each TAS algorithm implementation module includes 8 FIFOs and 8 gates, so as to asynchronously execute the TAS algorithm on the messages in the 8 FIFOs.
[0015] In a further technical solution, each FIFO is used to store a message and a context of the message, or to store the context of the message and queue scheduling related information.
[0016] In a further technical solution, the system further includes a plurality of receiving port modules and arbitration algorithm modules, wherein the arbitration algorithm module receives messages from the receiving port module and selects a message according to the arbitration algorithm of the input direction to insert into the pipeline processing module for message processing.
[0017] An embodiment of the present invention further provides a method for implementing a TAS asynchronous call, wherein the method uses the system as described above to implement a TAS asynchronous call on a message. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 It is a schematic diagram of the structure of the existing message dispatching system;
[0019] Figure 2 It is a schematic diagram of the existing queue gating structure;
[0020] Figure 3 It is a schematic diagram of the structure of the TAS asynchronous call system of the present invention;
[0021] Figure 4 It is a schematic diagram of the TAS asynchronous call queue structure of the present invention;
[0022] Figure 5 It is a schematic diagram of the asynchronous call gating structure of the present invention. DETAILED DESCRIPTION
[0023] The technical solution of the present invention is further described below in conjunction with specific embodiments, but the present invention is not limited to these embodiments.
[0024] In order to solve the technical problems mentioned in the background technology, the present invention mainly includes the following design points:
[0025] 1. Move the implementation of the TAS algorithm from the queue scheduling module to before each TxMac module.
[0026] 2. Add FIFO in the independent TAS module to store messages or message contexts.
[0027] 3. Asynchronously implement the TAS algorithm in each independent TAS module.
[0028] like Figure 3 As shown, in the TAS asynchronous call system structure of the present invention, the implementation of TAS is separated from the original queue scheduling module, one for each port, forming several separate FIFO / TAS modules (TAS algorithm implementation modules). Figure 4 Shown is the queue structure after TAS is removed. Figure 5 The independent TAS module structure FIFO / TAS is shown. This module contains FIFOs corresponding to the queues under the channel. The FIFO can store messages and message contexts or only message contexts (and message scheduling related information). Each FIFO will generate a back pressure signal (backpressure) to the queue module to avoid FIFO overflow.
[0029] When performing queue scheduling, when it comes to a certain channel, as long as the FIFO in the FIFO / TAS module allows, the message will be scheduled to the FIFO of the FIFO / TAS module, and the TAS algorithm will be asynchronously executed on the messages in the 8 FIFOs of each module in the FIFO / TAS module. The messages in the 8 FIFOs are scheduled through a time window sequence or timer (the accuracy can reach the main frequency level), that is, each port independently implements the gating scheduling algorithm, so that the delay and jitter caused by the rotation can be greatly reduced. In the 64Channel system mentioned above, the jitter can be reduced to 1 / 64 of the original in theory.
[0030] In a specific implementation, the present invention provides a TAS asynchronous call implementation system, which includes: a packet processing pipeline module (Packet Processing PipLine), a queue scheduling module (Queue / Schedule / TxSelector) and multiple sending port modules (TxMac), wherein a TAS algorithm implementation module (FIFO / TAS) is also correspondingly arranged at the front end of each sending port module, and the message processed by the packet processing pipeline module is sent to the queue scheduling module, and then scheduled to the TAS algorithm implementation module via the queue scheduling module, so as to execute the asynchronous TAS algorithm on the message in each TAS algorithm implementation module.
[0031] In a further technical solution, Figure 5 As shown, each TAS algorithm implementation module includes multiple FIFOs and multiple gates, wherein each FIFO corresponds to a queue, and each gate corresponds to a FIFO.
[0032] In a further technical solution, Figure 4 As shown, the queue scheduling module includes a primary scheduling structure and a secondary scheduling structure. The primary scheduling structure is multiple queues, and the secondary scheduling structure is multiple channels. A channel is selected by weighted fair queuing or an approximate algorithm, and the valid messages under the channel are scheduled to the corresponding FIFO of the TAS algorithm implementation module according to the scheduling algorithm configured on the queue.
[0033] In a further technical solution, when performing queue scheduling, when it comes to a certain channel, as long as the FIFO in the TAS algorithm implementation module allows, the message will be scheduled into the FIFO of the TAS algorithm implementation module, and the TAS algorithm will be asynchronously executed on the messages in multiple FIFOs of each module in the TAS algorithm implementation module.
[0034] In a further technical solution, messages in multiple FIFOs are scheduled through a time window sequence or a timer.
[0035] In a further technical solution, each TAS algorithm implementation module includes 8 FIFOs and 8 gates, so as to asynchronously execute the TAS algorithm on the messages in the 8 FIFOs.
[0036] In a further technical solution, each FIFO is used to store a message and a context of the message, or to store the context of the message and queue scheduling related information.
[0037] In a further technical solution, the system further includes a plurality of receiving port modules and arbitration algorithm modules, wherein the arbitration algorithm module receives messages from the receiving port module and selects a message according to the arbitration algorithm of the input direction to insert into the pipeline processing module for message processing.
[0038] An embodiment of the present invention further provides a method for implementing a TAS asynchronous call, wherein the method uses the system as described above to implement a TAS asynchronous call on a message.
[0039] The present invention solves the TAS delay and jitter problems caused by WFQ scheduling when the number of queues is large, making the jitter smaller and the time window more accurate while improving the network bandwidth utilization and making the system easy to expand.
[0040] The above is only a preferred embodiment of the present invention. It should be pointed out that a person skilled in the art can make several modifications and improvements without departing from the inventive concept of the present invention, which all belong to the protection scope of the present invention.
Claims
1. A TAS asynchronous call implementation system, characterized in that: include: A data packet processing pipeline module, a queue scheduling module and multiple sending port modules, wherein: A TAS algorithm implementation module is also correspondingly set at the front end of each sending port module, and the message processed by the data packet processing pipeline module is sent to the queue scheduling module, and is scheduled to the TAS algorithm implementation module by the queue scheduling module, so that the asynchronous TAS algorithm is executed on the message in each TAS algorithm implementation module; wherein, Each TAS algorithm implementation module includes multiple FIFOs and multiple gates, wherein each FIFO corresponds to a queue, and each gate corresponds to a FIFO; The queue scheduling module includes a primary scheduling structure and a secondary scheduling structure. The primary scheduling structure is multiple queues, and the secondary scheduling structure is multiple channels. A channel is selected through weighted fair queuing, and the valid messages under the channel are scheduled to the corresponding FIFO of the TAS algorithm implementation module according to the scheduling algorithm configured on the queue.
2. The system according to claim 1, characterized in that When performing queue scheduling, when it comes to a certain channel, as long as the FIFO in the TAS algorithm implementation module allows, the message will be scheduled to the FIFO of the TAS algorithm implementation module, and the TAS algorithm will be asynchronously executed on the messages in multiple FIFOs of each module in the TAS algorithm implementation module.
3. The system according to claim 2, characterized in that Messages in multiple FIFOs are scheduled using a time window sequence or timer.
4. The system according to claim 3, characterized in that Each TAS algorithm implementation module includes 8 FIFOs and 8 gates, so as to asynchronously execute the TAS algorithm on the messages in the 8 FIFOs.
5. The system according to claim 4, characterized in that Each FIFO is used to store a message and its context, or to store the message context and queue scheduling related information.
6. The system according to any one of claims 1 to 5, characterized in that: The system further comprises a plurality of receiving port modules and arbitration algorithm modules, wherein the arbitration algorithm module receives messages from the receiving port modules and selects a message according to an arbitration algorithm of the input direction to insert into the pipeline processing module for message processing.
7. A TAS asynchronous call implementation method, characterized in that: The method uses the system according to any one of claims 1 to 6 to implement TAS asynchronous calls on messages.