Calibration value determination method and semiconductor process equipment

Abstract

An embodiment of the present invention provides a calibration value determination method, which is applied to semiconductor process equipment. The semiconductor process equipment includes a target process chamber, an upper RF power supply, and a lower RF power supply. A susceptor for carrying a wafer is provided in the target process chamber. The upper RF power supply is used to excite the process gas in the target process chamber to form a plasma, and the lower RF power supply is used to load an RF bias voltage to the susceptor. The method includes: obtaining a measured value of the plasma bias voltage VDC corresponding to a preset value of a plurality of commonly excited CEX phase-locking angles under preset process conditions; performing data fitting on the preset value and the measured value to determine a continuous function of how the measured value varies with the preset value; and determining a calibration value of the CEX phase-locking angle based on the continuous function, the calibration value being the CEX phase-locking angle value corresponding to the minimum VDC value on the wafer surface under the preset process conditions. According to an embodiment of the present invention, the accuracy of the calibration value determination can be improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a calibration value determination method and semiconductor process equipment. Background Art

[0002] The continuous advancement of semiconductor processing technology places higher demands on the consistency of process results across all process chambers within a tool. Currently, due to the influence of matching devices, coils, and related distributed parasitic parameters in the upper and lower electrode circuits, it is impossible to guarantee the consistency of phase shifts between different process chambers, and thus the consistency of process results between different process chambers.

[0003] Semiconductor processing equipment includes a phase-locked cable, whose ends are electrically connected to the upper and lower RF power supplies in the semiconductor processing equipment. Currently, the etch rate of wafers processed in the equipment can be changed by adjusting the phase difference between the output waveforms of the upper and lower RF power supplies, that is, by adjusting the common exciter (CEX) phase-locked angle. In other words, changes in the CEX phase-locked angle can directly affect process results. Therefore, finding a calibrated value for the CEX phase-locked angle is crucial for consistent process results.

[0004] This is based on the theoretical basis that when the capacitive coupling phase difference between the upper and lower electrodes of the process chamber at the wafer terminal is 0, the corresponding measured VDC is the minimum value. At present, it is usually possible to test by adjusting the CEX phase-locked angle one by one to obtain the measured value of the bias voltage (Voltage of Direct Current, VDC), and find the CEX phase-locked angle value corresponding to the minimum value of VDC from multiple measured values, and use it as the calibration value. However, in actual testing, when multiple minimum values ​​of VDC with the same numerical value are measured, the CEX phase-locked angle value corresponding to each minimum value of VDC is different. At this time, it is impossible to determine which CEX phase-locked angle value corresponding to the minimum value of VDC is the calibration value. Therefore, the accuracy and efficiency of the current calibration value determination are low. Summary of the Invention

[0005] The technical problem to be solved by the embodiments of the present invention is that the accuracy and efficiency of the current calibration value determination are low.

[0006] To solve the above problems, an embodiment of the present invention discloses a calibration value determination method, which is applied to semiconductor process equipment. The semiconductor process equipment includes a target process chamber, an upper RF power supply, and a lower RF power supply. A susceptor for carrying a wafer is provided in the target process chamber. The upper RF power supply is used to excite a process gas in the target process chamber to form plasma. The lower RF power supply is used to apply an RF bias voltage to the susceptor. The method includes:

[0007] Obtaining measured values ​​of the plasma bias voltage VDC corresponding to preset values ​​of multiple common excitation phase-locking angles CEX under preset process conditions;

[0008] Performing data fitting on the preset value and the measured value to determine a continuous function of how the measured value changes with the preset value;

[0009] According to the continuous function, a calibration value of the CEX phase-lock angle is determined. The calibration value is the CEX phase-lock angle value corresponding to the minimum VDC value on the wafer surface under preset process conditions.

[0010] An embodiment of the present invention discloses a semiconductor process device, which includes a target process chamber, an upper RF power supply, a phase-locked cable, and a lower RF power supply. A susceptor for carrying a wafer is provided in the target process chamber. The upper RF power supply is used to excite a process gas in the target process chamber to form plasma. The lower RF power supply is used to apply an RF bias voltage to the susceptor. Both ends of the phase-locked cable are electrically connected to the upper RF power supply and the lower RF power supply, respectively. The semiconductor process device also includes:

[0011] A controller, configured to obtain measured values ​​of the plasma bias voltage VDC corresponding to preset values ​​of a plurality of common excitation phase-locking angles CEX under preset process conditions;

[0012] Performing data fitting on the preset value and the measured value to determine a continuous function of how the measured value changes with the preset value;

[0013] According to the continuous function, a calibration value of the CEX phase-lock angle is determined. The calibration value is the CEX phase-lock angle value corresponding to the minimum VDC value on the wafer surface under preset process conditions.

[0014] According to an embodiment of the present invention, by obtaining measured values ​​of the plasma bias voltage VDC corresponding to preset values ​​of multiple common excitation phase-locking angles (CEX) under preset process conditions, and performing data fitting on the preset and measured values, a continuous function is determined as to how the measured values ​​vary with the preset values. Thus, discrete points can be summarized as a curve representing a continuous function. The minimum value of VDC can then be clearly found within the determined continuous function, resulting in a more accurate calibration value for the CEX phase-locking angle corresponding to the minimum value of VDC. Thus, according to an embodiment of the present invention, a calibration value can be quickly and accurately obtained. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 A schematic diagram of a semiconductor device provided by this embodiment is shown;

[0016] Figure 2 A flow chart of a method for determining a calibration value provided by this embodiment is shown;

[0017] Figure 3A schematic diagram of a continuous function provided by this embodiment is shown;

[0018] Figure 4 A schematic diagram showing a relationship curve before calibration provided by this embodiment is shown;

[0019] Figure 5 A schematic diagram showing a calibrated relationship curve provided in this embodiment is shown;

[0020] Figure 6 A schematic structural diagram of a semiconductor process equipment provided by this embodiment is shown. DETAILED DESCRIPTION

[0021] The features and exemplary embodiments of various aspects of the present invention will be described in detail below. In order to make the objects, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only configured to explain the present invention and are not configured to limit the present invention. For those skilled in the art, the present invention can be implemented without the need for some of these specific details. The following description of the embodiments is merely to provide a better understanding of the present invention by illustrating examples of the present invention.

[0022] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or device comprising the element.

[0023] First, combine Figure 1 The semiconductor process equipment involved in the invention is briefly described.

[0024] Semiconductor process equipment such as Figure 1 As shown, it includes a process chamber 13, an upper RF power supply 1 and a lower RF power supply 5, wherein a base 10 (such as an electrostatic chuck) for carrying a wafer 9 is provided in the process chamber 13, and the lower RF power supply 5 is electrically connected to the base 10 through a lower matcher 4 for loading bias power to the base 10.

[0025] Furthermore, a dielectric window 8 is provided on the top of the process chamber 13 , and an upper electrode is provided above the dielectric window 8 . The upper electrode includes an outer coil 6 and an inner coil 7 of an inductive coupling coil, both of which are electrically connected to the current distribution unit 3 .

[0026] The upper RF power supply 1 is electrically connected to the current distribution unit 3 through the upper matcher 2, and is used to load RF power to the outer coil 6 and the inner coil 7 through the matcher 2 and the current distribution unit 3, and the RF energy is coupled into the process chamber 13 through the dielectric window 8.

[0027] In addition, a nozzle 12 is provided on the dielectric window 8 for introducing a process gas into the process chamber 13. The radio frequency energy can excite the process gas to generate plasma 11.

[0028] In addition, the above-mentioned inductively coupled plasma equipment also includes a phase-locked cable 14, whose two ends are electrically connected to the upper RF power supply 1 and the lower RF power supply 5 respectively. In this case, one of the upper RF power supply 1 and the lower RF power supply 5 is usually defined as the master power supply (Master), and the other is defined as the slave power supply (Slave). By adjusting the phase difference between the output waveforms of the upper RF power supply 1 and the lower RF power supply 5, that is, the CEX phase-locked angle, the coupling phase difference between the upper electrode and the lower electrode of the process chamber 13 on the surface of the wafer 9 can be adjusted, thereby affecting the ion energy and sheath potential above the wafer 9, and then changing the etching rate and Map distribution of the wafer 9. In other words, the change of the CEX phase-locked angle can directly affect the Map distribution.

[0029] Plasma, also known as plasma, is an ionized gas composed of positive and negative ions generated by the ionization of atoms and atomic clusters stripped of some of their electrons. It is a macroscopic, electrically neutral ionized gas with a scale larger than the Debye length. Its motion is primarily governed by electromagnetic forces and exhibits significant collective behavior. The upper RF power supply (Source RF, SRF) is used to excite the process gas in the target process chamber to form plasma 150, while the lower RF power supply (Bias RF, BRF) is used to apply RF bias voltage to the susceptor.

[0030] By adjusting the phase difference between the output waveforms of the upper RF power supply and the lower RF power supply, that is, adjusting the CEX phase-locking angle, the coupling phase difference between the upper electrode and the lower electrode of the process chamber on the wafer surface can be adjusted, thereby affecting the ion energy and sheath potential above the wafer, and then changing the wafer etching rate and distribution. In other words, the change of the CEX phase-locking angle affects the output effect of the process product.

[0031] The calibration value determination method provided in the embodiment of the present invention can be applied to at least the following application scenarios, which are described below.

[0032] Reflect to Figure 1The adjustment factor in the phase-locked cable is adjusted by the Y part (power supply automatic adjustment). Since the two ends of the phase-locked cable are electrically connected to the upper RF power supply and the lower RF power supply respectively and the cable length is determined, the X, Y and Z parts (such as Figure 1 Here, X refers to the phase shift between the upper RF power supply 1 and the input of the upper matcher 2, the magnitude of which is related to the cable between the two. Y refers to the phase shift between the lower RF power supply 5 and the input of the lower matcher 4, the magnitude of which is related to the cable between the two. Z refers to the length of the phase-locked cable between the upper RF power supply 1 and the lower RF power supply 5 and the superimposed phase shift of the CEX phase-locked angle between the two.

[0033] However, since the input of the SRF and the input of the BRF are not connected to the electrodes through cables, the phase shift difference from the input of the SRF and BRF to the electrodes, i.e., the M and N parts (e.g. Figure 1 Wherein, M is used to refer to the phase shift between the input end of the upper matcher 2 and the lower surface of the dielectric window 8, and N is used to refer to the phase shift between the input end of the lower matcher 4 and the upper surface of the base 10.

[0034] The hardware differences between the upper and lower electrode systems can also cause phase shift differences between the M and N parts. Hardware differences can include differences in electrode and cable materials, and cable lengths.

[0035] Due to the above reasons, there will be phase shift differences between the M and N parts, that is, the phase shift consistency cannot be maintained, and thus the consistency of process results between different process chambers cannot be guaranteed.

[0036] At present, the calibration is based on theoretical principles, mainly including: when the capacitive coupling phase difference between the upper and lower electrodes of the process chamber at the wafer terminal is 0, the corresponding electric field strength amplitude is the smallest, and the corresponding measured VDC is the minimum value.

[0037] Phase difference is the difference between the phases of two periodically varying physical quantities. A positive phase difference indicates that the former leads the latter, while a negative phase difference indicates that the latter lags. Electric field strength is a physical quantity used to indicate the strength and direction of an electric field.

[0038] By installing a bias voltage control sensor below the electrostatic chuck (ESC), which is located between the plasma and the lower match, and connecting it to the negative electrode of a direct current (DC), the bias voltage control sensor can directly measure the plasma sheath voltage, providing accurate data.

[0039] The plasma sheath is the transition zone formed between the plasma and the vessel wall or electrode when the two come into contact. Because electrons run toward the vessel wall at a much greater rate than ions, the insulator wall has a negative potential relative to the plasma. When the electron current reaching the insulator wall equals the ion current, a quasi-steady state is reached, where the wall potential is approximately equal to the kinetic energy of the particles.

[0040] Currently, the current RFPA solution uses the minimum VDC value to determine the CEX phase-lock angle value corresponding to the phase tolerance zero point. Specifically, the upper and lower RF power supplies are turned on successively, the initial test value of the CEX phase-lock angle is set to 0°, the VDC value corresponding to the current CEX phase-lock angle value is measured and recorded, and then the test value of the CEX phase-lock angle used is added by 5°. The VDC values ​​corresponding to the CEX phase-lock angle values ​​(i.e., 5°, 10°, 15°, ..., 360°) are measured and recorded respectively. Until the CEX phase-lock angle reaches 360°, the CEX phase-lock angle corresponding to the minimum value is found from the recorded VDC values ​​as the zero-point calibration value.

[0041] Based on the above existing calibration scheme, there may be multiple minimum values ​​with the same numerical value during the test, such as multiple minimum values ​​of 3.28. In this case, it is impossible to determine which VDC value corresponds to the CEX phase-locked angle value as the calibration value, that is, it is impossible to accurately calibrate the phase difference between the upper and lower electrode systems. Moreover, the calibration accuracy of the phase difference between the upper and lower electrode systems using this method is determined by the CEX phase-locked angle adjustment interval of the BRF. When the interval is large, the calibration error also increases. In addition, this method of using discrete points to obtain the minimum VDC value has limitations in obtaining the CEX phase-locked angle value of the corresponding BRF. The corresponding CEX phase-locked angle value can only be obtained at the set discrete points, and the CEX phase-locked angle value corresponding to any VDC value cannot be obtained, and the calibration lacks flexibility.

[0042] By calibrating the common excitation phase-locking angle setting, each process chamber can determine its corresponding calibration value. This ensures that the coupling phase difference between the upper and lower electrodes on the wafer surface in each process chamber is consistent, thereby improving the consistency of process results across different batches.

[0043] Based on the above application scenario, the calibration value determination method provided by the embodiment of the present invention is described in detail below.

[0044] Figure 2 A flowchart of a calibration value determination method provided by an embodiment of the present invention.

[0045] like Figure 2As shown, the calibration value determination method may include steps 210 to 230. The method is applied to semiconductor process equipment, which includes a target process chamber, an upper RF power supply, and a lower RF power supply. A susceptor for carrying a wafer is provided in the target process chamber. The upper RF power supply is used to excite a process gas in the target process chamber to form plasma, and the lower RF power supply is used to apply an RF bias voltage to the susceptor, as shown below:

[0046] Step 210 : obtaining the actual measured values ​​of the plasma bias voltage VDC corresponding to the preset values ​​of the CEX phase-locking angles under the preset process conditions.

[0047] Step 220 , performing data fitting on the preset value and the measured value to determine a continuous function of how the measured value changes with the preset value.

[0048] In step 230 , a calibration value of the CEX phase-lock angle is determined according to the continuous function. The calibration value is the CEX phase-lock angle value corresponding to the minimum VDC value on the wafer surface under the preset process conditions.

[0049] According to an embodiment of the present invention, by obtaining the measured value of the plasma bias voltage VDC corresponding to the preset values ​​of multiple common excitation phase-locking angles CEX phase-locking angles under preset process conditions; performing data fitting on the preset values ​​and the measured values, and determining a continuous function in which the measured values ​​change with the preset values, the discrete points can be summarized as a curve of a continuous function, and then the minimum value of VDC can be clearly found in the determined continuous function, and a more accurate calibration value of the CEX phase-locking angle corresponding to the minimum value of VDC can be obtained.

[0050] Therefore, according to the embodiment of the present invention, the calibration value can be obtained quickly and accurately. Since the bias value VDC also changes when the wafer surface CEX changes, when the coupling phase difference is 0°, the corresponding bias value VDC is the minimum value, and the corresponding etch rate (ER) is the minimum value.

[0051] Based on this, by setting the above calibration value to the value of the CEX phase-locked angle corresponding to the minimum value of VDC, when the process steps are performed using the same preset process conditions and the same set values, the coupling phase difference of different process chambers when the bias value on the wafer surface is the minimum value of VDC can all be 0°, thereby achieving consistency in the coupling phase differences of different process chambers, and thus improving the consistency of process results between different process chambers.

[0052] The contents of steps 210 to 230 are described below respectively:

[0053] This involves step 210 .

[0054] The semiconductor process equipment further includes a phase-locked cable, and both ends of the phase-locked cable are electrically connected to the upper RF power supply and the lower RF power supply respectively.

[0055] Step 210 may specifically include: performing multiple tests on the target process chamber using preset process conditions, and setting multiple preset values ​​in chronological order during the multiple tests, and collecting the corresponding VDC measured value after each setting.

[0056] The plurality of preset values ​​satisfies an arithmetic progression, i.e., as time passes, the preset value increases by a specified difference (e.g., 5°) compared to the previous preset value, and the first test value set is 0°, and the last test value set is 360°. That is, the plurality of preset values ​​are: 5°, 10°, 15°, ..., 360°.

[0057] Specifically, before obtaining the actual measured value of VDC, a bias voltage control sensor can be installed under the electrostatic chuck (ESC). This sensor is connected to the negative electrode of the direct current (DC) and can directly measure the plasma sheath voltage, and the measured data is accurate.

[0058] In a possible embodiment, before step 210, the following steps may be further included:

[0059] The phase angle of the output waveform of one of the upper and lower RF power supplies is maintained at 0°, and the phase angle of the output waveform of the other of the upper and lower RF power supplies is adjusted in chronological order to control the CEX phase-locked angle value from 0° to 360° at intervals of 5°.

[0060] For example, the phase angle of the SRF output waveform is fixed at 0°, and the phase angle of the BRF output waveform is adjusted in chronological order, thereby changing the CEX phase-locked angle value so that the CEX phase-locked angle value is adjusted from 0° to 360° at intervals of 5°.

[0061] This involves step 220 .

[0062] Perform data fitting on the preset and measured values ​​to determine a continuous function that shows how the measured values ​​change with the preset values. A continuous function is one in which the output changes slightly when the input changes slightly.

[0063] Specifically, step 220 may include the following steps:

[0064] In an optional embodiment of the present invention, step 220 includes:

[0065] Performing data fitting on the preset values ​​and the measured values ​​to establish a fitting function, wherein the fitting function is a Fourier first expansion series function and the fitting function includes undetermined parameters;

[0066] According to multiple sets of preset values ​​and measured values, the parameter values ​​of the undetermined parameters are solved;

[0067] Substituting the parameter values ​​into the fitting function, a continuous function is obtained.

[0068] The fitting function was selected by adjusting the BRF CEX phase-lock angle from 0° to 360° in 5° increments. The 5° interval was chosen based on the required number of samples and accuracy. A scatter plot of the corresponding measured VDC values ​​was plotted, which approximated a periodic trigonometric function. Therefore, the Fourier series was selected as the fitting function.

[0069] The Fourier series, a French mathematician who discovered that any periodic function can be represented by an infinite series consisting of sine and cosine functions, was chosen as the basis functions because they are orthogonal. Later generations called the Fourier series a special type of trigonometric series. According to Euler's formula, trigonometric functions can be converted into exponential form, and the Fourier series is also called an exponential series.

[0070] Fourier series Any function can be expanded into the accumulation of trigonometric functions, so Fourier series is chosen as the fitting function.

[0071] Specifically, Matlab tools can be used to select the Fourier first expansion series as the fitting function, that is, f(x) = α0 + α1 cos(wx) + α2 sin(wx). The function fitting effect is as follows Figure 3 The X-axis is the preset value of the CEX phase-lock angle (0° to 360°), and the Y-axis is the measured value of VDC.

[0072] Therefore, by using Fourier series fitting to fit the preset values ​​and measured values, a fitting function for the first-order Fourier expansion series function is established. Based on multiple data pairs of preset and measured values, the values ​​of the undetermined parameters are solved; the parameter values ​​are substituted into the fitting function to obtain a continuous function. This allows the discrete points to be summarized as a continuous function curve, and by obtaining the minimum point of the function curve, a more accurate CEX phase-lock angle calibration value is obtained. This helps to efficiently find the position of the phase difference relative to the zero point, thereby achieving more accurate calibration of the phase difference zero point between the upper and lower electrodes.

[0073] The undetermined parameters include a first parameter, a second parameter, and a third parameter. The parameter values ​​of the undetermined parameters are obtained by solving the data pairs of multiple sets of preset values ​​and measured values, including:

[0074] Based on the least squares method, determine the error function corresponding to the fitting function;

[0075] Calculate the partial derivatives of the first parameter, second parameter and third parameter in the error function respectively to obtain the partial derivative function of the error function;

[0076] The parameter value of the first parameter, the parameter value of the second parameter and the parameter value of the third parameter are determined respectively through the partial derivative function of the error function.

[0077] After establishing the fitting function f(x) = α0 + α1 cos(wx) + α2 sin(wx), in order to reduce the amount of calculation in the program implementation process, according to the law that the VDC value and the CEX phase-locked angle value of BRF change into a periodic (0°~360°) change, the parameters Once it is determined, only three parameters a0 to a2, namely the first parameter, the second parameter and the third parameter, need to be calculated through discrete data points.

[0078] In order to use discrete data points to determine the three parameters a0~a2 of the Fourier series equation, we can calculate based on the least squares theory to determine the error function corresponding to the fitting function:

[0079]

[0080] Among them, x i is the preset value of CEX phase lock angle, x i =0,5,10,15,…;

[0081] y i is the measured value of VDC;

[0082] The calculated value of VDC based on the fitting function: f(x i )=α0+α1 cos(wx i )+a2sin(wx i ).

[0083] Then, the partial derivatives of the first parameter, the second parameter, and the third parameter in the error function are respectively calculated to obtain the partial derivative function of the error function.

[0084] The parameter values ​​of the first parameter a0, the second parameter a1, and the third parameter a2 are determined by taking the partial derivatives of the error function. Specifically, the first-order partial derivatives of a0 to a2 are taken, and the first-order partial derivatives of the error functions corresponding to a0 to a2 are set equal to 0. By taking a0 to a2 one by one, the parameters of the first-order Fourier series expansion equation corresponding to the discrete measurement points are obtained, thereby determining the continuous function.

[0085] The least squares method (also known as the least squares method) is a mathematical optimization technique. It finds the best function matching the data by minimizing the sum of squared errors. The least squares method can be used to easily find unknown data and minimize the sum of squared errors between the found data and the actual data.

[0086] Therefore, the principle of minimizing the VDC value when the capacitive coupling phase difference is zero is used as a basis for finding the CEX phase-locking angle corresponding to the phase difference between the upper and lower electrodes relative to zero. Furthermore, the phase of the SRF output waveform is fixed, and the phase of the BRF output waveform is adjusted in chronological order to change the CEX phase-locking angle. After obtaining the measured VDC values ​​corresponding to multiple preset CEX phase-locking angle values, the VDC value and the CEX phase-locking angle value can be periodically varied (0° to 360°) using the Fourier series as a function fitting tool to reduce the discrete measurement points to a continuous function curve. This allows for an accurate continuous function of the measured values ​​varying with the preset values. Once this continuous function is established, the CEX phase-locking angle value corresponding to any VDC value can be determined, providing high flexibility.

[0087] This involves step 230 .

[0088] After the discrete measurement points are summarized into a continuous function curve, the CEX phase-locked angle value corresponding to the minimum point in its cycle is taken as the calibration result.

[0089] In an optional embodiment of the present invention, step 230 includes:

[0090] Substitute the preset values ​​of multiple CEX phase-locking angles into the continuous function to obtain multiple calculated values;

[0091] Determine the sum of the absolute differences between a plurality of groups of corresponding calculated values ​​and measured values, wherein each group of corresponding calculated values ​​and measured values ​​corresponds to the same preset value;

[0092] When the sum of the absolute differences is less than a preset threshold, the CEX phase-locked angle value corresponding to the minimum calculated value among the multiple calculated values ​​is determined as the calibration value.

[0093] x i =0,5,10,15,… Input the determined continuity equation one by one and get the corresponding continuity equation calculated value y i , which is the VDC calculation value; then, all x iThe corresponding VDC calculated value is compared with the measured value, and the absolute difference between the two is calculated. The absolute difference of all points is summed to obtain the sum of the absolute differences between multiple groups of corresponding calculated values ​​and measured values. If the sum of the absolute differences is greater than the preset threshold, the fitting should be re-measured to determine the continuous function. If the sum of the absolute differences of all points is less than the preset threshold, the x value corresponding to the minimum calculated value (i.e., the point where the SRF and BRF phase tolerance is 0) obtained by the continuous equation can be taken. n , determined as the calibration value.

[0094] Therefore, by substituting the preset values ​​of multiple CEX phase-locking angles into the continuous function respectively, multiple calculated values ​​are obtained; when the sum of the absolute differences between multiple groups of corresponding calculated values ​​and the measured values ​​is less than the preset threshold, the CEX phase-locking angle value corresponding to the minimum calculated value among the multiple calculated values ​​is determined as the calibration value to meet the calibration requirements of low computational complexity.

[0095] In an optional embodiment of the present invention, step 230 includes:

[0096] Determine the extreme values ​​of continuous functions;

[0097] The calibration value is determined according to the CEX phase-locking angle value corresponding to the extreme value of the continuous function.

[0098] An extremum is a maximum or minimum value of a function. If a function has a certain value everywhere in a neighborhood of a point, and the value at that point is the maximum, the value of the function at that point is a maximum.

[0099] Since a measurement cycle may only include minimum values, the calibration value can be determined based on the CEX phase-locked angle value corresponding to the extreme value of the continuous function. Specifically, according to the principle of the first-order partial derivative of the continuous equation, that is, the first-order partial derivative is the slope equation of the continuous equation, and the point x is obtained by setting the partial derivative function of the continuous function equal to 0. i The corresponding VDC minimum point is used as the CEX phase-lock angle calibration point.

[0100] Therefore, the calibration value determined according to the CEX phase-locking angle value corresponding to the extreme value of the continuous function can meet the calibration requirement with high accuracy.

[0101] The above-mentioned step of determining the calibration value according to the CEX phase-locked angle value corresponding to the extreme value of the continuous function may specifically include the following steps:

[0102] Take the partial derivative of the independent variable of the continuous function to obtain the partial derivative function of the continuous function;

[0103] Determine at least one CEX phase-locking angle value corresponding to when the partial derivative function of the continuous function is equal to 0;

[0104] A smaller value among at least one CEX phase-lock angle value is determined as a calibration value.

[0105] Since a measurement cycle may include both maximum and minimum values, the obtained continuous equation can be derived by taking the first-order partial derivative of the independent variable (x) to obtain the partial derivative function of the continuous function, and then the obtained equation can be solved to obtain the equation where the partial derivative equation of the continuous function is equal to 0, and x can be obtained. i ,

[0106] Because the function changes in a pattern of first a minimum and then a maximum, the CEX phase-lock angle value corresponding to the minimum in the continuous function curve is to the left of the CEX phase-lock angle value corresponding to the maximum. The smaller of the at least one CEX phase-lock angle value is determined as the calibration value. This ensures high-accuracy calibration requirements.

[0107] Here, the partial derivative of the independent variable of the continuous function is obtained to obtain the partial derivative function of the continuous function; the smaller value of at least one CEX phase-locked angle value corresponding to when the partial derivative function of at least one continuous function is equal to 0 is determined as the calibration value, which can ensure the uniqueness of the minimum VDC value and clearly determine the CEX phase-locked angle value corresponding to the minimum value as the calibration value. In this way, accurate calibration of the phase difference between the upper and lower electrode systems can be achieved. Moreover, after the continuous function is established, the CEX phase-locked angle value corresponding to any VDC value can also be obtained, which has high flexibility.

[0108] Among them, the semiconductor process equipment includes multiple process chambers, different process chambers all use the same set value, and by calling their respective preset calibration values, that is, the set value corresponding to each process step is pre-set in the process recipe adopted by the semiconductor process method, and different process chambers all set the same set value; on this basis, at the beginning of each of the above process steps, the respective calibration values ​​are called to automatically complete the calibration of the set value of the CEX phase-locked angle.

[0109] Based on the calibration value, the CEX phase-lock angle values ​​of the plurality of process chambers except the target process chamber are adjusted, and the calibration value is determined based on the VDC value collected in the target process chamber. Figure 4 and Figure 5 The X-axis represents the CEX phase-lock angle (0° to 360°), and the Y-axis represents the measured VDC value. As can be seen from the figure, after calibration, the CEX phase-lock angle values ​​corresponding to the minimum VDC values ​​of each chamber are essentially consistent.

[0110] Therefore, each process chamber can be adjusted by the calibration value, which can ensure the consistency of phase shifts between different process chambers, thereby ensuring the consistency of process results between different process chambers.

[0111] The target process chamber may be any process chamber in semiconductor process equipment, or may be a process chamber where a standard process result determined based on historical process results is located.

[0112] In summary, in an embodiment of the present invention, by obtaining the measured value of the plasma bias voltage VDC corresponding to the preset values ​​of the common excitation phase-locking angle CEX phase-locking angle under preset process conditions; performing data fitting on the preset values ​​and the measured values, and determining a continuous function of the measured value changing with the preset value, the discrete points can be summarized as a curve of a continuous function. Then, the minimum value of VDC can be clearly found in the determined continuous function, and a more accurate calibration value of the CEX phase-locking angle corresponding to the minimum value of VDC can be obtained. Therefore, according to an embodiment of the present invention, a calibration value can be obtained quickly and accurately, and then each process chamber can be adjusted according to the calibration value, which can ensure the consistency of the phase shift between different process chambers, thereby ensuring the consistency of the process results between different process chambers.

[0113] It should be noted that for the sake of simplicity, the method embodiments are described as a series of actions. However, those skilled in the art should be aware that the embodiments of the present invention are not limited by the order of the actions described, because according to the embodiments of the present invention, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in this specification are all preferred embodiments, and the actions involved are not necessarily required by the embodiments of the present invention.

[0114] Based on the above calibration value determination method, the present invention also provides a calibration process method for an RF power supply in a semiconductor process equipment, comprising at least one process step involving plasma excitation and RF bias loading, specifically comprising:

[0115] For a process step, obtaining a set value of a common excitation phase-locking angle of an upper RF power source and a lower RF power source in the process step;

[0116] The set value of the CEX phase-locking angle is calibrated according to the calibration value confirmed by the calibration value determination method to determine the actual value of the common excitation phase-locking angle.

[0117] Specifically, during calibration, the calibration value required for the corresponding process step can be extracted based on the calibration value determination method described above. The set value can then be calibrated based on the preset calibration value for the CEX phase-lock angle to determine the actual value of the CEX phase-lock angle. After calibration, the process steps described above are then executed based on the actual value.

[0118] Therefore, by setting the above-mentioned calibration value to the value of the common excitation phase-locking angle corresponding to the minimum value of VDC, when the process steps are performed using the same preset process conditions and the same set values, the coupling phase difference of different process chambers when the bias value on the wafer surface is the minimum value of VDC can all be 0°, thereby achieving consistency in the coupling phase differences of different process chambers, and thus improving the consistency of process results between different process chambers.

[0119] Based on the above-mentioned calibration process method for the RF power supply in the semiconductor process equipment, the present invention further provides a semiconductor process method, including at least one process step involving plasma excitation and RF bias loading, specifically including:

[0120] At the beginning of the process step, the calibration process method of the radio frequency power supply in the semiconductor process equipment is used to obtain the actual value of the common excitation phase-locking angle; and the process step is performed based on the actual value.

[0121] Reference Figure 6 , shows a structural block diagram of a semiconductor process equipment according to an embodiment of the present invention. The semiconductor process equipment 610 includes a target process chamber, an upper RF power supply, a phase-locked cable, and a lower RF power supply. A susceptor for carrying a wafer is provided in the target process chamber. The upper RF power supply is used to excite the process gas in the target process chamber to form plasma. The lower RF power supply is used to apply an RF bias voltage to the susceptor. Both ends of the phase-locked cable are electrically connected to the upper RF power supply and the lower RF power supply, respectively. The semiconductor process equipment 610 further includes:

[0122] The controller 611 is configured to obtain actual measured values ​​of the plasma bias voltage VDC corresponding to preset values ​​of a plurality of common excitation phase-locking angles CEX under preset process conditions;

[0123] Performing data fitting on the preset value and the measured value to determine a continuous function of how the measured value changes with the preset value;

[0124] According to the continuous function, a calibration value of the CEX phase-lock angle is determined. The calibration value is the CEX phase-lock angle value corresponding to the minimum VDC value on the wafer surface under preset process conditions.

[0125] In an optional embodiment of the present invention, the controller 611 is specifically configured to:

[0126] Performing data fitting on the preset values ​​and the measured values ​​to establish a fitting function, wherein the fitting function is a Fourier first expansion series function and the fitting function includes undetermined parameters;

[0127] According to multiple sets of preset values ​​and measured values, the parameter values ​​of the undetermined parameters are solved;

[0128] Substituting the parameter values ​​into the fitting function, a continuous function is obtained.

[0129] In an optional embodiment of the present invention, the undetermined parameters include a first parameter, a second parameter, and a third parameter, and the controller 611 is specifically configured to:

[0130] Based on the least squares method, determine the error function corresponding to the fitting function;

[0131] Calculate the partial derivatives of the first parameter, second parameter and third parameter in the error function respectively to obtain the partial derivative function of the error function;

[0132] The parameter value of the first parameter, the parameter value of the second parameter and the parameter value of the third parameter are determined respectively through the partial derivative function of the error function.

[0133] In an optional embodiment of the present invention, the controller 611 is specifically configured to:

[0134] Substitute the preset values ​​of multiple CEX phase-locking angles into the continuous function to obtain multiple calculated values;

[0135] Determine the sum of the absolute differences between a plurality of groups of corresponding calculated values ​​and measured values, wherein each group of corresponding calculated values ​​and measured values ​​corresponds to the same preset value;

[0136] When the sum of the absolute differences is less than a preset threshold, the CEX phase-locked angle value corresponding to the minimum calculated value among the multiple calculated values ​​is determined as the calibration value.

[0137] In an optional embodiment of the present invention, the controller 611 is specifically configured to:

[0138] Determine the extreme values ​​of continuous functions;

[0139] The calibration value is determined according to the CEX phase-locking angle value corresponding to the extreme value of the continuous function.

[0140] In an optional embodiment of the present invention, the controller 611 is specifically configured to:

[0141] Take the partial derivative of the independent variable of the continuous function to obtain the partial derivative function of the continuous function;

[0142] Determine at least one CEX phase-locking angle value corresponding to when the partial derivative function of the continuous function is equal to 0;

[0143] A smaller value among at least one CEX phase-lock angle value is determined as a calibration value.

[0144] In summary, in an embodiment of the present invention, by obtaining the measured value of the plasma bias voltage VDC corresponding to the preset values ​​of the common excitation phase-locking angle CEX phase-locking angle under preset process conditions; performing data fitting on the preset values ​​and the measured values, and determining a continuous function of the measured value changing with the preset value, the discrete points can be summarized as a curve of a continuous function. Then, the minimum value of VDC can be clearly found in the determined continuous function, and a more accurate calibration value of the CEX phase-locking angle corresponding to the minimum value of VDC can be obtained. Therefore, according to an embodiment of the present invention, a calibration value can be obtained quickly and accurately, and then each process chamber can be adjusted according to the calibration value, which can ensure the consistency of the phase shift between different process chambers, thereby ensuring the consistency of the process results between different process chambers.

[0145] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0146] An embodiment of the present invention also provides an electronic device, comprising: a processor, a memory, and a computer program stored in the memory and capable of running on the processor. When the computer program is executed by the processor, the various processes of the above-mentioned calibration value determination method embodiment are implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0147] An embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the various processes of the above-mentioned calibration value determination method embodiment are implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0148] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0149] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0150] Those skilled in the art will appreciate that embodiments of the present invention may be provided as methods, apparatus, or computer program products. Thus, embodiments of the present invention may take the form of a fully hardware embodiment, a fully software embodiment, or an embodiment combining software and hardware. Furthermore, embodiments of the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0151] The embodiments of the present invention are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate instructions for implementing the process in the flowchart and / or block diagram. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0152] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing terminal device to operate in a specific manner, so that the instructions stored in the computer readable memory produce a manufactured product including an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0153] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, thereby providing instructions for executing on the computer or other programmable terminal device to implement the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0154] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they are aware of the basic creative concepts. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0155] Finally, it should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or terminal device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or terminal device that includes the element.

[0156] The above is a detailed introduction to a calibration value determination method and a semiconductor process equipment provided by the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the ideas of the present invention, there will be changes in the specific implementation methods and application scopes. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A calibration value determination method, applied to semiconductor process equipment, characterized in that: The semiconductor process equipment includes a target process chamber, an upper RF power supply and a lower RF power supply. The target process chamber is provided with a susceptor for carrying a wafer. The upper RF power supply is used to excite a process gas in the target process chamber to form plasma. The lower RF power supply is used to apply an RF bias voltage to the susceptor. The method includes: Obtaining measured values ​​of plasma bias voltage VDC corresponding to preset values ​​of multiple common excitation CEX phase-locking angles under preset process conditions; Performing data fitting on the preset value and the measured value to determine a continuous function of how the measured value changes with the preset value; Determining a calibration value of the CEX phase-lock angle according to the continuous function, the calibration value being a CEX phase-lock angle value corresponding to a minimum VDC value on the wafer surface under the preset process conditions; The performing data fitting on the preset value and the measured value to determine a continuous function of the measured value changing with the preset value includes: Performing data fitting on the preset value and the measured value to establish a fitting function, wherein the fitting function is a Fourier first expansion series function and includes undetermined parameters; Solving and obtaining parameter values ​​of the undetermined parameters according to multiple sets of data pairs of preset values ​​and the measured values; Substituting the parameter value into the fitting function, the continuous function is obtained.

2. The method according to claim 1, characterized in that The undetermined parameters include a first parameter, a second parameter, and a third parameter. Solving the parameter values ​​of the undetermined parameters based on multiple sets of preset values ​​and the measured values ​​includes: Determining an error function corresponding to the fitting function based on a least squares method; Calculating partial derivatives of the first parameter, the second parameter, and the third parameter in the error function respectively to obtain a partial derivative function of the error function; The parameter value of the first parameter, the parameter value of the second parameter and the parameter value of the third parameter are determined respectively through the partial derivative function of the error function.

3. The method according to claim 1, characterized in that Determining the calibration value of the CEX phase-locking angle according to the continuous function includes: Substituting the preset values ​​of the CEX phase-locking angles into the continuous function respectively to obtain a plurality of calculated values; Determine the sum of the absolute differences between a plurality of groups of corresponding calculated values ​​and the measured values, each group of corresponding calculated values ​​and the measured values ​​corresponding to the same preset value; When the sum of the absolute differences is less than a preset threshold, the CEX phase-locked angle value corresponding to the minimum calculated value among the multiple calculated values ​​is determined as the calibration value.

4. The method according to claim 1, wherein Determining the calibration value of the CEX phase-locking angle according to the continuous function includes: determining an extreme value of the continuous function; The calibration value is determined according to the CEX phase-locked angle value corresponding to the extreme value of the continuous function.

5. The method according to claim 4, characterized in that The determining the calibration value according to the CEX phase-locked angle value corresponding to the extreme value of the continuous function includes: Taking a partial derivative of the independent variable of the continuous function to obtain a partial derivative function of the continuous function; Determine at least one CEX phase-locking angle value corresponding to when the partial derivative function of the continuous function is equal to 0; The smaller value of the at least one CEX phase-locking angle value is determined as the calibration value.

6. The method according to claim 1, characterized in that Before obtaining the measured values ​​of the plasma bias voltage VDC corresponding to the preset values ​​of the common excitation CEX phase-locking angles under the preset process conditions, the method further includes: The phase angle of the output waveform of one of the upper RF power supply and the lower RF power supply is maintained at 0°, and the phase angle of the output waveform of the other of the upper RF power supply and the lower RF power supply is adjusted in chronological order to control the CEX phase-locked angle value to be adjusted from 0° to 360° at intervals of 5°.

7. The method according to any one of claims 1 to 6, characterized in that The semiconductor process equipment further includes a phase-locked cable, two ends of which are electrically connected to the upper RF power supply and the lower RF power supply respectively.

8. A method for calibrating a radio frequency power supply in a semiconductor process equipment, comprising at least one process step involving plasma excitation and radio frequency bias loading, characterized in that: The semiconductor process method specifically includes: For a process step, obtaining a set value of a common excitation phase-locking angle of an upper RF power source and a lower RF power source in the process step; The calibration value confirmed by the calibration value determination method according to any one of claims 1 to 7 is used to calibrate the set value of the CEX phase-locking angle to determine the actual value of the common excitation phase-locking angle.

9. A semiconductor process equipment, characterized in that: The semiconductor process equipment includes a target process chamber, an upper RF power supply, a phase-locked cable, and a lower RF power supply. The target process chamber is provided with a susceptor for carrying a wafer. The upper RF power supply is used to excite the process gas in the target process chamber to form plasma. The lower RF power supply is used to apply RF bias to the susceptor. The two ends of the phase-locked cable are electrically connected to the upper RF power supply and the lower RF power supply, respectively. The semiconductor process equipment also includes: A controller, configured to obtain measured values ​​of the plasma bias voltage VDC corresponding to preset values ​​of a plurality of common excitation phase-locking angles CEX under preset process conditions; Performing data fitting on the preset value and the measured value to determine a continuous function of how the measured value changes with the preset value; Determining a calibration value of the CEX phase-lock angle according to the continuous function, the calibration value being a CEX phase-lock angle value corresponding to a minimum VDC value on the wafer surface under the preset process conditions; The controller is specifically used for: Performing data fitting on the preset value and the measured value to establish a fitting function, wherein the fitting function is a Fourier first expansion series function and includes undetermined parameters; Solving and obtaining parameter values ​​of the undetermined parameters according to multiple sets of data pairs of preset values ​​and the measured values; Substituting the parameter value into the fitting function, the continuous function is obtained.

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