A method for fabricating a light emitting diode chip
By improving the LED chip fabrication method, including steps such as water spraying, cleaning, ion implantation, photolithography, wafer expansion, and grinding, the problems of burn marks and debris removal in the dicing channel have been solved, and the anti-static capability and quality of the chip have been improved.
Patent Information
- Application Number
- CN202210774648.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-07-01
- Publication Date
- 2025-12-12
- Estimated Expiration
- 2042-07-01
AI Technical Summary
In the traditional LED chip cutting process, burn marks and debris in the cutting channel are difficult to clean, leading to poor chip leakage and affecting anti-static capability.
The silicon powder is treated by water spraying, which combines wet and dry cleaning, ion implantation, photolithography, ion etching, wafer expansion, chamfering and polishing to remove residues and impurities from the silicon wafer surface, form an isolation zone and improve chip quality.
It effectively removes organic impurities from the surface of silicon wafers, avoids leakage current, improves the anti-static capability and quality of chips, and ensures that specifications meet requirements.
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Figure CN115148865B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of light-emitting diode chip manufacturing, in particular to a light-emitting diode chip manufacturing method. BACKGROUND
[0002] A diode is a kind of electronic device made of semiconductor material (silicon, selenium, germanium, etc.). It has a one-way conductivity, that is, when a positive voltage is applied to the anode of the diode, the diode is turned on. When a reverse voltage is applied to the anode and cathode, the diode is cut off. Therefore, the turn-on and turn-off of the diode is equivalent to the turn-on and turn-off of the switch, and the diode is formed by a PN junction, corresponding electrode leads and tube shell packaging. Different doping processes are used to make P-type semiconductor and N-type semiconductor on the same semiconductor (usually silicon or germanium) substrate, and a space charge region called PN junction is formed at their interface. The electrode drawn from the P region is called anode, and the electrode drawn from the N region is called cathode. Because of the one-way conductivity of the PN junction, the current direction of the diode is from the anode to the cathode through the inside of the tube when the diode is turned on.
[0003] At present, cutting is an indispensable process in the preparation steps of common light-emitting diodes, and the traditional cutting process mainly adopts front-side diamond knife technology for scribing process. However, such a way often leaves a lot of burn marks, debris and other by-products in the cutting path, which is not easy to clean, and the burn marks or debris attached to the side wall of the epitaxial layer can easily cause the chip to produce a leakage phenomenon, affecting the anti-static ability of the LED chip. In view of this, we propose a light-emitting diode chip manufacturing method. SUMMARY
[0004] (I) Technical problems to be solved
[0005] In view of the deficiencies of the prior art, the present application provides a light-emitting diode chip manufacturing method, which solves the problems raised in the background art.
[0006] (II) Technical scheme
[0007] To achieve the above purpose, the present application is implemented by the following technical scheme: a light-emitting diode chip manufacturing method, which comprises the following steps:
[0008] Step 1, slicing, cutting a single crystal silicon rod into a thin silicon wafer with precise geometric dimensions, and using water to rinse the silicon powder generated in this process, producing wastewater and silicon slag;
[0009] Step 2, cleaning and drying, cleaning the silicon wafer by wet cleaning, then rinsing the silicon wafer with ionized water, and then drying the silicon wafer;
[0010] Step three, silicon wafer inspection, by using a microscope to check the wafer after slicing, to observe whether there are residues or moisture on the surface of the wafer;
[0011] Step four, silicon nitride removal, using dry oxidation method to remove silicon nitride;
[0012] Step five, ion implantation, by ion implantation, boron ions are injected into the substrate through the SiO2 film to form a P-type well, then the photoresist is removed and annealing treatment is carried out in a high temperature furnace, then hot phosphoric acid is used to remove the silicon nitride layer, phosphorus ions are doped to form an N-type well, then annealing treatment is carried out again, then HF is used to remove the SiO2 layer, and then a layer of SiO2 layer is generated by dry oxidation method to form a substrate;
[0013] Step six, forming a nitride semiconductor layer, cutting the substrate, n-type III nitride semiconductor layer, active layer, p-type III nitride semiconductor layer and first optical reflection layer to obtain a plurality of independent chip units, each chip unit comprising two n-type electrodes and two p-type electrodes;
[0014] Step seven, forming an isolation region, using photolithography technology and ion etching technology, the silicon nitride layer above the gate isolation layer is reserved, the SiO2 layer without silicon nitride protection is grown, and the isolation region between PN is formed;
[0015] Step eight, wafer expansion, using a wafer expander to expand the film of the bonded wafer, so that the spacing of the wafer is stretched to about 0.6mm;
[0016] Step nine, annealing, after nitrogen blowing, the double-station thermal oxidation furnace is heated by infrared, the surface of the silicon wafer reacts with oxygen to form a silicon dioxide protective layer on the surface of the silicon wafer;
[0017] Step ten, chamfering, the annealed silicon wafer is trimmed into a circular arc shape to prevent edge cracking and lattice defects, and to increase the flatness of the epitaxial layer and the photoresist layer;
[0018] Step eleven, grinding and cleaning, using a grinding agent to remove the saw marks and surface damage layer caused by slicing and wheel grinding, effectively improving the curvature, flatness and parallelism of the single crystal silicon wafer to a specification that can be processed by a polishing process, and removing organic impurities on the surface of the silicon wafer through the dissolving action of an organic solvent combined with ultrasonic cleaning technology;
[0019] Step twelve, chip inspection, by using a microscope to check the chip, to observe whether there are mechanical damage and pitting on the surface of the material, whether the chip size and electrode size meet the requirements, and whether the electrode pattern is complete.
[0020] Preferably, in step ten, after chamfering the silicon wafer, the silicon wafer needs to be detected by grading, which can effectively guarantee the specification and quality of the silicon wafer.
[0021] Preferably, the silicon wafer is heated to 150-250 DEG C for 1-2 minutes in the second step, and nitrogen is used to protect the silicon wafer, which can maximize the dehydration of the silicon wafer and avoid damage to the silicon wafer.
[0022] Preferably, the silicon wafer is heated to 150-250 DEG C for 1-2 minutes in the second step, and nitrogen is used to protect the silicon wafer, which can maximize the dehydration of the silicon wafer and avoid damage to the silicon wafer.
[0023] Preferably, the silicon wafer is heated to 150-250 DEG C for 1-2 minutes in the second step, and nitrogen is used to protect the silicon wafer, which can maximize the dehydration of the silicon wafer and avoid damage to the silicon wafer.
[0024] Preferably, the silicon wafer is heated to 150-250 DEG C for 1-2 minutes in the second step, and nitrogen is used to protect the silicon wafer, which can maximize the dehydration of the silicon wafer and avoid damage to the silicon wafer.
[0025] Preferably, the silicon wafer is heated to 150-250 DEG C for 1-2 minutes in the second step, and nitrogen is used to protect the silicon wafer, which can maximize the dehydration of the silicon wafer and avoid damage to the silicon wafer.
[0026] Preferably, the silicon wafer is heated to 150-250 DEG C for 1-2 minutes in the second step, and nitrogen is used to protect the silicon wafer, which can maximize the dehydration of the silicon wafer and avoid damage to the silicon wafer.
[0027] Preferably, the silicon wafer is heated to 150-250 DEG C for 1-2 minutes in the second step, and nitrogen is used to protect the silicon wafer, which can maximize the dehydration of the silicon wafer and avoid damage to the silicon wafer.
[0028] (Three) beneficial effects
[0029] The application provides a light-emitting diode chip manufacturing method.
[0030] (1) The light-emitting diode chip manufacturing method can maximize the dehydration of the silicon wafer and avoid damage to the silicon wafer by controlling the temperature at 150-250 DEG C during the cleaning and drying of the silicon wafer, and can effectively remove organic impurities on the surface of the silicon wafer by later polishing and cleaning, thereby avoiding the burn marks or debris attached to the side wall of the epitaxial layer from causing the chip to generate a leakage current, and improving the anti-static capability of the LED chip.
[0031] (2) The light-emitting diode chip manufacturing method can effectively guarantee the specifications and quality of the silicon wafer by grading detection of the silicon wafer after chamfering, thereby avoiding defective products and further improving the quality of the chip.
[0032] (3) In this method of manufacturing LED chips, after drying, a hot plate is used to coat the substrate with vapor phase film and HMDS vapor deposition is carried out. The temperature is controlled at 200-250℃ and the processing time is 30 seconds. This can make the surface hydrophobic and enhance the adhesion between the substrate surface and the photoresist. Attached Figure Description
[0033] Figure 1 This is a schematic diagram of the process structure of the present invention. Detailed Implementation
[0034] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0035] Please see Figure 1 The present invention provides a technical solution: a method for manufacturing a light-emitting diode (LED) chip, the method comprising the following steps:
[0036] Step 1: Slicing. The monocrystalline silicon rod is sliced into thin silicon wafers with precise geometric dimensions. The silicon powder generated in this process is leached with water, resulting in wastewater and silicon slag.
[0037] Step 2: Cleaning and drying. The silicon wafer is cleaned by wet cleaning, then rinsed with deionized water, and finally dried.
[0038] Step 3: Silicon wafer inspection. The sliced silicon wafers are inspected using a microscope to observe whether there are any residues or moisture on the surface of the wafers.
[0039] Step 4: Remove silicon nitride using a dry oxidation method;
[0040] Step 5: Ion implantation. Boron ions are implanted into the substrate through the SiO2 film by ion implantation to form a P-type well. Then, the photoresist is removed and the substrate is annealed in a high-temperature furnace. The silicon nitride layer is then removed with hot phosphoric acid, and phosphorus ions are doped to form an N-type well. After annealing, the SiO2 layer is removed with HF. Finally, a SiO2 layer is generated by dry oxidation to form the substrate.
[0041] Step 6: Form a nitride semiconductor layer by cutting the substrate, n-type III nitride semiconductor layer, active layer, p-type III nitride semiconductor layer and first optical reflection layer to obtain several independent chip units. Each chip unit includes two n-type electrodes and two p-type electrodes.
[0042] Step seven, forming the isolation region, using photolithography and ion etching technology, the silicon nitride layer on the gate isolation layer is reserved, the SiO2 layer without silicon nitride protection is grown, and the isolation region between PN is formed;
[0043] Step eight, expanding, using an expander to expand the film of the bonded silicon wafer, so that the spacing of the silicon wafer is stretched to about 0.6mm;
[0044] Step nine, annealing, after purging with nitrogen, the double-station thermal oxidation furnace is heated to 300-500°C by infrared, and the silicon wafer surface reacts with oxygen to form a silicon dioxide protective layer on the surface of the silicon wafer;
[0045] Step ten, chamfering, the annealed silicon wafer is trimmed into a circular arc shape to prevent edge cracking and lattice defects, and to increase the flatness of the epitaxial layer and the photoresist layer;
[0046] Step eleven, grinding and cleaning, using a grinding agent to remove the saw marks and surface damage layer caused by slicing and wheel grinding, effectively improving the curvature, flatness and parallelism of the single crystal silicon wafer to a specification that can be processed by a polishing process. Through the dissolving action of organic solvents and ultrasonic cleaning technology, organic impurities on the surface of the silicon wafer are removed;
[0047] Step twelve, chip inspection, the chip is inspected by a microscope to observe whether the material surface has mechanical damage and pitting, whether the chip size and electrode size meet the requirements, and whether the electrode pattern is complete.
[0048] Step ten, after chamfering the silicon wafer, the silicon wafer needs to be detected by grading, which can effectively guarantee the specification and quality of the silicon wafer.
[0049] In this embodiment, in step two, the temperature needs to be controlled at 150-250°C for 1-2 minutes during drying of the silicon wafer, and nitrogen protection is used, which can maximize the dehydration of the silicon wafer and avoid damage to the silicon wafer. In step two, the silicon wafer is cleaned to remove surface contaminants and water vapor, making the substrate surface change from hydrophilic to hydrophobic and enhancing the adhesion of the surface. After drying, a hot plate with a gas phase bottom film is used for bottom coating, and HMDS vapor deposition is used with a temperature control of 200-250°C for 30 seconds, which can make the surface hydrophobic and enhance the adhesion of the substrate surface to the photoresist.
[0050] Further, in step six, the p-type electrode can use one or more of Au, Al, Cu, Ag, Fe, Ti, Cr, Pt, and Ni. The n-type electrode can use one or more of Au, Al, Cu, Ag, Fe, Ti, Cr, Pt, and Ni.
[0051] In addition, in step nine, infrared heating is used to 300-500°C.
[0052] In the present embodiment, after the step eleven polishing and cleaning, hot plate drying is used, the temperature is controlled at 100-130 DEG C heating 1-2 minutes.
[0053] The method for manufacturing the light emitting diode chip, by cleaning and drying the silicon wafer, controlling the temperature at 150-250 DEG C, can maximize the dehydration of the silicon wafer, and can avoid the damage of the silicon wafer, and through the later polishing and cleaning, can effectively remove the organic impurities on the surface of the silicon wafer, avoid the burn marks or debris attached to the side wall of the epitaxial layer to easily cause the chip to produce the leakage of the bad phenomenon, improve the anti-static ability of the LED chip. By grading detection on the silicon wafer after chamfering, the specification and quality of the silicon wafer can be effectively guaranteed, and defective products can be avoided, further improving the quality of the chip in the later stage.
[0054] Although the embodiments of the present application have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made thereto without departing from the principles and spirit of the present application, the scope of which is defined by the appended claims and their equivalents.
Claims
1. A method of fabricating a light emitting diode chip, the method comprising: The method for manufacturing the light emitting diode chip comprises the following steps: Step one, slicing, cutting the single crystal silicon rod into silicon wafers with precise geometric dimensions, the silicon powder generated in the process is rinsed with water, generating wastewater and silicon residue; Step two, cleaning and drying, cleaning the silicon wafers by wet cleaning, then rinsing the silicon wafers with ionized water, and then drying the silicon wafers; Step three, silicon wafer inspection, using a microscope to inspect the sliced silicon wafers to observe whether there are residues or moisture on the surface of the silicon wafers; Step four, removing silicon nitride, removing silicon nitride by dry oxidation method; Step five, ion implantation, implanting boron ions into the substrate through the SiO2 film by ion implantation to form a P-type well, then removing the photoresist and annealing in a high-temperature furnace, then removing the silicon nitride layer with hot phosphoric acid, doping phosphorus ions to form an N-type well, then annealing, then removing the SiO2 layer with HF, and then generating a SiO2 layer by dry oxidation method to form a substrate; Step six, forming a nitride semiconductor layer, cutting the substrate, n-type III nitride semiconductor layer, active layer, p-type III nitride semiconductor layer, and first optical reflection layer to obtain a plurality of independent chip units, and each chip unit comprises two n-type electrodes and two p-type electrodes; Step seven, forming an isolation region, using photolithography and ion etching technology to retain the silicon nitride layer above the gate isolation layer, grow the SiO2 layer without silicon nitride protection, and form an isolation region between PN; Step eight, wafer expansion, using a wafer expander to expand the film of the bonded silicon wafers, so that the spacing of the silicon wafers is stretched to 0.6mm; Step nine, annealing, after nitrogen blowing, the silicon wafers are heated by infrared heating, and the surface of the silicon wafers reacts with oxygen to form a silicon dioxide protective layer; Step ten, chamfering, the annealed silicon wafers are trimmed into circular arcs; Step eleven, polishing and cleaning, using a polishing agent to remove the saw marks and surface damage layer caused by slicing and wheel grinding, effectively improving the curvature, flatness and parallelism of the single crystal silicon wafers, reaching the specifications of a polishing process, removing organic impurities on the surface of the silicon wafers through the dissolving action of an organic solvent combined with ultrasonic cleaning technology; Step twelve, chip inspection, inspecting the chip through a microscope to observe whether there are mechanical damage, pits and craters on the surface of the material, whether the chip size and electrode size meet the requirements, and whether the electrode pattern is complete; In step two, the temperature needs to be controlled at 150-250℃ for 1-2 minutes during drying of the silicon wafers, and nitrogen protection is used; In step nine, infrared heating is used to 300-500℃; In step two, the silicon wafers are cleaned to remove surface contaminants and water vapor; In step six, the p-type electrode uses one or more of Au, Al, Cu, Ag, Fe, Ti, Cr, Pt, and Ni; In step six, the n-type electrode uses one or more of Au, Al, Cu, Ag, Fe, Ti, Cr, Pt, and Ni.
2. The method of claim 1, wherein: In step ten, after chamfering the silicon wafers, the silicon wafers need to be detected by grading.
3. The method for manufacturing a light-emitting diode chip according to claim 1, characterized in that: After step eleven, polishing and cleaning are completed, a hot plate is used for drying, and the temperature is controlled at 100-130℃ for 1-2 minutes.
4. The method of claim 1, wherein: The step two is to use the hot plate to coat the bottom film by gas phase, and the temperature is controlled at 200-250℃, and the processing time is 30 seconds.
Citation Information
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