A MEMS sensitive structure and a preparation method thereof

Abstract

The present invention provides a MEMS sensitive structure and a preparation method thereof, which sequentially include a lead layer (5), an insulating layer (3), a first oxide layer (1), a piezoresistor (2), a sensitive diaphragm (9), a second cavity (7), a first cavity (6), and a second oxide layer (11) from top to bottom on a silicon substrate (8). The MEMS sensitive structure provided by the present invention has the advantages of a small opening, effectively maintaining a small chip area, reducing the requirements for the capabilities of processing equipment, having a simple process, and being applicable to the manufacture of MEMS sensitive structure chips.

Description

Technical Field:

[0002] The present invention relates to the field of microelectromechanical technology, specifically to a MEMS sensitive structure and a preparation method thereof. Background Art:

[0004] MEMS (Micro-Electro-Mechanical Systems) is the abbreviation of microelectromechanical systems, and MEMS is an interdisciplinary high-tech field. Compared with sensors prepared by traditional processes, MEMS sensors have advantages in low power consumption, small size, high integration, etc., and are valued and favored by enterprises and the market in the sensor field. MEMS sensors have been widely used in the fields of automotive industry, industrial control, aerospace, consumer electronics, healthcare, etc.

[0005] When manufacturing some sensor devices using MEMS technology, a thin-film cavity structure is required. Currently, the MEMS manufacturing process is mainly based on bulk silicon technology, and a thin-film and cavity structure is formed on the surface or back of a silicon wafer by means of micro-machining such as photolithography, etching, and corrosion. The dry etching process or the wet etching process forms a sensitive diaphragm structure of several micrometers or dozens of micrometers in a local area of the silicon substrate on the back of the silicon substrate by anisotropic etching or corrosion. Then, a resistor is prepared on the surface of the diaphragm by ion implantation. Under the influence of the external environment, the sensitive diaphragm deforms, resulting in a change in the resistance value. When a voltage is applied across the resistor, the deformation of the diaphragm is converted into a change in voltage. Based on this principle, a piezoresistive pressure sensor device can be prepared.

[0006] However, there are some disadvantages in these current structures. For the thin-film cavity structure prepared by the dry etching process, due to the large opening and poor etching uniformity, the consistency of the diaphragm thickness and the roughness of the diaphragm cannot be guaranteed, and the performance of the device fluctuates greatly. For the thin-film cavity structure prepared by the anisotropic etching process, the consistency of the diaphragm thickness and the roughness of the diaphragm are well controlled, but because the etching depth is deep, the angle between the side of the cavity and the sensitive diaphragm makes the bottom size much larger than the size of the sensitive diaphragm, directly resulting in an increase in the chip area of the device, which is not conducive to the miniaturization design of the device. Summary of the Invention:

[0008] The present invention is to overcome the deficiencies in the prior art and provide a MEMS sensitive structure and a preparation method thereof.

[0009] The present application provides the following technical solutions:

[0010] A MEMS sensitive structure includes a silicon substrate, and is characterized in that: a first oxide layer is provided on the upper surface of the silicon substrate, a second oxide layer is provided on the lower surface of the silicon substrate, a piezoresistor is provided below the first oxide layer, an insulating layer is provided above the first oxide layer, through holes corresponding to the piezoresistor are provided on the insulating layer and the first oxide layer, a lead layer communicating with the piezoresistor is provided in the through holes, a sensitive diaphragm is provided below the piezoresistor, a primary hole is provided on the second oxide layer and the silicon substrate, a secondary hole communicating with the primary hole is provided on the silicon substrate at one end of the primary hole, and one end of the secondary hole communicates with the sensitive diaphragm.

[0011] A preparation method of a MEMS sensitive structure is characterized in that: it includes the following steps:

[0012] S1: Deposit an oxide layer on the surface of the silicon substrate wafer, the first oxide layer covers the upper surface of the silicon substrate, and the second oxide layer covers the lower surface of the silicon substrate;

[0013] S2: Lithograph a resistor pattern on the surface of the first oxide layer through a lithography process, and prepare a piezoresistor layer corresponding to the resistor pattern below the first oxide layer by an implantation method;

[0014] S3: Deposit silicon nitride on the surface of the first oxide layer as an insulating layer;

[0015] S4: Prepare lead holes on the insulating layer through lithography and etching processes, and prepare a metal lead layer that forms a communicating fit with the piezoresistor layer in the lead holes by magnetron sputtering;

[0016] S5: A primary hole extending upward into the silicon substrate is provided on the second oxide layer, and a protective layer is deposited on the upper surface of the primary hole and the second oxide layer, and the protective layer is silicon dioxide;

[0017] S6: Remove the protective layer on the bottom surface of the primary hole through an etching device, and retain the protective layer on the hole wall of the primary hole;

[0018] S7: Prepare secondary holes with a certain depth upward and on both sides from the bottom surface of the primary hole by wet etching. The thickness between the top of the secondary hole and the piezoresistor layer is 5 - 120 μm, so that a whole sensitive diaphragm structure is formed between the silicon substrate in the area below the piezoresistor layer and the top of the secondary hole, thereby obtaining a MEMS sensitive structure, and the shape of the sensitive diaphragm is rectangular or square;

[0019] On the basis of the above steps, the following further steps can be included:

[0020] The etching solution used in the wet etching in step S7 is alkaline.

[0021] In the photolithography process in step S2, a photoresist with a thickness of 2.0 μm is evenly coated on the surface of the first oxide layer. In the implantation method, boron is implanted at 60 KeV, and the dosage is 7.4E14.

[0022] In step S3, the insulating layer is a deposited silicon nitride layer. The process temperature during preparation is 700 °C, and the preparation time is 45 min.

[0023] In step S4, the photolithography conditions are as follows: a photoresist with a thickness of 2.5 μm is evenly coated on the insulating layer at the photolithography position. The etching conditions are as follows: the power of the etching equipment is 600 W, and the etching time is 65 s.

[0024] In step S4, the metal for magnetron sputtering is aluminum. The top of the metal lead layer should protrude from the insulating layer.

[0025] In step S5, a first-level hole is prepared through a photolithography and etching process. The photolithography conditions are for a photoresist with a thickness of 6 μm, and the etching conditions are: the power is 1000 W, and the etching time is 45 min.

[0026] Advantages of the invention:

[0027] The MEMS sensitive structure provided by the present invention has the advantages of a small opening and a large inner cavity, effectively maintaining a small chip area, reducing the requirements for the capabilities of processing equipment, having a simple process, and being applicable to the manufacture of MEMS sensitive structure chips; compared with the traditional sensitive diaphragm cavity structure, the preparation steps provided by the present invention form a sensitive diaphragm by using a two-stage hole structure with different apertures and being interconnected. While ensuring a highly consistent thickness of the sensitive diaphragm, the size of the piezoresistive pressure sensor chip is reduced, realizing the miniaturized design of the pressure sensor. Description of the drawings:

[0029] Figure 1 It is a schematic structural diagram after step S1 of preparing the MEMS sensitive structure;

[0030] Figure 2 It is a schematic structural diagram after step S2 of preparing the MEMS sensitive structure;

[0031] Figure 3 It is a schematic structural diagram after step S3 of preparing the MEMS sensitive structure;

[0032] Figure 4 It is a schematic structural diagram after step S4 of preparing the MEMS sensitive structure;

[0033] Figure 5 It is a schematic structural diagram after step S5 of preparing the MEMS sensitive structure;

[0034] Figure 6 It is a schematic structural diagram after step S6 of preparing the MEMS sensitive structure;

[0035] Figure 7 It is a schematic structural diagram after the step of preparing the MEMS sensitive structure S7. Specific implementation manner:

[0037] As Figure 1 shown, a MEMS sensitive structure includes a silicon substrate 8, a first oxide layer 1 is covered on the upper surface of the silicon substrate 8, and a second oxide layer 11 is covered on the lower surface of the silicon substrate 8.

[0038] A piezoresistor 2 is provided on the silicon substrate 8 below the first oxide layer 1, and an insulating layer 3 is covered on the upper surface of the first oxide layer 1. Through holes corresponding to the piezoresistor 2 are provided on the insulating layer 3 and the first oxide layer 1, and a lead layer 5 communicating with the piezoresistor 2 is provided in the through holes. The upper end of the lead layer 5 extends out of the insulating layer 3 for a certain distance.

[0039] An upward first-stage hole 6 is provided on the second oxide layer 11 and the silicon substrate 8. The first-stage hole 6 has a blind hole structure, and the depth of the first-stage hole 6 is less than half of the thickness of the silicon substrate 8. A protective layer 10 is covered on the hole wall of the first-stage hole 6 and the surface of the second oxide layer 11.

[0040] A second-stage hole 7 communicating with it is provided on the silicon substrate 8 upward and outward from the bottom of the first-stage hole 6. The distance between the upper end of the second-stage hole 7 and the piezoresistor 2 is 5 - 120 μm, so that a whole sensitive diaphragm structure is formed between the silicon substrate 8 in the area below the piezoresistor layer and the upper end opening of the second-stage hole 7. The shape of the sensitive diaphragm 9 is rectangular or square. The diameter of the middle part of the second-stage hole 7 is larger than the diameters of both ends of the second-stage hole 7.

[0041] As Figures 2 - 7 shown, a preparation method of a MEMS sensitive structure is characterized in that it includes the following steps:

[0042] S1: Deposit the first oxide layer 1 and the second oxide layer 11 on the surface of the silicon substrate 8 silicon wafer by thermal oxidation or chemical vapor deposition. The first oxide layer 1 covers the upper surface of the silicon substrate 8, and the second oxide layer 11 covers the lower surface of the silicon substrate 8.

[0043] S2: Lithograph a resist pattern on the surface of the first oxide layer 1 through a lithography process, and prepare a piezoresistor layer 2 corresponding to the resist pattern under the first oxide layer 1 by an implantation method; when performing the lithography process, first evenly apply a 2.0 μm thick photoresist on the surface of the first oxide layer 1, and boron is implanted through 60 KeV in the implantation method, and the dosage is 7.4E14.

[0044] S3: Deposit silicon nitride on the surface of the first oxide layer 1 as the insulating layer 3. The process temperature for preparing the insulating layer 3 is 700 °C, and the preparation time is 45 min.

[0045] S4: Prepare lead holes 4 on the insulating layer 3 through photolithography and etching processes. The photolithography condition is to uniformly coat a photoresist with a thickness of 2.5 μm on the insulating layer 3 at the photolithography position. The etching conditions are as follows: the power of the etching equipment is 600 W, and the etching time is 65 s.

[0046] Prepare a metal lead layer 5 that forms a connected fit with the varistor layer 2 in the lead holes 4 by magnetron sputtering. The metal for magnetron sputtering is aluminum, and the top of the metal lead layer 5 should protrude from the insulating layer 3.

[0047] S5: There is a first-level hole 6 on the second oxide layer 11 that extends upward into the silicon substrate 8. The first-level hole 6 is a blind hole with an opening downward and is prepared through photolithography and etching processes. The photolithography condition is to uniformly apply a photoresist with a thickness of 6 μm on the photolithography surface. During etching, the power of the etching equipment is 1000 W, and the etching time is 45 min. Then deposit second silicon oxide on the surfaces of the first-level hole 6 and the second oxide layer 11 as a protective layer 10.

[0048] S6: Remove the protective layer 10 on the bottom surface of the first-level hole 6 through an etching equipment, and retain the protective layer 10 on the hole wall of the first-level hole 6. Thus, the silicon substrate 8 is exposed.

[0049] S7: Perform wet etching with an alkaline solution at an etching temperature of 80 °C for 15 h to prepare second-level holes 7 with a certain depth upward and on both sides from the bottom surface of the first-level hole 6. The thickness between the top of the second-level hole 7 and the varistor layer 2 is 5 - 120 μm, thereby forming a whole sensitive film 9 under the varistor layer 2, and thus obtaining a MEMS sensitive structure.

[0050] Since it is wet etching, the second-level holes 7 will also etch toward both sides when etching upward, so the aperture in the middle of the formed second-level holes 7 is larger than that at the upper and lower ends.

Claims

1. A method for preparing a MEMS sensitive structure, the MEMS sensitive structure comprising a silicon substrate (8), a first oxide layer (1) provided on the upper surface of the silicon substrate (8), a second oxide layer (11) provided on the lower surface of the silicon substrate (8), a piezoresistor (2) provided below the first oxide layer (1), an insulating layer (3) provided above the first oxide layer (1), through holes corresponding to the piezoresistor (2) are provided on the insulating layer (3) and the first oxide layer (1), a lead layer (5) communicating with the piezoresistor (2) is provided in the through holes, a sensitive diaphragm (9) is provided below the piezoresistor (2), a primary hole (6) is provided on the second oxide layer (11) and the silicon substrate (8), a secondary hole (7) communicating with the primary hole (6) is provided on the silicon substrate (8) at one end of the primary hole (6), and one end of the secondary hole (7) communicates with the sensitive diaphragm (9); It is characterized in that: It includes the following steps: S1: Deposit an oxide layer on the surface of the silicon substrate (8) wafer. The first oxide layer (1) covers the upper surface of the silicon substrate (8), and the second oxide layer (11) covers the lower surface of the silicon substrate (8); S2: Lithographically pattern a resist on the surface of the first oxide layer (1) through a lithography process, and prepare a piezoresistor layer (2) corresponding to the resist pattern under the first oxide layer (1) by an implantation method; S3: Deposit silicon nitride on the surface of the first oxide layer (1) as the insulating layer (3); S4: Prepare lead holes (4) on the insulating layer (3) through a lithography and etching process, and prepare a metal lead layer (5) that forms a communicating fit with the piezoresistor layer (2) in the lead holes (4) by magnetron sputtering; S5: Provide a primary hole (6) extending upward into the silicon substrate (8) on the second oxide layer (11), and prepare a protective layer (10) on the primary hole (6) and the second oxide layer (11); S6: Remove the protective layer (10) on the bottom surface of the primary hole (6) through an etching device, and retain the protective layer (10) on the hole wall of the primary hole (6); S7: Prepare secondary holes (7) with a certain depth upward and on both sides from the bottom surface of the primary hole (6) by wet etching. The thickness between the top of the secondary hole (7) and the piezoresistor layer (2) is 5 - 120 μm, so as to form a whole sensitive diaphragm (9) below the piezoresistor layer (2), thereby obtaining the MEMS sensitive structure; In the lithography process in step S2, a photoresist with a thickness of 2.0 μm is uniformly coated on the surface of the first oxide layer (1). In the implantation method, boron is implanted at 60 KeV, and the dosage is 7.4E14; the lithography conditions in step S4: a photoresist with a thickness of 2.5 μm is uniformly coated on the insulating layer (3) at the lithography position. The etching conditions: the power of the etching device is 600 W, and the etching time is 65 s.

2. The manufacturing method of a MEMS sensitive structure according to claim 1, characterized in that: The etching solution used in the wet etching in step S7 is alkaline.

3. The preparation method of a MEMS sensitive structure according to claim 1, characterized in that: In step S3, the insulating layer (3) is a deposited silicon nitride layer. The process temperature during preparation: 700 °C, and the preparation time is 45 min.

4. The manufacturing method of a MEMS sensitive structure according to claim 1, characterized in that: In step S4, the metal for magnetron sputtering is aluminum. The top of the metal lead layer (5) should protrude from the insulating layer (3).

5. The manufacturing method of a MEMS sensitive structure according to claim 1, wherein: In the step S5, the first-level holes (6) are prepared by a photolithography and etching process. The photolithography condition is to apply a photoresist with a thickness of 6 μm, and the etching conditions are: power of 1000 W and etching time of 45 min.

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