A distributed power amplifier and its gain control method, and a signal transmitting device

Abstract

The present invention discloses a distributed power amplifier and its gain control method and signal transmitting device, which relate to the field of radio frequency integrated circuit technology, in order to meet the current demand for multi-mode of radio frequency front-end and achieve the purpose of outputting different gains and different output powers for different frequency bands of the current radio frequency front-end. The distributed power amplifier includes: an input matching circuit, a signal amplification circuit and an output matching circuit. The input matching circuit includes N input matching sub-circuits and N-1 first switching sub-circuits, and the N input matching sub-circuits are connected in series through N-1 first switching sub-circuits. The output matching circuit includes N output matching sub-circuits and N-1 second switching sub-circuits, and the N output matching sub-circuits are connected in series through N-1 second switching sub-circuits. The signal amplification circuit includes N signal amplification sub-circuits, and each signal amplification sub-circuit is connected between a corresponding input matching sub-circuit and a corresponding output matching sub-circuit.

Description

Technical Field

[0001] The present invention relates to the technical field of radio frequency integrated circuits, and in particular to a distributed power amplifier, a gain control method thereof, and a signal transmitting device. Background Art

[0002] With the continuous development of new wireless communication standards and technologies, base stations and RF terminal products are moving towards broadband, multi-mode, and integration. As the primary energy-consuming component in the RF front-end transmit path, RF power amplifiers are facing higher requirements for output power, bandwidth, efficiency, and other performance.

[0003] Existing distributed amplifiers utilize the parasitic capacitance of transistors as part of the characteristic impedance of artificial transmission lines, achieving ultra-wideband performance through a multi-section inductor-capacitor structure. This overcomes the gain-bandwidth product limitations of traditional amplifiers and offers superior performance across ultra-wideband frequencies. However, most distributed amplifiers only focus on increasing gain, improving efficiency, and further increasing bandwidth, failing to meet the current multi-mode requirements of RF front-ends and achieving the goal of outputting varying gains and output powers for different frequency bands. Summary of the Invention

[0004] The purpose of the present invention is to provide a distributed power amplifier and its gain control method, and a signal transmitting device to meet the current demand for multi-mode of the RF front end and achieve the purpose of the current RF front end outputting different gains and different output powers for different frequency bands.

[0005] In order to achieve the above object, the present invention provides the following technical solutions:

[0006] In a first aspect, the present invention provides a distributed power amplifier, comprising: an input matching circuit, a signal amplification circuit, and an output matching circuit, wherein:

[0007] The input matching circuit includes N input matching sub-circuits and N-1 first switch sub-circuits, and the N input matching sub-circuits are connected in series through the N-1 first switch sub-circuits.

[0008] The output matching circuit includes N output matching sub-circuits and N-1 second switch sub-circuits, and the N output matching sub-circuits are connected in series through the N-1 second switch sub-circuits.

[0009] The signal amplifying circuit includes N signal amplifying sub-circuits. A first end of each signal amplifying sub-circuit is electrically connected to a corresponding input matching sub-circuit, and a second end of each signal amplifying sub-circuit is electrically connected to a corresponding output matching sub-circuit.

[0010] The first switch sub-circuit is used to control the corresponding input matching sub-circuit to receive the radio frequency signal based on the target control signal generated by the preset condition.

[0011] The signal amplification subcircuit is used to perform gain processing on the radio frequency signal after the corresponding input matching subcircuit receives the radio frequency signal to obtain a target gain signal.

[0012] The second switch sub-circuit is used to control the corresponding output matching sub-circuit to output a target gain signal based on the target control signal; wherein N is a positive integer.

[0013] Compared to the prior art, the distributed power amplifier provided by the present invention features an input matching circuit in which N input matching subcircuits are connected in series via N-1 first switching subcircuits, and an output matching circuit in which N output matching subcircuits are connected in series via N-1 second switching subcircuits. Each input matching subcircuit is connected to a corresponding output matching subcircuit via a signal amplification subcircuit. Based on this, the distributed power amplifier provided by the present invention can generate a target control signal based on preset conditions. The first switching subcircuit controls the corresponding input matching subcircuit to receive a radio frequency signal based on the target control signal. After the corresponding input matching subcircuit receives the radio frequency signal, the signal amplification subcircuit performs gain processing on the radio frequency signal to obtain a target gain signal. The second switching subcircuit controls the corresponding output matching subcircuit to output the target gain signal based on the target control signal. Therefore, each signal amplification sub-circuit in the distributed power amplifier provided by the present invention can form a first-level amplification structure with the corresponding input matching sub-circuit and output matching sub-circuit, so that when RF signals of different frequencies are input, different target control signals can be generated according to different preset conditions, so that RF signals of different frequencies can be gain-processed by different signal amplification sub-circuits, so as to meet the current RF front-end's demand for multi-mode and achieve the purpose of the current RF front-end outputting different gains and different output powers for different frequency bands.

[0014] In a second aspect, the present invention further provides a gain control method for a distributed power amplifier, which is applied to the distributed power amplifier described in the technical solution of the first aspect. The gain control method includes:

[0015] The first switch subcircuit generates a target control signal based on a preset condition, controlling the corresponding input matching subcircuit to receive the radio frequency signal;

[0016] After the corresponding input matching subcircuit receives the RF signal, the signal amplification subcircuit performs gain processing on the RF signal to obtain a target gain signal;

[0017] The second switch sub-circuit controls the corresponding output matching sub-circuit to output the target gain signal based on the target control signal.

[0018] Compared with the prior art, the beneficial effects of the gain control method of the distributed power amplifier provided by the present invention are the same as the beneficial effects of the distributed power amplifier described in the above technical solution, and are not described in detail here.

[0019] In a third aspect, the present invention further provides a signal transmitting device, comprising the distributed power amplifier described in the technical solution of the first aspect.

[0020] Compared with the prior art, the beneficial effects of the signal transmitting device provided by the present invention are the same as the beneficial effects of the distributed power amplifier described in the above technical solution, and are not described in detail here. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0022] Figure 1 A circuit diagram of a uniform distributed power amplifier in the prior art;

[0023] Figure 2 A circuit diagram of a non-uniform distributed power amplifier in the prior art;

[0024] Figure 3 A schematic diagram of the structure of a distributed power amplifier provided in an embodiment of the present invention;

[0025] Figure 4 A circuit diagram of a distributed power amplifier provided by an embodiment of the present invention;

[0026] Figure 5 A schematic structural diagram of a first switch sub-circuit and a second switch sub-circuit provided in an embodiment of the present invention;

[0027] Figure 6a and Figure 6b A schematic diagram of a harmonic control subcircuit provided in an embodiment of the present invention;

[0028] Figure 7 This is a flow chart of a gain control method for a distributed power amplifier provided by an embodiment of the present invention.

[0029] Reference numerals:

[0030] 11-input matching sub-circuit, 12-first switch sub-circuit;

[0031] 121-first signal transmission unit, 122-second signal transmission unit;

[0032] 21-signal amplification sub-circuit, 211-gate bias unit;

[0033] 212-drain bias unit, 213-gain unit;

[0034] 214-compensation unit, 31-output matching sub-circuit;

[0035] 32 - second switch sub-circuit, 41 - harmonic control sub-circuit;

[0036] 411 - filtering unit, 111 - first input matching sub-circuit;

[0037] 112 - second input matching sub-circuit, 311 - first output matching sub-circuit;

[0038] 312 - second output matching sub-circuit, T1 - first transistor;

[0039] T2-second transistor, T3-third transistor;

[0040] T4-fourth transistor, T5-fifth transistor;

[0041] VS1 is the first driving power supply terminal, VS2 is the second driving power supply terminal. DETAILED DESCRIPTION

[0042] To facilitate a clear description of the technical solutions of the embodiments of the present invention, the words "first" and "second" are used in the embodiments of the present invention to distinguish between identical or similar items with substantially the same functions and effects. For example, the first threshold and the second threshold are merely used to distinguish between different thresholds and do not limit their order. Those skilled in the art will understand that the words "first" and "second" do not limit the quantity or execution order, and the words "first" and "second" do not necessarily mean different.

[0043] It should be noted that, in the present invention, words such as "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in the present invention should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0044] In the present invention, "at least one" refers to one or more, and "more" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: the existence of A alone, the existence of A and B at the same time, and the existence of B alone, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following items" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b or c can represent: a, b, c, the combination of a and b, the combination of a and c, the combination of b and c, or the combination of a, b and c, where a, b, c can be single or multiple.

[0045] Wireless communication technology is used in a wide range of fields, from military and defense to civilian and commercial applications. With the development of 5G technology, the need to meet communication demands in high-bandwidth, low-latency scenarios is increasing, placing increasingly stringent performance requirements on each module of the wireless communication link. As the primary energy-consuming component in the RF front-end transmit path, RF power amplifiers (PAs) face ever-higher requirements for output power, bandwidth, efficiency, and other performance. Especially with the advancement of new wireless communication standards and technologies, base stations and RF terminal products are also moving towards broadband, multi-mode, and integrated design.

[0046] Currently, bandwidth-expanding technologies include balanced amplifiers, lossy matching, active matching, and negative feedback, but none of these techniques can fundamentally overcome the amplifier's gain-bandwidth product limitations. Some researchers have also employed filter matching and real-frequency techniques to increase bandwidth, but these require numerous matching components, all of which are lumped components. These components can exhibit excessive parasitics at high frequencies, compromising amplifier reliability.

[0047] In the existing technology, distributed amplifiers use the parasitic capacitance of transistors as part of the characteristic impedance of artificial transmission lines, and achieve ultra-wideband through a multi-section inductor-capacitor structure, overcoming the limitations of the gain-bandwidth product of traditional amplifiers and having better performance in ultra-wide frequency bands.

[0048] The following first describes the working principle of the distributed power amplifier using the circuit structure of the uniform distributed power amplifier in the prior art. Figure 1 As shown, the basic principle of the distributed power amplifier is to connect the inductor element L in series at the input of the gain unit. g Connect the input terminals of several gain units and connect the inductor element L in series at the output terminal of the gain unit. d Connect the output terminals of several gain units, an inductor element L g / 2 through several inductive elements L g and an inductive element Lg / 2 in series to form an input artificial transmission line, an inductor element L d / 2 through several inductive elements L d and an inductive element L d / 2 are connected in series to form an output artificial transmission line, and the RF signal is input through the input end RF of the artificial transmission line. in After being amplified by several gain units, it is superimposed step by step on the output artificial transmission line and then passes through the signal output terminal RF out Output signal.

[0049] According to transmission line theory, the expression of the gain of a traditional distributed power amplifier is as follows:

[0050]

[0051] In the above formula, N is the total number of gain units in the distributed power amplifier, g m is the transconductance of a single gain unit, and Z0 is the characteristic impedance. The expression of the characteristic impedance Z0 is as follows:

[0052]

[0053] In the above formula, L G is the total inductance of the input artificial transmission line, L D is the total inductance of the output artificial transmission line, C GS1 is the equivalent input capacitance of the gain unit, C DS1 is the equivalent output capacitance of the gain unit.

[0054] It is known that the bandwidth of the distributed power amplifier is determined by the cutoff frequency f of the overall circuit. T Determine the cutoff frequency f of the distributed power amplifier T The expression is as follows:

[0055]

[0056] From this we can see that if we want to increase the bandwidth, we can reduce the equivalent parasitic capacitance value of the gain unit.

[0057] In a uniform distributed amplifier, the input artificial transmission line and the output artificial transmission line are both uniform structures. After being amplified, the RF signal will be transmitted to the source and the load Z. L Transmission occurs in two directions. Although the reflected signal will eventually be absorbed by the absorption resistor Rd, the gain efficiency of the uniformly distributed power amplifier is very low.

[0058] In order to improve the gain efficiency, it is necessary to optimize the absorption resistor Rd. In the prior art, a method is proposed as shown in the attached figure. Figure 2The non-uniform distributed amplifier structure shown in the figure. In this case, the input artificial transmission line has a characteristic impedance of Z g The output artificial transmission line adopts the characteristic impedance Z d A microstrip line with gradually decreasing characteristic impedance, for example, Z d,1 Greater than the characteristic impedance Z d,2 , characteristic impedance Z d,2 Greater than the characteristic impedance Z d,3 , and so on, in order to achieve matching terminal load while transferring most of the output power to the load Z L , curbing the leakage of output power to the source.

[0059] From the above, it can be seen that although the existing non-uniform distributed power amplifier has a higher gain efficiency than the uniform distributed power amplifier, it cannot meet the current RF front-end's demand for multi-mode, and cannot achieve the current RF front-end's purpose of outputting different gains and different output powers for different frequency bands.

[0060] In order to solve the above technical problems, Figure 3 As shown, an embodiment of the present invention provides a distributed power amplifier, including an input matching circuit, a signal amplification circuit, and an output matching circuit, wherein:

[0061] The input matching circuit includes N input matching sub-circuits 11 and N−1 first switch sub-circuits 12 . The N input matching sub-circuits 11 are connected in series via the N−1 first switch sub-circuits 12 .

[0062] The output matching circuit includes N output matching sub-circuits 31 and N−1 second switch sub-circuits 32 . The N output matching sub-circuits 31 are connected in series via the N−1 second switch sub-circuits 32 .

[0063] The signal amplification circuit includes N signal amplification sub-circuits 21 . A first end of each signal amplification sub-circuit 21 is electrically connected to a corresponding input matching sub-circuit 11 , and a second end of each signal amplification sub-circuit 21 is electrically connected to a corresponding output matching sub-circuit 31 .

[0064] The first switch sub-circuit 12 is configured to control the corresponding input matching sub-circuit 11 to receive the radio frequency signal based on a target control signal generated based on a preset condition.

[0065] The signal amplification sub-circuit 21 is used to perform gain processing on the radio frequency signal after the corresponding input matching sub-circuit 11 receives the radio frequency signal, so as to obtain a target gain signal.

[0066] The second switch sub-circuit 32 is used to control the corresponding output matching sub-circuit 31 to output a target gain signal based on the target control signal; wherein N is a positive integer.

[0067] The specific structure of the distributed power amplifier described above shows that: in the input matching circuit, N input matching sub-circuits 11 are connected in series via N-1 first switch sub-circuits 12; in the output matching circuit, N output matching sub-circuits 31 are connected in series via N-1 second switch sub-circuits 32; and each input matching sub-circuit 11 is connected to a corresponding output matching sub-circuit 31 via a signal amplification sub-circuit 21. Based on this, the distributed power amplifier provided by the embodiments of the present invention can generate a target control signal according to preset conditions. The first switch sub-circuit 12 controls the corresponding input matching sub-circuit 11 to receive a radio frequency signal based on the target control signal. After the corresponding input matching sub-circuit 11 receives the radio frequency signal, the signal amplification sub-circuit 21 performs gain processing on the radio frequency signal to obtain a target gain signal. The second switch sub-circuit 32 controls the corresponding output matching sub-circuit 31 to output the target gain signal based on the target control signal. Therefore, each signal amplification sub-circuit 21 in the distributed power amplifier provided by the embodiment of the present invention can form a first-level amplification structure with the corresponding input matching sub-circuit 11 and the output matching sub-circuit, so that when RF signals of different frequencies are input, different target control signals can be generated according to different preset conditions, so that RF signals of different frequencies can be gain-processed by different signal amplification sub-circuits 21, so as to meet the current RF front-end's demand for multi-mode and achieve the purpose of the current RF front-end outputting different gains and different output powers for different frequency bands.

[0068] The preset conditions in the above embodiment can be generated according to the frequency of the RF signal, or can also be generated according to the output power of the target gain signal, so as to achieve the goal of controlling RF signals of different frequencies to pass through different signal amplification sub-circuits 21 when the RF signal is input. The embodiment of the present invention does not limit this.

[0069] Specifically, the input matching circuit in the above embodiment may include an input artificial transmission line and N-1 first switch sub-circuits 12. The N-1 first switch sub-circuits 12 divide the input artificial transmission line into N segments, with each segment electrically connected via a first switch sub-circuit 12. Similarly, the output matching sub-circuit 31 includes an output artificial transmission line and N-1 second switch sub-circuits 32. The N-1 second switch sub-circuits 32 divide the output artificial transmission line into N segments, with each segment electrically connected via a first switch sub-circuit 12.

[0070] The impedance of the output artificial transmission line can be obtained by the following formula:

[0071]

[0072] In the above formula, R ds is the output impedance of the transistor per millimeter, R L is the terminal load Z L Impedance, WQi is the total gate width. In practical applications, the R ds , thus determining the total gate width W required Qi After the number of stages N is determined, the impedance value of each microstrip line in the output matching sub-circuit 31 can be calculated at the same time.

[0073] In some embodiments, as Figure 4 As shown, when N=2, in the distributed power amplifier, the input matching circuit includes a first input matching sub-circuit 111, a second input matching sub-circuit 112, a first signal amplification sub-circuit, a first output matching sub-circuit 311, a second output matching sub-circuit 312, one first switch sub-circuit 12, and one second switch sub-circuit 32. Thus, the first input matching sub-circuit 111, the first signal amplification sub-circuit 21, and the first output matching sub-circuit 311 constitute a first-stage power amplification structure, and the second input matching sub-circuit 112, the second signal amplification sub-circuit, and the second output matching sub-circuit 312 constitute a second-stage power amplification structure. A first switch subcircuit 12 is connected in series between the first input matching subcircuit 111 and the second input matching subcircuit 112, and a second switch subcircuit 32 is connected in series between the first output matching subcircuit 311 and the second output matching subcircuit 312. The conduction direction of the first switch subcircuit 12 and the conduction direction of the second switch subcircuit 32 are controlled by a target control signal, thereby controlling the RF signal to undergo gain processing through the first-stage power amplification structure to output a first target gain signal; or controlling the RF signal to undergo gain processing through the second-stage power amplification structure to output a second target gain signal; or controlling the RF signal to undergo gain processing through both the first-stage power amplification structure and the second-stage power amplification structure to ultimately output a third target gain signal. Therefore, when N = 2, three target gain signals can actually be output, and when the third target gain signal is output, the first and second-stage power amplification structures are actually shared, which can reduce circuit area to a certain extent. In practice, this can be set according to specific needs. For example, N can be any positive integer, and this is not specifically limited in the embodiments of the present invention.

[0074] It can be understood that the first switch sub-circuit 12 and the second switch sub-circuit 32 are both controlled by the target control signal. Therefore, in the actual process, when the first switch sub-circuit 12 turns on the two adjacent input matching sub-circuits 11, the corresponding second switch sub-circuit 32 should also turn on the corresponding two adjacent output matching sub-circuits 31. Similarly, when the first switch sub-circuit 12 disconnects the two adjacent input matching sub-circuits 11, the corresponding second switch sub-circuit 32 should also disconnect the corresponding two adjacent output matching sub-circuits 31. That is, the state of the first switch sub-circuit 12 should be consistent with the state of the corresponding second switch sub-circuit 32.

[0075] In one possible implementation, Figure 4 and Figure 5 As shown, the first switch sub-circuit 12 and the second switch sub-circuit 32 each include a signal input terminal IN, a first drive power terminal VS1, a second drive power terminal VS2, and a first signal transmission unit 121 and a second signal transmission unit 122 connected in parallel. The signal input terminal IN is electrically connected to the first end of the first signal transmission unit 121 and the first end of the second signal transmission unit 122, respectively. The first drive power terminal VS1 and the second drive power terminal VS2 are used to control the first signal transmission unit 121 to output a valid signal and the second signal transmission unit 122 to output an invalid signal based on a target control signal. Alternatively, the first drive power terminal VS1 and the second drive power terminal VS2 are used to control the first signal transmission unit 121 to output an invalid signal and the second signal transmission unit 122 to output a valid signal based on a target control signal; wherein the signal received by the signal input terminal IN is a valid signal.

[0076] Specifically, the first switch sub-circuit 12 and the second switch sub-circuit 32 have the same structure, both being single-pole double-throw switches.

[0077] In the first switch sub-circuit 12, the signal input terminal IN is electrically connected to the adjacent previous input matching sub-circuit 11. At this time, the effective signal received by the signal input terminal IN is a radio frequency signal that needs gain processing. The output terminal OUT1 of the first signal transmission unit 121 can be electrically connected to the adjacent next input matching sub-circuit 11, and the output terminal OUT2 of the second signal transmission unit 122 is connected to the adjacent next input matching sub-circuit 11 through a resistor R gGround. When it is necessary to transmit the signal received by the signal input terminal IN to the adjacent subsequent input matching sub-circuit 11, the first driving power supply terminal VS1 and the second driving power supply terminal VS2 can control the first signal transmission unit 121 to transmit the valid signal received by the signal input terminal IN, and the second signal transmission unit 122 to transmit the invalid signal to the ground terminal. When it is not necessary to transmit the signal received by the signal input terminal IN to the adjacent subsequent input matching sub-circuit 11, the first driving power supply terminal VS1 and the second driving power supply terminal VS2 can control the first signal transmission unit 121 to transmit the invalid signal to the adjacent subsequent input matching sub-circuit 11, and the second signal transmission unit 122 to transmit the valid signal received by the signal input terminal IN to the ground terminal, thereby achieving the effect of disconnecting the two adjacent input matching sub-circuits 11 in the circuit.

[0078] In the second switch sub-circuit 32, the signal input terminal IN is electrically connected to the adjacent previous output matching sub-circuit 31. At this time, the effective signal received by the signal input terminal IN is the RF signal after gain processing. The output terminal OUT1 of the first signal transmission unit 121 can be electrically connected to the adjacent next output matching sub-circuit 31, and the output terminal OUT2 of the second signal transmission unit 122 is connected to the load terminal Z of the output matching sub-circuit 31 of this stage. L When it is necessary to transmit the signal received by the signal input terminal IN to the adjacent next output matching sub-circuit 31, the first driving power supply terminal VS1 and the second driving power supply terminal VS2 can control the first signal transmission unit 121 to transmit the valid signal received by the signal input terminal IN, and the second signal transmission unit 122 to transmit the invalid signal to the load terminal Z of the output matching sub-circuit 31 of this stage. L When there is no need to transmit the signal received by the signal input terminal IN to the adjacent next input matching sub-circuit 11, the first driving power terminal VS1 and the second driving power terminal VS2 can control the first signal transmission unit 121 to transmit the invalid signal to the adjacent next output matching sub-circuit 31, and the second signal transmission unit 122 to transmit the valid signal received by the signal input terminal IN to the load terminal Z of the output matching sub-circuit 31 of this stage. L , achieving the effect of disconnecting two adjacent output matching sub-circuits 31 in the circuit.

[0079] In some embodiments, as Figure 4 and Figure 5 As shown, the first signal transfer unit 121 includes a first transistor T1 and a second transistor T2, and the second signal transfer unit 122 includes a third transistor T3 and a fourth transistor T4.

[0080] The first end of the first transistor T1 is electrically connected to the signal input end IN, the second end of the first transistor T1 is electrically connected to the first end of the second transistor T2, the second end of the second transistor T2 is grounded, the control end of the first transistor T1 is electrically connected to the first driving power supply end VS1, and the control end of the second transistor T2 is electrically connected to the second driving power supply end VS2, wherein the second end of the first transistor T1 is the output end of the first signal transmission unit 121.

[0081] The first end of the third transistor T3 is electrically connected to the first end of the first transistor T1, the second end of the third transistor T3 is electrically connected to the first end of the fourth transistor T4, the second end of the fourth transistor T4 is grounded, the control end of the third transistor T3 is electrically connected to the second driving power supply terminal VS2, and the control end of the fourth transistor T4 is electrically connected to the first driving power supply terminal VS1. The second end of the third transistor T3 serves as the output end of the second signal transmission unit 122. Based on this, by implementing a single-pole double-throw switch through the series-parallel structure of transistors, insertion loss can be reduced to a certain extent, thereby reducing the overall power consumption of the distributed power amplifier.

[0082] For example, when the first signal transmission unit 121 is required to output a valid signal and the second signal transmission unit 121 is required to output an invalid signal, the first driving power supply terminal VS1, under the control of the target control signal, drives the first transistor T1 to turn on, so that the valid signal can be transmitted to the second end of the first transistor T1. At the same time, the second driving power supply terminal VS2, under the control of the target control signal, drives the second transistor T2 to turn off, so that the voltage level of the first end of the second transistor T2 is not pulled down by the ground end, thereby outputting the valid signal through the output end OUT1 of the first signal transmission unit 121. At the same time, the first driving power supply terminal VS1, under the control of the target control signal, also turns on the fourth transistor T4. The second driving power supply terminal VS2, under the control of the target control signal, turns off the third transistor T3, so that the valid signal is not transmitted by the third transistor T3 to the first end of the fourth transistor T4, and the fourth transistor T4 outputs the invalid signal with its second end grounded through the output end OUT2 of the second signal transmission unit 122.

[0083] It is understood that, in practice, the target control signal controlling the signals output by the first driving power supply terminal VS1 and the second driving power supply terminal VS2 should be related to the types of the aforementioned transistors. For example, when the aforementioned transistors are both N-type transistors, the first driving power supply terminal VS1 outputs a voltage signal of 0 V, and the second driving power supply terminal VS2 outputs a voltage signal of -20 V. This embodiment of the present invention does not impose any specific limitation on this.

[0084] When the first signal transmission unit 121 is required to output an invalid signal and the second signal transmission unit 122 is required to output a valid signal, the first driving power supply terminal VS1 should be controlled by the target control signal to drive the first transistor T1 to be turned off and the second transistor T2 to be turned on, and the second driving power supply terminal VS2 should be controlled by the target control signal to drive the third transistor T3 to be turned on and the fourth transistor T4 to be turned off.

[0085] In one possible implementation, Figure 3 and Figure 4 As shown, the signal amplification subcircuit 21 includes a gate bias unit 211, a drain bias unit 212, at least one gain unit 213, and at least one compensation unit 214. The output end of the gate bias unit 211 is electrically connected to the control end of each gain unit 213, for providing a bias current to the gain unit 213. The drain bias unit 212 is electrically connected to the first end of each gain unit 213, and the second end of the gain unit 213 is grounded. The first end of each compensation unit 214 is electrically connected to the control end of the corresponding gain unit 213, and the second end of the compensation unit 214 is electrically connected to the corresponding input matching subcircuit 11, for performing compensation processing on the corresponding gain unit 213.

[0086] Exemplarily, the signal amplification subcircuit 21 may include multiple gain units 213 and compensation units 214 correspondingly connected to the multiple gain units 213. In the same signal amplification subcircuit 21, the gate bias unit 211 is used to provide a gate bias current to each gain unit 213 to achieve independent power supply to the gain unit 213 of each signal amplification subcircuit 21. The bias voltage of each gate bias unit 211 can be determined according to different requirements, and the total gate width W of each signal amplification subcircuit 21 is calculated based on the bias voltage. Qi Through the total gate width W Qi For example, when the third signal amplifying subcircuit 21 is required to perform gain processing on the RF signal, the gate bias unit 211 in the first signal amplifying subcircuit 21 and the second signal amplifying subcircuit 21 can be disconnected from the corresponding gain unit 213 to stop providing gate bias current to the corresponding gain unit 213. In this way, the RF signal cannot be gain processed by the gain unit 213 of the first signal amplifying subcircuit 21 and the gain unit 213 of the second signal amplifying subcircuit 21, and can and can only be gain processed by the gain unit 213 of the third signal amplifying subcircuit 21. Specifically, as Figure 3 As shown, the gate bias unit 211 includes a bias voltage source Vg and a bias inductor L chock , the bias voltage source Vg passes through the bias inductor L chock Electrically connected to the control terminal of each gain unit 213 .

[0087] The drain bias unit 212 is electrically connected to the first end of each gain unit 213 to provide a current path for the drain of the gain unit 213. Figure 3 and Figure 4 As shown, the drain bias unit 212 includes a drain power supply V d and a bias inductor L chock , bias inductor L chock Used to curb the current into the drain power supply V d In practice, each gain unit 213 may share one drain bias unit 212 , and the drain bias unit 212 is connected to the end of the first output matching sub-circuit 31 away from the second switch sub-circuit 32 .

[0088] For example, Figure 3 and Figure 4 As shown, the compensation unit 214 can be a compensation capacitor C g , each compensation capacitor C g The first end of the compensation capacitor C is electrically connected to the control end of the corresponding gain unit 213. g The second end of the compensation capacitor C is electrically connected to the corresponding input matching sub-circuit 11. g It is used to compensate the parasitic capacitance of the corresponding gain unit 213. Based on this, the embodiment of the present invention can also be designed to compensate the capacitance C in each signal amplification sub-circuit 21. g The cutoff frequency f of each signal amplification sub-circuit 21 is adjusted by adjusting the capacitance value. T , and according to the above principle analysis, the bandwidth of the distributed power amplifier is determined by the cutoff frequency f of the overall circuit. T Determine that when each signal amplification sub-circuit 21 has a different cutoff frequency f T When the power amplifier structure is realized in different frequency bands, the power amplifier structure with different bandwidths can be realized accordingly, and finally a distributed power amplifier with controllable bandwidth can be realized.

[0089] In some embodiments, as Figure 3 and Figure 4 As shown, the gain unit 213 includes a fifth transistor T5 and a gate resistor R g The control terminal of the fifth transistor T5 is connected to the gate resistor R g The first end of the fifth transistor T5 is electrically connected to the output end of the gate bias unit 211 , the first end of the fifth transistor T5 is electrically connected to the drain bias unit 212 , and the second end of the fifth transistor T5 is grounded.

[0090] Based on this, the control terminal of the fifth transistor T5 is connected to the gate resistor R g and bias inductor L chockThe bias voltage source Vg is electrically connected to the control terminal of the fifth transistor T5. When the gain unit 213 of this stage is needed to perform gain processing on the RF signal, the bias voltage source Vg supplies power to the control terminal of the fifth transistor T5. When the gain unit 213 of this stage is not needed to perform gain processing on the RF signal, the bias voltage source Vg stops supplying power to the control terminal of the fifth transistor T5.

[0091] In one possible implementation, Figure 3 As shown, the output matching circuit also includes N-1 harmonic control sub-circuits 41, the first end of each harmonic control sub-circuit 41 is electrically connected to the corresponding second switch sub-circuit 32, and the second end of each harmonic control sub-circuit 41 is electrically connected to the corresponding output matching sub-circuit 31, for filtering the corresponding signal and outputting the target gain signal.

[0092] In some embodiments, as Figure 6a and Figure 6b As shown, the harmonic control subcircuit 41 includes a first resistor R1, a second resistor R2, and a filter unit 411. Specifically, the filter unit 411 includes a filter inductor L and a filter capacitor C.

[0093] For example, Figure 6a As shown, the first end of the first resistor R1, the first end of the filter unit 411, and the first end of the second resistor R2 are all electrically connected, and the second end of the first resistor R1, the second end of the filter unit 411, and the second end of the second resistor R2 are all grounded. At this time, the first end of the filter inductor L is electrically connected to the first end of the first resistor R1, and the second end of the filter inductor L is connected in series with the filter capacitor C and then grounded. When the signal amplified by the gain unit 213 is transmitted from the first end of the first resistor R1 to the first end of the second resistor R2, the nonlinear signal therein is directly transmitted to the ground terminal through the filter unit 411 composed of the filter inductor L and the filter capacitor C, thereby completing the filtering process of the output signal of the signal amplification sub-circuit 21, and achieving the linearity optimization of the target gain signal.

[0094] For example, Figure 6bThe circuit diagram of another harmonic control subcircuit 41 is illustrated. The first end of the first resistor R1 is electrically connected to the first end of the second resistor R2 through the filter unit 411, and the second end of the first resistor R1, the second end of the filter unit 411, and the second end of the second resistor R2 are all grounded. At this time, the first end of the first resistor R1 is electrically connected to the first end of the filter inductor L, and the second end of the filter inductor L is electrically connected to the first end of the second resistor R2 and the first end of the filter capacitor C, respectively. The second end of the first resistor R1, the second end of the filter capacitor C, and the second end of the second resistor R2 are all grounded. When the signal amplified by the gain unit 213 is transmitted from the first end of the first resistor R1 to the first end of the second resistor R1 through the filter inductor L, the nonlinear signal therein is directly transmitted to the ground terminal through the filter unit 411 composed of the filter inductor L and the filter capacitor C, completing the filtering process of the output signal of the signal amplification subcircuit 21, and achieving the linearity optimization of the target gain signal.

[0095] The embodiment of the present invention also provides a gain control method for a distributed power amplifier, such as Figure 7 As shown, the gain control method applied to the distributed power amplifier described in the above embodiment includes:

[0096] S100: The first switch sub-circuit generates a target control signal based on a preset condition, controlling the corresponding input matching sub-circuit to receive a radio frequency signal;

[0097] S200: After the corresponding input matching subcircuit receives the radio frequency signal, the signal amplification subcircuit performs gain processing on the radio frequency signal to obtain a target gain signal;

[0098] S300: The second switch sub-circuit controls the corresponding output matching sub-circuit to output a target gain signal based on the target control signal.

[0099] Compared with the prior art, the beneficial effects of the gain control method of the distributed power amplifier provided by the embodiment of the present invention are the same as the beneficial effects of the distributed power amplifier described in the above embodiment, and are not described in detail here.

[0100] An embodiment of the present invention further provides a signal transmitting device, comprising the distributed power amplifier described in the above embodiment.

[0101] Compared with the prior art, the beneficial effects of the signal transmitting device provided by the embodiment of the present invention are the same as the beneficial effects of the distributed power amplifier described in the above embodiment, and are not described in detail here.

[0102] Although the present invention is described herein in conjunction with various embodiments, in the process of implementing the claimed invention, those skilled in the art can understand and implement other variations of the disclosed embodiments by reviewing the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude multiple situations. A single processor or other unit can implement several functions listed in the claims. Certain measures are recorded in different dependent claims, but this does not mean that these measures cannot be combined to produce good results.

[0103] Although the present invention has been described with reference to specific features and embodiments thereof, it will be apparent that various modifications and combinations may be made thereto without departing from the spirit and scope of the invention. Accordingly, this specification and drawings are merely illustrative of the invention as defined by the appended claims and are deemed to cover any and all modifications, variations, combinations or equivalents within the scope of the invention. It will be apparent that various modifications and variations may be made to the present invention by those skilled in the art without departing from the spirit and scope of the invention. Thus, the present invention is intended to include such modifications and variations as fall within the scope of the claims of the present invention and their equivalents.

Claims

1. A distributed power amplifier, characterized in that: include: Input matching circuit, signal amplification circuit and output matching circuit, wherein: The input matching circuit includes N input matching sub-circuits and N-1 first switch sub-circuits, and the N input matching sub-circuits are connected in series through the N-1 first switch sub-circuits; The output matching circuit includes N output matching sub-circuits and N-1 second switch sub-circuits, and the N output matching sub-circuits are connected in series through N-1 second switch sub-circuits; The signal amplification circuit includes N signal amplification sub-circuits, a first end of each signal amplification sub-circuit is electrically connected to the corresponding input matching sub-circuit, and a second end of each signal amplification sub-circuit is electrically connected to the corresponding output matching sub-circuit; The first switch sub-circuit is configured to control the corresponding input matching sub-circuit to receive a radio frequency signal based on a target control signal generated under a preset condition; The signal amplification subcircuit is used to perform gain processing on the radio frequency signal after the corresponding input matching subcircuit receives the radio frequency signal to obtain a target gain signal; The second switch sub-circuit is used to control the corresponding output matching sub-circuit to output the target gain signal based on the target control signal; wherein N is a positive integer.

2. The distributed power amplifier according to claim 1, wherein: The first switch sub-circuit and the second switch sub-circuit each include a signal input terminal, a first driving power terminal, a second driving power terminal, and a first signal transmission unit and a second signal transmission unit connected in parallel; The signal input end is electrically connected to the first end of the first signal transmission unit and the first end of the second signal transmission unit respectively; The first driving power supply terminal and the second driving power supply terminal are used to control the first signal transmission unit to output a valid signal and control the second signal transmission unit to output an invalid signal based on the target control signal; Or, the first driving power supply terminal and the second driving power supply terminal are used to control the first signal transmission unit to output the invalid signal and control the second signal transmission unit to output the valid signal based on the target control signal; wherein the signal received by the signal input terminal is the valid signal.

3. The distributed power amplifier according to claim 2, wherein: The first signal transmission unit includes a first transistor and a second transistor, and the second signal transmission unit includes a third transistor and a fourth transistor, wherein: A first terminal of the first transistor is electrically connected to the signal input terminal, a second terminal of the first transistor is electrically connected to the first terminal of the second transistor, a second terminal of the second transistor is grounded, a control terminal of the first transistor is electrically connected to the first driving power terminal, and a control terminal of the second transistor is electrically connected to the second driving power terminal, wherein the second terminal of the first transistor is an output terminal of the first signal transmission unit; The first end of the third transistor is electrically connected to the first end of the first transistor, the second end of the third transistor is electrically connected to the first end of the fourth transistor, the second end of the fourth transistor is grounded, the control end of the third transistor is electrically connected to the second driving power supply end, and the control end of the fourth transistor is electrically connected to the first driving power supply end, wherein the second end of the third transistor is the output end of the second signal transmission unit.

4. The distributed power amplifier according to claim 1, wherein: The signal amplification subcircuit includes a gate bias unit, a drain bias unit, at least one gain unit, and at least one compensation unit, wherein: The output end of the gate bias unit is electrically connected to the control end of each gain unit, and is used to provide a bias current to the gain unit; The drain bias unit is electrically connected to the first end of each gain unit, and the second end of the gain unit is grounded; The first end of each compensation unit is electrically connected to the control end of the corresponding gain unit, and the second end of the compensation unit is electrically connected to the corresponding input matching sub-circuit, for performing compensation processing on the corresponding gain unit.

5. The distributed power amplifier according to claim 4, wherein: The gain unit includes a fifth transistor and a gate resistor, the control end of the fifth transistor is electrically connected to the output end of the gate bias unit through the gate resistor, the first end of the fifth transistor is electrically connected to the drain bias unit, and the second end of the fifth transistor is grounded.

6. The distributed power amplifier according to claim 4, characterized in that The gate bias unit includes a bias voltage source and a bias inductor. The bias voltage source is electrically connected to the control terminal of each gain unit through the bias inductor.

7. The distributed power amplifier according to claim 1, wherein: The output matching circuit also includes N-1 harmonic control sub-circuits, wherein the first end of each harmonic control sub-circuit is electrically connected to the corresponding second switch sub-circuit, and the second end of each harmonic control sub-circuit is electrically connected to the corresponding output matching sub-circuit, and is configured to filter the corresponding signal and output the target gain signal.

8. The distributed power amplifier according to claim 7, wherein: The harmonic control subcircuit includes a first resistor, a second resistor and a filtering unit; The first end of the first resistor, the first end of the filter unit, and the first end of the second resistor are all electrically connected, and the second end of the first resistor, the second end of the filter unit, and the second end of the second resistor are all grounded; Alternatively, the first end of the first resistor is electrically connected to the first end of the second resistor through the filtering unit, and the second end of the first resistor, the second end of the filtering unit, and the second end of the second resistor are all grounded.

9. A gain control method for a distributed power amplifier, characterized in that: Applied to the distributed power amplifier according to any one of claims 1 to 8, the gain control method comprises: The first switch subcircuit generates a target control signal based on a preset condition, controlling the corresponding input matching subcircuit to receive a radio frequency signal; After the corresponding input matching subcircuit receives the radio frequency signal, the signal amplification subcircuit performs gain processing on the radio frequency signal to obtain a target gain signal; The second switch sub-circuit controls the corresponding output matching sub-circuit to output the target gain signal based on the target control signal.

10. A signal transmitting device, characterized in that: The invention comprises the distributed power amplifier according to any one of claims 1 to 8.

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