Semiconductor device

Abstract

A semiconductor device according to an embodiment can include a substrate, a first light emitting structure and a second light emitting structure disposed on the substrate, a first reflective electrode disposed on the first light emitting structure, a second reflective electrode disposed on the second light emitting structure, a connection electrode, a first electrode pad, and a second electrode pad. According to an embodiment, the first light emitting structure can include a first semiconductor layer of a first conductivity type, a first active layer disposed on the first semiconductor layer, a second semiconductor layer of a second conductivity type disposed on the first active layer, and a first via extending through the second semiconductor layer and the first active layer and exposing the first semiconductor layer. The second light emitting structure is spaced apart from the first light emitting structure and can include a third semiconductor layer of the first conductivity type, a second active layer disposed on the third semiconductor layer, and a fourth semiconductor layer of the second conductivity type disposed on the second active layer.

Description

[0001] This application is a divisional application of the invention patent application filed on December 21, 2017, with international application number PCT / KR2017 / 015267 and Chinese national phase application number 201780079603.7, entitled "Semiconductor Device".

[0002] Cross-references to related applications

[0003] This application claims priority to Korean Patent Application No. 10-2016-0177357, filed in Korea on December 23, 2016, the entire contents of which are incorporated herein by reference. Technical Field

[0004] The embodiments relate to semiconductor devices and methods for manufacturing semiconductor devices. Background Technology

[0005] Semiconductor devices, including compounds such as GaN and AlGaN, have many advantages such as wide and easily tunable bandgap energy, thus enabling them to be used in various ways as light-emitting devices, light-receiving devices, and various diodes.

[0006] In particular, light-emitting devices such as LEDs and laser diodes, obtained by using III-V or II-VI compound semiconductor materials, can achieve light with various wavelength bands such as red, green, blue, and ultraviolet due to advancements in thin-film growth techniques and device materials. Furthermore, light-emitting devices such as LEDs and laser diodes, obtained by using III-V or II-VI compound semiconductor materials, can achieve highly efficient white light sources by using fluorescent materials or combining colors. Compared to conventional light sources such as fluorescent lamps and incandescent lamps, these light-emitting devices offer advantages such as low power consumption, semi-permanent lifespan, fast response speed, safety, and environmental friendliness.

[0007] Furthermore, when using III-V or II-VI compound semiconductor materials to fabricate light-receiving devices such as photodetectors or solar cells, advancements in device materials enable the generation of photocurrents by absorbing light across various wavelength ranges, allowing the use of light from gamma rays to radio waves. Additionally, these light-receiving devices offer advantages such as fast response speed, safety, environmental friendliness, and ease of material control, making them readily applicable to power control, ultra-high frequency circuits, or communication modules.

[0008] Therefore, semiconductor devices have been applied to and expanded into transmission modules of optical communication tools, LED backlights replacing the backlights of cold cathode fluorescent lamps (CCFLs) that constitute liquid crystal displays (LCDs), white LED lighting devices replacing fluorescent lamps or incandescent bulbs, vehicle headlights, traffic lights, and sensors for detecting gases or fires. Furthermore, the applications of semiconductor devices can be extended to high-frequency application circuits, power control devices, or communication modules.

[0009] For example, a light-emitting device can be configured as a pn junction diode, which has the property of converting electrical energy into light energy by using elements from Group III-V or Group II-VI of the periodic table, and can achieve various wavelengths by adjusting the composition ratio of the compound semiconductor material.

[0010] For example, nitride semiconductors have attracted considerable attention in the development of optical and high-power electronic devices due to their high thermal stability and wide bandgap energy. In particular, blue, green, ultraviolet (UV), and red light-emitting devices using nitride semiconductors have been commercialized and are widely used.

[0011] For example, ultraviolet light-emitting devices refer to light-emitting diodes that generate light in the wavelength range of 200 nm to 400 nm. Within this wavelength range, shorter wavelengths can be used for sterilization, purification, etc., while longer wavelengths can be used for steppers, curing devices, etc.

[0012] Ultraviolet light can be classified according to its longest wavelength into UV-A (315nm to 400nm), UV-B (280nm to 315nm), and UV-C (200nm to 280nm). The UV-A (315nm to 400nm) range is used in various fields, such as industrial UV curing, printing ink curing, exposure machines, counterfeit currency detection, photocatalytic sterilization, and special lighting (e.g., aquariums / agriculture). The UV-B (280nm to 315nm) range is used for medical applications, and the UV-C (200nm to 280nm) range is used for air purification, water purification, and sterilization products.

[0013] Meanwhile, because there is a demand for semiconductor devices capable of providing high output, research is underway on semiconductor devices that can increase output power by applying a high-power source. For example, semiconductor devices in which multiple light-emitting structures are electrically connected have been studied as devices to provide high output. At this point, when high power is applied, there is a need for semiconductor devices that can provide high-power light, stably supply power to multiple light-emitting structures, and ensure reliability. Summary of the Invention

[0014] Technical issues

[0015] The embodiments can provide semiconductor devices capable of applying and providing light at high power, as well as methods for manufacturing semiconductor devices.

[0016] The embodiments provide a semiconductor device and a method for manufacturing the semiconductor device, which can connect multiple light-emitting structures in series and prevent current concentration, thereby improving reliability.

[0017] Technical solution

[0018] The semiconductor device according to an embodiment may include: a substrate; a first light-emitting structure disposed on the substrate, the first light-emitting structure including a first semiconductor layer of a first conductivity type; a first active layer disposed on the first semiconductor layer; and a second semiconductor layer of a second conductivity type; a second light-emitting structure disposed on the substrate and spaced apart from the first light-emitting structure, the second light-emitting structure including a third semiconductor layer of a first conductivity type; a second active layer disposed on the third semiconductor layer; and a fourth semiconductor layer of a second conductivity type; a connecting electrode electrically connected to the second semiconductor layer of the first light-emitting structure and the third semiconductor layer of the second light-emitting structure; the connecting electrode including: a main electrode; a first branch electrode, the... A first branch electrode is directly connected to the main electrode; a second branch electrode extends from one end of the first branch electrode; and a third branch electrode extends from the other end of the first branch electrode; wherein a first region of the main electrode is disposed on the second semiconductor layer, and a second region of the main electrode is disposed between the side surface of the first light-emitting structure and the side surface of the second light-emitting structure; and wherein the first branch electrode, the second branch electrode, and the third branch electrode are disposed on the third semiconductor layer; a first electrode pad is disposed on the first light-emitting structure and electrically connected to the first semiconductor layer; and a second electrode pad is disposed on the second light-emitting structure and electrically connected to the fourth semiconductor layer.

[0019] Beneficial effects

[0020] The semiconductor device and method of manufacturing the semiconductor device according to the embodiments have the advantages of being able to apply high power and provide high-power light.

[0021] The semiconductor device and method of manufacturing the semiconductor device according to the embodiments have the advantage that multiple light-emitting structures can be connected in series to prevent current concentration, thereby improving reliability.

[0022] The semiconductor device and method of manufacturing the semiconductor device according to the embodiments have the advantage that the reflective electrode and the pad electrode can be configured to be suitable for the flip chip bonding method, thereby facilitating the bonding process and improving the light extraction efficiency by increasing the reflectivity of the emitted light. Attached Figure Description

[0023] Figure 1 This is a plan view of a semiconductor device according to an embodiment of the present invention.

[0024] Figure 2 It is along Figure 1 The image shows a cross-sectional view of the semiconductor device shown by line AA.

[0025] Figure 3 It is along Figure 1 The image shows a cross-sectional view of line BB of the semiconductor device shown.

[0026] Figure 4 This is a view illustrating an example of a connection electrode applied to a semiconductor device according to an embodiment of the present invention.

[0027] Figures 5 to 11 This is a view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.

[0028] Figure 12 This is a view illustrating the phenomenon of current concentration occurring in a semiconductor device according to an embodiment of the present invention.

[0029] Figure 13 This is a plan view illustrating other examples of semiconductor devices according to embodiments of the present invention.

[0030] Figure 14 It is an explanation applied to Figure 13 A view of the shape of the light-emitting structure of another example of the semiconductor device shown.

[0031] Figure 15 It is an explanation applied to Figure 13 A view of the shape of the first insulating layer in another example of a semiconductor device shown.

[0032] Figure 16 It is an explanation applied to Figure 13 A view showing the shape of the first and second ohmic contact layers in another example of the semiconductor device shown.

[0033] Figure 17 It is an explanation applied to Figure 13 A view showing the shapes of the first and second reflective electrodes in another example of the semiconductor device shown.

[0034] Figure 18 It is an explanation applied to Figure 13 A view showing the shapes of the connection electrodes, the first metal layer, and the second metal layer of another example of the semiconductor device shown. Detailed Implementation

[0035] In the following description, embodiments will be described with reference to the accompanying drawings. In the description of the embodiments, where each layer (film), region, pattern, or structure may be referred to as being disposed "above" or "below" the substrate, each layer (film), region, pad, or pattern, the term "above" or "below" includes both "directly" and "indirectly inserted into another layer." Furthermore, the "above" or "below" of each layer will be described based on the accompanying drawings, but the embodiments are not limited thereto.

[0036] In the following, a semiconductor device and a method of manufacturing a semiconductor device according to embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0037] First, refer to Figure 1 and Figure 2 A semiconductor device according to an embodiment of the present invention is described. Figure 1 This is a plan view illustrating a semiconductor device according to an embodiment of the present invention, and Figure 2 It is along Figure 1 The image shows a cross-sectional view of the semiconductor device shown by line AA.

[0038] At the same time, for ease of understanding, in Figure 1 In the process, the first bonding pad 171 and the second bonding pad 172 are treated in a transparent manner, and the first insulating layer 161 and the second insulating layer 162 are omitted to facilitate the placement relationship between components.

[0039] The semiconductor device according to the embodiment may include a first light-emitting structure 110 and a second light-emitting structure 120 disposed on a substrate 100, such as Figure 1 and Figure 2 As shown in the diagram, the first light-emitting structure 110 and the second light-emitting structure 120 can be spaced apart from each other on the substrate 100. The spacer S can be disposed between the side surfaces of the first light-emitting structure 110 and the second light-emitting structure 120 facing each other on the upper surface of the substrate 100. Therefore, the lower side of the first light-emitting structure 110 and the lower side of the second light-emitting structure 120 are in contact with the upper surface of the substrate 100, but can be spaced apart from each other by the spacer S on the substrate 100.

[0040] The substrate 100 may be selected from the group consisting of sapphire substrate (Al2O3), SiC, GaAs, GaN, ZnO, Si, GaP, InP and Ge. For example, the substrate 100 may be configured as a patterned sapphire substrate (PSS) having a raised and recessed pattern formed on its upper surface.

[0041] The first light-emitting structure 110 may include a first semiconductor layer 111, a first active layer 112, and a second semiconductor layer 113. The first active layer 112 may be disposed between the first semiconductor layer 111 and the second semiconductor layer 113. For example, the first active layer 112 may be disposed on the first semiconductor layer 111, and the second semiconductor layer 113 may be disposed on the first active layer 112.

[0042] According to an embodiment, the first semiconductor layer 111 can be configured as a semiconductor layer of a first conductivity type, and the second semiconductor layer 113 can be configured as a semiconductor layer of a second conductivity type. The first semiconductor layer 111 can be configured as an n-type semiconductor layer, and the second semiconductor layer 113 can be configured as a p-type semiconductor layer.

[0043] Of course, according to another embodiment, the first semiconductor layer 111 can be configured as a p-type semiconductor layer, and the second semiconductor layer 113 can be configured as an n-type semiconductor layer. Hereinafter, for ease of description, the embodiments will be described based on the first semiconductor layer 111 being configured as an n-type semiconductor layer and the second semiconductor layer 113 being configured as a p-type semiconductor layer.

[0044] The second light-emitting structure 120 may include a third semiconductor layer 121, a second active layer 122, and a fourth semiconductor layer 123. The second active layer 122 may be disposed between the third semiconductor layer 121 and the fourth semiconductor layer 123. For example, the second active layer 122 may be disposed on the third semiconductor layer 121, and the fourth semiconductor layer 123 may be disposed on the second active layer 122.

[0045] According to an embodiment, the third semiconductor layer 121 can be configured as a first conductivity type semiconductor layer, and the fourth semiconductor layer 123 can be configured as a second conductivity type semiconductor layer. The third semiconductor layer 121 can be configured as an n-type semiconductor layer, and the fourth semiconductor layer 123 can be configured as a p-type semiconductor layer.

[0046] As described above, according to another embodiment, the third semiconductor layer 121 may be configured as a p-type semiconductor layer, and the fourth semiconductor layer 123 may be configured as an n-type semiconductor layer. Hereinafter, for ease of description, the embodiment will be described based on the third semiconductor layer 121 being configured as an n-type semiconductor layer and the fourth semiconductor layer 123 being configured as a p-type semiconductor layer.

[0047] Furthermore, the above description has already described the case where the first semiconductor layer 111 and the third semiconductor layer 121 are disposed on and in contact with the substrate 100. However, a buffer layer may be further disposed between the first semiconductor layer 111 and the substrate 100, and between the third semiconductor layer 121 and the substrate 100. For example, the buffer layer may reduce the difference in lattice constant between the substrate 100 and the first light-emitting structure 110 and the second light-emitting structure 120, and may improve crystallinity.

[0048] The first light-emitting structure 110 and the second light-emitting structure 120 may be provided with compound semiconductors. The first light-emitting structure 110 and the second light-emitting structure 120 may be provided with, for example, group II-VI or group III-V compound semiconductors. For example, the first light-emitting structure 110 and the second light-emitting structure 120 may include at least two or more elements selected from aluminum (Al), gallium (Ga), indium (In), phosphorus (P), arsenic (As), and nitrogen (N).

[0049] The first semiconductor layer 111 and the third semiconductor layer 121 may be provided with, for example, a group II-VI compound semiconductor or a group III-V compound semiconductor. For example, the first semiconductor layer 111 and the third semiconductor layer 121 may be provided with In x Al y Ga 1-x-y Semiconductor materials with the composition formula N(0≤x≤1,0≤y≤1,0≤x+y≤1) or having the composition formula (Al) x Ga 1-x ) y In 1-y Semiconductor materials with P (0≤x≤1, 0≤y≤1). For example, the first semiconductor layer 111 and the third semiconductor layer 121 can be independently selected from the group consisting of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, AlInP, GaInP, etc., and can be doped with n-type dopants independently selected from the group consisting of Si, Ge, Sn, Se, Te, etc.

[0050] The first active layer 112 and the second active layer 122 may be configured with, for example, a group II-VI compound semiconductor or a group III-V compound semiconductor. For example, the first active layer 112 and the second active layer 122 may be configured with In... x Al y Ga 1-x-y Semiconductor materials with the composition formula N(0≤x≤1,0≤y≤1,0≤x+y≤1) or having (Al) x Ga 1-x ) yIn 1-y Semiconductor materials with the composition formula P(0≤x≤1,0≤y≤1).

[0051] For example, the first active layer 112 and the second active layer 122 can be independently selected from the group consisting of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, AlInP, GaInP, etc. For example, the first active layer 112 and the second active layer 122 can be configured in a multi-well structure and can include multiple barrier layers and multiple well layers.

[0052] The second semiconductor layer 113 and the fourth semiconductor layer 123 may be provided with, for example, a group II-VI compound semiconductor or a group III-V compound semiconductor. For example, the second semiconductor layer 113 and the fourth semiconductor layer 123 may be provided with In x Al y Ga 1-x-y Semiconductor materials with the composition formula N(0≤x≤1,0≤y≤1,0≤x+y≤1) or having (Al) x Ga 1-x ) y In 1-y Semiconductor materials with a composition of P (0≤x≤1,0≤y≤1). For example, the second semiconductor layer 113 and the fourth semiconductor layer 123 can be independently selected from the group consisting of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, AlInP, GaInP, etc., and can be doped with p-type dopants independently selected from the group consisting of Mg, Zn, Ca, Sr, Ba, etc.

[0053] According to an embodiment, the first light-emitting structure 110 may include a first via TH1. For example, the first light-emitting structure 110 may include a first via TH1 passing through the second semiconductor layer 113 and the first active layer 112. The first via TH1 may pass through the second semiconductor layer 113 and the first active layer 112 to expose the first semiconductor layer 111. The first light-emitting structure 110 may include a plurality of first vias TH1. The formation of the first via TH1 will be described later, and methods for manufacturing semiconductor devices will be explained.

[0054] The semiconductor device according to the embodiment may include a first insulating layer 161. The first insulating layer 161 may be disposed on a first light-emitting structure 110. The first insulating layer 161 may be disposed on a second light-emitting structure 120. The first insulating layer 161 may be disposed on the upper surface of the substrate 100 exposed between the first light-emitting structure 110 and the second light-emitting structure 120.

[0055] The first insulating layer 161 can be disposed in the first via TH1 in the first light-emitting structure 110, and a second via TH2 is disposed therein. The first semiconductor layer 111 can be exposed through the second via TH2. The upper surface of the first semiconductor layer 111 can be exposed through the second via TH2. The first insulating layer 161 can be disposed on the second semiconductor layer 113 and expose the upper surface of the second semiconductor layer 113.

[0056] The first insulating layer 161 may include a contact region H1 exposing the second light-emitting structure 120. The first insulating layer 161 may also include a contact region H1 exposing the upper surface of the third semiconductor layer 121 of the second light-emitting structure 120. The first insulating layer 161 may be disposed on the fourth semiconductor layer 123 and expose the upper surface of the fourth semiconductor layer 123.

[0057] For example, the first insulating layer 161 can be made of an insulating material. For example, the first insulating layer 161 can be made of a material selected from SiO2, SiO2, etc. x SiO x N y It is formed of at least one material from the group consisting of Si3N4 and Al2O3. Additionally, the first insulating layer 161 may be formed of a distributed Bragg reflector (DBR).

[0058] The semiconductor device according to an embodiment may include a first reflective electrode 141 disposed on the first light-emitting structure 110. For example, the first reflective electrode 141 may be disposed on the second semiconductor layer 113. The first reflective electrode 141 may be electrically connected to the second semiconductor layer 113.

[0059] The semiconductor device according to the embodiment may include a second reflective electrode 142 disposed on the second light-emitting structure 120. For example, the second reflective electrode 142 may be disposed on the fourth semiconductor layer 123. The second reflective electrode 142 may be electrically connected to the fourth semiconductor layer 123.

[0060] The first reflective electrode 141 and the second reflective electrode 142 may include, for example, metals, and are formed of materials selected from the group consisting of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf, Ti, W, and alloys thereof. The first reflective electrode 141 and the second reflective electrode 142 may be formed of one or more layers. The first reflective electrode 141 and the second reflective electrode 142 may include, for example, Ag, Al, Au, etc., as reflective metals, and Ni, Ti, TiW, Pt, etc., as blocking metals. For example, the first reflective electrode 141 and the second reflective electrode 142 may be formed of an Ag / Ni / Ti layer.

[0061] The semiconductor device according to the embodiment may further include a first ohmic contact layer 131. The first ohmic contact layer 131 may be disposed on the second semiconductor layer 113. The first ohmic contact layer 131 may be disposed between the first light-emitting element 110 and the first reflective electrode 141. The first ohmic contact layer 131 may be disposed between the second semiconductor layer 113 and the first reflective electrode 141. The first ohmic contact layer 131 may be disposed below the first reflective electrode 141. A portion of the first ohmic contact layer 131 may be disposed on the first insulating layer 161.

[0062] In the description of the semiconductor device according to the embodiments, the case where the first ohmic contact layer 131 is disposed between the second semiconductor layer 113 and the first reflective electrode 141 has been described. However, according to another embodiment, the first ohmic contact layer 131 may be omitted, and the first reflective electrode 141 may be disposed on the second semiconductor layer 113 and in direct contact with the second semiconductor layer 113.

[0063] The semiconductor device according to the embodiment may further include a second ohmic contact layer 132. The second ohmic contact layer 132 may be disposed on the fourth semiconductor layer 123. The second ohmic contact layer 132 may be disposed between the second light-emitting structure 120 and the second semiconductor layer 123. The second ohmic contact layer 132 may be disposed between the fourth semiconductor layer 123 and the second reflective electrode 142. The second ohmic contact layer 132 may be disposed below the second reflective electrode 142. A portion of the second ohmic contact layer 132 may be disposed on the first insulating layer 161.

[0064] In the description of the semiconductor device according to the embodiments, the case where the second ohmic contact layer 132 is disposed between the fourth semiconductor layer 123 and the second reflective electrode 142 has been described. However, according to another embodiment, the second ohmic contact layer 132 may be omitted, and the second reflective electrode 142 may be disposed on the fourth semiconductor layer 123 and in direct contact with the fourth semiconductor layer 123.

[0065] For example, the first ohmic contact layer 131 and the second ohmic contact layer 132 may include at least one selected from the group consisting of metals, metal oxides, and metal nitrides. The first ohmic contact layer 131 and the second ohmic contact layer 132 may include a transparent material.

[0066] For example, the first ohmic contact layer 131 and the second ohmic contact layer 132 may include at least one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), IZO nitride (IZON), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), IrOx, RuOx, RuOx / ITO, Ni / IrOx / Au, Ni / IrOx / Au / ITO, Pt, Ni, Au, Rh and Pd.

[0067] The semiconductor device according to an embodiment may include a connection electrode 150. The connection electrode 150 may be electrically connected to a first light-emitting structure 110. For example, the connection electrode 150 may be electrically connected to a second semiconductor layer 113 of the first light-emitting structure 110. The connection electrode 150 may be electrically connected to a first reflective electrode 141. A portion of the connection electrode 150 may be disposed on the upper surface of the first reflective electrode 141. A portion of the connection electrode 150 may be disposed on a first ohmic contact layer 131.

[0068] Furthermore, the connection electrode 150 can be electrically connected to the second light-emitting structure 120. For example, the connection electrode 150 can be electrically connected to the third semiconductor layer 121 of the second light-emitting structure 120. The connection electrode 150 can be arranged to contact the upper surface of the third semiconductor layer 121. The connection electrode 150 can be arranged on the upper surface of the third semiconductor layer 121 through a contact area H1 provided by the first insulating layer 161. The connection electrode 150 can be arranged between the side surfaces of the first light-emitting structure 110 and the second light-emitting structure 120, which face each other. The connection electrode 150 can be electrically connected to the second semiconductor layer 113 and the third semiconductor layer 121.

[0069] For example, the connecting electrode 150 can be arranged to contact the upper surface of the third semiconductor layer 121 and the upper surface of the first reflective electrode 141. The connecting electrode 150 can be connected in series with the second semiconductor layer 113 and the third semiconductor layer 121.

[0070] refer to Figures 1 to 4 In the semiconductor device according to the embodiment, the arrangement of the connection electrode 150 and the electrical connection between the first light-emitting structure 110 and the second light-emitting structure 120 will be described. Figure 3 It is along Figure 1 A cross-sectional view taken from the middle BB line, and Figure 4 This is a view illustrating an example of a connection electrode applied to a semiconductor device according to an embodiment of the present invention.

[0071] According to an embodiment, the connection electrode 150 may include a main electrode 150a, a first branch electrode 150b, a second branch electrode 150c, and a third branch electrode 150d.

[0072] The connecting electrode 150 can be electrically connected to the first light-emitting structure 110 and the second light-emitting structure 120. The first light-emitting structure 110 and the second light-emitting structure 120 can be connected in series via the connecting electrode 150.

[0073] The connecting electrode 150 may include a main electrode 150a. The main electrode 150a may be arranged to overlap with the first light-emitting structure 110 in the vertical direction. A portion of the main electrode 150a may be arranged to overlap with the first reflective electrode 141 in the vertical direction. A portion of the main electrode 150a may be arranged to overlap with the upper surface of the second semiconductor layer 113 in the vertical direction.

[0074] Additionally, the main electrode 150a can be arranged to overlap with the second light-emitting structure 120 in the vertical direction. A portion of the main electrode 150a can be arranged to overlap with the third semiconductor layer 121 in the vertical direction.

[0075] Furthermore, the main electrode 150a can be disposed between the first light-emitting structure 110 and the second light-emitting structure 120. The main electrode 150a can extend from the upper surface of the first semiconductor layer 111 of the first light-emitting structure 110 to the upper surface of the third semiconductor layer 121 of the second light-emitting structure 120.

[0076] The connecting electrode 150 may also include a first branch electrode 150b, a second branch electrode 150c, and a third branch electrode 150d.

[0077] The first branch electrode 150b can extend from the main electrode 150a. The first branch electrode 150b can be disposed on the second light-emitting structure 120. The first branch electrode 150b can be disposed on the third semiconductor layer 121. The first branch electrode 150b can be disposed in the contact region H1 provided by the first insulating layer. The first branch electrode 150b can be electrically connected to the third semiconductor layer 121 through the contact region H1 provided by the first insulating layer 161. The first branch electrode 150b can be arranged to contact the upper surface of the third semiconductor layer 121 through the contact region H1 provided by the first insulating layer 161.

[0078] The second branch electrode 150c and the third branch electrode 150d can be disposed on the second light-emitting structure 120. The second branch electrode 150c and the third branch electrode 150d can be disposed on the upper surface of the third semiconductor layer 121. The second branch electrode 150c and the third branch electrode 150d can extend from the first branch electrode 150b. For example, the second branch electrode 150c can extend from one end of the first branch electrode 150b, and the third branch electrode 150d can extend from the other end of the first branch electrode 150b. The second branch electrode 150c and the third branch electrode 150d can be disposed on opposite sides of the second light-emitting structure 120, respectively.

[0079] The second branch electrode 150c and the third branch electrode 150d can be electrically connected to the third semiconductor layer 121 through the contact area H1 provided by the first insulating layer 161. The second branch electrode 150c and the third branch electrode 150d can contact the upper surface of the third semiconductor layer 121 through the contact area H1 provided by the first insulating layer 161.

[0080] For example, the connecting electrode 150 can be formed of a material selected from the group consisting of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf, Ti, W, Cr, and alloys thereof. The connecting electrode 150 can be formed of one or more layers. The connecting electrode 150 may include, for example, multiple metal layers as a reflective metal, and Cr or Ti as an adhesive layer. For example, the connecting electrode 150 can be formed of a Cr / Al / Ni / Au / Ti layer.

[0081] The semiconductor device according to an embodiment may include a first metal layer 151. The first metal layer 151 may be disposed on a first light-emitting structure 110. The first metal layer 151 may be disposed on a first semiconductor layer 111. The first metal layer 151 may be electrically connected to the first semiconductor layer 111. The first metal layer 151 may be disposed in a second via TH2 provided by a first insulating layer 161. The first metal layer 151 may be disposed on and in contact with the upper surface of the first semiconductor layer 111.

[0082] The semiconductor device according to an embodiment may include a second metal layer 152. The second metal layer 152 may be disposed on the second light-emitting structure 120. The second metal layer 152 may be disposed on the fourth semiconductor layer 123. The second metal layer 152 may be disposed on the second reflective electrode 142. The second metal layer 152 may be electrically connected to the second reflective electrode 142. The second metal layer 152 may be electrically connected to the fourth semiconductor layer 123 via the second reflective electrode 142.

[0083] In the above description, the arrangement of the second metal layer 152 on the second reflective electrode 142 has been described. However, in a semiconductor device according to another embodiment, the formation of the second metal layer 152 may be omitted.

[0084] For example, the first metal layer 151 and the second metal layer 152 can be formed together in the process of forming the connecting electrode 150. The first metal layer 151 and the second metal layer 152 can be formed of a material selected from the group consisting of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf, Ti, Cr, and alloys thereof. The first metal layer 151 and the second metal layer 152 can be formed as one or more layers. For example, the first metal layer 151 and the second metal layer 152 may include multiple metal layers as reflective metals, and Cr or Ti as adhesive layers. For example, the first metal layer 151 and the second metal layer 152 can be formed as a Cr / Al / Ni / Au / Ti layer.

[0085] The semiconductor device according to the embodiment may include a second insulating layer 162. The second insulating layer 162 may be disposed on the first light-emitting structure 110. The second insulating layer 162 may be disposed on the second light-emitting structure 120. The second insulating layer 162 may be disposed on the first reflective electrode 141. The second insulating layer 162 may be disposed on the second reflective electrode 142. The second insulating layer 162 may be disposed on the connection electrode 150. The second insulating layer 162 may be disposed on the first metal layer 151 and may have a third via TH3. The upper surface of the first metal layer 151 may be exposed through the third via TH3. The second insulating layer 162 may be disposed on the second metal layer 152 and may expose the upper surface of the second metal layer 152.

[0086] For example, the second insulating layer 162 can be made of an insulating material. For example, the second insulating layer 162 can be made of a material selected from SiO2, SiO2, etc. x SiO x N y The second insulating layer 162 is formed from at least one material selected from the group consisting of Si3N4 and Al2O3. Additionally, the second insulating layer 162 may be formed from a distributed Bragg reflector (DBR). According to an embodiment, because the second insulating layer 162 is configured as a DBR, light generated from the first active layer 112 and the second active layer 122 is efficiently reflected and extracted to the outside. For example, the second insulating layer 162 may be configured as a DBR layer formed by stacking SiO2 and TiO2 as multiple layers.

[0087] The semiconductor device according to the embodiment may include a first electrode pad 171 and a second electrode pad 172. The first electrode pad 171 may be disposed on the first light-emitting structure 110. The second electrode pad 172 may be disposed on the second light-emitting structure 120.

[0088] The first electrode pad 171 can be electrically connected to the first semiconductor layer 111. The lower surface of the first electrode pad 171 can contact the upper surface of the first metal layer 151. The first electrode pad 171 can be electrically connected to the first semiconductor layer 111 through the first metal layer 151. A portion of the first electrode pad 171 can be disposed in the third via TH3 and electrically connected to the first metal layer 151.

[0089] The second electrode pad 172 can be electrically connected to the second reflective electrode 142. The second electrode pad 172 can be disposed on the second metal layer 152. The second electrode pad 172 can be electrically connected to the second reflective electrode 142 through the second metal layer 152.

[0090] In this embodiment, the arrangement of the second metal layer 152 between the second electrode pad 172 and the second reflective electrode 142 has been described. However, according to another embodiment, the second metal layer 152 may not be formed, and the second electrode pad 172 and the second reflective electrode 142 may be in direct contact with each other.

[0091] According to an embodiment, when power is supplied to the first electrode pad 171 and the second electrode pad 172, the first light-emitting structure 110 and the second light-emitting structure 120 can emit light. The first light-emitting structure 110 and the second light-emitting structure 120 can be connected in series and operated by applying power to the first electrode pad 171 and the second electrode pad 172. For example, the second electrode pad 172, the fourth semiconductor layer 123, the third semiconductor layer 121, the connecting electrode 150, the second semiconductor layer 113, the first semiconductor layer 111, and the first electrode pad 171 can be connected in series.

[0092] The semiconductor device according to the embodiment can be connected to an external power source via flip-chip bonding. For example, in manufacturing a semiconductor device package, the upper surface of the first electrode pad 171 and the upper surface of the second electrode pad 172 can be arranged to be attached to a circuit board. When the semiconductor device according to the embodiment is attached to the circuit board via flip-chip bonding, light provided from the first light-emitting structure 110 and the second light-emitting structure 120 can be emitted through the substrate 100. The light 110 emitted from the first light-emitting structure can be reflected by the first reflective electrode 141 and emitted toward the substrate 100. Additionally, the light emitted from the second light-emitting structure 120 can be reflected by the second reflective electrode 142 and emitted toward the substrate 100.

[0093] As described above, in the semiconductor device according to the embodiment, a first reflective electrode 141 having a size corresponding to the light-emitting region of the first light-emitting structure 110 is disposed on the first light-emitting structure 110. An electrode 142 having a size corresponding to the light-emitting region of the second light-emitting structure 120 is disposed on the second light-emitting structure 120. Therefore, light emitted from the first light-emitting structure 110 and the second light-emitting structure 120 can be efficiently reflected by the first and second reflective electrodes 141 and 142 and provided toward the substrate 100.

[0094] Furthermore, according to the semiconductor device and semiconductor device package of this embodiment, since the first electrode pad 171 and the second electrode pad 172 with large areas can be directly bonded to the circuit board that provides power, the flip chip bonding process can be easily and stably performed.

[0095] The semiconductor device and semiconductor device package according to this embodiment can provide a flip-chip integrated semiconductor device that can be applied to products requiring high voltage and high output.

[0096] Meanwhile, in the above description, the semiconductor device according to the embodiment has been electrically connected to the circuit board via a flip-chip bonding method. However, according to another embodiment, power can be supplied to the first electrode pad 171 and the second electrode pad 172 via a die bonding method or a wire bonding method.

[0097] Then, now we will refer to Figures 5 to 11 A method for manufacturing a semiconductor device according to an embodiment is described. (Referencing...) Figures 5 to 11 In explaining the method of manufacturing a semiconductor device according to the embodiments, references may be omitted. Figures 1 to 4 The overlapping descriptions.

[0098] A method for manufacturing a semiconductor device according to an embodiment, referenced Figure 5 A first light-emitting structure 110 and a second light-emitting structure 120 can be formed on the substrate 100. Figure 5 (a) is shown along Figure 1 The image shown is a cross-sectional view of the semiconductor device process, taken by line AA. Figure 5 (b) is a view illustrating mesa etching used to grow semiconductor layers. Figure 5 (c) is a view illustrating the isolation etching of the semiconductor layer in the mesa etching.

[0099] According to an embodiment, a semiconductor layer can be grown on the substrate 100. A semiconductor layer with... Figure 5A mask of the shape shown in (b) is used to perform mesa etching on the grown semiconductor layer. The first light-emitting structure 110 and the second light-emitting structure 120 can be formed by mesa etching. Furthermore, a first via TH1 can be formed in the first light-emitting structure 110. A stepped region can be formed on the side surface of the first semiconductor layer 111 of the first light-emitting structure 110, and a lower region and an upper region can be defined by the stepped region. Additionally, a stepped region can be formed on the side surface of the third semiconductor layer 121 of the second light-emitting structure 120, and a lower region and an upper region can be defined by the stepped region.

[0100] Then, you can use with Figure 5 Isolation etching is performed using a mask of the shape shown in (c). The upper surface of the substrate 100 can be exposed between the first light-emitting structure 110 and the second light-emitting structure 120 by isolation etching.

[0101] Next, as Figure 6 As shown, a first insulating layer 161 can be formed on the first light-emitting structure 110 and the second light-emitting structure 120. Figure 6 (a) is shown along Figure 1 A cross-sectional view of the sequential process of a semiconductor device, taken from line AA in the middle, and Figure 6 (b) is a view explaining the process of forming the first insulating layer.

[0102] According to an embodiment, the first insulating layer 161 can be formed by a photolithography process using a mask. Figure 6 The shape shown in (b) is used. A first insulating layer 161 may be disposed in a first via TH1 provided in the first light-emitting structure 110, and a second via TH2 may be provided. A first semiconductor layer 111 may be exposed through the second via TH2. The upper surface of the first semiconductor layer 111 may be exposed through the second via TH2. The first insulating layer 161 may be disposed on a second semiconductor layer 113 to expose a portion of the upper surface of the second semiconductor layer 113.

[0103] The first insulating layer 161 may include a contact region H1 that exposes the second light-emitting structure 120. The first insulating layer 161 may also include a contact region H1 that exposes the upper surface of the third semiconductor layer 121 of the second light-emitting structure. The first insulating layer 161 may be disposed on the fourth semiconductor layer 123 to expose a portion of the upper surface of the fourth semiconductor layer 123.

[0104] like Figure 7 As shown, a first ohmic contact layer 131 can be formed on the first light-emitting structure 110, and a second ohmic contact layer 132 can be formed on the second light-emitting structure 120. Figure 7 (a) is shown along Figure 1The image shows a cross-sectional view of the sequential process of a semiconductor device, taken from line AA. Figure 7 (b) is a view explaining the process of forming the first ohmic contact layer and the second ohmic contact layer.

[0105] According to an embodiment, the first ohmic contact layer 131 and the second ohmic contact layer 132 can be made of Figure 7 The shape shown in (b) is formed. For example, a first ohmic contact layer 131 may be formed on a second semiconductor layer 113. A second ohmic contact layer 132 may be formed on a fourth semiconductor layer 123.

[0106] Next, as Figure 8 As shown, a first reflective electrode 141 and a second reflective electrode 142 can be formed. Figure 8 (a) shows along Figure 1 The image shows a cross-sectional view of the sequential process of a semiconductor device, taken from line AA. Figure 8 (b) is a view explaining the process of forming the first and second reflective electrodes.

[0107] According to an embodiment, the first reflective electrode 141 and the second reflective electrode 142 can be made of Figure 8 The shape shown in (b) is formed. For example, the first reflective electrode 141 can be disposed on the second semiconductor layer 113. The first reflective electrode 141 can be disposed on the first ohmic contact layer 131. The second reflective electrode 142 can be disposed on the fourth semiconductor layer 123. The second reflective electrode 142 can be disposed on the second ohmic contact layer 132.

[0108] like Figure 9 As shown, a connecting electrode 150 can be formed. Figure 9 (a) is shown along Figure 1 A cross-sectional view of the sequential process of a semiconductor device, taken from line AA in the middle, and Figure 9 (b) is a view explaining the process of forming the connecting electrodes.

[0109] According to an embodiment, the connecting electrode 150 can be made of Figure 9 The shape shown in (b) is formed. The connecting electrode 150 may include a main electrode 150a, a first branch electrode 150b, a second branch electrode 150c, and a third branch electrode 150c.

[0110] The connecting electrode 150 can be electrically connected to the first light-emitting structure 110 and the second light-emitting structure 120. The first light-emitting structure 110 and the second light-emitting structure 120 can be connected in series via the connecting electrode 150.

[0111] The connecting electrode 150 may include a main electrode 150a. The main electrode 150a may be arranged to overlap with the first light-emitting structure 110 in the vertical direction. A portion of the main electrode 150a may be arranged to overlap with the first reflective electrode 141 in the vertical direction. A portion of the main electrode 150a may be arranged to overlap with the upper surface of the second semiconductor layer 113 in the vertical direction.

[0112] Additionally, the main electrode 150a can be arranged to overlap with the second light-emitting structure 120 in the vertical direction. A portion of the main electrode 150a can be arranged to overlap with the third semiconductor layer 121 in the vertical direction.

[0113] Additionally, the main electrode 150a can be disposed between the first light-emitting structure 110 and the second light-emitting structure 120. The main electrode 150a can be disposed to extend 110 from the upper surface of the first semiconductor layer 111 of the first light-emitting structure to the upper surface of the third semiconductor layer 121 of the second light-emitting structure 120.

[0114] The first branch electrode 150b can extend from the main electrode 150a. The first branch electrode 150b can be disposed on the second light-emitting structure 120. The first branch electrode 150b can be disposed on the third semiconductor layer 121. The first branch electrode 150b can be disposed in the contact region H1 provided by the first insulating layer. The first branch electrode 150b can be electrically connected to the third semiconductor layer 121 through the contact region H1 provided by the first insulating layer 161. The first branch electrode 150b can be arranged to contact the upper surface of the third semiconductor layer 121 through the contact region H1 provided by the first insulating layer 161.

[0115] The second branch electrode 150c and the third branch electrode 150d can be disposed on the second light-emitting structure 120. The second branch electrode 150c and the third branch electrode 150d can be disposed on the upper surface of the third semiconductor layer 121. The second branch electrode 150c and the third branch electrode 150d can extend from the first branch electrode 150b. For example, the second branch electrode 150c can extend from one end of the first branch electrode 150b, and the third branch electrode 150d can extend from the other end of the first branch electrode 150b. The second branch electrode 150c and the third branch electrode 150d can be disposed on opposite sides of the second light-emitting structure 120, respectively.

[0116] At this time, the first metal layer 151 and the second metal layer 152 can be formed together when forming the connecting electrode 150.

[0117] A first metal layer 151 may be disposed on the first light-emitting structure 110. The first metal layer 151 may be disposed on the first semiconductor layer 111. The first metal layer 151 may be electrically connected to the first semiconductor layer 111. The first metal layer 151 may be disposed in a second via TH2 provided by a first insulating layer 161. The first metal layer 151 may be arranged to contact the upper surface of the first semiconductor layer 111.

[0118] The second metal layer 152 can be disposed on the second light-emitting structure 120. The second metal layer 152 can be disposed on the fourth semiconductor layer 123. The second metal layer 152 can be disposed on the second reflective electrode 142.

[0119] Then, as Figure 10 As shown, a second insulating layer 162 can be formed. Figure 10 (a) is shown along Figure 1 The image shows a cross-sectional view of the sequential process of a semiconductor device, taken from line AA. Figure 10 (b) is a view explaining the process of forming the second insulating layer.

[0120] According to an embodiment, the second insulating layer 162 can be made by using a photolithography process with a mask. Figure 10 The shape shown in (b) is formed.

[0121] The second insulating layer 162 can be disposed on the first light-emitting structure 110. The second insulating layer 162 can be disposed on the second light-emitting structure 120.

[0122] A second insulating layer 162 may be disposed on the first reflective electrode 141. A second insulating layer 162 may be disposed on the second reflective electrode 142. A second insulating layer 162 may be disposed on the connecting electrode 150. A second insulating layer 162 may be disposed on the first metal layer 151 and provide a third via TH3. The upper surface of the first metal layer 151 may be exposed through the third via TH3. A second insulating layer 162 may be disposed on the second metal layer 152 and expose the upper surface of the second metal layer 152.

[0123] Next, as Figure 11 As shown, a first electrode pad 171 and a second electrode pad 172 can be formed. Figure 11 (a) is shown along Figure 1 The image shows a cross-sectional view of the sequential process of a semiconductor device, taken from line AA. Figure 11 (b) is a view explaining the process of forming the first electrode pad and the second electrode pad.

[0124] According to an embodiment, the first electrode pad 171 and the second electrode pad 172 can be made of Figure 11The shape shown in (b) is formed. The first electrode pad 171 can be disposed on the first light-emitting structure 110. The second electrode pad 172 can be disposed on the second light-emitting structure 120.

[0125] The lower surface of the first electrode pad 171 can contact the upper surface of the first metal layer 151. A portion of the first electrode pad 171 can be disposed in the third via TH3 to contact the first metal layer 151.

[0126] The second electrode pad 172 can be disposed on the second metal layer 152. The second electrode pad 172 can be electrically connected to the second reflective electrode 142. The second electrode pad 172 can be electrically connected to the second reflective electrode 142 through the second metal layer 152.

[0127] For example, the first electrode pad 171 and the second electrode pad 172 may be formed of a material selected from the group consisting of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf, Ti, W, Cr, Cu and alloys thereof. The first electrode pad 171 and the second electrode pad 172 may be formed of one or more layers.

[0128] The first electrode pad 171 and the second electrode pad 172 may include a diffusion barrier metal such as Cr or Cu to prevent Sn diffusion, for example, in solder bonding. For example, the first electrode pad 171 and the second electrode pad 172 may be formed from a Ti / Ni / Ti / Ni / Cu / Ni / Cr / Cr / Ni / Au layer. In this case, the Ni layer disposed next to the Cu layer can serve as a barrier metal against Cu.

[0129] According to an embodiment, when power is applied to the first electrode pad 171 and the second electrode pad 172, the first light-emitting structure 110 and the second light-emitting structure 120 can emit light. The first light-emitting structure 110 and the second light-emitting structure 120 can be connected in series by the power applied to the first electrode pad 171 and the second electrode pad 172. For example, the second electrode pad 172, the fourth semiconductor layer 123, the third semiconductor layer 121, the connecting electrode 150, the second semiconductor layer 113, the first semiconductor layer 111, and the first electrode pad 171 can be connected in series.

[0130] The semiconductor device according to the embodiment can be connected to an external power source via flip-chip bonding. For example, the upper surface of the first electrode pad 171 and the upper surface of the second electrode pad 172 can be configured to be attached to a circuit board. When the semiconductor device according to the embodiment is attached to the circuit board via flip-chip bonding, light provided from the first light-emitting structure 110 and the second light-emitting structure 120 can be emitted through the substrate 100. The light emitted from the first light-emitting structure 110 is reflected by the first reflective electrode 141 and emitted toward the substrate 100. Additionally, the light emitted from the second light-emitting structure 120 can be reflected by the second reflective electrode 142 and emitted toward the substrate 100. The second insulating layer 162 can be configured as a distributed Bragg reflector (DBR) to improve reflection efficiency, thus enabling efficient extraction of light emitted from the first light-emitting structure 110 and the second light-emitting structure 120 toward the substrate 100.

[0131] As described above, in the semiconductor device according to the embodiment, a first reflective electrode 141 having a size corresponding to the light-emitting region of the first light-emitting structure 110 is disposed on the first light-emitting structure 110. A second reflective electrode 142 having a size corresponding to the light-emitting region of the second light-emitting structure 120 is disposed on the second light-emitting structure 120. Therefore, light emitted from the first light-emitting structure 110 and the second light-emitting structure 120 can be efficiently reflected by the first and second reflective electrodes 141 and 142 and can be provided toward the substrate 100.

[0132] Furthermore, according to the embodiment, the semiconductor device having a large area of ​​first electrode pad 171 corresponding to the area of ​​the first light-emitting structure 110 and a second electrode pad 172 corresponding to the area of ​​the second light-emitting area structure 120 can be directly bonded to the circuit board that provides the required power, thereby enabling easy and stable execution of the flip-chip bonding process.

[0133] The semiconductor device and method of manufacturing the semiconductor device according to the embodiments can provide a flip-chip semiconductor device and a method of manufacturing the semiconductor device, which can be applied to products that require high voltage and high output.

[0134] At the same time, refer to Figures 1 to 11 The described semiconductor device can be subjected to a high voltage to achieve high output. Therefore, a high current flows through the first light-emitting structure 110 and the second light-emitting structure 120. According to an embodiment, negative power can be supplied to the first electrode pad 171 arranged on the first light-emitting structure 110, and positive power can be supplied to the second electrode pad 172 arranged on the second light-emitting structure 120.

[0135] When a high current of, for example, 200 mA or greater flows through the semiconductor device according to the embodiment, such as Figure 12As shown, when current flows from the third semiconductor layer 121 to the connection electrode 150, current congestion may occur in some areas. Figure 12 This is a view illustrating the phenomenon of current concentration occurring in a semiconductor device according to an embodiment of the present invention.

[0136] For example, such as Figure 12 As shown, current congestion may occur in the region connecting the third semiconductor layer 121 and the first branch electrode 150b. Therefore, a portion of the connection electrode 150 disposed in the region where current congestion occurs may be damaged or separated, which could adversely affect the reliability of the semiconductor device.

[0137] Various examples of semiconductor devices according to this embodiment that can solve the above-mentioned current concentration problem are shown in Figure 13 It is shown in the middle. Figure 13 This is a plan view illustrating other examples of semiconductor devices according to embodiments of the present invention. Reference Figure 13 In the description of the semiconductor device according to this embodiment, compared with the reference... Figures 1 to 11 Repeated descriptions can be omitted.

[0138] Figure 13 The semiconductor device shown in (a) is based on reference Figures 1 to 11 The semiconductor device described in the embodiments, and Figure 13 The semiconductor devices shown in (b) to (f) are designed to overcome Figure 13 The semiconductor device proposed addresses the shortcomings of the semiconductor device shown in (a). It has been confirmed, referencing... Figure 12 The described current congestion phenomenon did not occur. Figure 13 The semiconductor devices shown in (b) to (f) are examples of the semiconductor devices according to the embodiments. The semiconductor devices according to the embodiments are shown together in one figure, so that the differences between the semiconductor devices according to each embodiment can be well compared.

[0139] The following text will describe the relationship with Figure 13 Compared to the semiconductor device shown in (a) Figure 13 The differences between the semiconductor devices shown in (b) through (f). Refer to [reference needed] for details based on the differences in each process step. Figures 14 to 18 This will describe the differences between various semiconductor devices. Figures 14 to 18 Each process step shown can correspond to a reference. Figures 5 to 9 The described process steps.

[0140] Figure 14 It is a diagram that explains the shape of the light-emitting structure applied to each semiconductor device. Figure 15 It is a diagram explaining the shape of the first insulating layer applied to each semiconductor device. Figure 16 This is a view illustrating the shapes of the first and second ohmic contact layers. Figure 17 It is a diagram explaining the shapes of the first and second reflective electrodes applied to each semiconductor device, and Figure 18 It is a view that explains the shape of the connection electrodes applied to each semiconductor device.

[0141] first, Figure 13 The semiconductor device Q2 shown in (b) is connected to the electrode 150 in the configuration. Figure 13 The semiconductor device Q1 shown in (a) is different. Figure 13 The semiconductor device Q2 shown in (b) is connected to the electrode 150 along its length. Figure 13 The semiconductor device Q1 shown in (a) is different. Figure 13 The semiconductor device Q2 shown in (b) is formed such that the lengths of the second branch electrode 150c and the third branch electrode 150d are longer than [the lengths of the second branch electrode 150c and the third branch electrode 150d]. Figure 13 The length of the corresponding branch electrode of semiconductor device Q1 shown in (a). That is, in Figure 13 In the semiconductor device Q2 shown in (b), the second branch electrode 150c and the third branch electrode 150d extend along the upper surface of the third semiconductor layer 121 from the first branch electrode 150b to the end region of the second light-emitting structure 120. In contrast, in Figure 13 In the semiconductor device Q1 shown in (a), the second branch electrode 150c and the third branch electrode 150d do not extend along the upper surface of the third semiconductor layer 121 as a long length from the first branch electrode 150b to the end region of the second light-emitting structure 120, but only along the upper surface of the third semiconductor layer 121 as a short length from the first branch electrode 150b to the middle region of the second light-emitting structure 120. According to... Figure 13 The semiconductor device Q2 shown in (b) is able to extend the current flow from the third semiconductor layer 211 to the region of the connecting electrode 150 by forming the second branch electrode 150c and the third branch electrode 150d to be long enough, and can be interpreted as the current being able to be extended accordingly.

[0142] For example, in the semiconductor device Q2 according to the embodiment, when the lengths of the second branch electrode 150c and the third branch electrode 150d disposed along the upper surface of the third semiconductor layer 121 are longer than 85% to 90% of the side length L of the third semiconductor layer 121, the phenomenon of current congestion can be improved. The side length L of the third semiconductor layer 121 indicates that the length of the third semiconductor layer 121 is set to correspond to the direction in which the second branch electrode 150c extends.

[0143] Then, refer to Figures 14 to 18 ,exist Figure 13 The semiconductor device Q1 shown in (a) and Figure 14 The differences between the semiconductor devices Q2 shown in (b) will be described in the process steps.

[0144] exist Figure 13 In the semiconductor device Q2 shown in (b), as Figure 18 As shown in (a) and (b), the second branch electrode 150c and the third branch electrode 150d are formed to be longer than the semiconductor device Q1. For this purpose, Figure 14 The shape of the light-emitting structure of the semiconductor device Q2 shown in (b) can be formed as... Figure 14 The shapes of the light-emitting structures of the semiconductor device Q1 shown in (a) are different. In this case, the first light-emitting structure 110 can have the same shape, and the second light-emitting structure 120 can have different shapes. In the case of semiconductor device Q2, considering that the second branch electrode 150c and the third branch electrode 150d are formed to be longer than those of semiconductor device Q1, unlike semiconductor device Q1, the mesa etching area is formed in a linear shape when there is no protruding area in the end region of the side surface of the second light-emitting structure 120.

[0145] In addition, in the case of semiconductor devices Q2, it can be seen that Figure 15 The shape of the first insulating layer 161 shown in (b) Figure 16 The shapes of the first ohmic contact layer 131 and the second ohmic contact layer 132 shown in (b), and Figure 17 The shapes of the first reflective electrode 141 and the second reflective electrode 142 shown in (b) are modified to correspond to the modified shapes of the second light-emitting structure 120 and the connecting electrode 150 as described above.

[0146] at the same time, Figure 13 The semiconductor device Q3 shown in (c) is connected to the electrode 150 in the configuration. Figure 13 The semiconductor device Q1 shown in (a) is different. Figure 13 The semiconductor device Q3 shown in (c) is connected to the electrode 150 along its length. Figure 13 The semiconductor device Q1 shown in (a) is different. Figure 13 In the semiconductor device Q3 shown in (c), the length of the connecting electrode 150 is 13. Formation Figure 13 The semiconductor device Q3 shown in (c) is such that the lengths of the second branch electrode 150c and the third branch electrode 150d are longer than... Figure 13 The length of the corresponding branch electrode of semiconductor device Q1 shown in (a). That is, in Figure 13In the semiconductor device Q2 shown in (c), the second branch electrode 150c and the third branch electrode 150d extend along the upper surface of the third semiconductor layer 121 from the first branch electrode 150b to the end region of the second light-emitting structure 120. In contrast, in... Figure 13 In the semiconductor device Q1 shown in (a), the second branch electrode 150c and the third branch electrode 150d do not extend along the upper surface of the third semiconductor layer 121 as a long length from the first branch electrode 150b to the end region of the second light-emitting structure 120, but only along the upper surface of the third semiconductor layer 121 as a short length from the first branch electrode 150b to the middle region of the second light-emitting structure 120. According to the semiconductor device Q3, by forming the second branch electrode 150c and the third branch electrode 150d to be sufficiently long, it is possible to extend the current flow from the third semiconductor layer 211 to the region of the connecting electrode 150.

[0147] For example, in the semiconductor device Q3 according to the embodiment, when the length of the second branch electrode 150c and the length of the third branch electrode 150d disposed along the upper surface of the third semiconductor layer 121 are longer than 85% to 90% of the side length L of the third semiconductor layer 121, the phenomenon of current congestion can be improved.

[0148] Furthermore, the semiconductor device Q3 according to the embodiment may also include a fourth branch electrode 150e connected to the second branch electrode 150c and the third branch electrode 150d. Therefore, the first branch electrode 150b, the second branch electrode 150c, the third branch electrode 150d, and the fourth branch electrode 150e can be arranged around the second light-emitting structure 120 to form a closed loop. According to the semiconductor device Q3 of this embodiment, by forming the second branch electrode 150c and the third branch electrode 150d to be sufficiently long, and by further forming the fourth branch electrode 150d, it is possible to expand the region from the third semiconductor layer 211 to the connecting electrode 150, and this can be interpreted as the current being sufficiently extended.

[0149] exist Figure 13 In the semiconductor device Q3 shown in (c), as Figure 18 As shown in (a) and (c), the second branch electrode 150c and the third branch electrode 150d are formed to be longer than the semiconductor device Q1. For this purpose, the shapes of the light-emitting structures of semiconductor device Q1 and semiconductor device Q3 differ, such as... Figure 14As shown in (a) and (c). At this time, the first light-emitting structure 110 can have the same shape, and the second light-emitting structure 120 can have different shapes. In the case of semiconductor device Q3, considering that the second branch electrode 150c and the third branch electrode 150d are formed to be longer than those in semiconductor device Q1, unlike semiconductor device Q1, the mesa etching area is formed in a linear shape in the absence of protruding areas in the edge region of the side surface of the second light-emitting structure 120. Furthermore, in the case of semiconductor device Q3, considering the further formation of the fourth branch electrode 150e, unlike semiconductor device Q1, the mesa etching area of ​​the second light-emitting structure 120 is enlarged.

[0150] Furthermore, in the case of semiconductor devices in Q3, it can be seen that... Figure 15 The shape of the first insulating layer 161 shown in (c) Figure 15 The shapes of the first ohmic contact layer 131 and the second ohmic contact layer 132 shown in (c), and Figure 17 The shapes of the first reflective electrode 141 and the second reflective electrode 142 shown in (c) have been modified to correspond to the above description.

[0151] at the same time, Figure 13 The semiconductor device Q4 shown in (d) is connected to the third semiconductor layer 121 via an electrical connection between the connecting electrode 150 and the third semiconductor layer 121. Figure 13 The semiconductor device Q1 shown in (a) is different. Figure 15 As shown in (d), semiconductor device Q4 is configured to contact the electrical connection point between connection electrode 150 and third semiconductor layer 121. That is, as Figure 15 As shown in (a), in the case of semiconductor device Q1, the contact region H1 exposing the third semiconductor layer 121 is arranged in a linear shape. However, as Figure 15 As shown in (d), in the case of semiconductor device Q4, the contact area H1 that exposes the third semiconductor layer 121 can be provided in a plurality of holes.

[0152] Therefore, according to the embodiment, the semiconductor device Q4 can be electrically connected between the connection electrode 150 disposed in the contact region H1 and the third semiconductor layer 121 by point contact. That is, each of the electrical connections between the first branch electrode 150b and the third semiconductor layer 121, the electrical connection between the second branch electrode 150c and the third semiconductor layer 121, and the electrical connection between the third branch electrode 150d and the third semiconductor layer 121 can be provided by point contact.

[0153] In the semiconductor device Q4 according to the embodiment, the connecting electrode 150 and the third semiconductor layer 121 can contact each other through the contact region H1. At this time, when a strong current is injected through the hole pattern, the current passes through the narrow region, so that there are also electrons passing through in a direction perpendicular to the diameter of the contact region H1, but with the effect of the electrons moving and expanding in the circumferential direction of the contact region H1 parallel to the diameter of the contact region H1.

[0154] As described above, in the semiconductor device Q4 according to this embodiment, since the electrical connection between the connecting electrode 150 and the third semiconductor layer 121 is set by point contact, the first insulating layer 161 is interpreted as having the function of a current blocking layer and effectively performing current diffusion.

[0155] Furthermore, the semiconductor device Q4 according to this embodiment can generate an all-directional reflector (ODR) effect. Because the metal layer has an extinction coefficient K, some loss occurs when light enters the metal layer. However, in the case of a dielectric, when the angle of incidence exceeds the critical angle due to the difference in refractive index, total internal reflection occurs. According to the embodiment, some optical loss can be generated for light incident on the metal layer exposed by the contact region H1; however, when light is incident on the first insulating layer 161 providing the contact region H1, the advantage of minimizing optical loss is also provided because some light is totally reflected.

[0156] In this case, the diameter of the hole providing the contact area H1 can be, for example, from 5 micrometers to 50 micrometers. If the diameter of the hole is less than 5 micrometers, the channel may be too small to confine the current. Furthermore, when the diameter of the hole is greater than 50 micrometers, the current diffusion effect caused by the hole contact can be reduced.

[0157] at the same time, Figure 13 The semiconductor device Q5 shown in (e) is connected to the third semiconductor layer 121 in the electrical connection between the connecting electrode 150 and the third semiconductor layer 121. Figure 13 The semiconductor device Q1 shown in (a) is different. Figure 15 As shown in (e), semiconductor device Q5 has a difference in electrical connection location between connection electrode 150 and third semiconductor layer 121. Figure 15 (a) and Figure 18 As shown in (a), in semiconductor device Q1, the first branch electrode 150b, the second branch electrode 150c, and the third branch electrode 150d are electrically connected to the third semiconductor layer 121 through contact region H1. However, in semiconductor device Q5 according to this embodiment, as... Figure 15 (e) and such Figure 18 As shown in (e), the second branch electrode 150c and the third branch electrode 150d are electrically connected to the third semiconductor layer through the contact region H1.

[0158] In other words, in the semiconductor device Q5 according to the embodiment, no contact area is provided in the region of the first insulating layer 161 disposed below the first branch electrode 150b, such as... Figure 15 As shown in (e). Therefore, in the semiconductor device Q5 according to this embodiment, no electrical connection is provided between the first branch electrode 150b and the third semiconductor layer 121, where current congestion occurs in the semiconductor device Q1. Therefore, because electrical connections are provided between the second branch electrode 150c and the third semiconductor layer 121, as well as between the third branch electrode 150d and the third semiconductor layer 121, current congestion between the first branch electrode 150b and the third semiconductor layer 121 can be prevented in the semiconductor device Q5 of this embodiment.

[0159] Furthermore, according to the semiconductor device Q5 of the embodiment, when performing mesa etching on the second light-emitting structure 120, it is not necessary to etch to expose the third semiconductor layer 121 in the region adjacent to the first light-emitting structure 120. That is, according to the semiconductor device Q5, and as... Figure 14 Compared to the semiconductor device Q1 shown in (e), the area of ​​the active layer can be increased. Therefore, the semiconductor device Q5 according to this embodiment can increase the area of ​​the active layer and increase the luminous intensity Po.

[0160] at the same time, Figure 13 The semiconductor device Q6 shown in (f) is in the shape of the second light-emitting structure 120 with Figure 13 The semiconductor device Q1 shown in (a) is different. Furthermore, the semiconductor device Q6 differs from semiconductor device Q1 in the electrical connection between the connecting electrode 150 and the third semiconductor layer 121.

[0161] like Figure 14 (f) and Figure 15 As shown in (f), it can be seen that the semiconductor device Q6 according to the embodiment can have a protruding area on the side surface of the second light-emitting structure 120, and the contact area H1 of the third semiconductor layer 121 exposed in the recessed area between the protruding areas can be disposed in a plurality of holes through the first insulating layer 161.

[0162] Therefore, the electrical connection between the connection electrode 150 disposed in the contact area H1 and the third semiconductor layer 121 can be established by point contact. That is, each of the electrical connections between the first branch electrode 150b and the third semiconductor layer 121, the second branch electrode 150c and the third semiconductor layer 121, and the third branch electrode 150d and the third semiconductor layer 121 can be established by point contact.

[0163] As described above, in the semiconductor device Q6 according to this embodiment, since the electrical connection between the connecting electrode 150 and the third semiconductor layer 121 is set by point contact, the first insulating layer 161 is interpreted as having the function of a current blocking layer and performing current diffusion.

[0164] Additionally, according to the semiconductor device Q6 of this embodiment, such as Figure 14 As shown in (f), because the side surface of the second light-emitting structure 120 is etched with a mesa in an uneven shape, the area of ​​the active layer can be increased with reference to the semiconductor device Q1. Therefore, according to the semiconductor device Q6 of this embodiment, the area of ​​the active layer can be increased, and the light emission intensity Po can be increased.

[0165] The characteristics of the semiconductor devices according to the above embodiments are further summarized in [Table 1]. In [Table 1], the characteristics of each semiconductor device are shown based on a chip size of 1500 micrometers wide and 500 micrometers long; however, the chip size of the semiconductor devices can be varied according to the embodiments. In [Table 1], “n-contact area” indicates the contact area between the connecting electrode and the third semiconductor layer, and these values ​​are measured when a “second insulating layer” is provided in the DBR.

[0166] [Table 1]

[0167]

[0168] The semiconductor device according to this embodiment, as described in [Table 1], is capable of applying a voltage of several volts and a current of several hundred milliamps, and is capable of providing a brightness of several hundred milliwatts.

[0169] As described in [Table 1], it is confirmed that semiconductor devices Q2 and Q3 according to the embodiments have a lower operating voltage VF3 than semiconductor device Q1. Semiconductor devices Q2 and Q3 according to the embodiments can be interpreted as follows: compared with semiconductor device Q1, the contact area between the connecting electrode and the third semiconductor layer is increased, and the current spread is performed smoothly.

[0170] Furthermore, it can be seen that semiconductor devices Q5 and Q6 according to the embodiment have a higher light output Po than semiconductor device Q1. This can be explained by the fact that semiconductor devices Q5 and Q6 according to the embodiment have increased light output compared to semiconductor device Q1, while the area of ​​the active layer is increased due to the arrangement of the connecting electrodes. Additionally, compared to semiconductor device Q1, semiconductor device Q4 according to this embodiment is measured to have an increased operating voltage VF3 and light output Po.

[0171] Meanwhile, the semiconductor device according to the above embodiments can be applied to semiconductor device packaging. The semiconductor device according to the embodiments can be electrically connected to a substrate or lead electrodes by flip-chip bonding method, die bonding method, wire bonding method, etc., to be provided as a semiconductor device package.

[0172] Furthermore, according to the embodiments, multiple semiconductor device packages can be disposed on a substrate, and optical components such as light guide plates, prism sheets, and diffusers can be arranged in the optical path of the semiconductor device packages. The aforementioned semiconductor device packages, substrates, and optical components can be used as optical units.

[0173] Furthermore, it is possible to realize display devices, indicator devices, and lighting devices including semiconductor device packages according to embodiments.

[0174] Here, the display device may include a base cover, a reflector disposed on the base cover, a light-emitting module that emits light and includes semiconductor devices, a light guide plate disposed in front of the reflector and guiding light emitted forward from the light-emitting module, an optical sheet including a prism sheet disposed in front of the light guide plate, a display panel disposed in front of the optical sheet, an image signal output circuit connected to the display panel and supplying image signals to the display panel, and a color filter disposed in front of the display panel. Here, the base cover, reflector, light-emitting module, light guide plate, and optical sheet may form a backlight unit.

[0175] Furthermore, the lighting device may include: a light source module comprising a substrate and a semiconductor device according to an embodiment; a heat sink for dissipating heat from the light source module; and a power supply unit for processing or converting externally supplied electrical signals and supplying electrical signals to the light source module. For example, the lighting device may include a lamp, a headlight, or a streetlight.

[0176] The headlight may include: a light-emitting module including semiconductor devices disposed on a substrate; a reflector reflecting light emitted from the light-emitting module in a predetermined direction, such as a forward direction; a lens refracting the light reflected by the reflector in the forward direction; and a light shield blocking or reflecting a portion of the light reflected by the reflector and directed toward the lens to form a desired light distribution pattern by the designer.

[0177] The features, structures, effects, etc., described in the above embodiments are included in at least one embodiment, but are not limited to one embodiment. Furthermore, other embodiments can be implemented by combinations or modifications made by those skilled in the art regarding the features, structures, effects, etc., described in the embodiments. Therefore, content related to combinations and modifications should be interpreted as being included within the scope of the embodiments.

[0178] Although preferred embodiments have been set forth and described in the foregoing description, the invention should not be construed as limited thereto. It will be apparent to those skilled in the art that various variations and modifications, not illustrated, are available within the scope of the invention without departing from its inherent characteristics. For example, each component specifically illustrated in the embodiments can be performed by modification. Furthermore, it will be apparent that differences associated with modifications and variations are included within the scope of the embodiments set forth in the appended claims.

[0179] Industrial applicability

[0180] The semiconductor device and method of manufacturing the semiconductor device according to the embodiments have the advantages of being able to apply high power and provide high-power light.

[0181] The semiconductor device and method of manufacturing the semiconductor device according to the embodiments have the advantage that multiple light-emitting structures can be connected in series to prevent current concentration, thereby improving reliability.

[0182] The semiconductor device and method of manufacturing the semiconductor device according to the embodiments have the advantage that the reflective electrode and the pad electrode can be configured to be suitable for the flip chip bonding method, thereby facilitating the bonding process and improving the light extraction efficiency by increasing the reflectivity of the emitted light.

Claims

1. A semiconductor device comprising: a substrate; a first light emitting structure disposed on the substrate, the first light emitting structure including a first semiconductor layer of a first conductivity type; a first active layer disposed on the first semiconductor layer; and a second semiconductor layer of a second conductivity type; a second light emitting structure disposed on the substrate and spaced apart from the first light emitting structure, the second light emitting structure including a third semiconductor layer of the first conductivity type; a second active layer disposed on the third semiconductor layer; and a fourth semiconductor layer of the second conductivity type; a connection electrode electrically connected to the second semiconductor layer of the first light emitting structure and the third semiconductor layer of the second light emitting structure; the connection electrode including a main electrode, a first branch electrode directly connected to the main electrode, a second branch electrode extending from an end of the first branch electrode, and a third branch electrode extending from another end of the first branch electrode; wherein a first region of the main electrode is disposed on the second semiconductor layer, and a second region of the main electrode is disposed between a side surface of the first light emitting structure and a side surface of the second light emitting structure; and wherein the first branch electrode, the second branch electrode, and the third branch electrode are disposed on the third semiconductor layer; a first electrode pad disposed on the first light emitting structure and electrically connected to the first semiconductor layer; and a second electrode pad disposed on the second light emitting structure and electrically connected to the fourth semiconductor layer, a first reflective electrode disposed on the second semiconductor layer of the second conductivity type of the first light emitting structure, a second reflective electrode disposed on the fourth semiconductor layer of the second conductivity type of the second light emitting structure, wherein the first light emitting structure includes a plurality of first through-holes that pass through the first active layer and the second semiconductor layer of the second conductivity type to expose the first semiconductor layer of the first conductivity type, wherein the semiconductor device includes a first insulating layer including a contact region for exposing an upper surface of the third semiconductor layer, wherein the connection electrode is in point contact electrical connection with the third semiconductor layer through the contact region.

2. The semiconductor device of claim 1, wherein, The second branch electrode and the third branch electrode extend from the first branch electrode to an end region of the second light emitting structure along an upper surface of the third semiconductor layer.

3. The semiconductor device of claim 2, wherein, A length of the second branch electrode and a length of the third branch electrode provided along the upper surface of the third semiconductor layer are equal to 85% to 90% of a corresponding side length of the third semiconductor layer.

4. The semiconductor device of claim 1, wherein, The electrical connection between the first branch electrode and the third semiconductor layer, the electrical connection between the second branch electrode and the third semiconductor layer, and the electrical connection between the third branch electrode and the third semiconductor layer are all in point contact.

5. The semiconductor device of claim 1, wherein The contact region of the third semiconductor layer is provided in a plurality of holes, and a diameter of the holes of the contact region is 5 to 50 micrometers.

6. The semiconductor device according to claim 1, wherein The second branch electrode and the third branch electrode are electrically connected to the third semiconductor layer through the contact region, and the contact region is not provided in a region of a first insulating layer arranged under the first branch electrode.

7. The semiconductor device according to claim 1, wherein The second light emitting structure has a protruding region at a side surface thereof, and the contact region is provided in a recessed region between the protruding regions and in a plurality of holes through the first insulating layer.

8. The semiconductor device of claim 7, wherein, The side surface of the second light emitting structure is mesa-etched in a concave-convex shape.

9. The semiconductor device of claim 1, wherein, The second branch electrode and the third branch electrode are respectively arranged at the side surface of the second light emitting structure.

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