A communication method, device, equipment and medium for an electromagnetic transient simulation system

By using the interconnect checksum DMA direct data transmission method in the FPGA processor of the electromagnetic transient simulation system, the system call blocking problem caused by the TCP/IP interface is solved, the communication efficiency between computing nodes is improved, and the simulation is ensured. Real-time nature of the system.

CN116738745BActive Publication Date: 2025-01-14ELECTRIC POWER RES INST CHINA SOUTHERN POWER GRID CO LTD
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Patent Information

Application Number
CN202310762302.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-06-26
Publication Date
2025-01-14
Estimated Expiration
2043-06-26

AI Technical Summary

Technical Problem

Traditional inter-computing node communication uses TCP/IP communication interfaces to cause system call blockage and waiting time uncertain, resulting in low communication efficiency of electromagnetic transient simulation systems, which in turn affects real-time performance.

Method used

In the FPGA processor of electromagnetic transient simulation system, interconnect verification, data frame generation and transmission mechanisms are adopted to directly obtain data content from physical memory through the DMA controller, and send data frames in the user state to avoid forwarding of the system kernel again , improve the transmission rate of information interaction.

Benefits of technology

It effectively improves the communication efficiency between computing nodes, reduces data transmission delay, and ensures the real-time performance of the electromagnetic transient simulation system.

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Abstract

The present invention discloses a communication method, device, equipment and medium for an electromagnetic transient simulation system. The method comprises the following steps: when an FPGA processor in the electromagnetic transient simulation system receives a data frame to be filled, performing an interconnection check on a destination node identifier in the data frame to be filled; if the check passes, obtaining data content from a physical memory and filling the data frame to be filled to generate a target data frame; sending the target data frame to a target FPGA corresponding to the destination node identifier; when a target FPGA in a target electromagnetic transient simulation system receives the target data frame, matching a corresponding receiving buffer according to a parsing result of the target data frame and caching the target data frame, so that the target electromagnetic transient simulation system can perform subsequent calculation simulation tasks, thereby avoiding secondary forwarding of messages from the system kernel to the user state, and improving the transmission rate of information interaction.
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Description

Technical Field

[0001] The present invention relates to the field of data communication technology, and in particular to a communication method, device, equipment and medium for an electromagnetic transient simulation system. Background Art

[0002] With the continuous increase in electricity demand, the power system is also developing rapidly. More power electronic equipment has been born to enrich the power system and make the power system more complex. Therefore, it is necessary to simulate the power system before it is put into operation. Real-time simulation of power system is an effective means to understand the characteristics of power system, support power system research, planning, operation, production, equipment manufacturing, and ensure the safe and reliable operation of power system.

[0003] In real-time simulation, the electromagnetic transient simulation system has strict requirements on the real-time and stability of the calculation and communication delay of each step. In the simulation process, the communication time of each computing node is an important part of determining the simulation step. Multiple computing nodes need to communicate with each other. Each computing node may contain one or more CPUs, and each CPU contains several threads. These threads process communication tasks in parallel. Parallel computing and distributed computing technologies divide tasks into multiple small tasks and assign these small tasks to different processors for parallel processing, thereby greatly improving computing speed and efficiency.

[0004] However, the current traditional communication between computing nodes uses the TCP / IP communication interface provided by the system, which has the problems of system call blocking and uncertain waiting time, resulting in low communication efficiency between computing nodes, and thus causing the real-time performance of electromagnetic transient simulation to fail to meet the standards. Summary of the invention

[0005] The present invention provides a communication method, device, equipment and medium for an electromagnetic transient simulation system, which solves the technical problem that the current traditional communication between computing nodes uses the TCP / IP communication interface provided by the system, and there are system call blocking and uncertain waiting time, which leads to low communication efficiency between computing nodes and further causes the real-time performance of electromagnetic transient simulation to fail to meet the standards.

[0006] A communication method for an electromagnetic transient simulation system provided in a first aspect of the present invention is applied to an FPGA processor in the electromagnetic transient simulation system. The method comprises:

[0007] When receiving a data frame to be filled, performing an interconnection check on a destination node identifier in the data frame to be filled;

[0008] If the verification passes, the data content is obtained from the physical memory and filled into the data frame to be filled, generating the target data frame;

[0009] Sending the target data frame to the target FPGA corresponding to the destination node identifier;

[0010] When the target FPGA receives the target data frame, the target FPGA matches the corresponding receiving buffer according to the parsing result of the target data frame and caches the target data frame.

[0011] Optionally, the method further comprises:

[0012] In response to the received sending request, extracting the destination communication member identifier and the destination node identifier from the sending request;

[0013] Obtaining a source node identifier and a source communication member identifier;

[0014] Constructing a control field using the destination communication member identifier, the destination node identifier, the source node identifier, the source communication member identifier, the message length and the message type;

[0015] Using the control field, the preset data segment and the preset check code to construct a data frame to be filled;

[0016] The byte lengths of the destination communication member identifier, the destination node identifier, the source node identifier, and the source communication member identifier are all 1 byte, and the byte lengths of the message length and the message type are both 2 bytes.

[0017] Optionally, when receiving the data frame to be filled, the step of performing interconnection verification on the destination node identifier in the data frame to be filled includes:

[0018] When receiving a data frame to be filled, parsing the data frame to be filled to determine a destination node identifier;

[0019] Matching a locally stored interconnected node table according to the destination node identifier;

[0020] If the match is successful, it is determined that the interconnection check of the destination node identifier has passed;

[0021] If the match fails, it is determined that the interconnection check of the destination node identifier has not passed, and the current communication is terminated.

[0022] Optionally, if the verification is passed, the step of obtaining data content from the physical memory and filling it into the data frame to be filled to generate the target data frame includes:

[0023] If the verification passes, the data content is obtained from the physical memory;

[0024] Detecting the target message length and target message type corresponding to the data content;

[0025] The target message length is used to update the message length, and the target message type is used to update the message type;

[0026] The data content is loaded into the data segment to generate a target data frame.

[0027] Optionally, the method further comprises:

[0028] When the target data frame is sent through the physical link, a sending completion flag is set in the register.

[0029] Optionally, after the target FPGA receives the target data frame, the step of matching the corresponding receiving buffer and caching the target data frame according to the parsing result of the target data frame by the target FPGA includes:

[0030] When the target FPGA receives the target data frame, the target FPGA parses the target data frame to extract the target communication member identifier;

[0031] Using the target communication member identifier to match the communication member table in the target FPGA;

[0032] If the match is successful, the target data frame is cached in the receiving buffer corresponding to the destination communication member identifier, and the receiving completion mark is set to the completion mark.

[0033] Optionally, the target FPGA is communicatively connected to a target electromagnetic transient simulation system corresponding to the target communication member identifier, and the method further includes:

[0034] The target FPGA polls the receiving buffer to determine whether the receiving completion mark is a completion mark;

[0035] If so, the target FPGA reads the target data frame in the receiving buffer and executes the simulation task according to the target data frame.

[0036] A second aspect of the present invention provides a data communication device for an electromagnetic transient simulation system, which is applied to an FPGA processor in the electromagnetic transient simulation system, and the device comprises:

[0037] An identifier interconnection verification module, used for performing an interconnection verification on the destination node identifier in the data frame to be filled when receiving the data frame to be filled;

[0038] A target data frame generation module is used to obtain data content from the physical memory and fill it into the data frame to be filled to generate a target data frame if the verification passes;

[0039] A data frame sending module, used for sending the target data frame to the target FPGA corresponding to the destination node identifier;

[0040] The data frame receiving module is used to match the corresponding receiving buffer and cache the target data frame according to the parsing result of the target data frame through the target FPGA after the target FPGA receives the target data frame.

[0041] The third aspect of the present invention provides an electronic device, comprising a memory and a processor, wherein the memory stores a computer program, and when the computer program is executed by the processor, the processor executes the steps of the communication method of the electromagnetic transient simulation system as described in any one of the first aspect of the present invention.

[0042] A fourth aspect of the present invention provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed, the communication method of the electromagnetic transient simulation system as described in any one of the first aspects of the present invention is implemented.

[0043] It can be seen from the above technical solutions that the present invention has the following advantages:

[0044] When the FPGA processor in the electromagnetic transient simulation system receives the data frame to be filled, the destination node identifier in the data frame to be filled is interconnected and checked; if the check passes, the data content is obtained from the physical memory and filled into the data frame to be filled to generate a target data frame; the target data frame is sent to the target FPGA corresponding to the destination node identifier; when the target FPGA in the target electromagnetic transient simulation system receives the target data frame, the corresponding receiving buffer is matched according to the analysis result of the target data frame and the target data frame is cached so that the target electromagnetic transient simulation system can perform subsequent calculation simulation tasks, thereby avoiding the secondary forwarding of the message from the system kernel to the user state, and improving the transmission rate of information interaction. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0046] Figure 1 A flow chart of the steps of a communication method for an electromagnetic transient simulation system provided in Embodiment 1 of the present invention;

[0047] Figure 2 A flow chart of the steps of a communication method for an electromagnetic transient simulation system provided in the second embodiment of the present invention;

[0048] Figure 3 A panel diagram of an FPGA chip on a node host in an electromagnetic transient simulation system provided in the second embodiment of the present invention;

[0049] Figure 4 A schematic diagram of the structure of a data frame to be filled provided in Embodiment 2 of the present invention;

[0050] Figure 5 A schematic diagram of a complete data transmission process of an electromagnetic transient simulation system provided in the second embodiment of the present invention;

[0051] Figure 6 This is a structural block diagram of a communication device of an electromagnetic transient simulation system provided in Embodiment 3 of the present invention. DETAILED DESCRIPTION

[0052] The embodiments of the present invention provide a communication method, apparatus, device and medium for an electromagnetic transient simulation system, which are used to solve the problem that the current traditional communication between computing nodes uses the TCP / IP communication interface provided by the system, and there are system call blocking and uncertain waiting time, which leads to low communication efficiency between computing nodes, and further leads to the technical problem that the real-time performance of electromagnetic transient simulation does not meet the standard.

[0053] In order to make the purpose, features and advantages of the present invention more obvious and easy to understand, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described below are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0054] See also Figure 1 , Figure 1 A flow chart of the steps of a communication method for an electromagnetic transient simulation system provided in Embodiment 1 of the present invention.

[0055] The present invention provides a communication method for an electromagnetic transient simulation system, which is applied to an FPGA processor in the electromagnetic transient simulation system. The method includes:

[0056] Step 101, when receiving a data frame to be filled, performing an interconnection check on a destination node identifier in the data frame to be filled;

[0057] Interconnection verification refers to a verification process for determining whether a target electromagnetic transient simulation system has an interconnection relationship with the current electromagnetic transient simulation system, which can be achieved by local matching through the destination node identifier.

[0058] The data frame to be filled refers to a data frame that temporarily lacks the specific contents of the data segment, message length and message type.

[0059] In an embodiment of the present invention, when the FPGA processor in the electromagnetic transient simulation system receives a data frame to be filled, it parses it to extract the destination node identifier therein, performs an interconnection check on the destination node identifier, and determines whether there is an interconnection relationship between the communication to be sent and the FPGA processor.

[0060] It should be noted that the target FPGA can be set in the target electromagnetic transient simulation system.

[0061] Step 102, if the verification is passed, the data content is obtained from the physical memory and filled into the data frame to be filled, so as to generate a target data frame;

[0062] If the verification is passed, it indicates that there is an interconnection between the target FPGA and the FPGA processor. At this time, the DMA (Direct Memory Access) controller in the FPGA processor can be used to write the data's physical memory transmission address, data length, and start transmission mark. The specific data content is obtained from the physical memory and filled into the data segment in the data frame to be filled, and the message length and message type are recorded to generate the target data frame.

[0063] It should be noted that the data content refers to the content information specified or further input by the user after inputting the sending request, and the data content can be acquired through the DMA controller.

[0064] Step 103, sending the target data frame to the target FPGA corresponding to the destination node identifier;

[0065] For power grid simulation programs, latency is one of the important indicators. After generating the target data frame, the target data frame can be sent to the target FPGA corresponding to the destination node identifier through a physical link, thereby realizing the sending of data frames in user mode, greatly reducing data transmission latency.

[0066] Step 104, when the target FPGA receives the target data frame, the target FPGA matches the corresponding receiving buffer according to the analysis result of the target data frame and caches the target data frame.

[0067] In this embodiment, after the target FPGA receives the target data frame, the DMA controller corresponding to the target FPGA can parse the target data frame to extract the target control field therein, and match the receiving buffer to which the corresponding communication member belongs according to the target control field, and cache the target data frame to the receiving buffer after the match is successful.

[0068] In an embodiment of the present invention, when the FPGA processor in the electromagnetic transient simulation system receives a data frame to be filled, an interconnection check is performed on the destination node identifier in the data frame to be filled; if the check passes, the data content is obtained from the physical memory and filled into the data frame to be filled to generate a target data frame; the target data frame is sent to the target FPGA corresponding to the destination node identifier; when the target FPGA in the target electromagnetic transient simulation system receives the target data frame, the corresponding receiving buffer is matched according to the analysis result of the target data frame and the target data frame is cached, so that the target electromagnetic transient simulation system can perform subsequent calculation simulation tasks, thereby avoiding the secondary forwarding of the message from the system kernel to the user state, and improving the transmission rate of information interaction.

[0069] See also Figure 2 , Figure 2 A flow chart of the steps of a communication method for an electromagnetic transient simulation system provided in Embodiment 2 of the present invention.

[0070] The present invention provides a communication method for an electromagnetic transient simulation system, which is applied to an FPGA processor in the electromagnetic transient simulation system. The method includes:

[0071] Step 201, when receiving a data frame to be filled, performing an interconnection check on a destination node identifier in the data frame to be filled;

[0072] See also Figure 3 , Figure 3 This is a panel diagram of the FPGA chip on the node host in the electromagnetic transient simulation system.

[0073] Each host is numbered and identified by NodeID, the FPGA on each host is identified by slot number, and the port of each FPGA is identified by port number. The connection between host Node and host Node is interconnected through FPGA port fiber, so the number of interconnections of each host depends on the number of ports.

[0074] Optionally, step 201 may include the following sub-steps:

[0075] When receiving a data frame to be filled, the data frame to be filled is parsed to determine the destination node identifier;

[0076] Matching the locally stored interconnected node table according to the destination node identifier;

[0077] If the match is successful, it is determined that the interconnection check of the destination node identifier has passed;

[0078] If the match fails, it is determined that the interconnection check of the destination node identifier has not passed, and the current communication ends.

[0079] When communicating with the electromagnetic transient simulation system, it is necessary to first establish communication interconnection between the systems, and at the same time, it is also necessary to prevent the communication object from being wrong when the identification is wrong. To this end, when receiving the data frame to be filled, the data frame to be filled is parsed, the destination node identification therein is extracted, and then the destination node identification is used as a matching object to match the interconnection node table in the local storage of the electromagnetic transient simulation system to determine whether the target electromagnetic transient simulation system to which the destination node identification belongs is interconnected with the local machine.

[0080] If the match is successful, it indicates that the interconnection check of the destination node identifier has passed, and the target electromagnetic transient simulation system to which the destination node identifier belongs is interconnected with the local machine, and the subsequent process of sending data through the connection port can be entered; if the match fails, it indicates that the interconnection check of the destination node identifier has not passed, the current communication is ended, and the next reception of the data frame to be filled is waited for.

[0081] It should be noted that after determining that the interconnection check fails, a notification can be further sent to a preset monitoring terminal, and the monitoring terminal further performs fuzzy matching on the destination node identifier to determine whether there is a bit filling error in the single-byte destination node identifier. If yes, the monitoring terminal can be notified according to the fuzzy matching object in the interconnection node table, and respond to the user's instruction to determine whether to perform subsequent data communication. If not, the communication ends.

[0082] In one example of the present invention, the method further includes:

[0083] In response to the received sending request, extracting the destination communication member identifier and the destination node identifier from the sending request;

[0084] Obtaining a source node identifier and a source communication member identifier;

[0085] The control field is constructed using the destination communication member identifier, the destination node identifier, the source node identifier, the source communication member identifier, the message length and the message type;

[0086] A control field, a preset data segment and a preset check code are used to construct a data frame to be filled;

[0087] Among them, the byte length of the destination communication member identifier, the destination node identifier, the source node identifier and the source communication member identifier are all 1 byte, and the byte length of the message length and the message type are both 2 bytes.

[0088] See also Figure 4 , Figure 4 The figure is a schematic diagram of the structure of a data frame to be filled in an embodiment of the present invention.

[0089] Node ID refers to the unique ID assigned to each computing node in the electromagnetic transient real-time simulation system, referred to as NodeID. The value range of NodeID is 0-255 and is stored in 1 byte of memory. It includes the destination node ID and the source node ID. The destination node ID is used to identify the computing node where the communication message receiver is located. The source node ID is used to identify the computing node where the communication message sender is located.

[0090] The communication member ID refers to the unique ID assigned to each communication member in the computing node, referred to as CommID. The value range of CommID is 0-255 and is stored in 1 byte of memory. It includes the destination communication member ID and the source communication member ID. The destination communication member ID is used to identify the message receiver of the communication message. The source communication member ID is used to identify the message sender of the communication message.

[0091] The unique identification of the communication member refers to the unique identification of the communication member in the electromagnetic transient simulation system (referred to as GCommID), which is composed of NodeID and CommID, and is stored in two bytes, the high address byte is NodeID, and the low address byte is CommID.

[0092] Message length is used to identify the length of the data segment of the communication message and consists of a 2-byte network byte order integer.

[0093] Message type, used to indicate the data type of the data segment, consists of a 2-byte network byte order integer.

[0094] The data segment contains the data payload content of the communication, and the message content length is 0-65535.

[0095] The checksum includes the CRC checksum values ​​of the control segment and the data segment.

[0096] In one example of the present invention, before receiving the data frame to be filled, the FPGA processor of the electromagnetic transient simulation system also needs to respond to an external input or automatically generated sending request to construct the data frame to be filled. First, the destination communication member identifier and the destination node identifier are extracted from the sending request to determine the communication node position and the communication member to be sent. Further, the source node identifier and the source communication member identifier corresponding to the electromagnetic transient simulation system are obtained, and then the control field is constructed using the destination communication member identifier, the destination node identifier, the source node identifier, the source communication member identifier, the message length and the message type. Finally, the control field, the preset data segment and the preset check code are arranged in sequence to construct the data frame to be filled.

[0097] It should be noted that the message length and message type at this time can be set to null values ​​because the length and content of the data segment are unknown. At the same time, the preset data segment can also be set to null values ​​to wait for further filling, and the check code can be set to the CRC check value of the control field and the data segment.

[0098] Step 202, if the verification passes, the data content is obtained from the physical memory;

[0099] In the embodiment of the present invention, if the interconnection check determines that the check is passed, the corresponding data content can be obtained from the local physical memory, waiting for further filling of the data segment.

[0100] It should be noted that the data transfer address, data length and start transfer mark of the physical memory can be written through the FPGA's DMA controller. After receiving the transfer instruction, the DMA controller obtains the data content from the physical memory and waits for subsequent data filling and the transmission of the physical link.

[0101] Step 203, detecting the target message length and target message type corresponding to the data content;

[0102] Step 204, update the message length using the target message length, and update the message type using the target message type;

[0103] When the data content is obtained, the corresponding target message length and target message type can be detected at the same time, and the empty value in the message length can be updated using the target message length, and the empty value in the message type can be updated using the target message type to achieve the setting of the message length and message type.

[0104] Step 205: Load the data content into the data segment to generate a target data frame.

[0105] In an embodiment, the data content is loaded into the data segment, and the corresponding CRC check bits are set to generate a target data frame.

[0106] Step 206, sending the target data frame to the target FPGA corresponding to the destination node identifier;

[0107] Optionally, the method further comprises:

[0108] When the target data frame is sent through the physical link, the sending completion flag is set in the register.

[0109] After completing data filling to generate a target data frame, the DMA controller can be used to send the target data frame to the target FPGA on the target node specified by the destination node identifier through a physical link, and set a sending completion flag in a local register.

[0110] Step 207, when the target FPGA receives the target data frame, the target FPGA matches the corresponding receiving buffer according to the analysis result of the target data frame and caches the target data frame.

[0111] Optionally, step 207 may include the following sub-steps:

[0112] When the target FPGA receives the target data frame, the target data frame is parsed by the target FPGA to extract the target communication member identifier;

[0113] The target communication member identifier is used to match the communication member table in the target FPGA;

[0114] If the match is successful, the target data frame is cached in the receiving buffer corresponding to the destination communication member identifier, and the receiving completion mark is set to the completion mark.

[0115] The original communication technology uses the TCP / IP network to complete the data communication of the computing nodes. Due to the TCP / IP protocol stack of the kernel, the communication delay between the two nodes in transmitting 1024 bytes is hundreds of microseconds, which is unacceptable for the power grid simulation program. Therefore, the present invention realizes the communication of nodes between FPGAs, utilizes the DMA concept, kernel bypass, and encapsulates the registers of the FPGAPCIe device BAR space to realize the sending and receiving of data frames in the user state, greatly reducing the data transmission delay.

[0116] In an embodiment of the present invention, after the target FPGA receives the target data frame through the physical link, it can be parsed to extract the target communication member identifier. The target communication member identifier is used to match the communication member table stored in the target FPGA to determine whether the target FPGA has a corresponding communication member. If the match is successful, the forwarding queue corresponding to the communication member can be used to cache the target data frame to the receiving buffer corresponding to the destination communication member identifier through the DMA controller, and the receiving completion flag is set to the completion flag.

[0117] In another example of the present invention, the target FPGA is communicatively connected to the target electromagnetic transient simulation system corresponding to the target communication member identifier, and the method further includes the following steps:

[0118] The target FPGA polls the receiving buffer to determine whether the receiving completion flag is a completion flag;

[0119] If so, the target FPGA reads the target data frame in the receiving buffer and executes the simulation task according to the target data frame.

[0120] In this embodiment, the target FPGA can be set in the target electromagnetic transient simulation system and communicated with the target electromagnetic transient simulation system corresponding to the target communication member identifier. The target electromagnetic transient simulation system polls the receiving buffer to determine whether the receiving completion flag is set to the completion flag. If it has been set, the target electromagnetic transient simulation system can read the target data frame in the receiving buffer and read the data segment in the target data frame to determine the communication content, and execute subsequent simulation tasks such as computing tasks according to the communication content.

[0121] See also Figure 5 , Figure 5 A schematic flow chart of a complete data transmission process of an electromagnetic transient simulation system in an embodiment of the present invention is shown.

[0122] In an embodiment of the present invention, data message communication in an electromagnetic transient simulation system is realized by the following steps:

[0123] 1. When sending data frames, the application needs to carry the source and destination host NodeID numbers, and the source and destination communication member identifiers;

[0124] 2. The sending FPGA logic processes the received data frame and verifies whether the NodeID number of the destination host is interconnected with the host;

[0125] 3. If there is no interconnection, the sending fails and the process ends;

[0126] 4. If they are already interconnected, send data to the host with the specified NodeID through the connection port;

[0127] 5. The receiving end FPGA logic processes and parses the communication member CommID in the data frame;

[0128] 6. According to the correspondence table established between FGPA and the communication member CommID on the host, find the corresponding communication member;

[0129] 7. If the communication member does not exist on the host, the process ends;

[0130] 8. If the host has the communication member, use the forwarding queue corresponding to the communication member to store the data into the receiving buffer of the specified communication member through DMA.

[0131] In an embodiment of the present invention, when the FPGA processor in the electromagnetic transient simulation system receives a data frame to be filled, an interconnection check is performed on the destination node identifier in the data frame to be filled; if the check passes, the data content is obtained from the physical memory and filled into the data frame to be filled to generate a target data frame; the target data frame is sent to the target FPGA corresponding to the destination node identifier; when the target FPGA in the target electromagnetic transient simulation system receives the target data frame, the corresponding receiving buffer is matched according to the analysis result of the target data frame and the target data frame is cached, so that the target electromagnetic transient simulation system can perform subsequent calculation simulation tasks, thereby avoiding the secondary forwarding of the message from the system kernel to the user state, and improving the transmission rate of information interaction.

[0132] See also Figure 6 , Figure 6 A structural block diagram of a communication device of an electromagnetic transient simulation system according to a third embodiment of the present invention is shown.

[0133] An embodiment of the present invention provides a communication device of an electromagnetic transient simulation system, which is applied to an FPGA processor in the electromagnetic transient simulation system. The device includes:

[0134] The identifier interconnection verification module 601 is used to perform interconnection verification on the destination node identifier in the data frame to be filled when receiving the data frame to be filled;

[0135] The target data frame generation module 602 is used to obtain data content from the physical memory and fill it into the data frame to be filled to generate a target data frame if the verification passes;

[0136] A data frame sending module 603 is used to send a target data frame to a target FPGA corresponding to a destination node identifier;

[0137] The data frame receiving module 604 is used to match the corresponding receiving buffer and cache the target data frame according to the analysis result of the target data frame through the target FPGA after the target FPGA receives the target data frame.

[0138] Optionally, the device further comprises:

[0139] The request response module is used to respond to the received sending request and extract the destination communication member identifier and the destination node identifier from the sending request;

[0140] A source identification module, used to obtain a source node identification and a source communication member identification;

[0141] A control field construction module, used to construct a control field using a destination communication member identifier, a destination node identifier, a source node identifier, a source communication member identifier, a message length and a message type;

[0142] A module for constructing a data frame to be filled, used to construct a data frame to be filled by using a control field, a preset data segment and a preset check code;

[0143] Among them, the byte length of the destination communication member identifier, the destination node identifier, the source node identifier and the source communication member identifier are all 1 byte, and the byte length of the message length and the message type are both 2 bytes.

[0144] Optionally, the identification interconnection verification module 601 is specifically used for:

[0145] When receiving a data frame to be filled, the data frame to be filled is parsed to determine the destination node identifier;

[0146] Matching the locally stored interconnected node table according to the destination node identifier;

[0147] If the match is successful, it is determined that the interconnection check of the destination node identifier has passed;

[0148] If the match fails, it is determined that the interconnection check of the destination node identifier has not passed, and the current communication ends.

[0149] Optionally, the target data frame generation module 602 is specifically used for:

[0150] If the verification passes, the data content is obtained from the physical memory;

[0151] Detect the target message length and target message type corresponding to the data content;

[0152] Update the message length with the target message length, and update the message type with the target message type;

[0153] Load the data content into the data segment to generate the target data frame.

[0154] Optionally, the device further comprises:

[0155] The sending completion setting module is used to set the sending completion flag in the register after the target data frame is sent through the physical link.

[0156] Optionally, the data frame receiving module 604 is specifically used for:

[0157] When the target FPGA receives the target data frame, the target data frame is parsed by the target FPGA to extract the target communication member identifier;

[0158] The target communication member identifier is used to match the communication member table in the target FPGA;

[0159] If the match is successful, the target data frame is cached in the receiving buffer corresponding to the destination communication member identifier, and the receiving completion mark is set to the completion mark.

[0160] Optionally, the target FPGA is communicatively connected to a target electromagnetic transient simulation system corresponding to the target communication member identifier, and the target FPGA includes:

[0161] A polling module is used for polling the receiving buffer of the target FPGA to determine whether the receiving completion mark is a completion mark;

[0162] The reading module is used for the target FPGA to read the target data frame in the receiving buffer and execute the simulation task according to the target data frame.

[0163] An embodiment of the present invention provides an electronic device, including a memory and a processor, wherein the memory stores a computer program, and when the computer program is executed by the processor, the processor executes the steps of the communication method of the electromagnetic transient simulation system as described in any embodiment of the present invention.

[0164] An embodiment of the present invention provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed, the communication method of the electromagnetic transient simulation system as described in any embodiment of the present invention is implemented.

[0165] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described devices and modules can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0166] In the several embodiments provided by the present invention, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0167] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0168] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0169] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk and other media that can store program codes.

[0170] As described above, the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features thereof may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A communication method for an electromagnetic transient simulation system, characterized in that: The method is applied to an FPGA processor in an electromagnetic transient simulation system, and comprises: When receiving a data frame to be filled, an interconnection check is performed on the destination node identifier in the data frame to be filled; the interconnection check refers to a check process for determining whether an interconnection relationship exists between the target electromagnetic transient simulation system and the current electromagnetic transient simulation system; If the verification passes, the data content is obtained from the physical memory and filled into the data frame to be filled, generating the target data frame; Sending the target data frame to the target FPGA corresponding to the destination node identifier; When the target FPGA receives the target data frame, the target FPGA matches the corresponding receiving buffer according to the parsing result of the target data frame and caches the target data frame; The step of performing interconnection verification on the destination node identifier in the data frame to be filled when receiving the data frame to be filled comprises: When receiving a data frame to be filled, parsing the data frame to be filled to determine a destination node identifier; Matching a locally stored interconnected node table according to the destination node identifier; If the match is successful, it is determined that the interconnection check of the destination node identifier has passed; If the match fails, it is determined that the interconnection check of the destination node identifier has not passed, and the current communication is terminated.

2. The method according to claim 1, characterized in that The method further comprises: In response to the received sending request, extracting the destination communication member identifier and the destination node identifier from the sending request; Obtaining a source node identifier and a source communication member identifier; Constructing a control field using the destination communication member identifier, the destination node identifier, the source node identifier, the source communication member identifier, the message length and the message type; Using the control field, the preset data segment and the preset check code to construct a data frame to be filled; The byte lengths of the destination communication member identifier, the destination node identifier, the source node identifier and the source communication member identifier are all 1 byte, and the byte lengths of the message length and the message type are both 2 bytes.

3. The method according to claim 2, characterized in that If the verification is passed, the step of obtaining data content from the physical memory and filling it into the data frame to be filled, and generating a target data frame includes: If the verification passes, the data content is obtained from the physical memory; Detecting the target message length and target message type corresponding to the data content; The target message length is used to update the message length, and the target message type is used to update the message type; The data content is loaded into the data segment to generate a target data frame.

4. The method according to claim 1, characterized in that: The method further comprises: When the target data frame is sent through the physical link, a sending completion flag is set in the register.

5. The method according to claim 1, characterized in that The step of matching a corresponding receiving buffer and caching the target data frame by the target FPGA according to a parsing result of the target data frame after the target FPGA receives the target data frame includes: When the target FPGA receives the target data frame, the target FPGA parses the target data frame to extract the destination communication member identifier; Using the destination communication member identifier to match the communication member table in the target FPGA; If the match is successful, the target data frame is cached in the receiving buffer corresponding to the destination communication member identifier, and the receiving completion mark is set to the completion mark.

6. The method according to claim 5, characterized in that The target FPGA is communicatively connected with a target electromagnetic transient simulation system corresponding to the target communication member identifier, and the method further comprises: The target FPGA polls the receiving buffer to determine whether the receiving completion mark is a completion mark; If so, the target FPGA reads the target data frame in the receiving buffer and executes the simulation task according to the target data frame.

7. A communication device for an electromagnetic transient simulation system, characterized in that: An FPGA processor used in an electromagnetic transient simulation system, the device comprising: The identifier interconnection verification module is used to perform interconnection verification on the destination node identifier in the data frame to be filled when receiving the data frame to be filled; the interconnection verification refers to the verification process of judging whether there is an interconnection relationship between the target electromagnetic transient simulation system and the current electromagnetic transient simulation system; A target data frame generation module is used to obtain data content from the physical memory and fill it into the data frame to be filled to generate a target data frame if the verification passes; A data frame sending module, used for sending the target data frame to the target FPGA corresponding to the destination node identifier; A data frame receiving module, used for matching a corresponding receiving buffer and caching the target data frame through the target FPGA according to a parsing result of the target data frame after the target FPGA receives the target data frame; The identification interconnection verification module is specifically used for: When receiving a data frame to be filled, parsing the data frame to be filled to determine a destination node identifier; Matching a locally stored interconnected node table according to the destination node identifier; If the match is successful, it is determined that the interconnection check of the destination node identifier has passed; If the match fails, it is determined that the interconnection check of the destination node identifier has not passed, and the current communication is terminated.

8. An electronic device, characterized in that: It comprises a memory and a processor, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the processor executes the steps of the communication method of the electromagnetic transient simulation system according to any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed, the communication method of the electromagnetic transient simulation system according to any one of claims 1 to 6 is implemented.

Citation Information

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