Heterogeneously integrated optical chip

Abstract

The present application relates to a kind of heterogeneous integrated optical chip, the chip is divided into two layers of upper and lower photonic integrated circuits, and the transmission coupling of light in two layers of photonic integrated circuits is realized by the method of evanescent wave coupling, and light is coupled from the first layer waveguide to the third layer waveguide and then coupled to the second layer waveguide by the evanescent wave coupler composed of three layer waveguide;Wherein the first layer waveguide constitutes the first layer photonic integrated circuit, and the second layer and the third layer waveguide constitute the second layer photonic integrated circuit.The present application can be realized by combining the advantages of different medium layer waveguide, and the performance of optical chip is improved, and the demand of next-generation product is met.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of optical communication, and particularly relates to a heterogeneous integrated optical chip. BACKGROUND

[0002] With the rise of technologies such as big data, 5G, virtual reality, Internet of Everything, ChatGPT, and the like, the total amount of communication data generated by information interaction will continue to grow explosively, and the development of optical communication technology, as a key technology in the current communication system, is crucial. In optical communication technology, how to realize low insertion loss, low power consumption, high bandwidth and high integration of optical chips has always been the core problem of improving the performance of optical modules.

[0003] Silicon optical technology has been widely used in the field of optical communication due to the advantages of silicon material, such as good transparent window, high integration, and CMOS compatibility, which brings low cost. However, in the core modulator of the optical chip, the silicon optical modulator based on carrier dispersion effect is greatly limited in bandwidth and insertion loss performance due to its intrinsic absorption and nonlinearity, which cannot meet the application scenarios above 800G. SUMMARY

[0004] The technical problem to be solved by the present application is to provide a heterogeneous integrated optical chip, which can improve the bandwidth of the optical chip, meet the demand of the next generation product, and realize a transceiver integrated optical chip.

[0005] The heterogeneous integrated optical chip comprises an upper layer photonic integrated circuit and a lower layer photonic integrated circuit, and realizes the transmission and coupling of light in the two layers of photonic integrated circuits through evanescent wave coupling. The light can be coupled from the first layer waveguide to the third layer waveguide and then coupled to the second layer waveguide through an evanescent wave coupler composed of three layers of waveguides. The first layer waveguide constitutes the first layer photonic integrated circuit, and the second layer and third layer waveguides constitute the second layer photonic integrated circuit.

[0006] Preferably, the chip is realized by first manufacturing two photonic integrated chips of different medium materials, combining through bonding, and then removing the substrate of the upper photonic integrated chip.

[0007] Further, the chip is stacked by three layers of waveguides; the first layer waveguide and the third layer waveguide constitute a first evanescent wave coupler, and the second layer waveguide and the third layer waveguide constitute a second evanescent wave coupler.

[0008] Further, the first evanescent wave coupler and the second evanescent wave coupler control the alignment accuracy of the waveguides through high-precision bonding instruments or through the reserved third layer waveguide processing area to control the alignment accuracy of the waveguides in the coupling area.

[0009] Further, the third layer waveguide to be processed region is reserved between the first evanescent wave coupler and the second evanescent wave coupler of the upper chip and between the first evanescent wave coupler and the second evanescent wave coupler, and the third layer waveguide is micro-processed after the bonding to realize high-precision alignment.

[0010] Further, the alignment error of each minimum unit region in the wafer is measured after the bonding, and the corresponding third layer waveguide offset is designed according to the measurement error, and the third layer waveguide after alignment is manufactured in the third layer waveguide to be etched region.

[0011] Preferably, the connection of the first evanescent wave coupler and the second evanescent wave coupler is realized by a U-shaped curved waveguide.

[0012] Preferably, the connection of the first evanescent wave coupler and the second evanescent wave coupler is realized by an S-shaped curved waveguide.

[0013] Preferably, the second layer waveguide material is introduced as a coupling auxiliary layer between the first layer waveguide and the third layer waveguide to improve the coupling efficiency.

[0014] Preferably, the third layer waveguide pattern is manufactured by an electron beam exposure method.

[0015] Preferably, the third layer waveguide pattern is manufactured by a step-by-step photoetching machine.

[0016] Preferably, the third layer waveguide pattern is manufactured by an optical wire bonding method.

[0017] Preferably, the first layer waveguide layer in the lower chip is an electro-optic crystal medium thin film layer, and the material is lithium niobate; the upper chip is an SOI wafer, the second layer waveguide layer material is silicon nitride, and the third layer waveguide layer material is silicon.

[0018] Further, the first layer waveguide layer material can also be indium phosphide or lithium tantalate.

[0019] Preferably, the electro-optic modulator is realized by the first layer waveguide layer, and the photodetector is realized by the epitaxial germanium material on the third layer waveguide layer.

[0020] Advantages

[0021] The present application can realize the transceiver integrated optical chip and effectively improve the optical chip bandwidth performance by combining the advantages of different medium layer waveguides, and meet the needs of the next generation products. BRIEF DESCRIPTION OF DRAWINGS

[0022] Figure 1 It is a schematic diagram of the implementation mode of the chip of the present application.

[0023] Figure 2The schematic diagram of the evanescent wave coupler of the chip of the present application.

[0024] Figure 3 The schematic diagram of the implementation mode of the alignment of the upper and lower waveguides of the first evanescent wave coupler in the chip of the present application.

[0025] Figure 4 The first implementation mode of the evanescent wave coupler.

[0026] Figure 5 The second implementation mode of the evanescent wave coupler.

[0027] Figure 6 The top view and sectional view of the first evanescent wave coupler of the chip of the present application with the introduction of the coupling auxiliary layer. DETAILED DESCRIPTION

[0028] The present application will be further described below in conjunction with specific embodiments. It should be understood that these embodiments are only used to illustrate the present application and not used to limit the scope of the present application. Furthermore, it should be understood that after reading the content taught by the present application, those skilled in the art can make various modifications or changes to the present application, and these equivalent forms also fall within the scope defined by the appended claims of the present application.

[0029] Embodiment 1

[0030] The first aspect of the present embodiment proposes a heterogeneous integrated optical chip, comprising:

[0031] As shown in Figure 1 , the lower chip with the first layer waveguide, the upper chip with the second layer and third layer waveguide, the bonding of the upper and lower chips, and the removal of the substrate of the upper chip, the optical chip with the first, second and third layer waveguide can be obtained. Wherein the upper and lower chips are both made with the waveguide structure before the bonding. The chip is divided into the upper and lower photonic integrated circuits, and the light transmission and coupling in the two-layer photonic integrated circuits are realized by the evanescent wave coupling method; wherein the first layer waveguide constitutes the first layer photonic integrated circuit, and the second layer and third layer waveguide constitute the second layer photonic integrated circuit. The optical coupling of the upper and lower chips is realized by the evanescent wave coupler with the three-layer optical waveguide stack, as shown in Figure 2 , the evanescent wave coupler can be divided into the first evanescent wave coupler constituted by the first layer waveguide and the third layer waveguide, and the second evanescent wave coupler constituted by the second layer waveguide and the third layer waveguide. The first evanescent wave coupler and the second evanescent wave coupler are connected through the third layer waveguide.

[0032] As shown in Figure 2 , the direct alignment between the first layer waveguide and the third layer waveguide of the first evanescent wave coupler can be realized by the high-precision bonding technology, and the high-efficiency coupling can be realized without further micro-processing of the upper chip. As shown in Figure 3As shown, when the bonding accuracy cannot meet the requirements for achieving a high-efficiency evanescent wave coupler, a processing area can be reserved near the third waveguide layer of the evanescent wave coupler region during the fabrication of the upper-layer chip. After bonding is completed, the third waveguide layer of the evanescent wave coupler region can be redesigned according to the alignment offset of each unit to achieve simultaneous alignment of the third waveguide layer with the first waveguide layer and the second waveguide layer.

[0033] Depend on Figure 4 As shown, after bonding, there is usually an alignment deviation between the first and second waveguides in both the X and Y directions. To solve the problem of simultaneously aligning the waveguides in the two evanescent wave couplers when there is a bonding deviation in the Y direction, one approach is to arrange the two evanescent wave couplers vertically and connect them by fabricating a third optical waveguide with a U-shaped curved waveguide structure according to the bonding offset.

[0034] Depend on Figure 5 As shown, another possible implementation is to arrange two evanescent wave couplers side by side, and connect them by fabricating a third waveguide with an S-shaped curved waveguide structure according to the bonding offset.

[0035] Depend on Figure 6 As shown, in this embodiment, the first evanescent wave coupler can be composed of a first waveguide layer and a third waveguide layer, and a second waveguide layer can also be introduced as a coupling auxiliary layer to improve coupling efficiency. The cross-section of the first evanescent wave coupler composed of three waveguide layers is as follows: Figure 6 As shown in the figure on the right.

[0036] In this embodiment, the third waveguide pattern can be fabricated either by electron beam lithography or by a stepper lithography machine. A third method is to fabricate the entire third waveguide using optical wire bonding.

[0037] In some possible implementations, the first waveguide layer in the lower chip is an electro-optic crystal dielectric thin film layer, which can be made of lithium niobate, indium phosphide, or lithium tantalate. The upper chip is an SOI wafer, with its second waveguide layer being silicon nitride and its third waveguide layer being made of silicon. The bonding dielectric layer is silicon oxide. The lower chip utilizes materials such as lithium niobate with high linear electro-optic coefficients to fabricate a high-performance electro-optic modulator, which can improve the bandwidth of the optical chip to meet the needs of next-generation products. The upper chip can be used to fabricate a high-performance photodetector by epitaxially growing germanium material on a silicon waveguide, thereby realizing an integrated optical transceiver chip.

[0038] The chip of the embodiment realizes the electro-optical modulator with high bandwidth, low half-wave voltage and low loss by using the electro-optical crystal thin film material with high electro-optical coefficient; realizes the passive waveguide with low loss by using silicon nitride; realizes the high-performance photodetector by using the germanium epitaxy on silicon; and retains the advantages of low cost of silicon optical technology. The method also avoids the complex passive structure on lithium niobate and simplifies the process method.

Claims

1. A heterogeneous integrated optical chip, characterized in that: The chip consists of two layers of photonic integrated circuits, upper and lower. Light transmission and coupling between these two layers are achieved through evanescent wave coupling. The light passes through an evanescent wave coupler composed of three waveguides, ensuring that the light can couple from the first waveguide to the third waveguide and then to the second waveguide. The first waveguide forms the first photonic integrated circuit, and the second and third waveguides form the second photonic integrated circuit. The first and third waveguides form the first evanescent wave coupler, and the second and third waveguides form the second evanescent wave coupler. The chip is fabricated by first creating two photonic integrated chips with different dielectric materials, bonding them together, and then removing the substrate of the upper photonic integrated chip. A third waveguide processing area is reserved between the first and second evanescent wave couplers and between the first and second evanescent wave couplers on the upper photonic integrated chip. After bonding, the third waveguide in the coupling area is micro-machined to achieve high-precision alignment. After bonding, the alignment error of each smallest unit area in the wafer is measured, and the corresponding offset of the third waveguide is designed to compensate for the measurement error. The aligned third waveguide is then fabricated in the etchable area of ​​the third waveguide.

2. The heterogeneous integrated optical chip according to claim 1, characterized in that: The connection between the first and second evanescent wave couplers is achieved by a U-shaped curved waveguide.

3. The heterogeneous integrated optical chip according to claim 1, characterized in that: The connection between the first and second evanescent wave couplers is achieved by a section of S-shaped curved waveguide.

4. The heterogeneous integrated optical chip according to claim 1, characterized in that: A second waveguide material is introduced between the first and third waveguide layers as a coupling aid layer to improve coupling efficiency.

5. The heterogeneous integrated optical chip according to claim 1, characterized in that: The pattern of the third waveguide was fabricated using an electron beam exposure method.

6. The heterogeneous integrated optical chip according to claim 1, characterized in that: The pattern of the third waveguide was fabricated using a stepper lithography machine.

7. The heterogeneous integrated optical chip according to claim 1, characterized in that: The pattern of the third waveguide is fabricated using optical wire bonding.

8. The heterogeneous integrated optical chip according to claim 1, characterized in that: The first waveguide layer in the lower photonic integrated chip is an electro-optic crystal dielectric thin film layer made of lithium niobate; the upper photonic integrated chip is an SOI wafer, in which the second waveguide layer is made of silicon nitride and the third waveguide layer is made of silicon.

9. The heterogeneous integrated optical chip according to claim 1, characterized in that: The material of the first waveguide layer can also be indium phosphide or lithium tantalate.

10. The heterogeneous integrated optical chip according to claim 1, characterized in that: An electro-optic modulation device is realized using the first waveguide layer, and a photodetector is realized using epitaxial germanium material on the third waveguide layer.

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