A heterogeneous platform approximate computing task optimization mapping method based on DVFS and DPM

Abstract

The application discloses a heterogeneous platform approximate computing task optimization mapping method based on DVFS and DPM. Firstly, real-time tasks with correlation are modeled as an approximate computing task model, so that a task directed acyclic graph (DAG), a task correlation matrix and a six-tuple representing task characteristics can be obtained; then, a mechanism of DVFS and DPM combination is introduced based on a heterogeneous multi-core platform; a problem description of task mapping based on QoS and energy joint optimization is constructed; a variable substitution method and a Big-M reconstruction method are used to process nonlinear terms in the problem, the task mapping problem is linearized, and an optimal solution is obtained through a Gurobi solver; a task layering method and a greedy algorithm are used to design a low-complexity heuristic algorithm, and the scalability of the mapping method is improved. The method of the application adopts the mechanism of DVFS+DPM joint optimization under the premise of meeting the system real-time, energy efficiency and reliability constraints, and improves the QoS of the system.

Description

Technical Field

[0001] This invention belongs to the field of multi-core processor task scheduling technology, and mainly relates to an optimized mapping method for approximate computing tasks on heterogeneous platforms based on DVFS and DPM. Background Technology

[0002] Compared to homogeneous multi-core processing platforms, heterogeneous multi-core processing platforms, due to their ability to meet diverse functional and non-functional requirements, offer advantages such as lower cost, smaller size, and higher customizability, enabling them to meet more complex application scenarios and becoming a core component of cyber-physical systems. In heterogeneous multi-core processing platforms, the computing power of a single node is typically limited to reduce energy consumption, which prevents some tasks from being completed on time, leading to timing errors. Therefore, with limited energy, imprecise computation can be used to produce acceptable approximate results before the task deadline. To address this, a task description method with a flexible mechanism, namely the Imprecise Computation (IC) task model, is introduced. This model can balance system energy consumption and computational accuracy, improving system utilization and reliability. Therefore, designing mapping algorithms for imprecise computation tasks on heterogeneous multi-core platforms has significant practical implications.

[0003] Currently, significant progress has been made in task mapping research for heterogeneous multi-core processing platforms, but the following issues remain: 1) In energy-optimized task scheduling methods, the execution cycle of tasks is fixed, resulting in low resource utilization during scheduling. Simultaneously, the system's QoS is fixed and cannot be improved through task adjustments; 2) Research on heterogeneous multi-core processing platforms typically uses DVFS or DPM techniques alone to optimize system power consumption, but rarely considers joint optimization of DVFS and DPM; 3) For heterogeneous multi-core processing platforms, the joint optimization of task mapping based on QoS and energy has high computational complexity. Summary of the Invention

[0004] This invention addresses the problem that most existing task mapping methods fail to improve system QoS and do not consider the joint optimization of DVFS and DPM technologies. It provides a heterogeneous platform approximate computation task optimization mapping method based on DVFS and DPM. First, correlated real-time tasks are modeled as approximate computation task models, yielding a directed acyclic graph (DAG), a task correlation matrix, and six-tuples representing task characteristics. Then, based on a heterogeneous multi-core platform, a joint mechanism of DVFS and DPM is introduced to improve task execution efficiency. A problem description for task mapping based on joint optimization of QoS and energy is constructed, including at least task allocation, frequency selection, real-time performance, task non-preemption, task correlation, processor utilization, and energy consumption constraints. Variable substitution and Big-M reconstruction methods are used to handle nonlinear terms in the problem, linearizing the task mapping problem. The optimal solution is obtained using a Gurobi solver. Finally, a low-computational-complexity heuristic algorithm is designed using a task hierarchical method and a greedy algorithm to improve the scalability of the mapping method. The method of this invention improves the QoS of the system by adopting a DVFS+DPM joint optimization mechanism while meeting the constraints of system real-time performance, energy efficiency and reliability.

[0005] To achieve the above objectives, the technical solution adopted by this invention is: an optimization mapping method for approximate computation tasks on heterogeneous platforms based on DVFS and DPM, comprising the following steps:

[0006] S1: Model the real-time relevance task as an approximate computation task. The modeling can obtain a directed acyclic graph (DAG) of the task, a task relevance matrix, and a six-tuple representing the characteristics of the task.

[0007] S2: Based on a heterogeneous multi-core platform, it introduces a mechanism that combines DVFS and DPM;

[0008] S3: Complete the description of the task mapping problem based on joint optimization of QoS and energy, the description including at least task allocation, frequency selection, real-time performance, task non-preemption, task correlation, processor utilization and energy consumption constraints;

[0009] S4: For the optimization problem proposed in S3, the variable substitution method and Big-M reconstruction method are used to handle the nonlinear terms in the problem, the task mapping problem is linearized, and the optimal solution is obtained through the Gurobi solver;

[0010] S5: Using a task hierarchical approach and a greedy algorithm, design a heuristic algorithm with low computational complexity to improve the scalability of the mapping method.

[0011] As an improvement of the present invention, the real-time task model in step S1 describes the real-time system by a task set consisting of N correlated, non-preemptive approximate computation tasks. This task set is abstracted as a directed acyclic graph (DAG); the correlation of tasks is represented by a binary matrix TO. N×N To describe: If task τ i With τ j Related and task τ i In τ j If executed previously, then TO ij =1, otherwise, TO ij =0; Task τ in the task set i All can be represented by the six-tuple {M} i O i ,o i D i ,ts i ,te i} indicates that, where D i It is task τ i The deadline, ts i and te i M represents the start and end times of the task, respectively. i and o i These represent the number of execution cycles for the mandatory portion and the number of execution cycles for the optional portion of each approximate computation task, respectively. i This is the upper limit for the number of execution cycles for the optional portion.

[0012] As another improvement of the present invention, in step S2, a multi-core processor platform with M heterogeneous processor cores Θ={θ1,θ2,...,θ M The platform model is described, with all processor cores supporting DVFS and DPM. Combining processor heterogeneity and DVFS technology, the computational task τ... i In processor core θ k The above frequency f k,l The execution time is Where, λ i,k For processor θ k In performing task τ i Execution efficiency, λ i,k ∈(0,1), indicating that different processors will produce different task execution times and energy consumption when executing the same task.

[0013] Depending on the length of time the processor is idle, the processor core autonomously chooses to enter an idle state or a hibernation state.

[0014] Compared with the prior art, the present invention has the following beneficial effects:

[0015] 1) This invention provides a QoS optimization mapping method based on DVFS and DPM for approximate computing tasks on a heterogeneous multi-core processing platform, which can significantly improve the system QoS.

[0016] 2) The original task mapping problem contains nonlinear terms such as coupling terms between continuous variables and 0-1 variables, between 0-1 variables, and logical constraints on 0-1 variables. The problem structure is complex, making it impossible to find the optimal solution in a short time. To address the structure of the original problem, at the cost of solution accuracy, this invention provides a heuristic algorithm with low computational complexity, which can significantly reduce the algorithm's running time. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the steps of the method of the present invention;

[0018] Figure 2 This is a schematic diagram of the task mapping results obtained by configuring 7 tasks in Embodiment 1 of the present invention and using a joint optimization method based on QoS and energy on a heterogeneous multi-core processing platform (containing 2 processors);

[0019] Figure 3 This is a schematic diagram of the task mapping results obtained using a heuristic method on a heterogeneous multi-core processing platform (containing 2 processors) with a configured task quantity of 7 in Embodiment 1 of the present invention.

[0020] Figure 4 The test cases of this invention have 4 to 6 tasks, corresponding to 5 randomly generated task sets, and compare the system QoS increment brought by the proposed optimal method of using DVFS+DPM with the DPM method.

[0021] Figure 5 The test cases of this invention have 4 to 6 tasks, corresponding to 5 randomly generated task sets. The comparison chart shows the system QoS increment brought by the optimal method of using DVFS+DPM compared with the DVFS method.

[0022] Figure 6 The test cases of this invention are configured with 5 tasks each, corresponding to 15 randomly generated task sets. The feasibility comparison diagram of the proposed optimal algorithm using DVFS+DPM, DVFS and DPM and the proposed heuristic algorithm for solving problems under different system parameters is shown.

[0023] Figure 7 The test cases of this invention have 3 to 7 task configurations, and the proposed optimal algorithm using DVFS+DPM, DVFS and DPM and the proposed heuristic algorithm are compared under different system parameters.

[0024] Figure 8This is a comparison chart showing the computation time of the proposed optimal algorithm using DVFS+DPM and the proposed heuristic algorithm, with the number of tasks configured in the test cases of this invention ranging from 3 to 8, corresponding to randomly generated task sets. Detailed Implementation

[0025] The present invention will be further illustrated below with reference to the accompanying drawings and specific embodiments. It should be understood that the following specific embodiments are for illustrative purposes only and are not intended to limit the scope of the invention.

[0026] Example 1

[0027] An optimization mapping method for approximate computation tasks on heterogeneous platforms based on DVFS and DPM, such as... Figure 1 As shown, it includes the following steps:

[0028] Step S1: In order to balance task QoS and task execution cost, the relevant real-time tasks are modeled as IC tasks, which yields the task directed acyclic graph (DAG), task correlation matrix and six-tuples representing task characteristics.

[0029] The task model of a real-time system is described by a task set consisting of N correlated, non-preemptive integrated task (IC) tasks. This task set can be abstracted as a DAG. Task τ i Execution can only begin after all data from its preceding tasks has been transmitted, and data can only be output and used by subsequent tasks after its execution is complete. Task dependencies can be represented by a binary matrix TO. N×N To describe: If task τ i With τ j Related and task τ i In τ j If executed previously, then TO ij =1, otherwise, TO ij =0. The IC task consists of a mandatory part and an optional part, with M cycles respectively. i and o i To ensure basic service quality, the mandatory portion must be completed within the deadline. The optional portion's cycle count is adjustable, with a maximum of 0. i That is, 0≤o i ≤O i Task τ in the task set i All can be represented by the six-tuple {M} i O i ,o i D i ,ts i ,te i} represents. Where, D i It is task τ i The deadline, ts i and tei This specifies the start and end times of the task. It stipulates that the task execution time cannot exceed the deadline, i.e., te. i -ts i ≤D i All tasks must be completed within the scheduling period H.

[0030] Step S2: Based on a heterogeneous multi-core platform, the efficiency of task execution can be improved through the combined mechanism of DVFS and DPM.

[0031] A processor platform with M heterogeneous cores, Θ = {θ1, θ2, ..., θ...} M Describe the platform model. To reflect the heterogeneity of processor cores, define processor θ. k In performing task τ i Execution efficiency λ i,k ∈(0,1), λ i,k This indicates that different processors perform the same task with varying efficiencies, consuming different amounts of time and energy. Furthermore, all processor cores support DVFS and DPM technologies, allowing for dynamic adjustment of their voltage / frequency (V / F) levels and power consumption (i.e., selecting the processor state as active, idle, or hibernating). To describe DVFS, θ is defined for each processor core. k Having l k Each V / F level is represented as The V / F levels are arranged in descending order. Then, the definition is... That is, the maximum number of V / F levels, constructing the voltage level matrix V. k×L :

[0032]

[0033] Simultaneously, construct the frequency level matrix F k×L :

[0034]

[0035] By combining processor heterogeneity and DVFS technology, task τ can be computed. i In processor core θ k The above frequency f k,l The execution time is DPM technology primarily targets the processor's idle periods, aiming to reduce energy consumption. Depending on the length of the processor's idle time, the processor core can autonomously choose to enter an idle state or a hibernation state to achieve lower energy consumption.

[0036] Step S3: By introducing optimization variables such as task allocation, frequency selection, task execution start time, task execution order, number of selectable cycles, and processor state selection, we construct task allocation, frequency selection, real-time performance, task non-preemption, task correlation, processor utilization, and energy consumption constraints, thus completing the description of the task mapping problem based on joint optimization of QoS and energy.

[0037] Introduce optimization variables such as task allocation, frequency selection, task scheduling, optional period adjustment, and DPM decision-making:

[0038] 1) If task τ i Assigned to processor θ k Above and at frequency f k,l Execution, then the binary variable q i,k,l =1, otherwise q i,k,l =0;

[0039] 2) Task τ i It is task τ j The predecessor task and both are assigned to processor θ k Above, the binary variable p i,j,k =1, otherwise p i,j,k =0; if τ i It is processor θ k The first task is p N+1,j,k =1, if τ i It is processor θ k The last task is p i,N+1,k =1;

[0040] 3) Task τ i If the processor switches from idle mode to sleep mode within the interval, then c i =1, otherwise c i =0;

[0041] 4) Continuous variable ts i and te i Subtask τ i The execution start and end times;

[0042] 5) Continuous variable o i Represents task τ i The optional number of cycles;

[0043] The task allocation, frequency selection, real-time performance, task non-preemption, task correlation, processor utilization, and energy consumption constraints are constructed to complete the description of the task mapping problem based on joint optimization of QoS and energy, as follows:

[0044] 1) Task processor and frequency allocation: Due to the fact that each task τ i Only one processor can be allocated.k and a frequency f k,l Therefore, the following constraints need to be added regarding task processors and frequency allocation:

[0045]

[0046] 2) Real-time performance: Each task τ i The execution time cannot exceed the deadline D. i The task completion time cannot exceed the scheduling period H, therefore the following constraints need to be added regarding real-time performance:

[0047] 0≤ts i <H (4)

[0048]

[0049] te i ≤H (6)

[0050]

[0051] 3) Task non-preemption: Because each processor cannot process two tasks simultaneously, the completion time of the task executed first on each processor must be earlier than the start time of the task executed later. For a 0-1 variable p... i,j,k To make this meaningful, additional constraints are needed. Therefore, the following constraints need to be added regarding task non-preemption:

[0052]

[0053]

[0054]

[0055]

[0056]

[0057]

[0058] p i,i,k =0 (13) Among them, the auxiliary 0-1 variable x i,k Represents τ i Is it located at θ? k It can be obtained from the following formula:

[0059]

[0060] Auxiliary 0-1 variable no k Indicates processor θ kWhether a task exists can be determined using the following formula:

[0061]

[0062] 4) Task Dependency: For tasks with dependency, the completion time of the dependent task must be earlier than the start time of the subsequent task. Therefore, the following constraints need to be added regarding task dependency:

[0063]

[0064] te i ≤ts j +(1-TO i，j H (16)

[0065] 5) Processor Utilization: The utilization of a task is defined as the proportion of scheduling cycles H occupied by each task on a processor. The sum of the utilization of all tasks on a processor cannot exceed 1. Therefore, the following constraints need to be added to processor utilization:

[0066]

[0067] 6) Energy Consumption Limit: The total energy consumption of the system must not exceed the energy budget E. s The total system energy consumption includes energy consumption during operation, idle, and hibernation. Therefore, the following constraints need to be added regarding energy consumption limits:

[0068]

[0069] The task model uses a linear function f i (o i )=k i o i +R i Describe the system QoS and optional period. i The relationship between the objective function and the system QoS is to simplify the objective function while maintaining QoS and o. i The linear and positively correlated relationship is given by defining the objective function Q as follows:

[0070]

[0071] Based on the constructed constraints and objective function, the original problem can be mathematically described, and the problem can be constructed as follows:

[0072]

[0073] Step S4: For the optimization problem proposed in Step S3, use the variable substitution method and the big-M reconstruction method to handle the nonlinear terms in the problem, linearize the task mapping problem, and obtain the optimal solution through the Gurobi solver;

[0074] The problem constructed in step S3 is linearized. Problem PP contains nonlinear terms involving the product of binary variables and continuous variables, as well as the product of binary variables and logical constraints on binary variables. Therefore, this optimization problem is a mixed integer nonlinear programming problem. In this step, the original problem is equivalently transformed into a MILP problem through linearization methods such as variable substitution and the Big-M reconstruction method. The process is as follows:

[0075] (4.1) Linearization of product terms of binary and continuous variables

[0076] Lemma 1: Assume constants s1, s2 > 0, and constraint spaces P1 = {|t, b, x|t = bx, -s1 ≤ x ≤ s2, b ∈ {0, 1}}, P2 = {|t, b, x| -bs1 ≤ t ≤ bs2, -s1(1-b) ≤ xt ≤ s2(1-b), b ∈ {0, 1}}, then

[0077] Proof: First, prove From t = bx and -s1 ≤ x ≤ s2, we can deduce -bs1 ≤ t ≤ bbs2. Based on -s1 ≤ x ≤ s2 and b ∈ {0, 1}, we can deduce (b-1)(x-s2) ≥ 0 and (b-1)(x+s1) ≤ 0, i.e., -s1(1-b) ≤ xt ≤ s2(1-b). Then we prove... If b = 0, then t = 0, -s1 ≤ x ≤ s2; if b = 1, then -s1 ≤ t = x ≤ s2, and both equations satisfy P1. Therefore,

[0078] According to Lemma 1, it is possible to linearize the nonlinear term of the product of binary variables and continuous variables.

[0079] For the nonlinear term p i，j，k ts j Given p i，j，k ∈{0,1},ts j ∈[0, H], introduce auxiliary continuous variable m i，j，k Let m i，j，k =p i，j，k ts j Using auxiliary variable m i，j，k and additional constraints to replace the nonlinear term p i，j，k ts j :

[0080] 0≤ts j -mi，j，k ≤H(1-p i，j，k ), 0≤m i，j，k ≤Hp i，j，k (twenty one)

[0081] For the nonlinear term p i，j，k ts i Given p i，j，k ∈{0,1},ts i ∈[0, H], introduce an auxiliary continuous variable r i，j，k , let r i，j，k =p i，j，k ts i Using auxiliary variable r i，j，k and additional constraints to replace the nonlinear term p i，j，k ts i :

[0082] 0≤ts i -r i，j，k ≤H(1-p i，j，k ), 0≤r i，j，k ≤Hp i，j，k (twenty two)

[0083] Similarly, according to Lemma 1, we can apply this to the nonlinear term q. i，k，l o i p i，j，k n i，k′l′ q i，k，l ts i w i″，k″，l″ m i″，j，k w i″，j″，k″ r i″，j，k w i″，k″，l″ t i″，j，k，k′，l′ q i″，j″，k″ m i″，j，k q i″，j″，k″ r i″，j，k q i″，j″，k″ t i″，j，k，k′，l′ , and Linearization:

[0084] 0≤o i -n i，k，l ≤O i (1-q i，k，l ), 0≤n i，k，l ≤O i q i，k，l (twenty three)

[0085] 0≤n i，k′l′ -t i，j，k，k′l′ ≤O i (1-p i，j，k ), 0≤ti，j，k，k′l′ ≤O i p i，j，k (24)

[0086] 0≤ts i -v i，k，l ≤H(1-q i，k，l ),0≤v i，k，l ≤Hq i，k，l (25)

[0087] 0≤m i″，j，k -wm i″，k″，l″，j，k ≤H(1-w i″，k″，l″ ),

[0088] 0≤wm i″，k″，l″，j，k ≤Hw i″，k″，l″ (26)

[0089] 0≤r i″，j，k -Wr i″，j″，k″，j，k ≤H(1-w i″，j″，k″ ),

[0090] 0≤wr i″，j″，k″，j，k ≤Hw i″，j″，k″ (27)

[0091] 0≤t i″，j，k，k′，l′ -wt i″，k″，l″，j，k，k′，l′ ≤O i (1-w i″，k″，l″ ),0≤wt i″，k″，l″，j，k，k′，l′ ≤O i w i″，k″，l″ (28)

[0092] 0≤m i″，j，k -qm i″，j″，k″，j，k ≤H(1-q i″，j″，k″ ),0≤qm i″，j″，k″，j，k ≤Hq i″，j″，k″ (29)

[0093] 0≤r i″，j，k -qr i″，j″，k″，j，k ≤H(1-q i″，j″，k″ ),0≤qr i″，j″，k″，j，k ≤Hq i″，j″，k″ (30)

[0094] 0≤t i″，j，k，k′，l′ -qt i″，j″，k″，j，k，k′，l′ ≤O i (1-q i″，j″，k″ ),0≤qt i″，j″，k″，j，k，k′，l′ ≤O i q i″，j″，k″ (31)

[0095]

[0096]

[0097] (4.2) Linearization of binary variable product terms

[0098] Lemma 2: Assume x1 and x2 are binary variables, then the nonlinear term x1x2 can be replaced by the auxiliary variable y = x1x2. Furthermore, the following constraint needs to be added:

[0099]

[0100] Proof: When x1 = x2 = 1, the added constraint is transformed into 1 ≤ y ≤ 1, satisfying y = 1. For the remaining three cases: 1) x1 = 0, x2 = 1; 2) x1 = 1, x2 = 0; 3) x1 = 0, x2 = 0, the added constraint is transformed into 0 ≤ y ≤ 0, satisfying y = 0.

[0101] According to Lemma 2, the nonlinear term of the product of binary variables can be linearized.

[0102] For the nonlinear term p i，j，k q i，k′，l′ Given p i，j，k ∈{0,1},q i，k′，l′ ∈{0,1}, introduce an auxiliary continuous variable s i，j，k，k′，l′ , making s i，j，k，k′，l′ =p i，j，k q i，k′，l′ Using auxiliary variable s i，j，k，k′，l′ and additional constraints to replace the nonlinear term p i，j，k q i，k′，l′ :

[0103] s i，j，k，k′，l′ ≤p i，j，k s i，j，k，k′，l′ ≤q i，k′，l′ s i，j，k，k′，l′ ≥p i，j，k +q i，k′，l′ -1 (34)

[0104] For the nonlinear term q i，k，l c i Given q i，k，l ∈{0,1},c i ∈{0,1}, introduce an auxiliary continuous variable W i，k，l W i，k，l =q i，k，l c i Using auxiliary variable W i，k，l and additional constraints to replace the nonlinear term q i，k，l c i :

[0105] W i，k，l ≤q i，k，l W i，k，l ≤c i W i，k，l ≥q i，k，l +c i -1 (35)

[0106] Similarly, according to Lemma 2, we can apply this to the nonlinear term w. i″，k″，l″ s i″，j，k，k′，l′ and q i″，j″，k″ s i″，j，k，k′，l′ Linearization:

[0107] Ws i″，k″，l″，j，k，k′，l′ ≤w i″，k″，l″， ws i″，k″，l″，j，k，k′，l′ ≤s i″，j，k，k′，l′ ws i″，k″，l″，j，k，k′，l′ ≥w i″，k″，l″ +s i″，j，k，k′，l′ -1 (36)

[0108] qs i″，j″，k″，j，k，k′，l′ ≤q i″，j″，k″ , qs i″，j″，k″，j，k，k′，l′ ≤s i″，j，k，k′，l′ , qs i″，j″，k″，j，k，k′，l′ ≥q i″，j″，k″ +s i″，j，k，k′，l′ -1 (37)

[0109] (4.3) Linearization of logical constraints on binary variables

[0110] Lemma 3: Big-M reformulation is used to transform logical or non-convex constraints into a set of constraints describing the same feasible set using auxiliary binary variables and additional logical constraints. For example, consider logical constraints. Where y is a binary variable and x is a continuous variable, it can be expressed using the Big-M reconstruction method as follows:

[0111] (1-y)m≤x≤(1-y)M

[0112] If the constant M is sufficiently large and the constant m is sufficiently small, then the constructed new representation is equivalent to the original constraint. In this case, when y = 1, the variable x can only take the value 0; when y = 0, m ≤ x ≤ M is satisfied. To make the variable x unconstrained when y = 0, M must be greater than any possible value of the variable x, and m must be less than any possible value of the variable x.

[0113] Lemma 4: For bidirectional logic constraints: Here, 'a' is a binary variable, and 'f(x)' is a continuous function. Linearization constraints can be constructed using the Big-M reconstruction method. Assuming M is a sufficiently large positive constant and ε is a sufficiently small positive constant, we first construct auxiliary binary variables z1→{f(x)≤0, a=1} and z2→{f(x)>0, a=0}, and the following linear constraints can be constructed:

[0114]

[0115] Proof: If f(x)≤0, then the constraint f(x)≥-M(1-z2)+ε is transformed into Therefore, z2 = 0 and z1 = 1. In this case, f(x) ≤ M(1-z1) is transformed into f(x) ≤ M, and 1 ≤ a ≤ 1, i.e., a = 1. If f(x) > 0, then the constraint f(x) ≤ M(1-z1) is transformed into... Therefore, z1 = 0, z2 = 1, and f(x) ≥ -M(1-z2) + ε is transformed into f(x) ≥ ε, and 0 ≤ a ≤ 0, that is, a = 0.

[0116] According to Lemma 4, it is possible to linearize the nonlinear terms of the logical constraints on binary variables.

[0117] Given c i ∈{0,1},I(τ) i )∈[0,H]. For bidirectional logic constraints: Introducing auxiliary binary variable u i and u′ i Assuming M is a sufficiently large positive constant and ε is a sufficiently small positive constant, this logical constraint can be linearized as follows:

[0118]

[0119] Based on equations (21), (22), (24), and (34), we can obtain I(τ) i The linearized form of ) is as follows:

[0120]

[0121] Known no k ∈{0,1}, For bidirectional logic constraints: Introducing an auxiliary binary variable v k and v′ k Assuming M is a sufficiently large positive constant and ε is a sufficiently small positive constant, this logical constraint can be linearized as follows:

[0122]

[0123] Through the above linearization process, equations (5), (6), (8), (16), (17), and (18) can be linearized by equations (41), (42), (43), (44), (45), and (46), respectively:

[0124]

[0125]

[0126]

[0127]

[0128]

[0129]

[0130]

[0131]

[0132] The original MINLP problem (22) can be transformed into the MILP problem (47) as follows:

[0133]

[0134] st(3),(4),(9)-(13),(16),(21)-(46)

[0135] According to equation (47), the optimal solution to the original problem can be obtained using Matlab, the Yalmip toolbox, and the Gurobi solver. A schematic diagram of the mapping result with 7 tasks and 2 processors obtained by the optimal algorithm is shown below. Figure 2 As shown.

[0136] Step S5: Using the task layering method and the greedy algorithm, design a heuristic algorithm with low computational complexity to improve the scalability of the mapping method.

[0137] The algorithm needs to determine variables such as task allocation, frequency selection, task scheduling, optional period adjustment, and DPM decision, which is completed in three steps, as follows:

[0138] (5.1) Task-Processor Allocation and Frequency-Coarse Task Allocation

[0139] Because the algorithm's goal is to maximize the system's QoS, i.e. schilling o i =O iOnly when real-time performance and energy constraints are not met will we consider reducing o. i The goal of the first step of the algorithm is to keep the value of o as close to zero as possible. i =O i Under the premise of satisfying energy constraints, we aim to minimize task execution time. This step can be constructed as follows:

[0140]

[0141] ST Energy Constraint

[0142] For ease of description, each task is given the name τ. i Define processor allocation index t2p(i) and frequency allocation index f2t(i), where t2p(i) = k and f2t(i) = l indicate that the task is allocated to processor θ. k , with frequency f k，l Executed.

[0143] It should be noted that this step of the algorithm will solve for all variables (including t2p(i), f2t(i), c). i , ts i o i However, only the task-processor allocation is fixed; other variables will be readjusted in later steps.

[0144] First, consider the energy constraint. To determine o i =O i To determine if the energy constraint is met, firstly, using a polling method and a greedy algorithm, the processor allocation and frequency selection that produces the minimum energy consumption increment for each task are chosen, and the start and end times of the tasks are calculated. Then, the processor idle time interval(i) and... To reduce power consumption, the processor should select a state when it is idle, provided the idle time is greater than or equal to [a certain value]. When the processor enters sleep mode, it remains idle; otherwise, it remains idle. Finally, the total energy consumption is calculated. The energy consumption of the first and last intervals needs to be considered separately: the energy consumption of the first interval is... The energy consumption generated in the last interval is

[0145] If the generated task scheduling scheme does not meet the energy constraint, then reduce the energy level. i To meet energy constraints; if the solution meets energy constraints and has surplus energy, the surplus energy is used to increase the processor's V / F level to reduce task execution time.

[0146] Before executing the first step of the algorithm, it is necessary to determine the sequence of tasks to be allocated to processors and frequencies. To satisfy the task dependency constraint, all tasks are stratified according to their dependency. Each task can identify its parent task based on the dependencies between tasks, thus determining the layer to which each task belongs. Higher priority tasks are assigned to upper layers, and lower priority tasks are assigned to lower layers. Tasks within each layer are independent of each other, while tasks between layers are dependent on each other. Then, tasks are sorted according to the principle of tasks from upper to lower layers and tasks within a layer from largest to smallest execution cycle, resulting in a task topology sequence. All tasks are then allocated sequentially using this topology sequence, thus resolving the dependency constraint problem.

[0147] (5.2) Joint adjustment of task frequency and selectable execution cycle

[0148] The first step of the algorithm solves the energy constraint, and the next goal is to solve the real-time constraint. The second step can still be constructed using equation (48).

[0149] Because real-time performance and energy efficiency are mutually constrained, increasing the V / F ratio reduces task execution time but increases energy consumption, while decreasing the V / F ratio reduces energy consumption but increases task execution time. To simultaneously meet both real-time and energy constraints, by reducing the V / F ratio... i Reducing task execution time also generates a certain energy surplus. This surplus energy is then used to improve the V / F ratio, further reducing task execution time. The second step of the algorithm uses a round-robin approach to adjust f2t(i) of each task according to the hierarchical topology sequence. i For each V / F level increase, the corresponding number of selectable cycles is reduced to ensure that energy consumption meets the constraints. This process is repeated until both energy and real-time constraints are met.

[0150] For the adjusted task τ i Each cycle first increases the V / F level by one, then decreases the number of optional cycles several times. i 1%, until the energy constraint is satisfied. i When the condition stops changing, proceed to the next loop. After each loop, check whether the real-time constraint is satisfied, i.e., whether all tasks τ are satisfied. i The execution time does not exceed D i The latest completion time must not exceed the scheduling cycle. If both real-time and energy constraints are satisfied, the algorithm terminates and outputs the task mapping scheme. If the energy and real-time constraints still cannot be satisfied by the end of the second step, the third step of the algorithm is performed.

[0151] (5.3) Execution cycle can be readjusted.

[0152] The third step of the algorithm will directly reduce o iTo meet energy and real-time constraints. The goal of this phase is to sacrifice the minimum number of optional execution cycles to achieve the real-time constraints. The problem for this step can be constructed using the following formula:

[0153]

[0154] real-time performance and energy constraints

[0155] To minimize the sacrifice of optional cycles, a favorable task adjustment sequence is needed to reduce task o to the lowest possible degree. i and minimize as much as possible Define parameters This parameter indicates the time it takes for a task to execute one cycle, and reduces the time required to complete the task τ. i Given the same number of selectable periods, T deg (i) A larger value means more execution time is reduced. Therefore, all tasks are arranged according to T. deg (i) Sort in descending order, then decrease the number of optional periods in that sequence. i This allows us to meet real-time constraints while sacrificing the fewest optional cycle counts. In other words, it maximizes the quality of service for the task while satisfying time constraints.

[0156] The third step of the algorithm first follows T deg (i) Sort all tasks in descending order to obtain the task adjustment sequence. Based on the task adjustment sequence, adjust one task at a time, decreasing the optional cycle time of each task during the adjustment process. i The energy consumption is 1%. After each small adjustment, the start and end times of the task are calculated, the idle state of the processor is determined, and the total energy consumption is calculated. If both energy and real-time constraints are met, the algorithm ends and outputs the task allocation and scheduling scheme; otherwise, the algorithm continues. If the energy and real-time constraints are still not met when the algorithm finishes running, it means that the algorithm has failed.

[0157] Based on the heuristic algorithm described above, a heuristic solution to the original problem can be obtained. A schematic diagram illustrating the mapping result with 7 tasks and 2 processors obtained by the heuristic algorithm is shown below. Figure 3 As shown.

[0158] Test comparison

[0159] Figures 4 to 8 The figure shows the experimental results of the test comparison of the present invention.

[0160] All simulations were performed on a computer with four processors and 8GB of RAM. The optimal algorithm was implemented in Matlab 2022a using the Gurobi 10.0 optimizer, and the heuristic algorithm was implemented in Matlab 2022a. In the simulations, the magnitudes of system parameters α, β, and γ affect H, Es, and D, respectively. i The magnitude of α, β, and γ indicates the looseness of the real-time performance and energy constraints. The larger α, β, and γ are, the looser the constraints; the smaller α, β, and γ are, the stricter the constraints.

[0161] Figure 4 This is a comparison chart showing the system QoS increment of the proposed optimal DVFS+DPM method compared to the DPM method, with 4 to 6 tasks configured in the test cases of this invention, corresponding to 5 randomly generated task sets. In the simulation, the number of processors was set to 2, and the system parameters α = γ = 0.3, β ∈ {0.2, 0.3, 0.4}. Based on the number of tasks and each set of system parameters, 5 sets of model parameters for tasks and processors were generated, and 5 sets of experiments were conducted to measure the system QoS produced by the three methods. Finally, the system QoS increment brought by the optimal DVFS+DPM method compared to the DPM method was calculated. Q OPT (N) represents the QoS of a system with N tasks obtained using the OPT method, Q. WDP (N) represents the QoS of a system with N tasks obtained using the WDP method (with DPM). Figure 4 The box plot shows the dataset Statistical data. Figure 4 The results show that, under different numbers of tasks and system parameters, the median system QoS generated by the OPT method is 5.7% higher than that of the WDP method (up to 14.4%).

[0162] Figure 5 This is a comparison chart showing the system QoS increment of the proposed optimal DVFS+DPM method compared to the DVFS method, with 4 to 6 tasks configured in the test cases of this invention, corresponding to 5 randomly generated task sets. In the simulation, the number of processors was set to 2, and the system parameters α = γ = 0.3, β ∈ {0.2, 0.3, 0.4}. Based on the number of tasks and each set of system parameters, 5 sets of model parameters for tasks and processors were generated, and 5 sets of experiments were conducted to measure the system QoS produced by the three methods. Finally, the system QoS increment brought by the optimal DVFS+DPM method compared to the DVFS method was calculated. Q OPT (N) represents the QoS of a system with N tasks obtained using the OPT method, Q. WDV (N) represents the QoS of a system with N tasks obtained using the WDV method (with DVFS, using only DPM). Figure 5 The box plot shows the dataset Statistical data Figure 5 The results show that, under different numbers of tasks and system parameters, the median system QoS generated by the OPT method is 9.1% higher on average than that of the WDV method (up to 14.4%).

[0163] Figure 6 This is a comparison chart showing the feasibility of solving the problem using the proposed optimal algorithms for DVFS+DPM, DVFS, and DPM, and the proposed heuristic algorithm under different system parameters, with 5 test cases and corresponding to 15 randomly generated task sets. In the simulation, the number of processors was set to 2, and the system parameters β∈{0.05, 0.1, 0.15}, α=γ=0.12, generating relatively strict real-time and energy constraints (the smaller the system parameters, the stricter the constraints). For each set of system parameters α, β, γ, tasks and processor parameters were randomly constructed, and 15 experiments were conducted to calculate the feasibility of solving the problem. The feasibility of the problem is defined as: n feasible / n, where n is in the formula feasible is the number of successful experiments, and n is the total number of experiments, which is 15. To determine whether the solution to the problem is feasible, it is verified from two aspects: processor utilization and real-time performance. Specifically, it is verified whether the utilization of each processor exceeds 1 and whether the task execution time does not exceed the relative deadline, and the latest completion time does not exceed the scheduling cycle. Figure 6 The results show that the OPT method has the highest problem feasibility, averaging 75.56%, followed by the WDP method at 17.78% and the WDV method at 62.22%. Therefore, the joint optimization method using DVFS+DPM has higher problem feasibility and can solve task mapping problems in more scenarios with strict time and energy constraints.

[0164] Figure 7 This invention presents a test case with 3 to 7 tasks, comparing the system QoS obtained by the proposed optimal algorithm using DVFS+DPM, DVFS and DPM, and the proposed heuristic algorithm under different system parameters. In the simulation, the number of processors was set to 2, and a DAG graph with 3, 4, 5, 6, and 7 tasks was randomly generated. An experiment was conducted for each group of tasks and processor parameters, and its system QoS was measured. Figure 7 The results show that the HEU method achieves an average system QoS of 71.04% of the OPT method, with a maximum of 75.63%; an average of 74.49% of the WDV method, with a maximum of 80.77%; and an average of 73.99% of the WDP method, with a maximum of 78.90%. In summary, the HEU heuristic algorithm generates a suboptimal but acceptable task mapping scheme for system QoS.

[0165] Figure 8 This is a comparison of the computation time obtained by the optimal algorithm and the heuristic algorithm of the proposed DVFS+DPM method for solving randomly generated task sets with test cases configured with 3 to 8 tasks. In the simulation, the number of processors was set to 2, and a task DAG graph with 3, 4, 5, 6, 7, and 8 tasks was randomly generated. With the system parameters fixed, six experiments were conducted using the optimal method and the heuristic algorithm respectively, and the solution time of the algorithms was measured. Figure 8 The results show that as the number of tasks N increases, the time consumed by the OPT method increases dramatically, reaching 4508.3 seconds when N=8. At this point, the HEU method's solution time is only 0.06 seconds, almost negligible compared to the optimal algorithm. Experiments further reveal that the computation time of the OPT method continues to rise with the number of tasks. In contrast, the HEU method's average computation time is only 0.25 seconds when N=20. In conclusion, the heuristic algorithm HEU has a significant advantage in solution time compared to the optimal algorithm OPT.

[0166] It should be noted that the above content merely illustrates the technical concept of the present invention and should not be construed as limiting the scope of protection of the present invention. For those skilled in the art, various improvements and modifications can be made without departing from the principle of the present invention, and all such improvements and modifications fall within the scope of protection of the claims of the present invention.

Claims

1. A method for optimizing mapping in approximate computation tasks on heterogeneous platforms based on DVFS and DPM, characterized in that, Includes the following steps: S1: Model the real-time relevance task as an approximate computation task. The modeling can obtain a directed acyclic graph (DAG) of the task, a task relevance matrix, and a six-tuple representing the characteristics of the task. S2: Based on a heterogeneous multi-core platform, it introduces a combined mechanism of DVFS and DPM; using Multi-core processor platform with heterogeneous processors The platform model describes how all processors support DVFS and DPM, combining processor heterogeneity with DVFS technology to perform computational tasks. In processor The above frequency The execution time is ;in, For processor In performing the task Execution efficiency Give each task Define processor allocation index and frequency allocation index ,in, This indicates that the task has been assigned to the processor. , in frequency Executed; and The number of execution cycles for the mandatory part and the number of execution cycles for the optional part of each approximate computation task; Depending on the length of time the processor is idle, the processor can autonomously choose to enter an idle state or a hibernation state. S3: Complete the description of the task mapping problem based on joint optimization of QoS and energy, the description including at least task allocation, frequency selection, real-time performance, task non-preemption, task correlation, processor utilization and energy consumption constraints; S4: For the optimization problem proposed in S3, the variable substitution method and Big-M reconstruction method are used to handle the nonlinear terms in the problem, the task mapping problem is linearized, and the optimal solution is obtained through the Gurobi solver; S5: Using a task hierarchical approach and a greedy algorithm, design a heuristic algorithm with low computational complexity to improve the scalability of the mapping method; S51: Task - Processor Allocation and Frequency - Coarse Task Allocation: The aim is to maintain as much as possible... Under the premise of satisfying energy constraints, we should minimize task execution time as much as possible. The optional upper limit of the number of execution cycles, the steps specifically include: S511: Using a polling method and a greedy algorithm, select the processor allocation and frequency selection that produces the minimum energy consumption increment for each task, and calculate the start and end times of the tasks. S512: By comparing processor idle time and Determine the processor's state selection when it is idle; if the idle time is greater than or equal to... When the processor is in sleep mode, it enters hibernation mode; otherwise, it remains idle. S513: Calculate total energy consumption; S514: If the generated task scheduling scheme does not meet the energy constraint, then reduce... To meet energy constraints; if the solution meets energy constraints and has surplus energy, then use the surplus energy to increase the processor's V / F rating to reduce task execution time; S52: Task frequency and selectable execution cycle are jointly adjusted, aiming to address real-time constraints by reducing... Reducing task execution time generates an energy surplus. The extra energy is used to increase the V / F rating, which in turn reduces task execution time again. This process is repeated until energy and real-time constraints are met. S53: Execution cycle readjustment can be selected by directly reducing... To satisfy energy and real-time constraints, define parameters. This parameter indicates the time it takes for a task to complete one cycle. All tasks are then categorized according to... Sort in descending order, decreasing the number of optional periods sequentially. This allows for meeting real-time constraints by sacrificing the fewest possible execution cycles.

2. The method for optimizing mapping of approximate computation tasks on heterogeneous platforms based on DVFS and DPM as described in claim 1, characterized in that: The real-time task model in step S1 is composed of The real-time system is described by a set of correlated, non-preemptive approximate computation tasks, which is abstracted as a directed acyclic graph (DAG). The correlation between tasks is represented by a binary matrix. To describe: If the task and Relevant and task exist If executed previously, then ,otherwise, Tasks in a task set All can be used with six-tuples It means that, among them, It is a task The deadline and These are the start and end times of the task, respectively.

3. The method for optimizing mapping of approximate computation tasks on heterogeneous platforms based on DVFS and DPM as described in claim 2, characterized in that: In step S3, task allocation and frequency selection refer to each task Only one processor can be allocated. and a frequency Therefore, the constraints for task allocation and frequency selection are: ； in, If the task Assigned to processor Above and with frequency Execute, then ,otherwise ; The real-time performance refers to each task The execution time cannot exceed the deadline. The task completion time cannot exceed the scheduling cycle. Therefore, the real-time constraint is: ； ； ； ； The non-preemptive nature of tasks means that on each processor, the completion time of the task executed first must be earlier than the start time of the task executed later. Therefore, the non-preemptive constraint for tasks is: ； ； ； ； ； ； ； in, It is a binary variable, if the task and tasks All in the processor The task is executed and It is a task The predecessor task, then ,otherwise If the task It is a processor The first task is... ,otherwise If the task It is a processor The last task, then ;otherwise ; It is a binary variable, if the task In processor If the above is executed, then ,otherwise ; It is a binary variable; if there is no task on the processor... If the above is executed, then ,otherwise .

4. The method for optimizing mapping of approximate computation tasks on heterogeneous platforms based on DVFS and DPM as described in claim 3, characterized in that: In step S3, task relevance refers to the requirement that for tasks with relevance, the end time of the dependent task must be earlier than the start time of the subsequent task. Therefore, the specific task relevance constraint is as follows: ； ； The processor utilization rate refers to the scheduling cycle occupied by each task on the processor. The proportion of processor utilization is therefore determined as follows: ； The energy consumption limit refers to the total energy consumption of the system not exceeding the energy budget. The specific energy consumption constraints are as follows: ； in, It is a binary variable; if the processor has finished executing the task... Then, switching from idle state to sleep state ,otherwise ; For processor With frequency Power consumption during task execution; For processor With frequency Power consumption in idle state; For processor Power consumption in sleep mode; For processor Energy consumption when switching from idle to sleep mode; For the system's energy budget.

5. The method for optimizing mapping of approximate computation tasks on heterogeneous platforms based on DVFS and DPM as described in claim 4, characterized in that: In step S4, the real-time constraint, task non-preemption constraint, task dependency constraint, processor utilization constraint, and energy consumption constraint are linearized as follows: ； ； ； ； ； ； in, It is a substitute for nonlinear terms Continuous variables; It is a substitute for nonlinear terms Continuous variables; It is a substitute for nonlinear terms Continuous variables; It is a substitute for nonlinear terms Continuous variables; It is a substitute for nonlinear terms Continuous variables; It is a substitute for nonlinear terms Continuous variables; It is a substitute for nonlinear terms binary variables; It is a substitute for nonlinear terms binary variables; It is a substitute for nonlinear terms binary variables; It is a substitute for nonlinear terms binary variables; It is a substitute for nonlinear terms Continuous variables; It is a substitute for nonlinear terms Continuous variables; It is a substitute for nonlinear terms Continuous variables; It is a substitute for nonlinear terms Continuous variables; It is a substitute for nonlinear terms Continuous variables; It is a substitute for nonlinear terms Continuous variables.

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