Gated power unit automatically searches for optimal connection methods, devices, products and media

Abstract

The present invention discloses an automatic search and optimization connection algorithm for gated power supply units, a device, an electronic device and a computer-readable storage medium. The present invention includes dividing a gated power supply unit array, grouping the gated power supply unit array, determining a gated power supply unit array cascade port and connecting a gated power supply unit loop based on grouping. The present invention can automatically and quickly connect gated power supply units by grouping gated power supply unit arrays in the same power domain in sequence and loop-connecting them, and can effectively find the shortest connection path, while reducing redundant wiring and reducing transition problems caused by long-line connections.

Description

Technical Field

[0001] The present invention belongs to the field of low-power automatic design of integrated circuits, and in particular, relates to an algorithm, device, electronic device and computer-readable storage medium for automatically searching for and optimizing connection of a gate-controlled power supply unit. Background Art

[0002] When designing low-power integrated circuit power, the chip is generally divided into multiple power domains. The power of each power domain can be switched independently, turned on when working and turned off when not working, which can effectively reduce the power consumption of the chip. The key component to achieve the above functions is the gated power unit (Power Switch cell, PSW). The gated power unit uses CMOS circuit construction to connect and disconnect the circuit. When one or more power domains need to be turned off, a larger current value is required. However, the current that can pass through a MOS tube is extremely limited. Therefore, during the use stage, a large number of gated power units are required to work together.

[0003] like Figure 1 As shown, the commonly used way to connect the gated power supply unit is to use a daisy chain structure. All switches are connected in series to form a unidirectional link. When the previous power switch is turned on, an output signal is generated, and the output signal drives the next power switch to turn on. Figure 1 The EDA tool does not optimize the connection of the gated power unit. In some special scenarios, for example, the presence of a macro module unit near the gated power unit will cause the gated power unit array to be irregular. In addition, there may be a gated power unit in the gap between two macro modules. In these cases, when the EDA tool connects the gated power units in series, it will automatically connect them in sequence based on the principle of proximity. The automatic connection result of the EDA tool will result in a situation where the distance between the front and rear units is far and long lines have to be used for connection, resulting in uncontrollable connection routing between the gated power units, occupying more winding resources, causing winding congestion, and long lines are prone to transition problems (transition), which need to be repaired, increasing the complexity of the design. Summary of the invention

[0004] In view of this, an object of the present invention is to avoid using long wires to connect a gate-controlled power supply unit and reduce design complexity, so as to solve the problems existing in the above-mentioned background technology.

[0005] To achieve the above objectives, in a first aspect, the present invention provides a method for automatically searching for and optimizing connections of a gate-controlled power supply unit, comprising:

[0006] The step of dividing the gated power supply unit array, in which the gated power supply units in the chip power domain are divided into N-level gated power supply unit arrays according to their positions, and the number of units of the i-th level gated power supply unit array is Mi , where 1≤i≤N, M i ≥2;

[0007] The step of grouping the gated power unit arrays, in which, for each of the plurality of gated power unit arrays, adjacent gated power units are grouped in pairs in order, wherein an even-numbered unit combination has two gated units, two pairs of input terminals and output terminals, and an odd-numbered unit combination has one gated unit, a pair of input terminals and an output terminal;

[0008] A step of determining the cascade ports of the gated power supply unit arrays; in this step, for the plurality of gated power supply unit arrays, the input ends of the gated power supply units are selected as the input ends of the uplink cascade and / or the downlink cascade, and the output ends of the gated power supply units are selected as the output ends of the uplink cascade and / or the downlink cascade;

[0009] A step of connecting a gated power unit loop based on groups; in this step, the plurality of gated power unit arrays are arranged based on groups, and the input and output ends of the gated power units of the array are connected to form a closed loop, wherein the output end of the upstream cascade is regarded as connected to the input end of the upstream cascade, and the output end of the downstream cascade is regarded as connected to the input end of the downstream cascade, and the even-numbered units enter and exit twice, and the odd-numbered units enter and exit once.

[0010] In a second aspect, the present invention provides a device for automatically searching and optimizing connection of a gate-controlled power supply unit, comprising:

[0011] An array division unit, which is used to divide the gated power supply units in the chip power domain into N-level gated power supply unit arrays according to their positions, and the number of units in the i-th level gated power supply unit array is Mi, where 1≤i≤N, Mi≥2;

[0012] An array grouping unit, the unit being used for, for each array of the plurality of gated power supply unit arrays, sequentially grouping adjacent gated power supply units in pairs, wherein an even number unit combination has two gated units, two pairs of input terminals and output terminals, and an odd number unit combination has one gated unit, a pair of input terminals and an output terminal;

[0013] an array cascade port determination unit, the unit being used to, for the plurality of gated power supply unit arrays, select input ends of gated power supply units as input ends of the uplink cascade and / or downlink cascade, and select output ends of gated power supply units as output ends of the uplink cascade and / or downlink cascade;

[0014] A loop connection unit is used to arrange the plurality of gated power supply unit arrays based on grouping, connect the input and output ends of the gated power supply units of the array to form a closed loop, wherein the output end of the upstream cascade is regarded as connected to the input end of the upstream cascade, the output end of the downstream cascade is regarded as connected to the input end of the downstream cascade, the even-numbered units are input and output twice, and the odd-numbered units are input and output once.

[0015] In a third aspect, the present invention provides an electronic device comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the method for automatically searching for optimized connections of a gated power supply unit.

[0016] In a fourth aspect, the present invention provides a computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor, implements the method for automatically searching for an optimized connection of a gated power supply unit.

[0017] Beneficial Effects

[0018] The present invention groups gated power supply unit arrays in the same power domain in order and performs loop connections in pairs, thereby enabling fast and automatic connection of gated power supply units and effectively finding the shortest connection path, while reducing redundant wiring and reducing transition problems caused by long-line connections. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 The schematic diagram is a schematic diagram of a daisy chain connection of a gate-controlled power supply unit in the prior art.

[0020] Figure 2 Flow chart of a method for automatically searching for an optimized connection of a gate-controlled power supply unit in an embodiment of the present invention.

[0021] Figure 3 FIG. 1 is a schematic diagram of the application of the method of the present invention in an embodiment.

[0022] Figure 4 Schematic diagram of four situations of uplink cascading of even-numbered arrays in some embodiments of the method of the present invention.

[0023] Figure 5 Schematic diagram of three situations of single array uplink cascading in some embodiments of the method of the present invention.

[0024] Figure 6 Schematic diagram of two situations where the upstream and downstream cascade ports are adjacent in some embodiments of the method of the present invention.

[0025] Figure 7Schematic diagram of five situations where the upstream and downstream cascade ports are not adjacent in some embodiments of the method of the present invention.

[0026] Figure 8 Schematic diagrams of three situations in which the uplink and downlink cascade input ports are adjacent and the output ports are not adjacent in some embodiments of the method of the present invention.

[0027] Fig. 9 Schematic diagram of two situations in which the uplink and downlink cascade input ports are not adjacent but the output ports are adjacent in some embodiments of the method of the present invention.

[0028] Fig.10 Schematic diagrams of two situations in which a single number array and a single number unit are located in the middle in some embodiments of the method of the present invention.

[0029] Fig.11 It is a composition principle diagram of the automatic search and optimization connection device of the gate-controlled power supply unit in an embodiment of the present invention.

[0030] Fig.12 The figure is a schematic diagram of the composition of the electronic device according to the embodiment of the present invention.

[0031] Reference numerals

[0032] a power domain input, b power domain output, c macro module unit, d gated power unit DETAILED DESCRIPTION

[0033] The following describes the embodiments of the present invention by specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.

[0034] It should be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present invention, and thus the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0035] like Figure 2 As shown, a method for automatically searching and optimizing the connection of gated power units in one embodiment of the present invention includes the steps of dividing the gated power unit array and the steps of grouping the gated power unit array.

[0036] In the step of dividing the gated power cell array, the gated power cells in the chip power domain are divided into N levels of gated power cell arrays according to their positions, and the number of cells in the i-th level gated power cell array is M. i , where 1≤i≤N, M i ≥2.

[0037] In some embodiments of the present invention, the array is divided according to the position of the gated power unit. Specifically, a plurality of gated power units whose Manhattan distance from the input signal of the starting point is less than a preset threshold are obtained as a first-level gated power unit array; a plurality of gated power units whose Manhattan distance from the first gated power unit array is less than a preset threshold are obtained from the remaining gated power units as a second gated power unit array; and the above steps are repeated to sequentially obtain a plurality of gated power units whose Manhattan distance from the predecessor array is less than the preset threshold from the remaining gated power units as an Nth gated power unit array.

[0038] In some embodiments of the present invention, for gated power units arranged in a grid, gated power units with consistent horizontal coordinates and continuous vertical coordinates can be listed in the same column according to coordinate information, and divided into N levels of gated power unit arrays in ascending order according to the distance from the power domain enable end (enable) to the response end (ack).

[0039] In the step of grouping the gated power unit array, for each array of the multiple gated power unit arrays, adjacent gated power units are grouped in pairs in order. If there is one gated power unit left after the grouping, the gated power unit is a separate group; the even-numbered unit combination has two gated units, two pairs of input terminals and output terminals, and the odd-numbered unit combination has one gated unit, a pair of input terminals and output terminals.

[0040] In some embodiments of the present invention, the order is in an end-to-end order of the array. Preferably, each gated power unit array has at most one odd unit, and optimally, the odd unit is located at one end of the array. In some other embodiments, the order may be from the middle of the array to both ends. Preferably, each end of each gated power unit array has at most one odd unit, and optimally, the odd unit is located at one end of the array.

[0041] In the step of determining the upstream and downstream cascade ports of the gated power unit array, for the multiple gated power unit arrays, the gated power unit input end is selected as the input end of the upstream cascade and / or the downstream cascade, and the gated power unit output end is selected as the output end of the upstream cascade and / or the downstream cascade.

[0042] In some embodiments of the present invention, the gated power supply unit array may have only one level, or only two levels, or more than three levels. Specifically, for the first-level array, it is necessary to select the input end of the gated power supply unit as the input end of the upstream cascade, select the output end of the gated power supply unit as the output end of the upstream cascade, and respectively connect the enable end and the response end of the power domain, that is, the input end and the output end of the power domain. Generally, if it is a multi-level array, the first-level array also needs to be connected to the second-level array, select the input end of the gated power supply unit as the input end of the downstream cascade, and select the output end of the gated power supply unit as the output end of the downstream cascade; for the N-th level array, only the input end of the gated power supply unit is selected as the input end of the upstream cascade, and the output end of the gated power supply unit is selected as the output end of the upstream cascade; for the middle array, it is necessary to connect the upper and lower adjacent levels, select the input end of the gated power supply unit as the input end of the upstream cascade and the downstream cascade, and select the output end of the gated power supply unit as the output end of the upstream cascade and the downstream cascade. The gated power supply unit array has only one level, and is selected according to the above-mentioned rules for selecting the first-level array. The gated power supply unit array has two levels, and is selected according to the above-mentioned rules for selecting the first-level array and the Nth-level array. The gated power supply unit array has more than three levels, and is selected according to the above-mentioned rules for selecting the first-level array, the intermediate array, and the Nth-level array.

[0043] In some embodiments of the present invention, the input and output of the upstream cascade are adjacent, and the input and output of the downstream cascade are adjacent. In some embodiments of the present invention, the input and output of the upstream cascade may not be adjacent, and the input and output of the downstream cascade may not be adjacent.

[0044] Furthermore, in some other embodiments of the present invention, for the number of units M i For the intermediate array when ≥4, the input end of the upstream cascade, the output end of the upstream cascade, the input end of the downstream cascade, and the output end of the downstream cascade are respectively connected to different gate control power supply units.

[0045] In some embodiments of the present invention, specifically, for the first-level array, the Manhattan distance between each gated power unit and the power domain enable terminal (enable) and the response terminal (ack) is calculated, and the gated power unit with the smallest Manhattan distance from the power domain enable terminal (enable) and not blocked is selected to be connected to the power domain enable terminal (enable), and the gated power unit with the smallest Manhattan distance from the power domain response terminal (ack) and not blocked is selected to be connected to the power domain response terminal (ack); in the adjacent gated power unit array, the Manhattan distance between each gated power unit in the upper array and each gated power unit in the lower array is calculated, and two pairs of gated power units with the smallest Manhattan distance are selected as the downlink connection and the uplink connection of the two-level cascade, respectively, the output end of the upper gated power unit in the downlink connection is connected to the input end of the lower gated power unit, the output end of the lower gated power unit in the uplink connection is connected to the input end of the upper gated power unit, the uplink connection and the downlink connection are not blocked, and when the closest.

[0046] In the step of connecting the gated power unit loop based on groups, for the multiple gated power unit arrays, they are arranged based on groups, and the input and output ends of the gated power units of the array are connected to form a closed loop, wherein the output end of the upstream cascade is regarded as connected to the input end of the upstream cascade, and the output end of the downstream cascade is regarded as connected to the input end of the downstream cascade.

[0047] In some embodiments of the present invention, for each of the multiple gated power unit arrays, the step of first determining the upstream and downstream cascade ports of the gated power unit array may be performed in turn, and then the step of connecting the gated power unit loop based on grouping may be performed.

[0048] In some other embodiments of the present invention, the step of determining the upstream and downstream cascade ports of the gated power unit arrays can be performed on the multiple gated power unit arrays as a whole, and then the step of connecting the gated power unit loops based on groups can be performed on each array of the multiple gated power unit arrays.

[0049] In some embodiments of the present invention, for each of the multiple gated power unit arrays, the input and output ends of the gated power units in the group are connected in sequence starting from the input end of the upstream cascade in a clockwise or counterclockwise direction around the array, and finally connected to the output end of the upstream cascade.

[0050] Figure 3 Schematic diagram of an embodiment of the present invention of the automatic search and optimization connection method for gate-controlled power supply units. The method in this embodiment includes:

[0051] 1. Since the gated power supply units PSW can be added in array when added by the EDA tool, the gated power supply units PSW with the same horizontal coordinates and continuous vertical coordinates are listed in the same column according to the coordinate information, such as Figure 3 It can be divided into three columns.

[0052] 2. Sort the gated power supply units in the same column from small to large according to the vertical coordinates, and combine the sorted gated power supply units in this column into one unit in order, such as Figure 3 As shown, in column 1, gated power supply units 1 and 2 form a combination as column 1-1, and gated power supply units 3 and 4 form a combination as column 1-2. We call this combination of two units an even number combination. When an odd number appears in this array, the last combination has only one unit, which we call an odd number combination. Figure 3 The above permutations and combinations.

[0053] 3. After the above classification, the gated power supply unit PSW has two inputs and two outputs in the even combination, and only one input and one output in the odd combination. Then, connecting these gated power supply units PSW together to form a closed loop according to certain requirements is equivalent to a mathematical arrangement problem. By analogy with the connection of these gated power supply units, we can conclude that in this mathematical arrangement, an even combination unit will appear twice, and an odd combination unit will appear once.

[0054] 4. Specifically, the combination of gated power supply units closest to the enable signal (enable) and the response signal (ack) can be obtained based on the Manhattan distance, such as Figure 3 In the figure, the columns are 1-6, so we assume that one of the input terminals of the combination unit of column 1-6 that is closest to the enable signal (enable) is connected to the enable signal (enable), and the output terminal that is closest to the response signal (ack) is connected to the response signal (ack). Then the mathematical arrangement corresponding to the closed loop of the gated power supply unit is as follows: enable signal (enable), column 1-6, column 1-6, response signal (ack). Through this step, we have determined the head and tail of an arrangement.

[0055] 5. Starting from columns 1-6, Figure 2We can agree to search upwards, from the unit closest to column 1-6, until we reach the last unit in column 1, so the arrangement is: enable signal (enable), column 1-6, column 1-7, column 1-8, column 1-9, column 1-10, column 1-11, column 1-12, column 1-12, column 1-11, column 1-10, column 1-9, column 1-8, column 1-7, column 1-6, response signal (ack). In this way, a closed loop of gated power supply units consisting of multiple units has been formed in column 1, but there are still a few units in column 1 that have not entered the connection. Then find the unit closest to the connection in column 1, such as Figure 2 The unit in column 1-6 is closest to the unit in column 1-5 which is not connected, so column 1-5 is added to the connection and placed before column 1-6, forming a new arrangement: enable signal (enable), column 1-6, column 1-7, column 1-8, column 1-9, column 1-10, column 1-11, column 1-12, column 1-12, column 1-11, column 1-10, column 1-9, column 1-8, column 1-7, column 1-5, column 1-5, column 1-6, response signal (ack). And so on, until all the units in column 1 have been connected, forming the final arrangement of column 1: enable signal (enable), column 1-6, column 1-7, column 1-8, column 1-9, column 1-10, column 1-11, column 1-12, column 1-12, column 1-11, column 1-10, column 1-9, column 1-8, column 1-7, column 1-5, column 1-4, column 1-3, column 1-2, column 1-1, column 1-1, column 1-2, column 1-3, column 1-4, column 1-5, column 1-6, response signal (ack). In this way, all the gated power supply units in column 1 have been connected, and a closed loop of signals has been formed.

[0056] 6. After completing the arrangement of column 1, we proceed to the arrangement of the next column, such as Figure 3 Column 2 in the figure. The starting point of the next column can be selected by using the Manhattan distance. All the points in column 2 are traversed, and the group with the shortest Manhattan distance from column 1 in column 2 is calculated to determine the starting point of the new column, such as Figure 3 There are multiple groups of situations in which the Manhattan distances closest to column 1 are the same, such as column 1-1 and column 2-1, column 1-2 and column 2-2, column 1-9 and column 2-9. When this happens, except for the group where the column 1-6 signal input end unit in the previous column is located, we can arbitrarily select one as the starting point of column 2, such as column 2-1 corresponding to column 1-1, then the starting point of the new column can be selected as column 2-1.

[0057] 7. According to the connection method of column 1, we know that column 2-1 is the starting point and end point of column 2. Since column 2-9 in column 2 is an odd combination, column 2-9 will appear once in the mathematical arrangement of column 2. Finally, we can smoothly deduce that the connection arrangement of column 2 is: column 2-1, column 2-2, column 2-3, column 2-4, column 2-5, column 2-6, column 2-7, column 2-8, column 2-9, column 2-8, column 2-7, column 2-6, column 2-5, column 2-4, column 2-3, column 2-2, column 2-1.

[0058] 8. According to the connection sequence of column 1 and column 2, it can be concluded that in the connection closed loop of column 1, the connection sequence of column 2 will be added to column 1-1, and finally the connection closed loop of all units in column 1 and column 2 is formed: enable signal (enable), column 1-6, column 1-7, column 1-8, column 1-9, column 1-10, column 1-11, column 1-12, column 1-12, column 1-11, column 1-10, column 1-9, column 1-8, column 1-7 , column 1-5, column 1-4, column 1-3, column 1-2, column 1-1, column 2-1, column 2-2, column 2-3, column 2-4, column 2-5, column 2-6, column 2-7, column 2-8, column 2-9, column 2-8, column 2-7, column 2-6, column 2-5, column 2-4, column 2-3, column 2-2, column 2-1, column 1-1, column 1-2, column 1-3, column 1-4, column 1-5, column 1-6, response signal (ack).

[0059] 9. Following this connection method, we can connect column 3, such as Figure 3 By analogy, when there are multiple columns of gate-controlled power supply units PSW, they can all be connected in this way to form a final closed loop.

[0060] The following describes the application of the automatic search and optimization connection method for gate-controlled power supply units of the present invention in an embodiment using a single-row connection situation.

[0061] Figure 4 Schematic diagram of four situations of uplink cascading of even-numbered arrays in some embodiments of the method of the present invention. Figure 4 In the example, the number of gated power supply unit array units is even, and they are grouped in pairs in an end-to-end order. The input and output ends of the array upstream cascade are allocated in the same group ( Figure 4 1 and 2), different adjacent groups ( Figure 4 3), and non-adjacent groups ( Figure 4 4). As can be seen from the figure, all situations can form a closed loop well.

[0062] Figure 5 Schematic diagram of three situations of uplink cascading of even-numbered arrays in some embodiments of the method of the present invention. Figure 5In the example, the number of gated power supply array cells is odd, and they are grouped in pairs in an end-to-end order, with the odd cells located at the top ( Figure 4 1 and 2) or the lower end ( Figure 4 3), the input and output of the array upstream cascade are allocated in the same group ( Figure 4 1), different adjacent groups ( Figure 4 2), and non-adjacent groups ( Figure 4 3), it can be seen that Figure 5 There are three situations shown in . It can be seen from the figure that each situation can form a closed loop well.

[0063] Figure 6 Schematic diagram of two situations where the upstream and downstream cascade ports are adjacent in some embodiments of the method of the present invention. Figure 6 In the example, the number of gated power supply unit array units is even, and they are grouped in pairs in an end-to-end order. The input and output ends of the array upstream and downstream cascades are allocated in the same group ( Figure 4 1), different adjacent groups ( Figure 4 2). As can be seen from the figure, all situations can form a closed loop well.

[0064] Figure 7 Schematic diagram of five situations where the upstream and downstream cascade ports are not adjacent in some embodiments of the method of the present invention. Figure 7 In the figure, the number of gated power supply unit array units is even, and they are grouped in pairs in an end-to-end order, and the input and output ends of the array upstream and downstream cascades are not adjacent. As can be seen from the figure, all situations can form a closed loop well. Figure 7 There is a crossover in the closed loops of 3, 4 and 5, so there needs to be some restrictions when routing relative to 1 and 2.

[0065] Figure 8 Schematic diagrams of three situations in which the uplink and downlink cascade input ports are adjacent and the output ports are not adjacent in some embodiments of the method of the present invention. Figure 8 In the figure, the number of gated power supply unit array units is even, and they are grouped in pairs in an end-to-end order. The input ports of the array upstream and downstream cascades are adjacent, and the output ports are not adjacent. As can be seen from the figure, all situations can form a closed loop well.

[0066] Fig. 9 Schematic diagram of two situations in which the uplink and downlink cascade input ports are not adjacent but the output ports are adjacent in some embodiments of the method of the present invention. Fig. 9 In the figure, the number of gated power supply unit array units is even, and they are grouped in pairs in an end-to-end order. The input ports of the array upstream and downstream cascade are not adjacent, and the output ports are adjacent. As can be seen from the figure, all situations can form a closed loop well.

[0067] Fig.10Schematic diagrams of two situations in which a single number array and a single number unit are located in the middle in some embodiments of the method of the present invention. Fig. 9 In the figure, the number of gated power supply unit array units is odd, and they are grouped in pairs in an end-to-end order. The odd units are set in the middle of the array, and the array uplink cascade ports are adjacent. As can be seen from the figure, all situations can form a closed loop well.

[0068] pass Figure 4-Figure 10 As can be seen from the embodiments in the present invention, the method of the present invention can quickly and automatically connect the gated power supply unit and can effectively find the shortest connection path, while reducing redundant connections and reducing transition problems caused by long-line connections.

[0069] like Fig.11 As shown, the gate-controlled power unit automatic search and optimization connection device in one embodiment of the present invention includes:

[0070] An array division unit is used to divide the gated power supply units in the chip power domain into N-level gated power supply unit arrays according to their positions. The number of units in the i-th level gated power supply unit array is M. i , where 1≤i≤N, M i ≥2;

[0071] An array grouping unit, the unit being used to group adjacent gated power supply units in pairs in order for the plurality of gated power supply unit arrays, wherein an even-numbered unit combination has two gated power supply units, two pairs of input terminals and output terminals, and an odd-numbered unit combination has one gated power supply unit, a pair of input terminals and an output terminal;

[0072] an array cascade port determination unit, the unit being used to, for the plurality of gated power supply unit arrays, select input ends of gated power supply units as input ends of the uplink cascade and / or downlink cascade, and select output ends of gated power supply units as output ends of the uplink cascade and / or downlink cascade;

[0073] A loop connection unit is used to arrange each of the plurality of gated power supply unit arrays based on grouping, connect the input and output of the gated power supply units of the array to form a closed loop, wherein the output of the upstream cascade is regarded as connected to the input of the upstream cascade, the output of the downstream cascade is regarded as connected to the input of the downstream cascade, the even-numbered units are input and output twice, and the odd-numbered units are input and output once. In one embodiment, the present invention provides an electronic device, such as Fig.12As shown, the electronic device includes at least one processor and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the above-mentioned gated power supply unit automatic search and optimization connection method.

[0074] Among them, the memory and the processor are connected in a bus manner, and the bus may include any number of interconnected buses and bridges, and the bus connects various circuits of one or more processors and memories together. The bus can also connect various other circuits such as peripheral devices, voltage regulators, and power management circuits through interfaces, which are all well known in the art. The interface provides an interface between the bus and the transceiver, such as a communication interface and a user interface. The transceiver can be one element or multiple elements, such as multiple receivers and transmitters, providing a unit for communicating with various other devices on a transmission medium. The data processed by the processor is transmitted on a wireless medium through an antenna, and further, the antenna also receives data and transmits the data to the processor.

[0075] The processor is responsible for managing the bus and general processing, and can also provide various functions, including timing, peripheral interfaces, voltage regulation, power management, and other control functions. Memory can be used to store data used by the processor when performing operations.

[0076] In one embodiment, the present invention provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, the above-mentioned embodiment of the method for automatically searching for an optimized connection of a gate-controlled power supply unit is implemented.

[0077] Those skilled in the art can understand from the above description that all or part of the steps in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a program, and the program is stored in a storage medium, including several instructions for making a device (which can be a single-chip microcomputer, chip, etc.) or a processor (processor) execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes but is not limited to various media that can store program codes, such as USB flash drives, mobile hard disks, magnetic storage devices, and optical storage devices.

[0078] In the several embodiments provided in the present application, it should be understood that the disclosed system, device or method can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of modules / units is only a logical function division. There may be other division methods in actual implementation, such as multiple modules or units can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or modules or units, which can be electrical, mechanical or other forms.

[0079] The modules / units described as separate components may or may not be physically separated, and the components displayed as modules / units may or may not be physical modules, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules / units may be selected according to actual needs to achieve the purpose of the embodiments of the present application. For example, the functional modules / units in the various embodiments of the present application may be integrated into one processing module, or each module / unit may exist physically separately, or two or more modules / units may be integrated into one module / unit.

[0080] Those of ordinary skill in the art should further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0081] The descriptions of the processes or structures corresponding to the above-mentioned figures have different emphases. For parts that are not described in detail in a certain process or structure, please refer to the relevant descriptions of other processes or structures.

[0082] The above embodiments are merely illustrative of the principles and effects of the present application and are not intended to limit the present application. Anyone familiar with the technology may modify or change the above embodiments without violating the spirit and scope of the present application. Therefore, all equivalent modifications or changes made by a person of ordinary skill in the art without departing from the spirit and technical ideas disclosed in the present application shall still be covered by the claims of the present application.

Claims

1. A method for automatically searching and optimizing the connection of a gate-controlled power supply unit, characterized in that: include: The step of dividing the gated power supply unit array, in which the gated power supply units in the chip power domain are divided into N-level gated power supply unit arrays according to their positions, and the number of units of the i-th level gated power supply unit array is M i , where 1≤i≤N, M i ≥2; A step of grouping the gated power supply unit array, in which, for each level of the N-level gated power supply unit array, adjacent gated power supply units are grouped in pairs in order, a double-unit group has two gated units, two pairs of input terminals and output terminals, and a single-unit group has one gated unit, a pair of input terminals and output terminals; the order is from the end of the array to the end; or, the order is from the middle of the array to the two ends respectively; A step of determining a cascade port of a gated power supply unit array; in this step, for each level of the N-level gated power supply unit array, an input end of a gated power supply unit is selected as an input end of an upstream cascade and / or a downstream cascade, and an output end of a gated power supply unit is selected as an output end of an upstream cascade and / or a downstream cascade; A step of connecting a gated power unit loop based on grouping; in this step, for each level of the N-level gated power unit array, the input end and the output end of the gated power unit of each level of the array are connected based on grouping to form a closed loop, and in the closed loop of each level of the array, the output end of the upstream cascade is regarded as connected to the input end of the upstream cascade, and the output end of the downstream cascade is regarded as connected to the input end of the downstream cascade, the double unit group has one input and one output twice, and the single unit group has one input and one output once; Determining the cascade port of the gated power supply unit array specifically includes: for the first-level array, it is necessary to select the input end of the gated power supply unit as the input end of the upstream cascade, select the output end of the gated power supply unit as the output end of the upstream cascade, and respectively connect the enable end and the response end of the power domain, that is, the input end and the output end of the power domain; if it is a multi-level array, the first-level array also needs to be connected to the second-level array, select the input end of the gated power supply unit as the input end of the downstream cascade, and select the output end of the gated power supply unit as the output end of the downstream cascade; for the Nth-level array, only select the input end of the gated power supply unit as the input end of the upstream cascade end, select the output end of the gated power unit as the output end of the upstream cascade; for the middle array, it is necessary to connect the upper and lower adjacent levels, select the input end of the gated power unit as the input end of the upstream cascade and the downstream cascade, and select the output end of the gated power unit as the output end of the upstream cascade and the downstream cascade; if the gated power unit array has only one level, it is selected according to the above-mentioned rules for selecting the first-level array; if the gated power unit array has two levels, it is selected according to the above-mentioned rules for selecting the first-level array and the N-th-level array; if the gated power unit array has more than three levels, it is selected according to the above-mentioned rules for selecting the first-level array, the middle array and the N-th-level array.

2. The method for automatically searching and optimizing the connection of a gate-controlled power supply unit according to claim 1, characterized in that: In the step of dividing the gated power unit array, gated power units with consistent horizontal coordinates and continuous vertical coordinates are grouped into the same column according to the coordinate information, and the gated power unit array is divided into N levels of gated power unit arrays in ascending order according to the distance between the gated power unit array and the power domain enable end and the response end.

3. The method for automatically searching and optimizing the connection of a gate-controlled power supply unit according to claim 1, characterized in that: In the step of grouping the gated power unit array, specifically, the order is from end to end of the array, and each gated power unit array has at most one single unit group; or, the order is from the middle of the array to both ends, and each gated power unit array has at most two single unit groups.

4. The method for automatically searching and optimizing the connection of a gate-controlled power supply unit according to claim 3, characterized in that: In the step of determining the cascade ports of the gate-controlled power supply unit array, the input end and the output end of the upstream cascade are adjacent, and the input end and the output end of the downstream cascade are adjacent.

5. The method for automatically searching and optimizing the connection of a gate-controlled power supply unit according to claim 4, characterized in that: In the step of determining the cascade ports of the gated power cell array, for the number of cells M i For the intermediate array of ≥4, the input end of the upstream cascade, the output end of the upstream cascade, the input end of the downstream cascade and the output end of the downstream cascade are respectively connected to different gate control power supply units.

6. The method for automatically searching and optimizing the connection of a gate-controlled power supply unit according to claim 5, characterized in that: In the step of connecting the gated power unit loop based on groups, for each level of the plurality of gated power unit arrays, starting from the input end of the upstream cascade, the input end and the output end of the gated power unit in the group are connected in sequence in a clockwise or counterclockwise direction around the array, and finally connected to the output end of the upstream cascade.

7. A device for automatically searching and optimizing connection of a gate-controlled power supply unit, comprising: An array division unit is used to divide the gated power supply units in the chip power domain into N-level gated power supply unit arrays according to their positions. The number of units in the i-th level gated power supply unit array is M. i , where 1≤i≤N, M i ≥2; An array grouping unit, the unit is used to group adjacent gated power supply units in pairs in order for each level of the N-level gated power supply unit array, wherein a double-unit group has two gated power supply units, two pairs of input terminals and output terminals, and a single-unit group has one gated power supply unit, a pair of input terminals and output terminals; the order is from the end of the array to the end; or the order is from the middle of the array to the two ends respectively; An array cascade port determination unit, the unit being used to, for each level of the N-level gated power supply unit array, select an input end of the gated power supply unit therefrom as an input end of an upstream cascade and / or a downstream cascade, and select an output end of the gated power supply unit therefrom as an output end of an upstream cascade and / or a downstream cascade; each level of the array at least includes an upstream cascade input end and an output end; A loop connection unit, the unit is used for, for each level of array in the N-level gated power supply unit array, arranging based on grouping to connect the input end and output end of the gated power supply unit of each level of array to form a closed loop, in the closed loop of each level of array, the output end of the upstream cascade is regarded as connected to the input end of the upstream cascade, the output end of the downstream cascade is regarded as connected to the input end of the downstream cascade, the double-unit group has one input and one output twice, and the single-unit group has one input and one output once; the array cascade port determination specifically includes: for the first-level array, it is necessary to select the input end of the gated power supply unit as the input end of the upstream cascade, select the output end of the gated power supply unit as the output end of the upstream cascade, and connect the enable end and the response end of the power domain, that is, the input end and the output end of the power domain respectively; if it is a multi-level array, the first-level array also needs to be connected to the second-level array, select the gated power supply unit as the output end of the upstream cascade, and connect the enable end and the response end of the power domain respectively. The input end of the source unit is used as the input end of the downstream cascade, and the output end of the gated power unit is selected as the output end of the downstream cascade; for the Nth level array, only the input end of the gated power unit is selected as the input end of the upstream cascade, and the output end of the gated power unit is selected as the output end of the upstream cascade; for the middle array, it is necessary to connect the upper and lower adjacent levels, select the input end of the gated power unit as the input end of the upstream cascade and the downstream cascade, and select the output end of the gated power unit as the output end of the upstream cascade and the downstream cascade; the gated power unit array has only one level, which is selected according to the above-mentioned rules for selecting the first-level array; the gated power unit array has two levels, which are selected according to the above-mentioned rules for selecting the first-level array and the Nth-level array; the gated power unit array has more than three levels, which are selected according to the above-mentioned rules for selecting the first-level array, the middle array and the Nth-level array.

8. An electronic device comprising: at least one processor; as well as, a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the automatic search and optimization connection method for a gate-controlled power supply unit according to any one of claims 1 to 6.

9. A computer-readable storage medium storing a computer program, wherein: When the computer program is executed by a processor, the method for automatically searching for an optimized connection of a gate-controlled power supply unit according to any one of claims 1 to 6 is implemented.

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