A multi-bus communication method, port machinery edge computing device and related equipment

Abstract

A method for multiple bus communication, a port machinery edge computing device and related equipment, and relates to the technical field of port machinery equipment. In this method, when different bus data processing systems communicate, the first bus data processing system responsible for outputting data in this communication stores the communication data in the first storage area of ​​the first bus data processing system; the bus data processing system can work independently; the work includes communication, data transmission and reception, and self-complete data collection, conversion and redirection according to the content of script programming; the area storing communication data in the first storage area is mapped to the second storage area of ​​the second bus data processing system responsible for inputting data in this communication; the data of all storage areas except the first storage area is updated to be synchronized with the data in the first storage area; the second bus data processing system reads the communication data from the second storage area of ​​the second bus data processing system, thereby improving the communication speed.

Description

Technical Field

[0001] The present application relates to the technical field of port machinery equipment, and in particular to a multi-bus communication method, a port machinery edge computing device and related equipment. Background Art

[0002] With the development of globalization and the continuous growth of trade volume, ports, as important nodes of international trade, have put forward higher requirements for the intelligence and information level of port machinery and equipment. In the traditional mode, the mechanical equipment of ports mostly relies on electromechanical control systems and has not fully integrated modern information technology, which to a certain extent limits the port operation efficiency and the intelligent management ability of equipment. In addition, with the introduction of the concept of smart ports, how to improve the digitalization, networking and intelligence level of port machinery and equipment has become an urgent problem to be solved in the industry.

[0003] In the related technology, the single bus system has been widely used in industrial applications due to its simplicity and maturity. However, with the development of technology and the pursuit of efficiency, the single bus system often needs to be upgraded to a more advanced dual bus system to support more complex data communication requirements. In this case, bus conversion technology has been developed to achieve seamless switching between single bus and dual bus. This technology usually involves hardware adapters and software protocol conversion to ensure that data can be correctly transmitted between the two bus standards.

[0004] However, the communication speed provided by the relevant technology may not be sufficient to meet the requirements of high-frequency communication. Especially in those application scenarios with strict real-time requirements, in situations where high-frequency communication is required, especially in port machinery control systems with high real-time requirements, it may cause system response delays, thereby affecting operating efficiency and equipment operation safety. Summary of the invention

[0005] The present application provides a variety of bus communication methods, port machinery edge computing equipment and related equipment for improving communication speed.

[0006] In a first aspect, the present application provides a plurality of bus communication methods, including:

[0007] In the case of different bus data processing systems communicating, the first bus data processing system responsible for outputting data in this communication stores the communication data in the first storage area of ​​the first bus data processing system; the bus data processing system can work independently; the work includes communication, data transmission and reception, and data collection, conversion and redirection according to the content of script programming; the first bus data processing system is one or more bus data processing systems;

[0008] Mapping the area storing the communication data in the first storage area to the second storage area of ​​the second bus data processing system responsible for inputting data in this communication; the second bus data processing system is one or more bus data processing systems;

[0009] Updating the data in all storage areas except the first storage area to be synchronized with the data in the first storage area;

[0010] The second bus data processing system reads the communication data from the second storage area in the second bus data processing system.

[0011] In the above embodiment, each bus data processing system is equipped with an exclusive independent storage area, which avoids the phenomenon of queuing for storage areas between multiple bus data processing systems, reduces the waiting time for each other, and improves the data access speed. When any bus data processing system needs to communicate with another system, its communication data is stored and synchronized to the corresponding storage area of ​​the other system. The real-time consistency of the data is ensured, and the delays and inconsistencies that may occur during the data exchange process are avoided. Since each bus data processing system reads data from its own independent storage area, the data access speed is accelerated, and the conflicts and errors in the data processing process are reduced. In short, the communication speed is improved, and the system response delay is avoided, thereby affecting the operation efficiency and the operation safety of the equipment.

[0012] In conjunction with some embodiments of the first aspect, in some embodiments, after the step of the second bus data processing system reading the communication data from the second storage area in the second bus data processing system, the method further includes:

[0013] When the business processing system communicates with the third bus data processing system, a tunnel is established between the business processing system and the third bus data processing system; the business processing system is the processing system that performs the preset task in this communication, and the third bus data processing system is the bus data processing system that cooperates to perform the preset task in this communication. The tunnel is used for direct communication between the business processing system and the third bus data processing system;

[0014] When data sharing is not required, the business processing system communicates with the third bus data processing system;

[0015] In the case where data sharing is required, the business processing system stores the business data in the business storage area of ​​the business bus data processing system;

[0016] Mapping an area storing service data in the service storage area to a third storage area of ​​the third bus data processing system;

[0017] Update the data in all storage areas except the third storage area to be synchronized with the data in the third storage area.

[0018] In the above embodiment, the service processing system can flexibly establish a path for direct access to the field bus for different communication scenarios. Using the virtual tunnel, the service processing system will not only update its own mapping storage area after receiving the bus data, but also broadcast to notify other bus processors to synchronously update their mapping storage areas. This instant broadcast synchronization mechanism ensures data consistency in each processor and avoids service errors and processing delays caused by inconsistent data.

[0019] In conjunction with some embodiments of the first aspect, in some embodiments, after the step of the second bus data processing system reading the communication data from the second storage area in the second bus data processing system, the method further includes:

[0020] Save the data to be uploaded to the preset cache area;

[0021] Sending the data to be uploaded in the buffer area to the terminal device;

[0022] Receiving a reply instruction from the terminal device;

[0023] When confirming that the data upload is successful according to the reply instruction, remove the data to be uploaded from the buffer area;

[0024] When it is confirmed according to the reply instruction that the data upload fails, the data to be uploaded is added to the sending queue.

[0025] In the above embodiment, the data to be uploaded is first saved to a preset buffer area, which realizes temporary storage of data before uploading, thereby ensuring stability and reliability during the data uploading process. Then, the data in the buffer area is sent to the terminal device, and a reply instruction from the terminal device is received, which enables the data flow and status during the uploading process to be monitored. After the data is successfully uploaded, the data is removed from the buffer area to avoid repeated transmission and improve data processing efficiency. If the data upload fails, the data to be uploaded is added to the sending queue, which ensures the continuity of the upload task and the integrity of the data without loss, and improves the fault tolerance for abnormal situations.

[0026] In combination with some embodiments of the first aspect, in some embodiments, when confirming that the data upload fails according to the reply instruction, after the step of adding the data to be uploaded to the sending queue, the method further includes:

[0027] When a network disconnection is detected, all data in the cache area is written into a preset cache database;

[0028] When the network connection is restored, the written data is sent to the cache area from the preset cache database.

[0029] In the above embodiment, when it is detected that the network connection is disconnected, the data in the cache area will not be directly discarded, but written into the preset cache database. This ensures the security of data when the network is unstable or interrupted, and prevents data loss. Once the network connection is restored, the previous data can be extracted from the preset cache database and sent to the cache area, and the previous upload task can be continued, ensuring the continuity of data upload.

[0030] In conjunction with some embodiments of the first aspect, in some embodiments, after the step of updating the data of all storage areas except the first storage area to be synchronized with the data in the first storage area, the method further includes:

[0031] All bus data processing systems periodically generate verification data for their respective storage areas;

[0032] All bus data processing systems exchange, compare and verify data;

[0033] In the event of inconsistent verification data, identifying a group of storage areas that share the same verification data;

[0034] The storage areas in the largest group having the same verification data are identified as correct storage areas, and the remaining storage areas are identified as incorrect storage areas;

[0035] Update the error storage area to synchronize with the data in the correct storage area.

[0036] In the above embodiment, all bus data processing periodically generates and exchanges verification data for comparison with their respective storage areas. This process provides a dynamic monitoring and self-correction mechanism for data consistency. When the verification data is inconsistent, it is possible to identify and form the correct storage area group, and then update the data of the erroneous storage area to a state synchronized with the correct storage area. This not only improves the reliability of data consistency, but also enhances the self-repair capability in the face of potential data inconsistency errors, ensuring the accuracy of data processing and stable operation.

[0037] In a second aspect, an embodiment of the present application provides a port machinery edge computing device, including: a plurality of bus data processing systems, a switching chip:

[0038] The bus data processing system includes:

[0039] A microcontroller unit is used to process the corresponding bus protocol and data; and to perform read and write data operations in the corresponding storage area. When the data in the corresponding storage area is changed, a synchronization instruction is broadcast to the microcontroller units of other bus data processing systems; the microcontroller unit that receives the synchronization instruction will update its corresponding storage area data according to the instruction to ensure data synchronization with the storage area managed by the microcontroller unit that issued the instruction.

[0040] Slave station protocol stack chip, used to implement the parsing and processing of the corresponding slave station protocol;

[0041] The main control unit is a master station protocol stack integrated into the central processing unit of the main control unit, which is used to control the bus data processing system to access the slave station device in the master station mode, and the main control unit is also configured to be accessed by at least one external device in the slave station mode; each control unit can work in the master and slave station modes at the same time;

[0042] A storage area for storing data;

[0043] Switching chip, used for data exchange between different bus data processing systems.

[0044] In the above embodiment, by integrating multiple bus data processing systems, each data processing system can handle different bus protocols. In this way, a single device can be compatible with multiple communication protocols and adapt to the communication requirements of electrical components of different specifications, thereby greatly reducing the complexity of communication protocols caused by the diversity of devices. The microcontroller unit broadcasts synchronization instructions when data changes to ensure data synchronization in the storage areas of all bus data processing systems. This method reduces the difficulty of data management caused by personalized device design and simplifies the maintenance of data consistency.

[0045] In conjunction with some embodiments of the second aspect, in some embodiments, the port machinery edge computing device further includes:

[0046] The intranet chip is connected to the switching chip and the internal terminal device and is used for data transmission between the internal terminal and the bus data processing system;

[0047] The external network chip is connected to the internal network chip and the external platform and is used for data transmission between the internal terminal and the external platform.

[0048] In the above embodiment, the introduction of the intranet chip realizes efficient data transmission between the internal terminal and the bus data processing system. This design makes the transmission of data in the internal network faster and safer, reduces the dependence on the external network, and improves the locality and response speed of data processing. At the same time, the setting of the external network chip allows data exchange between the internal terminal and the external platform, ensuring the availability and scalability of external communication. The collaborative work of this internal and external network chip provides a solution to balance internal processing efficiency and external communication needs, enhancing the overall performance of edge computing devices in data transmission.

[0049] In a third aspect, an embodiment of the present application provides a port machinery edge computing device, the system comprising: one or more processors and a memory;

[0050] The memory is coupled to the one or more processors, and is used to store computer program code, which includes computer instructions. The one or more processors call the computer instructions to enable the port machinery edge computing device to execute the method described in the first aspect and any possible implementation of the first aspect.

[0051] In a fourth aspect, an embodiment of the present application provides a computer program product comprising instructions, which, when the computer program product is run on a server, enables the server to execute the method described in the first aspect and any possible implementation of the first aspect.

[0052] In a fifth aspect, an embodiment of the present application provides a computer-readable storage medium, comprising instructions. When the instructions are executed on a port machinery edge computing device, the port machinery edge computing device executes the method described in the first aspect and any possible implementation method of the first aspect.

[0053] It can be understood that the port machinery edge computing device provided in the second aspect, the port machinery edge computing device provided in the third aspect, the computer program product provided in the fourth aspect, and the computer storage medium provided in the fifth aspect are all used to execute the various bus communication methods provided in the embodiments of the present application. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the corresponding methods, which will not be repeated here.

[0054] One or more technical solutions provided in the embodiments of the present application have at least the following technical effects or advantages:

[0055] 1. The present application provides a variety of bus communication methods, each bus data processing system is equipped with an exclusive independent storage area, which avoids the phenomenon of queuing for storage areas between multiple bus data processing systems, reduces the waiting time for each other, and improves the data access speed. When any bus data processing system needs to communicate with another system, its communication data is stored and synchronized to the corresponding storage area of ​​the other system. The real-time consistency of the data is ensured, and the delays and inconsistencies that may occur during the data exchange process are avoided. Since each bus data processing system reads data from its own independent storage area, the data access speed is accelerated, and conflicts and errors in the data processing process are reduced. In short, the communication speed is improved, and system response delays are avoided, thereby affecting the operation efficiency and the safety of equipment operation.

[0056] 2. The application provides a variety of bus communication methods, and the business processing system can flexibly establish a path for direct access to the field bus for different communication scenarios. Using the virtual tunnel, the business processing system will not only update its own mapping storage area after receiving the bus data, but also broadcast to notify other bus processors to synchronously update their mapping storage areas. This instant broadcast synchronization mechanism ensures data consistency in each processor and avoids business errors and processing delays caused by inconsistent data.

[0057] 3. The multiple bus communication methods provided by the present application integrate multiple bus data processing systems, and each data processing system can handle different bus protocols. In this way, a single device can be compatible with multiple communication protocols and adapt to the communication requirements of electrical components of different specifications, thereby greatly reducing the complexity of communication protocols caused by the diversity of equipment. The microcontroller unit broadcasts synchronization instructions when data changes to ensure data synchronization in the storage areas of all bus data processing systems. This method reduces the difficulty of data management caused by the personalized design of the equipment and simplifies the maintenance of data consistency. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] Figure 1 This is the architecture diagram of the port machinery edge computing device provided for this application.

[0059] Figure 2 A flowchart of various bus communication methods provided in this application.

[0060] Figure 3 A schematic diagram for understanding the various bus communication methods provided in this application.

[0061] Figure 4 Another schematic diagram for understanding the various bus communication methods provided by the present application.

[0062] Figure 5 Another schematic diagram for understanding the various bus communication methods provided by the present application.

[0063] Figure 6 Another schematic diagram for understanding the various bus communication methods provided by the present application.

[0064] Figure 7 A schematic diagram of the physical device of the port machinery edge computing equipment provided in this application. DETAILED DESCRIPTION

[0065] The terms used in the following embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to be used as limitations to the present application. As used in the specification and appended claims of the present application, the singular expressions "one", "a kind of", "said", "above", "the" and "this" are intended to also include plural expressions, unless there is a clear indication to the contrary in the context. It should also be understood that the term "and / or" used in the present application refers to any or all possible combinations comprising one or more listed items.

[0066] In the following, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as suggesting or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features, and in the description of the embodiments of the present application, unless otherwise specified, "plurality" means two or more.

[0067] The following describes the port machinery edge computing device in this embodiment:

[0068] The following problems exist in real scenarios: port machinery equipment needs to be individually designed according to the specific needs of each customer, and each device uses electrical components of different specifications, which makes equipment networking and on-site communications extremely complicated.

[0069] like Figure 1 As shown, Figure 1 This is the architecture diagram of the port machinery edge computing device provided for this application.

[0070] Several bus data processing systems (such as bus data processing system A, bus data processing system B, bus data processing system C in the figure), switching chips (Ethernet switching chip in the figure):

[0071] Taking the bus data processing system A in this embodiment as an example, the bus data processing system is described in detail;

[0072] The bus data processing system A comprises:

[0073] Microcontroller unit (MCU for profinet bus data processing in the figure) is used for:

[0074] 1. Process the corresponding bus protocol and data;

[0075] Each microcontroller unit is responsible for parsing and processing the data transmitted via the Profinet bus, including receiving, decoding, responding to data and executing the corresponding bus protocol.

[0076] 2. Perform data read and write operations in the corresponding storage area (the acquisition gateway monitoring data mapping storage unit in the figure);

[0077] It should be noted that each microcontroller unit has its own independent storage area, and the chip in this storage area is used for data exchange mapping sharing among the microcontroller units.

[0078] 3. When the data in the corresponding storage area is changed, a synchronization instruction is broadcast to the microcontroller units of other bus data processing systems. The microcontroller units that receive the synchronization instruction will update the data in their corresponding storage areas according to the instruction to ensure data synchronization with the storage areas managed by the microcontroller unit that issued the instruction.

[0079] 4. Receive synchronization instructions, update the storage area, and ensure data synchronization with the storage area managed by the microcontroller unit that issued the instruction.

[0080] The slave station protocol stack chip (the slave station chip in the figure) is used to implement the parsing and processing of the corresponding slave station protocol;

[0081] It should be noted that in order to optimize system performance and reduce the processing pressure of the microcontroller unit, each slave protocol stack chip is specially designed to handle the slave protocol of a specific bus. This means that for each bus protocol, such as Profinet, there will be a corresponding slave protocol stack chip to handle protocol parsing to reduce the load on the microcontroller unit.

[0082] The profinet bus is connected to the microcontroller unit through the slave protocol stack chip, that is, the data received by the microcontroller unit is the data processed by the slave protocol stack chip.

[0083] A master control unit is a master station protocol stack integrated into the central processing unit of the master control unit, which is used to control the bus data processing system to access the slave station device in the master station mode, and the master control unit is also configured to be accessed by at least one external device in the slave station mode, and each control unit can work in the master and slave station modes at the same time;

[0084] In master mode, the master control unit manages and monitors slave devices on the network through its master protocol stack. It can send instructions and data requests, receive data messages from slaves, and perform corresponding processing and decisions based on the status or data of the slaves. When acting as a slave, the master control unit can respond to requests from external devices. This includes receiving commands from the master, processing these commands, and returning corresponding data or status information to the requesting master.

[0085] In actual use, the main control unit is connected to two buses at the same time. One bus is used by the main control unit as a master station to access and control slave devices, while the other bus is used by the main control unit as a slave station to receive access requests from external devices as a master station.

[0086] Storage area (the acquisition gateway monitoring data mapping storage unit in the figure) is used to store data;

[0087] Switching chip, used for data exchange between different bus data processing systems.

[0088] It is responsible for transmitting and forwarding the data in the storage area between different bus data processing systems. During operation, the switch chip first receives data from one bus data processing system and temporarily stores it in the storage unit. After that, the switch chip retrieves the corresponding data from the storage unit and sends it to all bus data processing systems to complete the data synchronization.

[0089] It should be noted that the edge computing equipment of this port is used to be integrated on various commonly used field bus communication interfaces.

[0090] In other cases, such as Modbus, Mitsubishi, and other protocol masters do not use slave protocol stack chips, all of which are integrated into the microcontroller unit.

[0091] It can be seen that by integrating multiple bus data processing systems, each data processing system can handle different bus protocols. In this way, a single device can be compatible with multiple communication protocols and adapt to the communication requirements of electrical components of different specifications, thereby greatly reducing the complexity of communication protocols caused by the diversity of devices. The microcontroller unit broadcasts synchronization instructions when data changes to ensure data synchronization in the storage areas of all bus data processing systems. This method reduces the difficulty of data management caused by the personalized design of the equipment and simplifies the maintenance of data consistency.

[0092] In some other embodiments, the bus data processing system A further includes:

[0093] Industrial control display screen, connected to the bus, is used for users to monitor and control devices connected to the port machinery edge computing device.

[0094] PLC is connected to the microcontroller unit and is used to receive control commands and configuration information from the microcontroller unit and perform specific logic control tasks.

[0095] The operation results and device status are fed back to the micro control unit to update the data in the storage area and synchronized and distributed through the main control unit.

[0096] Sensors, connected to PLC, are used to monitor various physical quantities at industrial sites in real time, such as temperature, pressure, flow, etc., and send the collected data to PLC. Through PLC processing, these data can be converted into information that can be used for monitoring and control, and can also be synchronized to other parts of the system through microcontroller units.

[0097] Port machinery edge computing equipment also includes:

[0098] The intranet chip (intranet service processing in the figure) is connected to the switching chip and the internal terminal device, and is used for data transmission between the internal terminal and the bus data processing system;

[0099] The intranet chip is used to realize data exchange and communication between internal terminal devices and the bus data processing system. The internal terminal device can be an industrial computer, a touch screen, or other monitoring equipment. At the same time, it provides a channel for the internal terminal device to access the data in the storage area and allows the internal terminal device to upload data to the bus data processing system.

[0100] Coordinate internal network traffic to ensure efficient and secure data transmission between internal terminals and bus data processing systems.

[0101] The external network chip (the external network processing unit in the figure) is connected to the internal network chip and the external platform, and is used for data transmission between the internal terminal and the external platform.

[0102] The external network chip establishes and manages the communication between the external platform and the bus data processing system. This external platform can be a cloud service, a remote monitoring center or other enterprise IT system, and in this embodiment, it is an IOT platform.

[0103] The external network chip can also provide secure data transmission and access control, ensuring that only authorized external platforms can access or control the resources of the internal network. At the same time, it converts different network protocols so that the internal network devices can be compatible with the different communication standards of the external platform, ensuring the correct analysis and application of data.

[0104] It can be seen that the introduction of the internal network chip realizes efficient data transmission between the internal terminal and the bus data processing system. This design makes the transmission of data in the internal network faster and safer, reduces the dependence on the external network, and improves the locality and response speed of data processing. At the same time, the setting of the external network chip allows data exchange between the internal terminal and the external platform, ensuring the availability and scalability of external communication. The collaborative work of this internal and external network chip provides a solution that balances internal processing efficiency and external communication needs, enhancing the overall performance of edge computing devices in data transmission.

[0105] In some embodiments, the intranet chip communicates with the internal terminal through another Ethernet switch chip, and also has a RAM mapping area and power-off data persistence function;

[0106] Power-off data persistence is achieved using two sets of functions. One set has a dedicated chip with data persistence on the field bus data processing system side. When any part of the data in the RAM mapping area changes (Note: when the content of the RAM mapping of any bus on multiple buses changes, it will be synchronized to the RAM mapping area of ​​each bus in real time), it will be written into the ferroelectric memory in real time (the number of write times of FeRAM can be as high as 10 (14) times and the data retention capacity is 10 years), and at the same time, it will be written into the SSD storage by the intranet business SOC after receiving the power-off signal.

[0107] RAM mapping area is used to temporarily store data received from internal terminal devices or data to be sent to internal terminal devices. It enables data sharing among internal terminal devices, allowing multiple devices to access and use the same data set, thereby ensuring data consistency and real-time updates. It supports high-speed data processing and real-time task execution, because RAM provides random access, which is suitable for frequent read and write operations.

[0108] Off-network data storage is used to save critical data in the event of a network connection loss. This ensures that the data during the loss period can be synchronized after the network is restored, maintaining data integrity and consistency.

[0109] In some embodiments, the internal network chip and the external network chip are connected via a network gateway module, and the external network chip and the external platform are connected via a wireless network.

[0110] The Gatekeeper module is used to ensure a secure boundary between the intranet and the extranet. The Gatekeeper can prevent potential network attacks and unauthorized access while allowing legitimate data transmission.

[0111] It should be noted that in this embodiment, network communication is subdivided into three specialized levels, each of which uses a specific network type to handle different communication requirements:

[0112] 1. It is the fieldbus layer network. This layer is specifically used to realize the communication between bus data processing systems. It is also responsible for the data exchange between the bus data processing system and the intranet chip. All communication activities at this layer are based on the protocols and technical standards of the fieldbus layer network.

[0113] 2. Internal business processing network, which connects the internal network chip with the internal terminal device to ensure efficient communication between them. In addition, the interaction between the internal network chip and the RAM mapping area and the communication with the disconnected data storage are also carried out through the internal business processing network. This network level focuses on data collection, processing and secure storage.

[0114] 3. External communication network: The external network chip uses the external communication network to communicate with various external platforms (such as the Internet of Things platform, video platform, etc.), ensuring safe and efficient data interaction with the outside world.

[0115] The following describes various bus communication methods in this embodiment:

[0116] It should be noted that the response speed required by bus protocols such as Profinet, Profibus, Ethercat, Modbus-RTU, etc. is very high (usually a data packet needs to be exchanged within 1 to 20 milliseconds);

[0117] Therefore, in some embodiments, the port machinery edge computing device and various bus communication methods all adopt a CPU architecture, allowing these different bus protocols to be processed in parallel on multiple CPUs to solve the above-mentioned problems.

[0118] However, this raises a new technical problem. Since each bus protocol is distributed on each CPU and processed independently, the data exchange between CPUs also requires the design of a corresponding high-speed communication solution.

[0119] like Figure 2 As shown, Figure 2 A flowchart of various bus communication methods provided in this application.

[0120] S101, when different bus data processing systems communicate, the first bus data processing system responsible for outputting data in this communication stores the communication data in a first storage area of ​​the first bus data processing system; the bus data processing system can work independently; the work includes communication, data transmission and reception, and data collection, conversion and redirection completed automatically according to the content of script programming; the first bus data processing system is one or more bus data processing systems;

[0121] The first bus data processing system refers to a device responsible for outputting data, which can process a specific type of communication protocol and send data; the second bus data processing system refers to a device responsible for receiving data, which can also process the corresponding communication protocol to obtain data.

[0122] It should be noted that the first bus data processing system may be one or more types, and the second bus data processing system may also be one or more types.

[0123] refer to Figure 3 , Figure 3 A schematic diagram for understanding the various bus communication methods provided in this application.

[0124] exist Figure 3A bus data processing system includes PHY (physical layer), slave station protocol stack, integrated master station protocol stack and PHY. It should be noted that the bus data processing system design allows for diversity, and it only needs to include a microcontroller unit, a slave station protocol stack chip, a master control unit, or hardware with the same functions as these hardware, and is not limited here.

[0125] S102, mapping the area storing communication data in the first storage area to the second storage area of ​​the second bus data processing system responsible for inputting data in this communication; the second bus data processing system is one or more bus data processing systems;

[0126] Shared RAM Mapping refers to a technology in which two or more different processors or devices can access the same physical memory area in a computer system. This is usually used to achieve fast data exchange and communication between different hardware components or processing units.

[0127] In a multi-bus data processing system communication system, shared RAM mapping allows data to be efficiently shared and transferred between different buses. Such a mapping area is usually designed as a fixed area in memory, and all buses or processors that need to access shared data are configured to access this memory area.

[0128] It should be noted that this step is not a shared storage area. A shared storage area is a storage area shared by all bus data processing systems, while in this step each bus data processing system has its own independent storage area.

[0129] S103, updating the data in all storage areas except the first storage area to be synchronized with the data in the first storage area.

[0130] The first bus data processing system will notify or trigger other related bus data processing systems to update their storage area data. This update process is automatic and is usually related to data synchronization technology, such as a publish / subscribe mechanism, to ensure that the data of all bus data processing systems can be consistent with the data in the first storage area, thereby avoiding errors that may be caused by inconsistent data.

[0131] S104, the second bus data processing system reads the communication data from the second storage area in the second bus data processing system;

[0132] The second bus data processing system needs to use or process the received data, and it will read the communication data from the second storage area. This reading operation may involve decoding, verification and further processing of the data to adapt to the application logic of the second bus data processing system.

[0133] It should be noted that when communicating in different bus data processing systems, the storage area can be designed to share the same address code. This means that multiple systems can access the same memory address area, thereby achieving data sharing. This design allows different systems to exchange information and synchronize status by reading and writing the same memory location, optimizing the efficiency of data processing.

[0134] It can be seen that each bus data processing system is equipped with an exclusive independent storage area, which avoids the phenomenon of queuing for storage areas between multiple bus data processing systems, reduces the waiting time for each other, and improves the data access speed. When any bus data processing system needs to communicate with another system, its communication data is stored and synchronized to the corresponding storage area of ​​the other system. The real-time consistency of the data is ensured, and the delays and inconsistencies that may occur during the data exchange process are avoided. Since each bus data processing system reads data from its own independent storage area, the data access speed is accelerated, and the conflicts and errors in the data processing process are reduced. In short, the communication speed is improved, and the system response delay is avoided, thereby affecting the operation efficiency and the safety of equipment operation.

[0135] The communication process of different bus data processing systems is:

[0136] Power-on initialization synchronization:

[0137] When powered on normally, the business processing system (refer to Figure 1 Intranet business processing in the Figure 1 The contents of the storage area are read from the RAM mapping area in the memory.

[0138] After reading, the business processing system synchronizes this data to all microcontroller units (MCUs) in the bus data processing system. This step ensures that all MCUs have consistent data when starting up.

[0139] Data synchronization in normal communication mode:

[0140] During normal communication, if any microcontroller unit receives new data, the MCU will update the data in its shared memory area (storage area).

[0141] While updating the data, the micro control unit will send synchronization packets to other MCUs and the business processing system in the bus data processing system.

[0142] This synchronization includes the updated data, thus ensuring the consistency of the contents of the RAM mapping area of ​​all MCUs and business processing systems.

[0143] Data processing for read operations:

[0144] When any microcontroller receives a request to read or send data, it reads the required content directly from its own storage area and sends it out immediately.

[0145] Since this is a read operation, it does not change the contents of the storage area, so no data synchronization operation is required.

[0146] This step ensures fast data response while reducing unnecessary network traffic and processing delays, improving the efficiency of the entire system.

[0147] The above communication process can refer to Figure 4 , Figure 4 Another schematic diagram for understanding the various bus communication methods provided by the present application.

[0148] The solid line part is a schematic diagram of normal communication;

[0149] When the first bus data processing system (the upper left MCU) communicates with the second bus data processing system (the upper middle MCU), the communication data of the first bus data processing system is stored in the first storage area of ​​the first bus data processing system. The first bus data processing system is the bus data processing system responsible for outputting data in this communication, and the second bus data processing system is the bus data processing system responsible for inputting data in this communication.

[0150] The first bus data processing system sends a notice to all other first bus data processing systems to update the data in all storage areas except the first storage area to be synchronized with the data in the first storage area.

[0151] The second bus data processing system reads the communication data from the second storage area in the second bus data processing system.

[0152] In actual use, there will be multiple communication scenarios, that is, there are different types of network communication needs in one environment.

[0153] After step S104, the method further includes:

[0154] refer to Figure 4 S105: when the business processing system and the third bus data processing system communicate with each other, a tunnel is established between the business processing system and the third bus data processing system; the business processing system is a processing system that performs preset tasks in this communication, and the third bus data processing system is a bus data processing system that cooperates in performing preset tasks in this communication, and the tunnel is used for direct communication between the business processing system and the third bus data processing system;

[0155] In other embodiments, the service processing system is any bus data processing system, which needs to be processed through the intranet chip in the above embodiment (refer to Figure 1 ) establishes a tunnel with other third bus data processing systems.

[0156] Because the intranet chip can provide specialized security features, such as hardware-level encryption and authentication mechanisms, to ensure that the tunnel established between bus data processing systems is secure.

[0157] In some embodiments, the service processing system is the intranet chip in the above embodiments (refer to Figure 1 ).

[0158] The intranet chip is used to realize data exchange and communication between internal terminal devices and the bus data processing system. The internal terminal device can be an industrial computer, a touch screen, or other monitoring equipment. At the same time, it provides a channel for the internal terminal device to access the data in the storage area and allows the internal terminal device to upload data to the bus data processing system.

[0159] In actual use, when using the tunnel communication mode, there are two possibilities for data transmission according to the executed script instructions: one is that the data is directly transmitted only between the two bus data processing systems without passing through any shared area mapped to the RAM; the other is that while the data is transmitted between the two bus data processing systems, it is also sent to the shared area of ​​the RAM so as to be shared with the system connected to the other bus data processing system.

[0160] The first case: S106, when data sharing is not required, the business processing system communicates with the third bus data processing system;

[0161] This method can be implemented through direct memory access (DMA) or a dedicated data channel. Data transfer does not require CPU intervention and does not occupy shared RAM area.

[0162] Second situation: S107, when data sharing is required, the business processing system stores the business data in the business storage area of ​​the business bus data processing system;

[0163] It should be noted that the second situation also includes step S106.

[0164] The business data is directly transmitted from the business processing system to the third bus data processing system through a tunnel.

[0165] S108, mapping the area storing the service data in the service storage area to the third storage area of ​​the third bus data processing system;

[0166] Data is also written to a predefined shared area of ​​RAM.

[0167] Other bus data processing systems can access this shared RAM area to read data.

[0168] S109, updating the data in all storage areas except the third storage area to be synchronized with the data in the third storage area.

[0169] It can be seen that the business processing system can flexibly establish a path for direct access to the field bus for different communication scenarios. Using the virtual tunnel, the business processing system will not only update its own mapping storage area after receiving the bus data, but also broadcast to notify other bus processors to synchronously update their mapping storage areas. This instant broadcast synchronization mechanism ensures data consistency in each processor and avoids business errors and processing delays caused by inconsistent data.

[0170] refer to Figure 5 , Figure 5 Another schematic diagram for understanding the various bus communication methods provided by the present application. In some embodiments, the following steps are also included:

[0171] 1. Trigger warning signals when power fluctuates or fails;

[0172] 2. Sending an interrupt signal in response to a warning signal;

[0173] 3. Interrupt the current task and call the interrupt service routine;

[0174] 4. Prioritize all write cache data to ensure that all data to be written is written back to the storage medium.

[0175] Correspondingly, the port machinery edge computing equipment includes power supply, backup power supply, power detection module, SSD data storage module, intranet chip (intranet business SOC in the figure), RAM storage (part of the bus data processing system, here refers to the working end)

[0176] The power supply is connected to the port's power grid to provide a stable power supply to the edge computing equipment.

[0177] Backup power supplies provide a short burst of power when the main power fails, allowing equipment to shut down safely or maintain critical operations.

[0178] The power detection module is able to detect power outages and voltage fluctuations and trigger emergency response procedures through internal logic.

[0179] The internal network chip interrupts the current task and calls the interrupt service routine.

[0180] The SSD data storage module provides fast data caching, supports high-speed data processing and temporary storage of working data.

[0181] refer to Figure 6 , Figure 6 Another schematic diagram for understanding the various bus communication methods provided by the present application. In some embodiments, the following steps are also included:

[0182] 3. Save the data to be uploaded to the preset cache area (cache thread in the figure);

[0183] 4. Send the data to be uploaded in the buffer area to the terminal device;

[0184] 5. Receive reply instructions from the terminal device;

[0185] 6. When the data upload is confirmed to be successful according to the reply instruction, remove the data to be uploaded from the cache area;

[0186] 7. When the data upload fails according to the reply instruction, the data to be uploaded is added to the sending queue.

[0187] It can be seen that the data to be uploaded is first saved to the preset cache area, which realizes the temporary storage of data before uploading, thereby ensuring the stability and reliability during the data upload process. Then the data in the cache area is sent to the terminal device, and the reply instruction from the terminal device is received, which enables the data flow and status during the upload process to be monitored. After the data is successfully uploaded, the data is removed from the cache area to avoid repeated transmission and improve the data processing efficiency. If the data upload fails, the data to be uploaded is added to the sending queue, which ensures the continuity of the upload task and the integrity of the data without loss, and improves the fault tolerance for abnormal situations.

[0188] In some other embodiments, after step 7, the method further includes:

[0189] 8. When a network disconnection is detected, all data in the cache area is written into a preset cache database;

[0190] 9. When the network connection is restored, the written data is sent from the preset cache database to the cache area.

[0191] It can be seen that when the network connection is detected to be disconnected, the data in the cache area will not be discarded directly, but written to the preset cache database. This ensures the security of data when the network is unstable or interrupted and prevents data loss. Once the network connection is restored, the previous data can be extracted from the preset cache database and sent to the cache area to continue the previous upload task, ensuring the continuity of data upload.

[0192] In some other embodiments, after step S203, the method further includes:

[0193] 1. All bus data processing systems periodically generate verification data for their respective storage areas;

[0194] Each bus data processing system regularly calculates hash values ​​for the data in the storage area it is responsible for. Hash values ​​are a type of data fingerprint, usually calculated by a hash function. For the same piece of data, the same hash value is always generated.

[0195] 2. All bus data processing systems exchange, compare and verify data;

[0196] After generating the hash value, each bus data processing system sends its calculated hash value to other systems for comparison. Each system receives the hash values ​​from other systems and compares them with its own hash value.

[0197] 3. In the case of inconsistent verification data, identify the storage area group that shares the same verification data;

[0198] If all hash values ​​match during the comparison, the data of all nodes is considered consistent. If the hash values ​​do not match, the system will divide the storage areas into several groups based on the hash values. The storage areas in each group have the same hash value, which means that their data is currently consistent.

[0199] 4. The storage area in the largest group with the same verification data is marked as the correct storage area, and the remaining storage areas are marked as the wrong storage areas;

[0200] In the case of multiple groups, the system considers the group with the largest number (i.e., the largest group with the same hash value) to represent the correct data state, because it is the most likely correct data under the majority voting principle. The remaining storage areas, i.e., those that are not in the largest group, are marked as incorrect storage areas because their data is inconsistent with the data of the majority storage areas.

[0201] 5. Update the error storage area to synchronize with the data in the correct storage area.

[0202] Once the error storage areas are identified, the data in these error storage areas are updated to synchronize with the data in the correct storage areas.

[0203] In the above embodiment, the majority consensus principle is adopted. In other embodiments, the weight and the majority consensus principle can be combined for further inspection.

[0204] The method further comprises the steps of:

[0205] 1. Assign a weight to each bus data processing system. The weight can be based on a variety of factors, such as the node's historical reliability, processing power, network bandwidth, geographic location, etc. The weight information is shared among all nodes for use when comparing and verifying data.

[0206] 2. Each bus data processing system periodically calculates a hash value for the data in its storage area and records the hash value together with its own weight.

[0207] 3. Each bus data processing system collects information from other nodes and compares all hash values.

[0208] 4. For a unique hash value, the bus data processing system calculates its corresponding total weight score, which is the sum of the weights of all nodes that provide this hash value.

[0209] 5. Select the group with the largest number of nodes as the correct storage area group.

[0210] It can be seen that all bus data processing regularly generates and exchanges verification data for comparison with their respective storage areas. This process provides a dynamic monitoring and self-correction mechanism for data consistency. When the verification data is inconsistent, it can identify and form the correct storage area group, and then update the data of the erroneous storage area to a state synchronized with the correct storage area. This not only improves the reliability of data consistency, but also enhances the self-healing ability in the face of potential data inconsistency errors, ensuring the accuracy of data processing and stable operation.

[0211] refer to Figure 7 , an embodiment of the present application provides a port machinery edge computing device, the port machinery edge computing device comprising:

[0212] The present application also discloses a port machinery edge computing device. Figure 7 , is a schematic diagram of a physical device of a port machinery edge computing device provided in the present application. The computer 700 may include: at least one processor 701, at least one network bus data processing system 704, a user bus data processing system 703, a memory 705, and at least one communication bus 702.

[0213] The communication bus 702 is used to realize the connection and communication between these components.

[0214] The user bus data processing system 703 may include a display screen (Display) and a camera (Camera). Optionally, the user bus data processing system 703 may also include a standard wired bus data processing system and a wireless bus data processing system.

[0215] The network bus data processing system 704 may optionally include a standard wired bus data processing system and a wireless bus data processing system (such as a WI-FI bus data processing system).

[0216] Among them, the processor 701 may include one or more processing cores. The processor 701 uses various bus data processing systems and lines to connect various parts of the entire server, and executes various functions of the server and processes data by running or executing instructions, programs, code sets or instruction sets stored in the memory 705, and calling data stored in the memory 705. Optionally, the processor 701 can be implemented in at least one hardware form of digital signal processing (Digital Signal Processing, DSP), field programmable gate array (Field-Programmable Gate Array, FPGA), and programmable logic array (Programmable Logic Array, PLA). The processor 701 can integrate one or a combination of a central processing unit (Central Processing Unit, CPU), a graphics processing unit (Graphics Processing Unit, GPU), and a modem. Among them, the CPU mainly processes the operating system, user interface, and application programs; the GPU is responsible for rendering and drawing the content to be displayed on the display screen; and the modem is used to process wireless communications. It can be understood that the above-mentioned modem may not be integrated into the processor 701, and it can be implemented separately through a chip.

[0217] Among them, the memory 705 may include a random access memory (Random Access Memory, RAM) and may also include a read-only memory (Read-Only Memory). Optionally, the memory 705 includes a non-transitory computer-readable storage medium. The memory 705 can be used to store instructions, programs, codes, code sets or instruction sets. The memory 705 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as a touch function, a sound playback function, an image playback function, etc.), instructions for implementing the above-mentioned method embodiments, etc.; the data storage area may store data involved in the above-mentioned method embodiments, etc. The memory 705 may optionally be at least one storage device located away from the aforementioned processor 701. Refer to Figure 7 , the memory 705 as a computer storage medium may include an operating system, a network communication module, a user bus data processing system module and various bus communication applications.

[0218] exist Figure 7In the computer 700 shown, the user bus data processing system 703 is mainly used to provide a bus data processing system for user input and obtain the data input by the user; and the processor 701 can be used to call a variety of bus communication applications stored in the memory 705. When executed by one or more processors 701, the computer 700 executes one or more of the methods described in the above embodiments. It should be noted that for the aforementioned method embodiments, for the sake of simple description, they are all expressed as a series of action combinations, but those skilled in the art should know that the present application is not limited by the described action sequence, because according to the present application, some steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required for the present application.

[0219] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0220] In the several embodiments provided in this application, it should be understood that the disclosed device can be implemented in other ways. For example, the device embodiments described above are only schematic, such as the division of units, which is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some service bus data processing system, indirect coupling or communication connection of devices or units, which can be electrical or other forms.

[0221] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0222] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0223] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable memory. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, which is stored in a memory and includes several instructions for a computer device (which can be a personal computer, server or network device, etc.) to execute all or part of the steps of the various embodiments of the present application. The aforementioned memory includes: various media that can store program codes, such as USB flash drives, mobile hard drives, magnetic disks or optical disks.

[0224] The above is only an exemplary embodiment of the present disclosure and cannot be used to limit the scope of the present disclosure. That is, any equivalent changes and modifications made according to the teachings of the present disclosure are still within the scope of the present disclosure. After considering the disclosure of the specification and the truth of practice, those skilled in the art will easily think of other embodiments of the present disclosure.

[0225] This application is intended to cover any variation, use or adaptation of the present disclosure, which follows the general principles of the present disclosure and includes common knowledge or customary technical means in the art not described in the present disclosure. The description and examples are to be regarded as exemplary only, and the scope and spirit of the present disclosure are defined by the claims.

Claims

1. A multi-bus communication method, characterized in that: include: In the case where different bus data processing systems communicate, the first bus data processing system responsible for outputting data in this communication stores the communication data in the first storage area of ​​the first bus data processing system; the bus data processing system can work independently; the work includes communication, data transmission and reception, and self-completion of data collection, conversion and redirection according to the content of script programming; the first bus data processing system is one or more bus data processing systems; Mapping the area storing communication data in the first storage area to the second storage area of ​​the second bus data processing system responsible for inputting data in this communication; The second bus data processing system is one or more bus data processing systems; Updating data in all storage areas except the first storage area to be synchronized with the data in the first storage area; The second bus data processing system reads the communication data from a second storage area in the second bus data processing system.

2. The multi-bus communication method according to claim 1, characterized in that: After the step of the second bus data processing system reading the communication data from the second storage area in the second bus data processing system, the method further comprises: when the business processing system and the third bus data processing system communicate with each other, establishing a tunnel between the business processing system and the third bus data processing system; the business processing system is a processing system that performs a preset task in this communication, the third bus data processing system is a bus data processing system that cooperates in performing the preset task in this communication, and the tunnel is used for direct communication between the business processing system and the third bus data processing system; In the case where data sharing is not required, the business processing system communicates with the third bus data processing system; In the case where data sharing is required, the business processing system stores the business data in a business storage area in the bus data processing system; Mapping the area storing the service data in the service storage area to the third storage area of ​​the third bus data processing system; The data in all storage areas except the third storage area are updated to be synchronized with the data in the third storage area.

3. The multi-bus communication method according to claim 1, characterized in that: After the step of the second bus data processing system reading the communication data from the second storage area in the second bus data processing system, the method further comprises: saving the data to be uploaded to a preset buffer area; Sending the data to be uploaded in the buffer area to the terminal device; receiving a reply instruction from the terminal device; When confirming that the data upload is successful according to the reply instruction, removing the data to be uploaded from the buffer area; When it is confirmed according to the reply instruction that the data upload fails, the data to be uploaded is added to a sending queue.

4. The multi-bus communication method according to claim 3, characterized in that: After the step of adding the data to be uploaded into a sending queue when confirming that the data upload fails according to the reply instruction, the method further includes: When a network disconnection is detected, all data in the cache area is written into a preset cache database; When the network connection is restored, the written data is sent from the preset cache database to the cache area.

5. The multi-bus communication method according to claim 1, characterized in that: After the step of updating the data of all storage areas except the first storage area to be synchronized with the data in the first storage area, the method further comprises: All bus data processing systems periodically generate verification data for their respective storage areas; All bus data processing systems exchange and compare the verification data; In case the verification data are inconsistent, identifying a group of storage areas that share the same verification data; The storage areas in the largest group having the same verification data are identified as correct storage areas, and the remaining storage areas are identified as incorrect storage areas; The error storage area is updated to be synchronized with the data in the correct storage area.

6. A port machinery edge computing device, applied to the method according to any one of claims 1 to 5, characterized in that: Port machinery edge computing equipment includes several bus data processing systems and switching chips: Wherein the bus data processing system comprises: A microcontrol unit is used to process the corresponding bus protocol and data; and to perform the reading and writing data operations of the corresponding storage area. When the data in the corresponding storage area is changed, a synchronization instruction is broadcast to the microcontrol units of other bus data processing systems; the microcontrol unit that receives the synchronization instruction will update the data in its corresponding storage area according to the instruction to ensure data synchronization with the storage area managed by the microcontrol unit that issued the instruction; Slave station protocol stack chip, used to implement the parsing and processing of the corresponding slave station protocol; The main control unit is a master station protocol stack integrated into the central processing unit of the main control unit, which is used to control the bus data processing system to access the slave station device in the master station mode, and the main control unit is also configured to be accessed by at least one external device in the slave station mode; each control unit can work in the master and slave station modes at the same time; A storage area for storing data; The switching chip is used for data exchange between different bus data processing systems.

7. The port machinery edge computing device according to claim 6, characterized in that: Port machinery edge computing equipment also includes: An intranet chip, connected to the switching chip and the internal terminal device, and used for data transmission between the internal terminal and the bus data processing system; The external network chip is connected to the internal network chip and the external platform and is used for data transmission between the internal terminal and the external platform.

8. A port machinery edge computing device, characterized in that: include: one or more processors and memory; The memory is coupled to the one or more processors, and the memory is used to store computer program codes, wherein the computer program codes include computer instructions, and the one or more processors call the computer instructions to enable the port machinery edge computing device to execute the method according to any one of claims 1 to 5.

9. A computer-readable storage medium comprising instructions, characterized in that: When the instruction is executed on the port machinery edge computing device, the port machinery edge computing device executes the method according to any one of claims 1 to 5.

10. A computer program product, characterized in that When the computer program product runs on a port machinery edge computing device, the port machinery edge computing device is enabled to execute the method according to any one of claims 1 to 5.

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