A compact frequency divider for multi-band devices

Abstract

The present invention discloses a small frequency divider for multi-band equipment, which relates to the technical field of frequency dividers applied to radio frequency front-end circuits, comprising an LTCC ceramic body, a circuit layer in the LTCC ceramic body and an external electrode at the bottom of the LTCC ceramic body, wherein the external electrode comprises a common port (1), a low-frequency channel output port (2), a high-frequency channel output port (3) and a ground port (4), and the external electrode is connected to the circuit layer via a via. The present invention solves the problem that a traditional frequency divider easily causes mutual coupling between lumped components, generates unnecessary parasitic parameters, thereby causing a decrease in the Q value of a filter circuit, an increase in insertion loss, and a decrease in isolation between a low-frequency channel and a high-frequency channel.

Description

Technical Field

[0001] The present invention relates to the technical field of frequency dividers applied to radio frequency front-end circuits, and in particular to a small frequency divider used for multi-band equipment. Background Art

[0002] At present, microwave systems are developing towards high integration, high performance and small size. Two or more channels are often integrated in one system, and some of these channels require two-way communication. In order to reduce the system size and reduce the total power consumption of the system, the receiver and transmitter usually share a set of antenna and feeder systems. In order to prevent the signal emitted by the transmitter from being directly coupled to the front end of the receiver through the antenna feed system, causing the receiver to work in a deep saturation state, thereby affecting the normal operation of the entire system, it is necessary to add a three-port device consisting of two filters between the antenna and the transceiver front end-a frequency divider. Its working principle is to extract the signals of multiple working frequency bands on the common port and output them to the ports of the corresponding frequency bands at different frequencies. The frequency divider not only requires that the signals in each frequency band can pass through with low loss, but also requires a high degree of isolation between the channels, thereby reducing the mutual coupling between the receiving channel and the transmitting channel and improving the system performance.

[0003] Traditional frequency divider structures are mostly based on LC low-pass filters and high-pass or band-pass filter circuit designs. The low-pass filter channel allows relatively low-frequency signals to pass through and suppresses relatively high-frequency signals, while the high-pass or band-pass filter channel allows relatively high-frequency signals to pass through and suppresses relatively low-frequency signals. Because two filter channels need to be integrated into a single device and high isolation needs to be achieved between channels, traditional frequency dividers are often large in size.

[0004] In recent years, the emergence of new materials and process technologies such as micro-electromechanical system technology, high-temperature superconducting technology, low-temperature co-fired ceramic technology, photonic bandgap structure, and microwave monolithic integrated circuits has promoted the continuous improvement of RF passive components such as frequency dividers and filters from performance to volume. Some components can already achieve the size of conventional surface-mount resistors, capacitors, and inductors. However, integrating multiple inductors and capacitors in such a compact space to achieve the function of a dual-channel filter can easily cause mutual coupling between lumped components and generate unnecessary parasitic parameters, thereby reducing the Q value of the filter circuit, increasing insertion loss, and reducing the isolation between the low-frequency channel and the high-frequency channel. Summary of the invention

[0005] In view of the above-mentioned deficiencies in the prior art, the present invention provides a small frequency divider for multi-band equipment, which solves the problem that traditional frequency dividers are prone to cause mutual coupling between lumped components, generate unnecessary parasitic parameters, thereby causing the Q value of the filter circuit to decrease, the insertion loss to increase, and the isolation between the low-frequency channel and the high-frequency channel to decrease.

[0006] In order to achieve the above-mentioned purpose of the invention, the technical solution adopted by the present invention is: a small frequency divider for multi-band equipment, including an LTCC ceramic body, a circuit layer inside the LTCC ceramic body and an external electrode at the bottom of the LTCC ceramic body, the external electrode including a common port, a low-frequency channel output port, a high-frequency channel output port and a ground port, and the external electrode is connected to the circuit layer through a via.

[0007] The beneficial effect of the above scheme is: the present invention provides a small frequency divider for multi-band equipment, which has a multi-layer circuit structure, is buried in an extremely small packaging volume and realizes the dual-channel function of a high-performance frequency divider at the same time, minimizes the mutual coupling between lumped components in an extremely small space, reduces the influence of parasitic parameters, and solves the problem that traditional frequency dividers are prone to cause mutual coupling between lumped components and generate unnecessary parasitic parameters, thereby causing the Q value of the filter circuit to decrease, the insertion loss to increase, and the isolation between the low-frequency channel and the high-frequency channel to decrease.

[0008] Furthermore, the circuit layer includes a low-frequency channel filter and a high-frequency channel filter, and both the low-frequency channel filter and the high-frequency channel filter are connected to a common port.

[0009] Further, the low-frequency channel filter includes a first equivalent inductor L1, a second equivalent inductor L2 and a first equivalent capacitor C1, and the high-frequency channel filter includes a third equivalent inductor L3, a fourth equivalent inductor L4, a second equivalent capacitor C2, a third equivalent capacitor C3, a fourth equivalent capacitor C4 and a fifth equivalent capacitor C5;

[0010] One end of the first equivalent inductor L1 is connected to the common port, and the other end thereof is respectively connected to one end of the first equivalent capacitor C1 and one end of the second equivalent inductor L2, the other end of the first equivalent capacitor C1 is connected to the ground port, and the other end of the second equivalent inductor L2 is connected to the low-frequency channel output port;

[0011] One end of the second equivalent capacitor C2 is respectively connected to the common port and one end of the fourth equivalent capacitor C4, and the other end thereof is respectively connected to one end of the third equivalent capacitor C3 and one end of the third equivalent inductor L3, the other end of the third equivalent inductor L3 is connected to the ground port, the other end of the third equivalent capacitor C3 is respectively connected to the other end of the fourth equivalent capacitor C4, one end of the fourth equivalent inductor L4 and one end of the fifth equivalent capacitor C5, and the other end of the fourth equivalent inductor L4 and the other end of the fifth equivalent capacitor C5 are both connected to the high-frequency channel output port.

[0012] The beneficial effect of the above further solution is that the present invention respectively embeds the above inductor and capacitor components into twelve circuit layers in the ceramic body, and has the microwave characteristics of miniature, high Q value and wide stopband.

[0013] Further, the circuit layer includes, from top to bottom, a first circuit layer, a second circuit layer, a third circuit layer, a fourth circuit layer, a fifth circuit layer, a sixth circuit layer, a seventh circuit layer, an eighth circuit layer, a ninth circuit layer, a tenth circuit layer, an eleventh circuit layer, and a twelfth circuit layer;

[0014] The first circuit layer includes a first electrode plate, a second electrode plate, a third electrode plate, a first via hole (H1), a second via hole, a third via hole and a fourth via hole;

[0015] The second circuit layer includes a fourth electrode plate, a fifth electrode plate, a sixth electrode plate, a second via hole (H2), a third via hole, a fourth via hole, a fifth via hole and a sixth via hole;

[0016] The third circuit layer includes a seventh electrode plate, an eighth electrode plate, a ninth electrode plate, a second via hole, a third via hole, a sixth via hole, a seventh via hole and an eighth via hole;

[0017] The fourth circuit layer includes a tenth electrode plate, an eleventh electrode plate, a twelfth electrode plate, a third via hole, an eighth via hole, a ninth via hole, a tenth via hole and an eleventh via hole;

[0018] The fifth circuit layer includes a thirteenth electrode plate, a fourteenth electrode plate, a third via hole, an eighth via hole, a ninth via hole, a tenth via hole, a twelfth via hole and a thirteenth via hole;

[0019] The sixth circuit layer includes a fifteenth electrode plate, a sixteenth electrode plate, a seventeenth electrode plate, a third via hole, an eighth via hole, a ninth via hole, a tenth via hole, a fourteenth via hole and a fifteenth via hole;

[0020] The seventh circuit layer includes an eighteenth electrode plate, a nineteenth electrode plate, a third via hole, an eighth via hole, a ninth via hole, a tenth via hole, a fifteenth via hole, a sixteenth via hole and a seventeenth via hole;

[0021] The eighth circuit layer includes a twentieth electrode plate, a twenty-first electrode plate, an eighth via hole, a ninth via hole, a tenth via hole, a fifteenth via hole, a seventeenth via hole, an eighteenth via hole and a nineteenth via hole;

[0022] The ninth circuit board includes a twenty-second electrode plate, a twenty-third electrode plate, an eighth via hole, a ninth via hole, a tenth via hole, a fifteenth via hole, a seventeenth via hole, and a twentieth via hole;

[0023] The tenth circuit layer includes a twenty-fourth electrode plate, a twenty-fifth electrode plate, a twenty-sixth electrode plate, an eighth via hole, a tenth via hole, a fifteenth via hole, a twenty-first via hole, and a twenty-second via hole;

[0024] The eleventh circuit layer includes a twenty-seventh electrode plate, an eighth via hole, a tenth via hole, a fifteenth via hole, a twenty-first via hole, and a twenty-second via hole;

[0025] The twelfth circuit layer includes a twenty-eighth electrode plate, an eighth via hole, a fifteenth via hole, a twenty-first via hole, and a twenty-second via hole;

[0026] The first electrode plate, the fourth electrode plate, the seventh electrode plate, the tenth electrode plate, the eleventh electrode plate and the twenty-fourth electrode plate are connected end to end in sequence via the second via hole, the first via hole, the fifth via hole, the seventh via hole, the ninth via hole and the twenty-first via hole, and together form a first equivalent inductance L1;

[0027] The thirteenth electrode plate, the fifteenth electrode plate, the eighteenth electrode plate, the twentieth electrode plate, and the twenty-second electrode plate are connected end to end in sequence via the tenth via hole, the twelfth via hole, the fourteenth via hole, the sixteenth via hole, the eighteenth via hole, and the eighth via hole, and together form a second equivalent inductance L2;

[0028] The 25th electrode plate and the 28th electrode plate are connected via the tenth via hole and are coupled with the 27th electrode plate through interlayer coupling to form a first equivalent capacitor C1;

[0029] The twelfth electrode plate, the thirteenth electrode plate and the seventeenth electrode plate are connected end to end via the eleventh via hole, the thirteenth via hole and the fifteenth via hole in sequence, and together form a third equivalent inductance L3;

[0030] The 21st electrode plate, the 23rd electrode plate and the 26th electrode plate are connected end to end via the 19th via hole, the 20th via hole and the 22nd via hole in sequence, and together form a fourth equivalent inductor L4;

[0031] The second electrode plate and the eighth electrode plate are connected via a fourth via hole and are coupled with the sixth electrode plate through interlayer coupling to form a second equivalent capacitor C2;

[0032] The third electrode plate, the fifth electrode plate and the ninth electrode plate are connected via a third via hole and are coupled with the sixth electrode plate through interlayers to form a third equivalent capacitor C3;

[0033] The second electrode plate and the eighth electrode plate are connected via a fourth via hole and are coupled with the fifth electrode plate through interlayer coupling to form a fourth equivalent capacitor C4;

[0034] The sixteenth electrode plate and the nineteenth electrode plate jointly form a fifth equivalent capacitor C5 through interlayer coupling.

[0035] The beneficial effect of the above further scheme is: by reasonably selecting the equivalent component values ​​of the filter and optimizing the coupling relationship of its equivalent components in the vertical space, two equivalent inductors and one equivalent capacitor of the low-frequency channel filter and two equivalent inductors and four equivalent capacitors of the high-frequency channel filter are formed, and a small frequency divider for multi-band equipment is provided, which can layout multiple inductor and capacitor components in an extremely small volume and achieve low loss and high suppression effects at the same time.

[0036] Furthermore, the 22nd electrode plate is also connected to the common port via the eighth via; the 24th electrode plate is also connected to the low-frequency channel output port via the 21st via; the 26th electrode plate is also connected to the high-frequency channel output port via the 22nd via, and the 27th electrode plate is also connected to the ground port via the 27th via.

[0037] Furthermore, the outer electrode is packaged in a planar grid array (LGA).

[0038] The beneficial effect of the above further solution is that the external electrode is placed at the bottom of the LTCC ceramic body using a planar grid array package LGA, and is connected to the circuit layer line inside the LTCC ceramic body through a via hole.

[0039] Furthermore, the small frequency divider further comprises a mark, and the mark and the external electrode are located on the opposite side of the LTCC ceramic body.

[0040] The beneficial effect of the above further solution is that an identification symbol is set on the top of the frequency divider to identify the position of each port.

[0041] Furthermore, the circuit layer is built into the LTCC ceramic body by using a low temperature co-fired ceramic process.

[0042] The beneficial effect of the above further scheme is that the present invention embeds the multi-layer circuit of the frequency divider into the ceramic body based on the low-temperature co-fired ceramic process, realizes the integration of various equivalent components on the three-dimensional circuit substrate, and realizes the miniaturization and high density of the circuit.

[0043] Furthermore, the circuit layer adopts an embedded metal material, and the embedded metal material includes copper or palladium silver.

[0044] The beneficial effect of the above further solution is that the use of the above high conductivity metal material is conducive to improving the quality factor of the circuit system. For example, palladium silver can be used as the embedded metal material, which will not oxidize during the sintering process and does not require electroplating protection. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 It is a schematic diagram of the appearance of the frequency divider of the present invention.

[0046] Figure 2Schematic diagram of the internal structure of the frequency divider of the present invention.

[0047] Figure 3 It is an equivalent principle diagram of the frequency divider of the present invention.

[0048] Figure 4 This is a schematic diagram of the first layer circuit of the frequency divider of the present invention.

[0049] Figure 5 This is a schematic diagram of the second layer circuit of the frequency divider of the present invention.

[0050] Figure 6 This is a schematic diagram of the third layer circuit of the frequency divider of the present invention.

[0051] Figure 7 This is a schematic diagram of the fourth layer circuit of the frequency divider of the present invention.

[0052] Figure 8 This is a schematic diagram of the fifth layer circuit of the frequency divider of the present invention.

[0053] Fig. 9 This is a schematic diagram of the sixth layer circuit of the frequency divider of the present invention.

[0054] Fig.10 This is a schematic diagram of the seventh layer circuit of the frequency divider of the present invention.

[0055] Fig.11 This is a schematic diagram of the eighth layer circuit of the frequency divider of the present invention.

[0056] Fig.12 This is a schematic diagram of the ninth circuit layer of the frequency divider of the present invention.

[0057] Fig.13 This is a schematic diagram of the tenth layer circuit of the frequency divider of the present invention.

[0058] Fig.14 This is a schematic diagram of the eleventh circuit of the frequency divider of the present invention.

[0059] Fig.15 This is a schematic diagram of the twelfth-layer circuit of the frequency divider of the present invention.

[0060] Fig.16 This is an attenuation response curve diagram of the frequency divider of the present invention.

[0061] Fig.17 It is a return loss response curve diagram of the frequency divider of the present invention.

[0062] Wherein: 1. Common port; 2. Low frequency channel output port; 3. High frequency channel output port; 4. Ground port; 5. Identification; P1. First electrode plate; P2. Second electrode plate; P3. Third electrode plate; P4. Fourth electrode plate; P5. Fifth electrode plate; P6. Sixth electrode plate; P7. Seventh electrode plate; P8. Eighth electrode plate; P9. Ninth electrode plate; P10. Tenth electrode plate; P11. Eleventh electrode plate; P12. Twelfth electrode plate; P13. Thirteenth electrode plate; P14. Fourteenth electrode plate; P15. Fifteenth electrode plate; P16. Sixteenth electrode plate; P17. Seventeenth electrode plate; P18. Eighteenth electrode plate; P19. Nineteenth electrode plate;

[0063] P20, twentieth electrode plate; P21, twenty-first electrode plate; P22, twenty-second electrode plate; P23, twenty-third electrode plate; P24, twenty-fourth electrode plate; P25, twenty-fifth electrode plate; P26, twenty-sixth electrode plate; P27, twenty-seventh electrode plate; P28, twenty-eighth electrode plate; H1, first via hole; H2, second via hole; H3, third via hole; H4, fourth via hole; H5, fifth via hole; H6, sixth via hole; H7, the seventh via hole; H8, the eighth via hole; H9, the ninth via hole; H10, the tenth via hole; H11, the eleventh via hole; H12, the twelfth via hole; H13, the thirteenth via hole; H14, the fourteenth via hole; H15, the fifteenth via hole; H16, the sixteenth via hole; H17, the seventeenth via hole; H18, the eighteenth via hole; H19, the nineteenth via hole; H20, the twentieth via hole; H21, the twenty-first via hole; H22, the twenty-second via hole. DETAILED DESCRIPTION

[0064] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0065] like Figure 1 and Figure 2 As shown, a small frequency divider for multi-band devices includes a LTCC ceramic body, a circuit layer in the LTCC ceramic body and an external electrode at the bottom of the LTCC ceramic body, the external electrode includes a common port 1, a low-frequency channel output port 2, a high-frequency channel output port 3 and a ground port 4, and the external electrode is connected to the circuit layer via a via.

[0066] The circuit layer includes a low-frequency channel filter and a high-frequency channel filter, and both the low-frequency channel filter and the high-frequency channel filter are connected to a common port 1 .

[0067] like Figure 3As shown, the low-frequency channel filter includes a first equivalent inductor L1, a second equivalent inductor L2 and a first equivalent capacitor C1, and the high-frequency channel filter includes a third equivalent inductor L3, a fourth equivalent inductor L4, a second equivalent capacitor C2, a third equivalent capacitor C3, a fourth equivalent capacitor C4 and a fifth equivalent capacitor C5;

[0068] One end of the first equivalent inductor L1 is connected to the common port 1, and the other end thereof is respectively connected to one end of the first equivalent capacitor C1 and one end of the second equivalent inductor L2, the other end of the first equivalent capacitor C1 is connected to the ground port 4, and the other end of the second equivalent inductor L2 is connected to the low-frequency channel output port 2;

[0069] One end of the second equivalent capacitor C2 is respectively connected to the common port 1 and one end of the fourth equivalent capacitor C4, and the other end thereof is respectively connected to one end of the third equivalent capacitor C3 and one end of the third equivalent inductor L3, the other end of the third equivalent inductor L3 is connected to the ground port 4, the other end of the third equivalent capacitor C3 is respectively connected to the other end of the fourth equivalent capacitor C4, one end of the fourth equivalent inductor L4 and one end of the fifth equivalent capacitor C5, and the other end of the fourth equivalent inductor L4 and the other end of the fifth equivalent capacitor C5 are both connected to the high-frequency channel output port 3.

[0070] The circuit layers include, from top to bottom, a first circuit layer, a second circuit layer, a third circuit layer, a fourth circuit layer, a fifth circuit layer, a sixth circuit layer, a seventh circuit layer, an eighth circuit layer, a ninth circuit layer, a tenth circuit layer, an eleventh circuit layer, and a twelfth circuit layer;

[0071] like Figure 4 As shown, the first circuit layer includes a first electrode plate P1, a second electrode plate P2, a third electrode plate P3, a first via hole H1, a second via hole H2, a third via hole H3 and a fourth via hole H4;

[0072] like Figure 5 As shown, the second circuit layer includes a fourth electrode plate P4, a fifth electrode plate P5, a sixth electrode plate P6, a second via hole H2, a third via hole H3, a fourth via hole H4, a fifth via hole H5 and a sixth via hole H6;

[0073] like Figure 6 As shown, the third circuit layer includes a seventh electrode plate P7, an eighth electrode plate P8, a ninth electrode plate P9, a second via hole H2, a third via hole H3, a sixth via hole H6, a seventh via hole H7 and an eighth via hole H8;

[0074] like Figure 7As shown, the fourth circuit layer includes a tenth electrode plate P10, an eleventh electrode plate P11, a twelfth electrode plate P12, a third via hole H3, an eighth via hole H8, a ninth via hole H9, a tenth via hole H10 and an eleventh via hole H11;

[0075] like Figure 8 As shown, the fifth circuit layer includes a thirteenth electrode plate P13, a fourteenth electrode plate P14, a third via hole H3, an eighth via hole H8, a ninth via hole H9, a tenth via hole H10, a twelfth via hole H12 and a thirteenth via hole H13;

[0076] like Fig. 9 As shown, the sixth circuit layer includes a fifteenth electrode plate P15, a sixteenth electrode plate P16, a seventeenth electrode plate P17, a third via hole H3, an eighth via hole H8, a ninth via hole H9, a tenth via hole H10, a fourteenth via hole H14 and a fifteenth via hole H15;

[0077] like Fig.10 As shown, the seventh circuit layer includes an eighteenth electrode plate P18, a nineteenth electrode plate P19, a third via hole H3, an eighth via hole H8, a ninth via hole H9, a tenth via hole H10, a fifteenth via hole H15, a sixteenth via hole H16 and a seventeenth via hole H17;

[0078] like Fig.11 As shown, the eighth circuit layer includes a twentieth electrode plate P20, a twenty-first electrode plate P21, an eighth via hole H8, a ninth via hole H9, a tenth via hole H10, a fifteenth via hole H15, a seventeenth via hole H17, an eighteenth via hole H18 and a nineteenth via hole H19;

[0079] like Fig.12 As shown, the ninth circuit board includes a twenty-second electrode plate P22, a twenty-third electrode plate P23, an eighth via hole H8, a ninth via hole H9, a tenth via hole H10, a fifteenth via hole H15, a seventeenth via hole H17 and a twentieth via hole H20;

[0080] like Fig.13 As shown, the tenth circuit layer includes a twenty-fourth electrode plate P24, a twenty-fifth electrode plate P25, a twenty-sixth electrode plate P26, an eighth via hole H8, a tenth via hole H10, a fifteenth via hole H15, a twenty-first via hole H21, and a twenty-second via hole H22;

[0081] like Fig.14 As shown, the eleventh circuit layer includes a twenty-seventh electrode plate P27, an eighth via hole H8, a tenth via hole H10, a fifteenth via hole H15, a twenty-first via hole H21, and a twenty-second via hole H22;

[0082] like Fig.15As shown, the twelfth circuit layer includes a twenty-eighth electrode plate P28, an eighth via hole H8, a fifteenth via hole H15, a twenty-first via hole H21, and a twenty-second via hole H22;

[0083] The first electrode plate P1, the fourth electrode plate P4, the seventh electrode plate P7, the tenth electrode plate P10, the eleventh electrode plate P11 and the twenty-fourth electrode plate P24 are connected end to end in sequence via the second via hole H2, the first via hole H1, the fifth via hole H5, the seventh via hole H7, the ninth via hole H9 and the twenty-first via hole H21, and together form a first equivalent inductance L1;

[0084] The thirteenth electrode plate P13, the fifteenth electrode plate P15, the eighteenth electrode plate P18, the twentieth electrode plate P20, and the twenty-second electrode plate P22 are connected head to tail in sequence via the tenth via hole H10, the twelfth via hole H12, the fourteenth via hole H14, the sixteenth via hole H16, the eighteenth via hole H18, and the eighth via hole H8, and together form a second equivalent inductance L2;

[0085] The twenty-fifth electrode plate P25 and the twenty-eighth electrode plate P28 are connected via the tenth via hole H10 and are coupled with the twenty-seventh electrode plate P27 through interlayer coupling to form a first equivalent capacitor C1;

[0086] The twelfth electrode plate P12, the thirteenth electrode plate P13 and the seventeenth electrode plate P17 are connected end to end via the eleventh via hole H11, the thirteenth via hole H13 and the fifteenth via hole H15 in sequence, and together form a third equivalent inductance L3;

[0087] The 21st electrode plate P21, the 23rd electrode plate P23 and the 26th electrode plate P26 are connected end to end in sequence via the 19th via hole H19, the 20th via hole H20 and the 22nd via hole H22 to form a fourth equivalent inductor L4;

[0088] The second electrode plate P2 and the eighth electrode plate P8 are connected via the fourth via H4 and are coupled with the sixth electrode plate P6 through interlayer coupling to form a second equivalent capacitor C2;

[0089] The third electrode plate P3, the fifth electrode plate P5 and the ninth electrode plate P9 are connected via the third via hole H3 and are coupled with the sixth electrode plate P6 through interlayer coupling to form a third equivalent capacitor C3;

[0090] The second electrode plate P2 and the eighth electrode plate P8 are connected via a fourth via hole H4 and are coupled with the fifth electrode plate P5 through interlayer coupling to form a fourth equivalent capacitor C4;

[0091] The sixteenth electrode plate P16 and the nineteenth electrode plate P19 form a fifth equivalent capacitor C5 through interlayer coupling.

[0092] In the low-frequency channel filter, one end of the second equivalent inductor L2 is connected to the low-frequency channel output port 2 of the frequency divider via the twenty-first via H21, and the other end is connected to the low-frequency channel output port 2 of the frequency divider via the twenty-first via H21. Figures 7 to 14 The tenth via H10 is connected to one end of the first equivalent inductor L1, and the other end of the first equivalent inductor L1 is connected to the first equivalent inductor L1 via Figures 12 to 15 The eighth via H8 is connected to the common port 1 of the frequency divider; one end of the first equivalent capacitor C1 is connected to the common port 1 of the frequency divider; Figures 13 to 15 The tenth via H10 is connected to the common connection of the first equivalent inductor L1 and the second equivalent inductor L2, and the other end is coupled to the ground;

[0093] In the high-frequency channel filter, one end of the second equivalent capacitor C2 is connected via Figures 6 to 15 The eighth via H8 is connected to the common port 1 of the frequency divider, and the other end is connected to one end of the third equivalent capacitor C3. The other end of the third equivalent capacitor C3 is connected to the common port 1 of the frequency divider. Figures 4 to 11 The third via H3 is connected to one end of the fifth equivalent capacitor C5 and one end of the fourth equivalent inductor L4 respectively; one end of the fourth equivalent capacitor C4 is connected to one end of the second equivalent capacitor C2, and the other end is connected to one end of the third equivalent capacitor C3; one end of the third equivalent inductor L3 is connected to one end of the third equivalent capacitor C3 via Figures 5 to 7 The sixth via H6 is connected to one end of the second equivalent capacitor C2, and the other end is connected to the Figures 9 to 15 The fifteenth via H15 is connected to the ground port of the frequency divider; one end of the fifth equivalent capacitor C5 is connected to the ground port of the frequency divider; Figures 4 to 9 The third via H3 is connected to the other end of the fourth equivalent capacitor C4, and the other end is connected to the Figures 10 to 15 The seventeenth via hole H17 and the twenty-second via hole H2 are connected to the high frequency channel output port of the frequency divider.

[0094] The twenty-second electrode plate P22 is also connected to the common port 1 via the eighth via H8; the twenty-fourth electrode plate P24 is also connected to the low-frequency channel output port 2 via the twenty-first via H21; the twenty-sixth electrode plate P26 is also connected to the high-frequency channel output port 3 via the twenty-second via H22, and the twenty-seventh electrode plate P27 is also connected to the ground port 4 via the twenty-seventh via H27.

[0095] The outer electrodes are packaged in a planar grid array (LGA).

[0096] The small frequency divider further includes a mark 5, and the mark 5 and the external electrode are located on the opposite side of the LTCC ceramic body.

[0097] The circuit layer is built into the LTCC ceramic body by adopting a low temperature co-fired ceramic process.

[0098] The circuit layer adopts an embedded metal material, and the embedded metal material includes copper or palladium silver.

[0099] In one embodiment of the present invention, a multilayer circuit of a frequency divider is built into a ceramic body of 1.0 mm×0.5 mm×0.4 mm and sintered at a temperature of 890° C.±20° C.

[0100] Fig.16 and Fig.17 FIG. 1 is a schematic frequency response characteristic curve diagram of a mini frequency divider for a multi-band device in an embodiment of the present invention. Fig.16 As shown in the figure, the insertion loss of the low-frequency channel filter in the working frequency band of 2400-2500MHz is only 0.50dB, and the out-of-band suppression of 4800-7500MHz reaches 23dB. The insertion loss of the high-frequency channel filter in the working frequency band of 4900-5950MHz is only 0.8dB, and the out-of-band suppression of the low frequency from 1545-2690MHz reaches 23dB, of which 2400-2500MHz is as high as 32dB, and the high frequency reaches more than 23dB at 10300-11900MHz. The return loss response of the frequency divider is shown in the figure below. Fig.17 As shown in the figure, the return loss of the two channels is close to 15dB. The above indicators reflect the good transmission characteristics of the frequency divider and the high mutual isolation between channels.

[0101] The present invention provides a mini frequency divider for multi-band devices based on multi-layer interconnection technology. It has excellent performances such as high Q value, small size, low insertion loss, and high isolation. At the same time, under the premise of ensuring that its electrical performance is not affected, the tolerance of the processing technology is maximized, high process stability and consistency are achieved, and it is easy to integrate with other circuit modules, and has broad application prospects in the field of new generation wireless communications.

[0102] Those skilled in the art will appreciate that the embodiments described herein are intended to help readers understand the principles of the present invention, and should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific variations and combinations that do not deviate from the essence of the present invention based on the technical revelations disclosed by the present invention, and these variations and combinations are still within the protection scope of the invention.

Claims

1. A small frequency divider for multi-band equipment, characterized in that: It comprises a LTCC ceramic body, a circuit layer inside the LTCC ceramic body and an external electrode at the bottom of the LTCC ceramic body, wherein the external electrode comprises a common port (1), a low-frequency channel output port (2), a high-frequency channel output port (3) and a ground port (4), and the external electrode is connected to the circuit layer via a via hole; The circuit layer comprises a low-frequency channel filter and a high-frequency channel filter, and the low-frequency channel filter and the high-frequency channel filter are both connected to a common port (1); The low-frequency channel filter includes a first equivalent inductor L1, a second equivalent inductor L2 and a first equivalent capacitor C1, and the high-frequency channel filter includes a third equivalent inductor L3, a fourth equivalent inductor L4, a second equivalent capacitor C2, a third equivalent capacitor C3, a fourth equivalent capacitor C4 and a fifth equivalent capacitor C5; One end of the first equivalent inductor L1 is connected to the common port (1), and the other end thereof is respectively connected to one end of the first equivalent capacitor C1 and one end of the second equivalent inductor L2, the other end of the first equivalent capacitor C1 is connected to the ground port (4), and the other end of the second equivalent inductor L2 is connected to the low-frequency channel output port (2); One end of the second equivalent capacitor C2 is respectively connected to the common port (1) and one end of the fourth equivalent capacitor C4, and the other end is respectively connected to one end of the third equivalent capacitor C3 and one end of the third equivalent inductor L3, the other end of the third equivalent inductor L3 is connected to the ground port (4), the other end of the third equivalent capacitor C3 is respectively connected to the other end of the fourth equivalent capacitor C4, one end of the fourth equivalent inductor L4 and one end of the fifth equivalent capacitor C5, the other end of the fourth equivalent inductor L4 and the other end of the fifth equivalent capacitor C5 are both connected to the high-frequency channel output port (3); The circuit layers include, from top to bottom, a first circuit layer, a second circuit layer, a third circuit layer, a fourth circuit layer, a fifth circuit layer, a sixth circuit layer, a seventh circuit layer, an eighth circuit layer, a ninth circuit layer, a tenth circuit layer, an eleventh circuit layer, and a twelfth circuit layer; The first circuit layer includes a first electrode plate (P1), a second electrode plate (P2), a third electrode plate (P3), a first via hole (H1), a second via hole (H2), a third via hole (H3) and a fourth via hole (H4); The second circuit layer includes a fourth electrode plate (P4), a fifth electrode plate (P5), a sixth electrode plate (P6), a second via hole (H2), a third via hole (H3), a fourth via hole (H4), a fifth via hole (H5) and a sixth via hole (H6); The third circuit layer includes a seventh electrode plate (P7), an eighth electrode plate (P8), a ninth electrode plate (P9), a second via hole (H2), a third via hole (H3), a sixth via hole (H6), a seventh via hole (H7) and an eighth via hole (H8); The fourth circuit layer includes a tenth electrode plate (P10), an eleventh electrode plate (P11), a twelfth electrode plate (P12), a third via hole (H3), an eighth via hole (H8), a ninth via hole (H9), a tenth via hole (H10) and an eleventh via hole (H11); The fifth circuit layer includes a thirteenth electrode plate (P13), a fourteenth electrode plate (P14), a third via hole (H3), an eighth via hole (H8), a ninth via hole (H9), a tenth via hole (H10), a twelfth via hole (H12) and a thirteenth via hole (H13); The sixth circuit layer includes a fifteenth electrode plate (P15), a sixteenth electrode plate (P16), a seventeenth electrode plate (P17), a third via hole (H3), an eighth via hole (H8), a ninth via hole (H9), a tenth via hole (H10), a fourteenth via hole (H14) and a fifteenth via hole (H15); The seventh circuit layer includes an eighteenth electrode plate (P18), a nineteenth electrode plate (P19), a third via hole (H3), an eighth via hole (H8), a ninth via hole (H9), a tenth via hole (H10), a fifteenth via hole (H15), a sixteenth via hole (H16) and a seventeenth via hole (H17); The eighth circuit layer includes a twentieth electrode plate (P20), a twenty-first electrode plate (P21), an eighth via hole (H8), a ninth via hole (H9), a tenth via hole (H10), a fifteenth via hole (H15), a seventeenth via hole (H17), an eighteenth via hole (H18) and a nineteenth via hole (H19); The ninth circuit layer includes a twenty-second electrode plate (P22), a twenty-third electrode plate (P23), an eighth via hole (H8), a ninth via hole (H9), a tenth via hole (H10), a fifteenth via hole (H15), a seventeenth via hole (H17) and a twentieth via hole (H20); The tenth circuit layer includes a twenty-fourth electrode plate (P24), a twenty-fifth electrode plate (P25), a twenty-sixth electrode plate (P26), an eighth via hole (H8), a tenth via hole (H10), a fifteenth via hole (H15), a twenty-first via hole (H21) and a twenty-second via hole (H22); The eleventh circuit layer includes a twenty-seventh electrode plate (P27), an eighth via hole (H8), a tenth via hole (H10), a fifteenth via hole (H15), a twenty-first via hole (H21) and a twenty-second via hole (H22); The twelfth circuit layer includes a twenty-eighth electrode plate (P28), an eighth via hole (H8), a fifteenth via hole (H15), a twenty-first via hole (H21) and a twenty-second via hole (H22); The first electrode plate (P1), the fourth electrode plate (P4), the seventh electrode plate (P7), the tenth electrode plate (P10), the eleventh electrode plate (P11) and the twenty-fourth electrode plate (P24) are connected end to end in sequence via the second via hole (H2), the first via hole (H1), the fifth via hole (H5), the seventh via hole (H7), the ninth via hole (H9) and the twenty-first via hole (H21), and together form a first equivalent inductance L1; The thirteenth electrode plate (P13), the fifteenth electrode plate (P15), the eighteenth electrode plate (P18), the twentieth electrode plate (P20), and the twenty-second electrode plate (P22) are connected end to end in sequence via the tenth via hole (H10), the twelfth via hole (H12), the fourteenth via hole (H14), the sixteenth via hole (H16), the eighteenth via hole (H18), and the eighth via hole (H8), and together form a second equivalent inductance L2; The twenty-fifth electrode plate (P25) and the twenty-eighth electrode plate (P28) are connected via the tenth via hole (H10), and are coupled with the twenty-seventh electrode plate (P27) through interlayer coupling, thereby forming a first equivalent capacitor C1; The twelfth electrode plate (P12), the thirteenth electrode plate (P13) and the seventeenth electrode plate (P17) are connected end to end via the eleventh via hole (H11), the thirteenth via hole (H13) and the fifteenth via hole (H15) in sequence, and together form a third equivalent inductance L3; The twenty-first electrode plate (P21), the twenty-third electrode plate (P23) and the twenty-sixth electrode plate (P26) are connected end to end via the nineteenth via hole (H19), the twentieth via hole (H20) and the twenty-second via hole (H22) in sequence, and together form a fourth equivalent inductor L4; The second electrode plate (P2) and the eighth electrode plate (P8) are connected via a fourth via hole (H4), and are coupled with the sixth electrode plate (P6) through interlayer coupling, thereby forming a second equivalent capacitor C2; The third electrode plate (P3), the fifth electrode plate (P5) and the ninth electrode plate (P9) are connected via a third via hole (H3) and are coupled with the sixth electrode plate (P6) through interlayer coupling to form a third equivalent capacitor C3; The second electrode plate (P2) and the eighth electrode plate (P8) are connected via a fourth via hole (H4), and are coupled with the fifth electrode plate (P5) through interlayer coupling, thereby forming a fourth equivalent capacitor C4; The sixteenth electrode plate (P16) and the nineteenth electrode plate (P19) together form a fifth equivalent capacitor C5 through interlayer coupling.

2. The small frequency divider for multi-band devices according to claim 1, characterized in that: The twenty-second electrode plate (P22) is also connected to the common port (1) via the eighth via hole (H8); the twenty-fourth electrode plate (P24) is also connected to the low-frequency channel output port (2) via the twenty-first via hole (H21); the twenty-sixth electrode plate (P26) is also connected to the high-frequency channel output port (3) via the twenty-second via hole (H22); and the twenty-seventh electrode plate (P27) is also connected to the ground port (4) via the twenty-seventh via hole (H27).

3. The small frequency divider for multi-band devices according to claim 1, characterized in that: The outer electrodes are packaged in a planar grid array (LGA).

4. The small frequency divider for multi-band devices according to claim 1, characterized in that: The small frequency divider also includes a mark (5), and the mark (5) and the external electrode are located on the opposite side of the LTCC ceramic body.

5. The small frequency divider for multi-band devices according to claim 1, characterized in that: The circuit layer is built into the LTCC ceramic body by adopting a low temperature co-fired ceramic process.

6. The small frequency divider for multi-band devices according to claim 1, characterized in that: The circuit layer adopts an embedded metal material, and the embedded metal material includes copper or palladium silver.

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