An enhanced high electron mobility transistor and a method for manufacturing the same
By using a composite blocking layer design in high electron mobility transistors, the gradient structure of BAlN, SiN and P-type AlGaN sublayers can block Mg diffusion, and the problem of low leakage current and carrier mobility in HEMT is solved. Improves device performance and stability.
Patent Information
- Application Number
- CN202411245537.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-06
- Publication Date
- 2024-12-31
- Estimated Expiration
- 2044-09-06
AI Technical Summary
The existing high electron mobility transistor (HEMT) has problems such as increasing device leakage current, decreasing carrier mobility and degradation of performance due to the diffusion of Mg in the P-type cap layer.
Using a composite blocking layer, including BAlN sublayer, SiN sublayer and P-type AlGaN sublayer, the gradient design of Si doping and Mg doping concentrations, block the diffusion of Mg elements and improve barrier height and carrier migration. Rate.
It effectively reduces leakage current, improves carrier mobility and device performance, enhances gate voltage withstandability, reduces leakage channels caused by dislocations, and improves device stability.
Smart Images
Figure CN118763108B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, in particular to an enhanced high electron mobility transistor and a preparation method thereof. Background Art
[0002] A high electron mobility transistor (HEMT), also known as a heterostructure FET (HFET) or modulation doped field effect transistor (MODFET), is a field effect transistor that contains a junction between two materials with different band gaps (i.e. hetero) as the channel instead of a doped region (as is usually the case with MOSFETs).
[0003] Conventional high electron mobility transistors (HEMTs) currently enhance AlGaN / GaN transistors. The main method used is to deposit a P-type cap layer on the AlGaN barrier layer in the transistor to deplete the two-dimensional electrons under the gate, so that the device remains in the off state when the gate of the device is not biased.
[0004] However, due to the diffusivity of Mg in the P-type cap layer, Mg easily diffuses into the barrier layer in the transistor, and even into the channel layer in the transistor, which changes the energy band structure of the barrier layer, reduces the barrier height, and makes it easier for electrons to be excited in the barrier layer, increasing the leakage current of the device and reducing the switching characteristics and cut-off current of the device. On the other hand, the diffusion of Mg in the barrier layer and the channel layer will form impurity state energy levels and charge clusters, which will reduce the carrier mobility in the channel region and increase impurity scattering, leading to an increase in leakage current and unstable device performance. Summary of the invention
[0005] Based on this, the purpose of the present invention is to provide an enhanced high electron mobility transistor and a preparation method thereof, so as to solve the problem in the background technology that the existing high electron mobility transistor is an enhanced AlGaN / GaN transistor, and a P-type cap layer is deposited on the AlGaN barrier layer, but due to the diffusivity of Mg, the device leakage current increases, the carrier mobility decreases, and the performance decreases.
[0006] The present invention provides an enhanced high electron mobility transistor, comprising a substrate, and a buffer layer, a channel layer, an insertion layer, a barrier layer, a composite blocking layer and a cap layer sequentially stacked on the substrate;
[0007] The composite blocking layer includes at least three sublayers, and the three sublayers are respectively a BAlN sublayer, a SiN sublayer, and a P-type AlGaN sublayer;
[0008] The BAlN sublayer is doped with Si, and the concentration of Si doping is 1.0×10 12 atoms / cm 3 -7.0×1012 atoms / cm 3 .
[0009] Furthermore, the BAlN sublayer, the SiN sublayer and the P-type AlGaN sublayer are sequentially stacked on the barrier layer.
[0010] Furthermore, the B content in the BAlN sublayer is 0.1-0.5.
[0011] Further, the component of B in the BAlN sublayer gradually decreases toward the SiN sublayer, and the component of Al in the BAlN sublayer gradually increases toward the SiN sublayer.
[0012] Furthermore, the thickness of the BAlN sublayer is 1nm-5nm, the thickness of the SiN sublayer is 1nm-5nm, and the thickness of the P-type AlGaN sublayer is 2nm-10nm.
[0013] Furthermore, the Al component in the P-type AlGaN sublayer is 0.05-0.5.
[0014] Furthermore, the doping concentration of Mg in the P-type AlGaN sublayer is 2×10 16 atoms / cm 3 -9×10 17 atoms / cm 3 .
[0015] Further, the Al component in the P-type AlGaN sublayer gradually decreases toward the cap layer, the Ga component in the P-type AlGaN sublayer gradually increases toward the cap layer, and the Mg doping concentration in the P-type AlGaN sublayer gradually decreases toward the cap layer.
[0016] Another aspect of the present invention is to provide a method for preparing an enhanced high electron mobility transistor, comprising:
[0017] providing a substrate;
[0018] Depositing a buffer layer, a channel layer, an insertion layer, a barrier layer, a composite blocking layer and a cap layer in sequence on the substrate;
[0019] Wherein, in the step of depositing the composite blocking layer, the composite blocking layer is grown on the barrier layer at a preset temperature, a preset pressure and a preset mixed gas;
[0020] The composite blocking layer includes at least three sublayers, and the three sublayers are respectively a BAlN sublayer, a SiN sublayer, and a P-type AlGaN sublayer;
[0021] The BAlN sublayer is doped with Si, and the concentration of Si doping is 1.0×10 12 atoms / cm 3 -7.0×10 12 atoms / cm 3 .
[0022] Further, in the step of depositing the BAlN sublayer,
[0023] The preset temperature for depositing the BAlN sublayer is 750° C.-1000° C., the preset pressure is 80 torr-150 torr, and the mixed gas includes a B source, an Al source of 0 sccm-150 sccm, a N source of 60 slm-100 slm, and a Si source of 10 sccm-50 sccm;
[0024] In the step of depositing the SiN sub-layer,
[0025] The preset temperature for depositing the SiN sublayer is 900° C.-1100° C., the preset pressure is 50 torr-200 torr, and the mixed gas includes a Si source and a N source;
[0026] In the step of depositing the P-type AlGaN sublayer,
[0027] The preset temperature for depositing the P-type AlGaN sublayer is 800° C.-1050° C., the preset pressure is 100 torr-200 torr, and the mixed gas includes an Al source, a Ga source of 0 sccm-1000 sccm, a Mg source of 300 sccm-1200 sccm, and a N source of 50 slm-100 slm.
[0028] Compared with the prior art, the present invention has the following beneficial effects:
[0029] In an enhanced high electron mobility transistor provided by the present invention, the transistor includes a composite blocking layer stacked on a barrier layer, and the composite blocking layer includes at least three sublayers, and the three sublayers are respectively a BAlN sublayer, a SiN sublayer, and a P-type AlGaN sublayer; wherein Si is doped into the BAlN sublayer, and the concentration of Si doping is 1.0×10 12 atoms / cm 3 -7.0×10 12 atoms / cm 3That is, the BAlN sublayer has the characteristics of high bandgap width and high energy gap, and a certain amount of Si doping is added, so that the BAlN sublayer can increase the barrier height and the two-dimensional electron gas concentration in the channel layer on the one hand, and can effectively block the diffusion of Mg elements to the barrier layer and the channel layer on the other hand, improve the problem of forming impurity state energy levels and charge clusters in the device, reduce leakage current, increase the carrier mobility in the channel region, and improve the performance of the device. In addition, the SiN sublayer in the composite blocking layer can effectively block a large number of dislocations caused by lattice mismatch and thermal mismatch during the growth of the epitaxial layer, which can not only improve the crystal quality of the blocking layer and the subsequent P-type cap layer, and improve the gate withstand voltage capability of the device, but also reduce the leakage channel caused by dislocations, and further block the diffusion of Mg to the barrier layer and the channel layer. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] Figure 1 A schematic diagram of the structure of an enhanced high electron mobility transistor according to an embodiment of the present invention;
[0031] Figure 2 The figure is a flow chart of a method for preparing an enhanced high electron mobility transistor according to an embodiment of the present invention.
[0032] In the figure: 1, substrate; 2, buffer layer; 3, channel layer; 4, insertion layer; 5, barrier layer; 6, composite blocking layer; 61, BAlN sublayer; 62, SiN sublayer; 63, P-type AlGaN sublayer; 7, cap layer. DETAILED DESCRIPTION
[0033] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. Several embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive.
[0034] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only.
[0035] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present invention belongs. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.
[0036] The present invention provides an enhanced high electron mobility transistor, comprising a substrate 1, and a buffer layer 2, a channel layer 3, an insertion layer 4, a barrier layer 5, a composite blocking layer 6 and a cap layer 7 sequentially stacked on the substrate 1;
[0037] The composite blocking layer 6 includes at least three sublayers, and the three sublayers are respectively a BAlN sublayer 61, a SiN sublayer 62, and a P-type AlGaN sublayer 63;
[0038] The BAlN sublayer 61 is doped with Si, and the concentration of Si doping is 1.0×10 12 atoms / cm 3 -7.0×10 12 atoms / cm 3 .
[0039] Furthermore, the BAlN sublayer 61 , the SiN sublayer 62 , and the P-type AlGaN sublayer 63 are sequentially stacked on the barrier layer 5 .
[0040] Furthermore, the composition of B in the BAlN sub-layer 61 is 0.1-0.5.
[0041] Furthermore, the composition of B in the BAlN sublayer 61 gradually decreases toward the SiN sublayer 62 , and the composition of Al in the BAlN sublayer 61 gradually increases toward the SiN sublayer 62 .
[0042] Further, the thickness of the BAlN sublayer 61 is 1 nm-5 nm, the thickness of the SiN sublayer 62 is 1 nm-5 nm, and the thickness of the P-type AlGaN sublayer 63 is 2 nm-10 nm.
[0043] Furthermore, the Al composition in the P-type AlGaN sublayer 63 is 0.05-0.5.
[0044] Furthermore, the doping concentration of Mg in the P-type AlGaN sublayer 63 is 2×10 16 atoms / cm 3 -9×10 17 atoms / cm 3 .
[0045] Furthermore, the Al component in the P-type AlGaN sublayer 63 gradually decreases toward the cap layer 7 , the Ga component in the P-type AlGaN sublayer 63 gradually increases toward the cap layer 7 , and the Mg doping concentration in the P-type AlGaN sublayer 63 gradually decreases toward the cap layer 7 .
[0046] In addition, a method for preparing an enhanced high electron mobility transistor is provided, comprising:
[0047] Providing a substrate 1;
[0048] A buffer layer 2, a channel layer 3, an insertion layer 4, a barrier layer 5, a composite blocking layer 6 and a cap layer 7 are sequentially deposited on a substrate 1;
[0049] Wherein, in the step of depositing the composite blocking layer 6, the composite blocking layer 6 is grown on the barrier layer 5 at a preset temperature, a preset pressure and a preset mixed gas;
[0050] The composite blocking layer 6 includes at least three sublayers, and the three sublayers are respectively a BAlN sublayer 61, a SiN sublayer 62, and a P-type AlGaN sublayer 63;
[0051] The BAlN sublayer 61 is doped with Si, and the concentration of Si doping is 1.0×10 12 atoms / cm 3 -7.0×10 12 atoms / cm 3 .
[0052] Furthermore, in the step of depositing the BAlN sublayer 61,
[0053] The preset temperature for depositing the BAlN sublayer 61 is 750° C.-1000° C., the preset pressure is 80 torr-150 torr, and the mixed gas includes a B source, an Al source of 0 sccm-150 sccm, a N source of 60 slm-100 slm, and a Si source of 10 sccm-50 sccm;
[0054] In the step of depositing the SiN sub-layer 62,
[0055] The preset temperature for depositing the SiN sublayer 62 is 900° C.-1100° C., the preset pressure is 50 torr-200 torr, and the mixed gas includes a Si source and a N source;
[0056] In the step of depositing the P-type AlGaN sublayer 63,
[0057] The preset temperature for depositing the P-type AlGaN sublayer 63 is 800° C.-1050° C., the preset pressure is 100 torr-200 torr, and the mixed gas includes Al source, 0 sccm-1000 sccm of Ga source, 300 sccm-1200 sccm of Mg source, and 50 slm-100 slm of N source.
[0058] First embodiment
[0059] See also Figure 1The first embodiment of the present invention provides an enhanced high electron mobility transistor, a substrate 1, and a buffer layer 2, a channel layer 3, an insertion layer 4, a barrier layer 5, a composite blocking layer 6 and a cap layer 7 sequentially stacked on the substrate 1;
[0060] The composite blocking layer 6 includes at least three sublayers, and the three sublayers are respectively a BAlN sublayer 61, a SiN sublayer 62, and a P-type AlGaN sublayer 63;
[0061] The BAlN sublayer 61 is doped with Si, and the concentration of Si doping is 1.0×10 12 atoms / cm 3 -1.0×10 13 atoms / cm 3 .
[0062] That is, the transistor includes a composite blocking layer 6 stacked on the barrier layer 5, and the composite blocking layer 6 includes at least three sublayers, and the three sublayers are respectively a BAlN sublayer 61, a SiN sublayer 62, and a P-type AlGaN sublayer 63; wherein Si is doped into the BAlN sublayer 61, and the concentration of Si doping is 1.0×10 12 atoms / cm 3 -7.0×10 12 atoms / cm 3 That is, the BAlN sublayer 61 has the characteristics of high bandgap width and high energy gap, and a certain amount of Si doping is added, so that the BAlN sublayer 61 can increase the barrier height and the two-dimensional electron gas concentration in the channel layer 3 on the one hand, and can effectively block the Mg element from diffusing to the barrier layer 5 and the channel layer 3 on the other hand, improve the problem of forming impurity state energy levels and charge clusters in the device, reduce leakage current, increase the carrier mobility in the channel region, and improve the performance of the device. In addition, the SiN sublayer 62 in the composite blocking layer 6 can effectively block a large number of dislocations generated by lattice mismatch and thermal mismatch during the growth of the epitaxial layer, which can not only improve the crystal quality of the blocking layer and the subsequent cap layer 7, and improve the gate withstand voltage capability of the device, but also reduce the leakage channel caused by the dislocation, and further block the diffusion of Mg to the barrier layer 5 and the channel layer 3.
[0063] Specifically, the BAlN sublayer 61 , the SiN sublayer 62 , and the P-type AlGaN sublayer 63 in the composite blocking layer 6 are sequentially stacked on the barrier layer 5 .
[0064] It should be noted that, in this example, the BAlN sublayer 61, SiN sublayer 62 and P-type AlGaN sublayer 63 in the composite blocking layer 6 are not limited to the above three sublayers, and can also be other material sublayers that affect the diffusion of Mg into the barrier layer 5 and the channel layer 3, which are not particularly limited here.
[0065] In some preferred embodiments, the composition of B in the BAlN sublayer 61 is 0-0.5, and the composition of B in the BAlN sublayer 61 gradually decreases toward the SiN sublayer 62 , and the composition of Al in the BAlN sublayer 61 gradually increases toward the SiN sublayer 62 .
[0066] Further, the thickness of the BAlN sublayer 61 is 1 nm-5 nm, the thickness of the SiN sublayer 62 is 1 nm-5 nm, and the thickness of the P-type AlGaN sublayer 63 is 2 nm-10 nm.
[0067] In some preferred embodiments, the Al content in the P-type AlGaN sublayer 63 is 0-0.5, and the Mg doping concentration in the P-type AlGaN sublayer 63 is 2×10 16 atoms / cm 3 -9×10 17 atoms / cm 3 .
[0068] Furthermore, the Al component in the P-type AlGaN sublayer 63 gradually decreases toward the cap layer 7 , the Ga component in the P-type AlGaN sublayer 63 gradually increases toward the cap layer 7 , and the Mg doping concentration in the P-type AlGaN sublayer 63 gradually decreases toward the cap layer 7 .
[0069] It should be noted that, by utilizing the structural design in which the B component in the BAlN sublayer 61 in the composite blocking layer 6 gradually decreases, the Al component gradually increases, and the Al component in the P-type AlGaN sublayer 63 gradually decreases, and the Ga component gradually increases, the lattice mismatch between the BAlN sublayer 61, the AlGaN sublayer, and the cap layer 7 can be alleviated, the crystal quality of the epitaxial layer can be improved, and the performance of the device can be improved. The design in which the P-type AlGaN sublayer 63 is doped with Mg and the Mg doping concentration gradually decreases can improve the problem that the cap layer 7 cannot be effectively doped with Mg in the first time due to the Mg memory effect, thereby improving the device's P-type gate's ability to regulate the two-dimensional electron gas.
[0070] Specifically, in this embodiment, the Si doping concentration in the BAlN sublayer 61 is 1.0×10 12 atoms / cm 3 , the B component in the BAlN sublayer 61 decreases from 0.4 to 0.1, and the thickness of the BAlN sublayer 61 is 3 nm;
[0071] The thickness of the SiN sublayer 62 is 3 nm;
[0072] The Mg doping concentration in the P-type AlGaN sublayer 63 is from 9×10 17 atoms / cm 3 Down to 2×10 16 atoms / cm 3, the Al composition in the P-type AlGaN sublayer 63 decreases from 0.45 to 0.05, and the thickness of the P-type AlGaN sublayer 63 is 6 nm.
[0073] In summary, the enhanced high electron mobility transistor provided by the present invention has at least the following beneficial effects compared with the conventional transistor:
[0074] 1. In an enhanced high electron mobility transistor provided by the present invention, the transistor comprises a composite blocking layer 6 stacked on a barrier layer 5, and the composite blocking layer 6 comprises at least three sublayers, and the three sublayers are respectively a BAlN sublayer 61, a SiN sublayer 62, and a P-type AlGaN sublayer 63; wherein Si is doped into the BAlN sublayer 61, and the Si doping concentration is 1.0×10 12 atoms / cm 3 -7.0×10 12 atoms / cm 3 That is, the BAlN sublayer 61 has the characteristics of high bandgap width and high energy gap, and a certain amount of Si doping is added, so that the BAlN sublayer 61 can increase the barrier height and the two-dimensional electron gas concentration in the channel layer 3 on the one hand, and can effectively block the Mg element from diffusing to the barrier layer 5 and the channel layer 3 on the other hand, improve the problem of forming impurity state energy levels and charge clusters in the device, reduce leakage current, increase the carrier mobility in the channel region, and improve the performance of the device. In addition, the SiN sublayer 62 in the composite blocking layer 6 can effectively block a large number of dislocations generated by lattice mismatch and thermal mismatch during the growth of the epitaxial layer, which can not only improve the crystal quality of the blocking layer and the subsequent cap layer 7, and improve the gate withstand voltage capability of the device, but also reduce the leakage channel caused by the dislocation, and further block the diffusion of Mg to the barrier layer 5 and the channel layer 3.
[0075] 2. The structural design in which the B component in the BAlN sublayer 61 in the composite blocking layer 6 gradually decreases, the Al component gradually increases, and the Al component in the P-type AlGaN sublayer 63 gradually decreases, and the Ga component gradually increases can alleviate the lattice mismatch between the BAlN sublayer 61, the AlGaN sublayer, and the cap layer 7, improve the crystal quality of the epitaxial layer, and improve the performance of the device. The design in which the P-type AlGaN sublayer 63 is Mg-doped and the Mg doping concentration gradually decreases can improve the problem that the cap layer 7 cannot be effectively Mg-doped in the first time due to the Mg memory effect, thereby improving the device's P-type gate's ability to regulate the two-dimensional electron gas.
[0076] Second embodiment
[0077] In a second embodiment of the present invention, an enhanced high electron mobility transistor is provided. The difference between the enhanced high electron mobility transistor in this embodiment and the enhanced high electron mobility transistor in the first embodiment is that:
[0078] In this embodiment, the Si doping concentration in the BAlN sublayer 61 is 4.0×10 12 atoms / cm 3 , the B component in the BAlN sublayer 61 decreases from 0.4 to 0.1, and the thickness of the BAlN sublayer 61 is 3 nm;
[0079] The thickness of the SiN sublayer 62 is 3 nm;
[0080] The Mg doping concentration in the P-type AlGaN sublayer 63 is from 9×10 17 atoms / cm 3 Down to 2×10 16 atoms / cm 3 , the Al composition in the P-type AlGaN sublayer 63 decreases from 0.45 to 0.05, and the thickness of the P-type AlGaN sublayer 63 is 6 nm.
[0081] Third embodiment
[0082] In a third embodiment of the present invention, an enhanced high electron mobility transistor is provided. The difference between the enhanced high electron mobility transistor in this embodiment and the enhanced high electron mobility transistor in the first embodiment is that:
[0083] In this embodiment, the Si doping concentration in the BAlN sublayer 61 is 5.5×10 12 atoms / cm 3 , the B component in the BAlN sublayer 61 decreases from 0.4 to 0.1, and the thickness of the BAlN sublayer 61 is 3 nm;
[0084] The thickness of the SiN sublayer 62 is 3 nm;
[0085] The Mg doping concentration in the P-type AlGaN sublayer 63 is from 9×10 17 atoms / cm 3 Down to 2×10 16 atoms / cm 3 , the Al composition in the P-type AlGaN sublayer 63 decreases from 0.45 to 0.05, and the thickness of the P-type AlGaN sublayer 63 is 6 nm.
[0086] Fourth embodiment
[0087] In a fourth embodiment of the present invention, an enhanced high electron mobility transistor is provided. The difference between the enhanced high electron mobility transistor in this embodiment and the enhanced high electron mobility transistor in the first embodiment is that:
[0088] In this embodiment, the Si doping concentration in the BAlN sublayer 61 is 7.0×10 12atoms / cm 3 , the B component in the BAlN sublayer 61 decreases from 0.4 to 0.1, and the thickness of the BAlN sublayer 61 is 3 nm;
[0089] The thickness of the SiN sublayer 62 is 3 nm;
[0090] The Mg doping concentration in the P-type AlGaN sublayer 63 is from 9×10 17 atoms / cm 3 Down to 2×10 16 atoms / cm 3 , the Al composition in the P-type AlGaN sublayer 63 decreases from 0.45 to 0.05, and the thickness of the P-type AlGaN sublayer 63 is 6 nm.
[0091] Fifth embodiment
[0092] In a fifth embodiment of the present invention, an enhanced high electron mobility transistor is provided. The difference between the enhanced high electron mobility transistor in this embodiment and the enhanced high electron mobility transistor in the first embodiment is that:
[0093] In this embodiment, the Si doping concentration in the BAlN sublayer 61 is 1.0×10 13 atoms / cm 3 , the B component in the BAlN sublayer 61 decreases from 0.4 to 0.1, and the thickness of the BAlN sublayer 61 is 3 nm;
[0094] The thickness of the SiN sublayer 62 is 3 nm;
[0095] The Mg doping concentration in the P-type AlGaN sublayer 63 is from 9×10 17 atoms / cm 3 Down to 2×10 16 atoms / cm 3 , the Al composition in the P-type AlGaN sublayer 63 decreases from 0.45 to 0.05, and the thickness of the P-type AlGaN sublayer 63 is 6 nm.
[0096] Sixth embodiment
[0097] In a sixth embodiment of the present invention, an enhanced high electron mobility transistor is provided. The difference between the enhanced high electron mobility transistor in this embodiment and the enhanced high electron mobility transistor in the first embodiment is that:
[0098] In this embodiment, the Si doping concentration in the BAlN sublayer 61 is 5.5×10 12 atoms / cm 3, the B component in the BAlN sublayer 61 decreases from 0.4 to 0.1, and the thickness of the BAlN sublayer 61 is 3 nm;
[0099] The thickness of the SiN sublayer 62 is 1 nm;
[0100] The Mg doping concentration in the P-type AlGaN sublayer 63 is from 9×10 17 atoms / cm 3 Down to 2×10 16 atoms / cm 3 , the Al composition in the P-type AlGaN sublayer 63 decreases from 0.45 to 0.05, and the thickness of the P-type AlGaN sublayer 63 is 6 nm.
[0101] Seventh embodiment
[0102] In a seventh embodiment of the present invention, an enhanced high electron mobility transistor is provided. The difference between the enhanced high electron mobility transistor in this embodiment and the enhanced high electron mobility transistor in the first embodiment is that:
[0103] In this embodiment, the Si doping concentration in the BAlN sublayer 61 is 5.5×10 12 atoms / cm 3 , the B component in the BAlN sublayer 61 decreases from 0.4 to 0.1, and the thickness of the BAlN sublayer 61 is 3 nm;
[0104] The thickness of the SiN sublayer 62 is 5 nm;
[0105] The Mg doping concentration in the P-type AlGaN sublayer 63 is from 9×10 17 atoms / cm 3 Down to 2×10 16 atoms / cm 3 , the Al composition in the P-type AlGaN sublayer 63 decreases from 0.45 to 0.05, and the thickness of the P-type AlGaN sublayer 63 is 6 nm.
[0106] Eighth embodiment
[0107] In an eighth embodiment of the present invention, an enhanced high electron mobility transistor is provided. The difference between the enhanced high electron mobility transistor in this embodiment and the enhanced high electron mobility transistor in the first embodiment is that:
[0108] In this embodiment, the Si doping concentration in the BAlN sublayer 61 is 5.5×10 12 atoms / cm 3 , the B component in the BAlN sublayer 61 decreases from 0.4 to 0.1, and the thickness of the BAlN sublayer 61 is 1 nm;
[0109] The thickness of the SiN sublayer 62 is 3 nm;
[0110] The Mg doping concentration in the P-type AlGaN sublayer 63 is from 9×10 17 atoms / cm 3 Down to 2×10 16 atoms / cm 3 , the Al composition in the P-type AlGaN sublayer 63 decreases from 0.45 to 0.05, and the thickness of the P-type AlGaN sublayer 63 is 6 nm.
[0111] Ninth embodiment
[0112] In a ninth embodiment of the present invention, an enhanced high electron mobility transistor is provided. The difference between the enhanced high electron mobility transistor in this embodiment and the enhanced high electron mobility transistor in the first embodiment is that:
[0113] In this embodiment, the Si doping concentration in the BAlN sublayer 61 is 5.5×10 12 atoms / cm 3 , the B component in the BAlN sublayer 61 decreases from 0.4 to 0.1, and the thickness of the BAlN sublayer 61 is 5 nm;
[0114] The thickness of the SiN sublayer 62 is 3 nm;
[0115] The Mg doping concentration in the P-type AlGaN sublayer 63 is from 9×10 17 atoms / cm 3 Down to 2×10 16 atoms / cm 3 , the Al composition in the P-type AlGaN sublayer 63 decreases from 0.45 to 0.05, and the thickness of the P-type AlGaN sublayer 63 is 6 nm.
[0116] Tenth embodiment
[0117] In a tenth embodiment of the present invention, an enhanced high electron mobility transistor is provided. The difference between the enhanced high electron mobility transistor in this embodiment and the enhanced high electron mobility transistor in the first embodiment is that:
[0118] In this embodiment, the Si doping concentration in the BAlN sublayer 61 is 5.5×10 12 atoms / cm 3 , the B component in the BAlN sublayer 61 decreases from 0.4 to 0.1, and the thickness of the BAlN sublayer 61 is 3 nm;
[0119] The thickness of the SiN sublayer 62 is 3 nm;
[0120] The Mg doping concentration in the P-type AlGaN sublayer 63 is from 9×10 17 atoms / cm 3 Down to 2×10 16 atoms / cm 3 , the Al composition in the P-type AlGaN sublayer 63 decreases from 0.45 to 0.05, and the thickness of the P-type AlGaN sublayer 63 is 2 nm.
[0121] Eleventh Embodiment
[0122] In an eleventh embodiment of the present invention, an enhanced high electron mobility transistor is provided. The difference between the enhanced high electron mobility transistor in this embodiment and the enhanced high electron mobility transistor in the first embodiment is that:
[0123] In this embodiment, the Si doping concentration in the BAlN sublayer 61 is 5.5×10 12 atoms / cm 3 , the B component in the BAlN sublayer 61 decreases from 0.4 to 0.1, and the thickness of the BAlN sublayer 61 is 3 nm;
[0124] The thickness of the SiN sublayer 62 is 3 nm;
[0125] The Mg doping concentration in the P-type AlGaN sublayer 63 is from 9×10 17 atoms / cm 3 Down to 2×10 16 atoms / cm 3 , the Al composition in the P-type AlGaN sublayer 63 decreases from 0.45 to 0.05, and the thickness of the P-type AlGaN sublayer 63 is 10 nm.
[0126] The first comparison
[0127] The present invention provides a first comparative example, in which the substrate in the first embodiment is included, and a buffer layer, a channel layer, an insertion layer, a barrier layer, a composite blocking layer and a cap layer sequentially stacked on the substrate;
[0128] The composite blocking layer includes at least three sublayers, and the three sublayers are respectively a BAlN sublayer, a SiN sublayer, and a P-type AlGaN sublayer;
[0129] In this comparative example, the BAlN sublayer does not contain Si doping, and the rest is the same as the first embodiment.
[0130] The second comparison
[0131] The present invention provides a second comparative example, in which the second comparative example includes the substrate in the first embodiment, and a buffer layer, a channel layer, an insertion layer, a barrier layer, a composite blocking layer and a cap layer sequentially stacked on the substrate;
[0132] The composite blocking layer includes at least three sublayers, and the three sublayers are respectively a BAlN sublayer, a SiN sublayer, and a P-type AlGaN sublayer;
[0133] In this comparative example, the P-type AlGaN sublayer does not contain Mg doping, and the rest is the same as the first embodiment.
[0134] The third comparison
[0135] The present invention provides a third comparative example, in which the third comparative example includes the substrate in the first embodiment, and a buffer layer, a channel layer, an insertion layer, a barrier layer, a composite blocking layer and a cap layer sequentially stacked on the substrate;
[0136] In this comparative example, the composite blocking layer does not include a BAlN sublayer, and the rest is the same as that of the first embodiment.
[0137] The fourth comparison
[0138] The present invention provides a fourth comparative example, in which the fourth comparative example includes the substrate in the first embodiment, and a buffer layer, a channel layer, an insertion layer, a barrier layer, a composite blocking layer and a cap layer sequentially stacked on the substrate;
[0139] In this comparative example, the composite blocking layer does not include a SIN sublayer, and the rest is the same as that of the first embodiment.
[0140] Fifth comparison
[0141] The present invention provides a fifth comparative example, in which the fifth comparative example includes the substrate in the first embodiment, and a buffer layer, a channel layer, an insertion layer, a barrier layer, a composite blocking layer and a cap layer sequentially stacked on the substrate;
[0142] In this comparative example, the composite blocking layer does not include a P-type AlGaN sublayer, and the rest is the same as that of the first embodiment.
[0143] Sixth comparison
[0144] The present invention provides a sixth comparative example, in which the sixth comparative example includes the substrate in the first embodiment, and a buffer layer, a channel layer, an insertion layer, a barrier layer and a cap layer sequentially stacked on the substrate;
[0145] In this comparative example, no composite blocking layer is included, and the rest is the same as the first embodiment.
[0146] In order to effectively verify the performance of the enhanced high electron mobility transistor in the embodiment of the present invention, the enhanced high electron mobility transistors prepared by the first embodiment to the eleventh embodiment and the first comparative example to the sixth comparative example are respectively selected to perform the relevant performance tests shown in Table 1 and Table 2 below. The test results are shown in Table 1 and Table 2 below:
[0147] The following table 1 is a data comparison of the first embodiment to the eleventh embodiment;
[0148]
[0149] Table 1
[0150] Table 2 below is a data comparison of the first to eleventh embodiments and the first to sixth comparative examples;
[0151]
[0152] Table 2
[0153] In general, the experiments in Table 1 and Table 2 show that, compared with the traditional enhanced high electron mobility transistor, the enhanced high electron mobility transistor in this embodiment achieves the best improvement in the two-dimensional electron gas mobility ratio by adding a composite blocking layer to the original transistor, which is significantly improved compared with the first to sixth comparison examples.
[0154] Twelfth Embodiment
[0155] See also Figure 2 , a method for preparing an enhanced high electron mobility transistor provided by the twelfth embodiment of the present invention is shown, and the method is used to prepare the enhanced high electron mobility transistor in the first embodiment, and the method comprises:
[0156] providing a substrate;
[0157] Depositing a buffer layer, a channel layer, an insertion layer, a barrier layer, a composite blocking layer and a cap layer in sequence on the substrate;
[0158] Wherein, in the step of depositing the composite blocking layer, the composite blocking layer is grown on the barrier layer at a preset temperature, a preset pressure and a preset mixed gas;
[0159] The composite blocking layer includes at least three sublayers, and the three sublayers are respectively a BAlN sublayer, a SiN sublayer, and a P-type AlGaN sublayer;
[0160] The BAlN sublayer is doped with Si, and the concentration of Si doping is 1.0×10 12 atoms / cm 3 -7.0×10 12atoms / cm 3 .
[0161] Further, in the step of depositing the BAlN sublayer,
[0162] The preset temperature for depositing the BAlN sublayer is 750°C-1000°C, the preset pressure is 80torr-150torr, and the mixed gas includes a B source, an Al source of 0sccm-150sccm, a N source of 60slm-100slm, and a Si source of 10sccm-50sccm;
[0163] In the step of depositing the SiN sublayer,
[0164] The preset temperature for depositing the SiN sublayer is 900°C-1100°C, the preset pressure is 50torr-200torr, and the mixed gas includes Si source and N source;
[0165] In the step of depositing the P-type AlGaN sublayer,
[0166] The preset temperature for depositing the P-type AlGaN sublayer is 800°C-1050°C, the preset pressure is 100torr-200torr, and the mixed gas includes Al source, 0sccm-1000sccm Ga source, 300sccm-1200sccm Mg source, and 50slm-100slm N source.
[0167] Specifically, the preparation method of the present invention may adopt the following steps, S01-S07;
[0168] S01, providing a substrate;
[0169] It should be noted that the substrate includes but is not limited to a silicon substrate, a sapphire substrate, a silicon carbide substrate, and a GaN substrate. To facilitate understanding of this case, a silicon substrate is used as the substrate for growing the epitaxial layer in this embodiment.
[0170] S02, depositing a buffer layer on the substrate;
[0171] It should be noted that the buffer layer includes but is not limited to any one of an AlN layer, an AlGaN layer, and a GaN layer or a combination thereof. For ease of understanding of this case, the buffer layer is now adopted as an AlGaN buffer layer;
[0172] In order to ensure the normal growth of the buffer layer, the specific deposition process is as follows: the N (nitrogen) source required for growth can be NH3, the Ga (gallium) source can be TMGa, the Al (aluminum) source can be TMAl, the reaction chamber temperature can be 750℃-1000℃, the chamber pressure can be 50torr-150torr, and the AlGaN buffer layer with a thickness of 1.5um-2.5um is grown. The specific thickness of the AlGaN buffer layer is 1.9um.
[0173] S03, depositing a channel layer on the buffer layer;
[0174] It should be noted that the channel layer includes but is not limited to an InGaN channel layer and a GaN channel layer. To facilitate understanding of this case, the channel layer is now adopted as a GaN channel layer. The specific deposition process is to introduce an N (nitrogen) source and a Ga (gallium) source into the reaction chamber. The reaction chamber temperature can be 700°C-1000°C, and the reaction chamber pressure can be 50torr-200torr. A GaN channel layer with a thickness of 50nm-300nm is grown. The specific thickness of the GaN channel layer can be 190nm.
[0175] S04, depositing an insertion layer on the channel layer;
[0176] It should be noted that the insertion layer can be an AlN insertion layer. The specific deposition process of the insertion layer is that the N (nitrogen) source required for growth can be NH3, the Al (aluminum) source can be TMGa, the reaction chamber temperature can be 700℃-1100℃, the reaction chamber pressure can be 100torr-200torr, the growth thickness can be 1nm-6nm, and the specific AlN insertion layer thickness can be 2nm.
[0177] S05, depositing a barrier layer on the insertion layer;
[0178] It should be noted that the barrier layer includes but is not limited to an AlGaN barrier layer and an AlInN barrier layer. To facilitate understanding of the present case, the barrier layer is now an AlGaN barrier layer, and its specific deposition process is: introducing the Al (aluminum) source, Ga (gallium) source, and N (nitrogen) source required for growth into the reaction chamber. As an example of the present invention, the Al source (aluminum) may be TMAl (trimethylaluminum), the Ga (gallium) source may be TEGa (triethylgallium), and the N (nitrogen) source may be NH3 (ammonia). The reaction chamber temperature is maintained at 800°C-1050°C, the reaction chamber pressure is 80torr-200torr, and an AlGaN barrier layer with a thickness of 10nm-100nm is grown.
[0179] S06, depositing a composite blocking layer on the barrier layer;
[0180] It should be noted that the composite blocking layer includes a BAlN sublayer, a SiN sublayer, and a P-type AlGaN sublayer, and the B component in the BAlN sublayer is 0.1-0.5, and the Si doping concentration is 1.0×10 12 atoms / cm 3 -7.0×10 12 atoms / cm 3 , the B component gradually decreases, and the Al component gradually increases.
[0181] The Al content of the P-type AlGaN sublayer is 0.05-0.5, and the Mg doping concentration is 2×10 16 atoms / cm 3 -9×10 17 atoms / cm 3 , the Al component of the P-type AlGaN sublayer gradually decreases, the Ga component gradually increases, and the Mg doping concentration gradually decreases;
[0182] Specifically, the specific deposition process of the BAlN sublayer is as follows: the preset temperature for depositing the BAlN sublayer is 750°C-1000°C, which is the reaction chamber temperature; the preset pressure is 80torr-150torr, which is the reaction chamber pressure; and the mixed gas includes a B source, an Al source of 0sccm-150sccm, a N source of 60slm-100slm, and a Si source of 10sccm-50sccm.
[0183] In some preferred embodiments, 0 sccm-50 sccm of B (boron) source, 0 sccm-150 sccm of Al (aluminum) source, 60 slm-100 slm of N (nitrogen) source, and 10 sccm-50 sccm of Si (silicon) source are introduced into the reaction chamber. As an example of the present invention, the B (boron) source can be TEB (triethyl boron), the Al (aluminum) source can be TMAl (trimethyl aluminum), the N (nitrogen) source can be NH3 (ammonia), and the Si (silicon) source can be SIH4 (silane). During the deposition of the BAlN sublayer, the flow rate of the B (boron) source gradually decreases, and the flow rate of the Al (aluminum) source is constant or gradually increases, so that the growth B component gradually decreases, the Al component gradually increases, and the Si doping concentration is 1.0×10 12 atoms / cm 3 -7.0×10 12 atoms / cm 3 , a BAlN sublayer with a thickness of 1nm-5nm.
[0184] The specific deposition process of the SiN sublayer is as follows: the preset temperature for depositing the SiN sublayer is 900°C-1100°C, which is the reaction chamber temperature; the preset pressure is 50torr-200torr, which is the reaction chamber pressure; and the mixed gas includes Si source and N source.
[0185] In some preferred embodiments, a Si (silicon) source and a N (nitrogen) source are introduced into the reaction chamber to grow a SiN sublayer with a thickness of 1-5 nm.
[0186] The specific deposition process of the P-type AlGaN sublayer is as follows: the preset temperature for depositing the P-type AlGaN sublayer is 800℃-1050℃, which is the reaction chamber temperature; the preset pressure is 100torr-200torr, which is the reaction chamber pressure; the mixed gas includes Al source, 0sccm-1000sccm of Ga source, 300sccm-1200sccm of Mg source, and 50slm-100slm of N source.
[0187] In some preferred embodiments, 0 sccm-100 sccm of Al (aluminum) source, 0 sccm-1000 sccm of Ga (gallium) source, 300 sccm-1200 sccm of Mg (magnesium) source, and 50 slm-100 slm of N (nitrogen) source are introduced into the reaction chamber. As an example of the present invention, the Al (aluminum) source may be TMAl (trimethylaluminum), the Ga (gallium) source may be TEGa (triethylgallium), the N (nitrogen) source may be NH3 (ammonia), and the Mg (magnesium) source may be CP2Mg (bis(cyclopentadienyl) magnesium). During the deposition of the P-type AlGaN sublayer, the flow rate of the Al (aluminum) source gradually decreases, the flow rate of the Ga (gallium) source is constant or gradually increases, and the flow rate of the Mg (magnesium) source gradually decreases, so that the Al component gradually decreases, the Ga component gradually increases, and the Mg doping concentration gradually decreases, and the thickness of the P-type AlGaN sublayer is 2nm-10nm.
[0188] S07, depositing a cap layer on the composite blocking layer;
[0189] It should be noted that the cap layer is a P-type GaN cap layer, the N (nitrogen) source can be NH3, the Ga (gallium) source can be TEGa, the Mg (magnesium) source can be CP2Mg (bis(cyclopentadienyl)magnesium), the reaction chamber temperature can be 750℃-1100℃, the reaction chamber pressure can be 150torr-250torr, and the Mg doping concentration of the growth thickness of 10nm-50nm is 1×10 18 atoms / cm 3 -1×10 19 atoms / cm 3 The P-type GaN cap layer has a specific thickness of 28 nm and a Mg doping concentration of 5×10 18 atoms / cm 3 .
[0190] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.
[0191] The above embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present invention. It should be pointed out that, for a person of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the present invention patent shall be subject to the attached claims.
Claims
1. An enhanced high electron mobility transistor, characterized in that: It comprises a substrate, and a buffer layer, a channel layer, an insertion layer, a barrier layer, a composite blocking layer and a cap layer which are sequentially stacked on the substrate; The composite blocking layer includes at least three sublayers, and the three sublayers are respectively a BAlN sublayer, a SiN sublayer, and a P-type AlGaN sublayer; The BAlN sublayer is doped with Si, and the concentration of Si doping is 1.0×10 12 atoms / cm 3 -7.0×10 12 atoms / cm 3 ; The component of B in the BAlN sublayer gradually decreases toward the SiN sublayer, and the component of Al in the BAlN sublayer gradually increases toward the SiN sublayer; The doping concentration of Mg in the P-type AlGaN sublayer is 2×10 16 atoms / cm 3 -9×10 17 atoms / cm 3 ; The Al component in the P-type AlGaN sublayer gradually decreases toward the cap layer, the Ga component in the P-type AlGaN sublayer gradually increases toward the cap layer, and the Mg doping concentration in the P-type AlGaN sublayer gradually decreases toward the cap layer; The BAlN sublayer, the SiN sublayer and the P-type AlGaN sublayer are sequentially stacked on the barrier layer.
2. The enhanced high electron mobility transistor according to claim 1, characterized in that: The B composition in the BAlN sublayer is 0.1-0.
5.
3. The enhanced high electron mobility transistor according to claim 1, characterized in that: The thickness of the BAlN sublayer is 1nm-5nm, the thickness of the SiN sublayer is 1nm-5nm, and the thickness of the P-type AlGaN sublayer is 2nm-10nm.
4. The enhanced high electron mobility transistor according to claim 1, characterized in that: The Al component in the P-type AlGaN sublayer is 0.05-0.
5.
5. A method for preparing an enhanced high electron mobility transistor, characterized in that: The preparation method is used to prepare the enhanced high electron mobility transistor according to any one of claims 1 to 4, and the preparation method comprises: providing a substrate; Depositing a buffer layer, a channel layer, an insertion layer, a barrier layer, a composite blocking layer and a cap layer in sequence on the substrate; Wherein, in the step of depositing the composite blocking layer, the composite blocking layer is grown on the barrier layer at a preset temperature, a preset pressure and a preset mixed gas; The composite blocking layer includes at least three sublayers, and the three sublayers are respectively a BAlN sublayer, a SiN sublayer, and a P-type AlGaN sublayer; The BAlN sublayer is doped with Si, and the concentration of Si doping is 1.0×10 12 atoms / cm 3 -7.0×10 12 atoms / cm 3 .
6. The method for preparing an enhanced high electron mobility transistor according to claim 5, characterized in that: In the step of depositing the BAlN sublayer, The preset temperature for depositing the BAlN sublayer is 750° C.-1000° C., the preset pressure is 80 torr-150 torr, and the mixed gas includes a B source, an Al source of 0 sccm-150 sccm, a N source of 60 slm-100 slm, and a Si source of 10 sccm-50 sccm; In the step of depositing the SiN sub-layer, The preset temperature for depositing the SiN sublayer is 900° C.-1100° C., the preset pressure is 50 torr-200 torr, and the mixed gas includes a Si source and a N source; In the step of depositing the P-type AlGaN sublayer, The preset temperature for depositing the P-type AlGaN sublayer is 800° C.-1050° C., the preset pressure is 100 torr-200 torr, and the mixed gas includes an Al source, a Ga source of 0 sccm-1000 sccm, a Mg source of 300 sccm-1200 sccm, and a N source of 50 slm-100 slm.