Wavelength control method for silicon photonic external cavity tunable laser

Abstract

A tunable solid-state laser device is described, comprising a semiconductor-based gain chip and a silicon photonic filter chip with tuning capabilities. The silicon photonic filter chip includes input-output silicon waveguides, at least two ring resonators formed together with the silicon waveguides, one or more connecting silicon waveguides interfacing with the ring resonators, a separate heater associated with each ring resonator, a temperature sensor configured to measure the chip temperature, and a controller connected to the temperature sensor and the separate heater and designed with a feedback loop to maintain the filter temperature and thereby provide a tuned frequency. The one or more connecting silicon waveguides are configured to redirect light resonating with each of the at least two ring resonators back through the input-output silicon waveguides. A corresponding method for controlling the laser frequency is described. The improved structure of the SiPho multi-filter chip involves a Zagnac interferometer.

Description

[0001] Divisional Application Instructions

[0002] This application is a divisional application of the invention patent application with an application date of February 28, 2020, which entered the Chinese national stage on September 1, 2021, with Chinese national application number 202080018218.3, and invention name “Wavelength control method of silicon photonic external cavity tunable laser”.

[0003] CROSS-REFERENCE TO RELATED APPLICATIONS

[0004] This application claims priority to co-pending U.S. provisional application 62 / 812,455 to Gao et al., filed on March 1, 2019, entitled “Method For Wavelength Control Of Silicon Photonic External Cavity Tunable Laser,” which is incorporated herein by reference. Technical Field

[0005] The present invention relates to a hybrid external cavity laser having a semiconductor gain chip, such as a III-V semiconductor diode structure, and a silicon photonics-based tunable filter chip, which interfaces with the gain chip to form a tunable laser cavity. The present invention further relates to a silicon photonics chip for an external cavity laser with desired thermal control. Background Art

[0006] Coherent optical communication systems are widely considered to be the primary means of interconnecting over distances ranging from a few hundred meters up to global scale. As increasing demand pushes fiber capacity to 100Gbs / wavelength and beyond, the number of deployments of coherent optical systems continues to increase. Coherent tunable lasers are an important and enabling element of such networks. These are often referred to as "tunable lasers", but the operating requirements of these lasers are much more specific than this simple term implies. Although the tunability of these lasers is often expressed in terms of wavelength, it is often more informative to express the behavior in terms of optical frequency. The correlation is always governed by the simple equation: frequency = (speed of light) / wavelength. Thus, a laser that is roughly tunable between 1520nm and 1570nm (typical range) has a frequency response of approximately 197THz and 191THz (THz = 10 12 In order for such a tunable laser to meet the requirements of emerging and upcoming coherent systems, it should, among many other requirements: (A) respond to frequency settings (and therefore wavelength) within a targeted 1 GHz range (i.e., about 1 part in 200,000); and (B) exhibit a linewidth of less than 500 kHz, preferably less than 100 kHz (a small bandwidth of about 1 part in a billion).

[0007] To achieve these behaviors, tunable lasers are often designed as external cavity lasers (ECLs). This means that the ECL structure includes an optical amplification element and other optical elements that form a composite optical resonator. This contrasts with standard semiconductor laser diodes, where the amplification element and the optical resonator are essentially integrated on a single die. The optical filter within the composite optical cavity is tuned to select the desired optical frequency and maintain the desired optical linewidth. A single filter that can tune a single passband across the entire 6-THz (or so) tuning range and also provide a 200-KHz (or so) linewidth is currently not practical (or even close to being practical). Therefore, such practical ECL tunable lasers use two tunable filters in the composite resonator. Each of the tunable filters provides a narrow passband comb across the entire tuning range, and each filter is independently tuned so that only one line overlaps between each filter, and the tunable laser emits narrowband light at this overlapping frequency. Summary of the Invention

[0008] In a first aspect, the present invention relates to a tunable solid-state laser device comprising a semiconductor-based gain chip and a silicon photonic filter chip with tuning capabilities. Typically, the silicon photonic filter chip includes input-output silicon waveguides, at least two ring resonators formed together with the silicon waveguides, one or more connecting silicon waveguides interfacing with the ring resonators, a separate heater associated with each ring resonator, a temperature sensor configured to measure the chip temperature, and a controller coupled to the temperature sensor and the separate heater and designed with a feedback loop to maintain the filter temperature and thereby provide a tuned frequency. Within the silicon photonic chip, the one or more connecting silicon waveguides are typically configured to redirect light resonating with each of the at least two ring resonators back through the input-output silicon waveguides. In some embodiments, the input-output silicon waveguides of the silicon photonic filter chip are coupled to the semiconductor-based gain chip via a spot size converter to provide mode size matching and thereby reduce losses due to the interface.

[0009] In another aspect, the present invention relates to a method for stabilizing the output of a tunable external cavity laser, wherein the tunable external cavity laser comprises a semiconductor-based gain chip and a silicon photonic filter chip coupled to each other using a spot size converter to form a laser cavity. In some embodiments, the silicon photonic filter chip comprises a resistive temperature sensor configured to measure the chip temperature remotely from any heating elements, and a plurality of ring resonators having individually integrated resistive heaters. The method may include using a control loop driven by a controller configured to obtain readings from the resistive temperature sensor and adjust the power of the resistive heater to maintain the laser frequency within a tolerance range.

[0010] In another aspect, the present invention relates to an optical chip comprising:

[0011] Input waveguide;

[0012] A Sagnac interferometer, optically connected to the input waveguide, comprising:

[0013] a beam splitter / coupler connected to the input waveguide;

[0014] two waveguide branches connected to the beam splitter-coupler and each branch terminated at one end;

[0015] two ring resonators, each coupled to a separate waveguide branch and coupled to each other through an intervening curved waveguide to reverse the direction of optical rotation in the respective ring resonators, wherein the intervening curved waveguide may or may not include an additional ring resonator; and

[0016] A resistive heater, associated with each ring resonator,

[0017] In this embodiment, light entering an input waveguide is split into specific waveguide branches, and if the light resonates with both ring resonators and any intervening ring resonators, the light then passes through one ring resonator, along an intervening curved waveguide, through the other ring resonator, into the opposite waveguide branch, and back to the beam splitter-coupler. In some embodiments, the optical chip is implemented using silicon waveguides and a silicon dioxide cladding, so that the optical chip can be considered a silicon photonic chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 is a graph of the calculated excess frequency error of a silicon photonics-based external cavity laser (ECL) as a function of different thermal crosstalk levels compared to current commercial ECLs.

[0019] Figure 2 is a schematic perspective view of an embodiment of a tunable solid-state laser including a silicon photonic filter chip and a semiconductor-based gain chip that can be coupled to a semiconductor optical amplifier (SOA).

[0020] Figure 3 is a side cross-sectional view of a portion of an embodiment of a silicon photonic filter chip.

[0021] Figure 4 is a perspective view of an embodiment of a semiconductor-based gain chip that can be coupled to a silicon photonic filter chip.

[0022] Figure 5 is a block diagram of an embodiment of a tunable laser system.

[0023] Figure 6Figure 2 is a plot of the ring temperature sensor (RTD) and laser frequency error for a ring resonator.

[0024] Figure 7 is a graph of chip heater power versus the rate of change of the ring temperature sensor (RTD) reading.

[0025] Figure 8 is a top view of another embodiment of a silicon photonic filter chip having a pair of ring resonators and a waveguide terminated in a reflector.

[0026] Figure 9 is a top view of yet another embodiment of a silicon photonic filter chip having multiple ring resonators arranged side by side.

[0027] Figure 10 is an embodiment of another embodiment of a silicon photonic filter chip having a bifurcated waveguide and a plurality of coupled ring resonators.

[0028] Figure 11 is a top perspective view of an embodiment of a silicon photonic filter chip including thermal isolation trenches around a ring resonator.

[0029] Figure 12 yes Figure 11 A top view of an embodiment of a silicon photonic filter chip.

[0030] Figure 13 is a top perspective view of another embodiment of a silicon photonic filter chip including an L-shaped thermal isolation trench that partially surrounds a ring resonator.

[0031] Figure 14 is a top perspective view of yet another embodiment of a silicon filter chip including a pair of thermal isolation trenches.

[0032] Figure 1 5 yes Figure 14 A top view of an embodiment of a silicon filter chip having a pair of thermal isolation trenches.

[0033] Figure 16 is a graph of superimposed laser spectra tuned across a 65 nm wavelength range using a prototype ECL, where a single heater associated with one ring resonator is varied.

[0034] Figure 17 are plots of the measured SMSR (upper plot) and fiber-coupled output power (lower plot) across the entire tuning range.

[0035] Figure 18A shows the fiber-coupled output power as a function of SOA current when the gain chip current is fixed at 200 mA, and Figure 18BShown are the measured laser intrinsic linewidth (upper plots) and relative intensity noise (RIN, lower plots) as a function of SOA current.

[0036] Figure 19A is a graph of the frequency measured by the wavelength meter (lines) and calculated from the RTD readings (dots) for different SOA currents using the prototype device.

[0037] Figure 19B is based on Figure 19A The measurement error of the results in the figure is within ±0.2GHz.

[0038] Figure 19C is a graph of the frequency measured by the wave meter (lines) and calculated from the RTD readings (dots) for different ring heater temperature settings.

[0039] Figure 19D yes Figure 19C The measurement error is within ±0.2GHz.

[0040] Figure 20 is a graph showing the temperature of a model of the thermal gradient around the silicon waveguide when the resistive heater is set to a temperature of 114°C.

[0041] Figure 21 is a graph of laser frequency shift as a function of device temperature drift, where different lines are plotted with and without the chip temperature sensor operating, illustrating that temperature drift may be reduced when the chip temperature sensor is used.

[0042] Figure 22 The lower block diagram is a graph of frequency shift varying with time, where the current of the semiconductor optical amplifier is increased from 500 mA to 700 mA in two steps as shown in the upper block diagram, and shows the frequency shift with and without the chip temperature sensor operating.

[0043] Figure 23 The left frame is a graph of the accuracy of frequency tuning obtained by adjusting the heater temperature, where the solid line is a graph of the target frequency and the dots are a graph of the frequency measured by the wavelength meter for the prototype device, and the right frame is a graph of the frequency error of the left graph, which shows that the error is within ±0.5 GHz by using only the heater power.

[0044] Figure 24The upper left plot is a graph of the SOA voltage varying with time, the lower left box plot is a graph of the frequency shift varying with time due to the SOA current variation (first line), which is accurately followed by using a single reference RTD (second line, overlapping with the first line), where the difference varying with time is plotted in the right box, where the control code is enabled at time 40 minutes and the frequency is shifted to the original spectrum position with an error of 0.2GHz. DETAILED DESCRIPTION

[0045] An external-cavity tunable laser (ECTL) features an integrated silicon photonic tuning portion of the laser cavity, which uses strict temperature control of the silicon photonic filter chip to minimize drift in the laser frequency. Frequency tuning of the ECL is performed by forming an optical filter using a photonic chip with a silicon waveguide, which can be adjusted using a resistive heater. To achieve the desired frequency control and tunability within a desired range, the filter can include at least two individually tunable ring resonators. Semiconductor waveguides, such as those from Group III-V semiconductors, can typically be used to form the gain section of the laser cavity. In some embodiments, the laser directly interfaces with a semiconductor optical amplifier to amplify the laser output, allowing the optical power in the laser cavity to be maintained low, providing better laser control. The silicon photonic chip can include a Sagnac interferometer structure (in which the signal passes through at least two resonant ring waveguides connecting two waveguide branches to close the interferometer loop). The rings can be tuned to provide a selected wavelength, and the multi-filtering Sagnac interferometer provides improved stability while frequency filtering. The structure described herein is designed for efficient commercialization using a realistic design and the potential to leverage existing commercial components.

[0046] The explosive growth of network traffic driven by video on demand, mobile-based services, and cloud-based services has accelerated the penetration of high-capacity coherent transmission systems from long-distance transmission to metropolitan area networks and data center networks. These shorter-distance network segments are particularly sensitive to module cost, size, and power consumption, as described by N. Kaneda et al. in "400Gb / s Single Carrier Transmission with Integrated Coherent Optics", OFC, Th3F.4 (2016), which is incorporated herein by reference. Therefore, there is a high demand for low-cost, compact tunable lasers in small-form-factor coherent modules such as OSFP and DD-QSFP standard small form factors. At the same time, large laser output powers of 16dBm and above are expected to be shared between the light source and the local oscillator. Narrow linewidths below 100kHz are also popular to meet the strict phase noise tolerance of high-order modulation formats. These commercial requirements are further described in M. Seimetz et al., "Laser Linewidth Limitations for Optical Systems with High-Order Modulation Beyond 1 6-QAM," OFC, TH1 B.1 (2008), which is incorporated herein by reference.

[0047] Disclosed herein are techniques, structures, and methods for precise frequency control, and in some embodiments, phase control, of tunable lasers using photonic integrated circuits in high-performance coherent modules for telecommunications and other applications. Tunable lasers typically include a compound semiconductor material as a gain medium and a silicon photonic integrated circuit as a tunable frequency filter. Silicon photonic circuits typically include a silicon waveguide ring resonator as a frequency selective element. The silicon photonic circuits may further include: multiple integrated heaters, temperature sensors, reference temperature sensors, thermal isolation trenches, and various combinations thereof to precisely tune and monitor the filter frequency of the silicon waveguide ring resonator. Accurate monitoring and control of the characteristics of the frequency selective element (e.g., resonant frequency) can ensure high accuracy and long-term stability in the frequency control of the tunable laser. In some embodiments, the silicon photonic filter includes a multi-filter Sagnac interferometer, in which two or more ring resonators connect two waveguide branches to form the interferometer's loop and provide reflection at the resonant frequency.

[0048] Compact external cavity tunable lasers are one of the key components of high-capacity coherent optical communication systems to meet the ever-increasing bandwidth requirements. External cavity tunable lasers consist of two basic elements. The first is the gain medium, typically using III-V compound semiconductors such as indium phosphide (InP) and gallium arsenide due to their direct energy band gap and high luminous efficiency. The second element is a frequency-selective external resonant cavity. The external laser cavity ensures a relatively long resonant cavity to suppress laser phase noise, which is very important in high-speed coherent communication systems because they rely not only on amplitude modulation but also on optical phase modulation.

[0049] External cavity lasers using silicon photonics technology are a promising solution for reducing the size and cost of tunable lasers. Silicon integrated circuits have been the focus of the electronics industry for the past few decades, and technological advances in silicon integrated circuits have led to significant reductions in the feature size, cost, and power consumption of complementary metal oxide semiconductor (CMOS) circuits. Photonic integrated circuits are expected to achieve similar low-cost and high-volume manufacturing by adopting mature CMOS foundries developed by the electronics industry. Single-chip integration of discrete optical components of tunable lasers (such as frequency selective elements, power monitoring photodiodes, and beam splitters) can reduce the cost of tunable lasers by reducing the number of discrete components and through less complex assembly.

[0050] One of the essential features of tunable lasers in coherent communication systems is high-precision frequency control and long-term frequency stability. The filtering frequency of frequency-selective elements can be tuned by integrated micron-scale heaters adjacent to them using the thermo-optic effect. However, due to the high thermal conductivity of silicon, the frequency of frequency-selective elements on silicon integrated circuits is easily disturbed by chip thermal perturbations, such as those from ambient temperature changes, gain medium current variations, and thermal crosstalk from other on-chip heaters. Therefore, it is desirable to achieve improved methods and structures for precisely controlling the lasing frequency of external-cavity tunable lasers using silicon photonic integrated circuits.

[0051] Diode lasers typically use a pn junction to produce light when electrons and holes combine and release photons corresponding to the energy release in which an electric current pumps the excited electronic states with electron-hole pairs. The laser cavity is formed by a rear reflector and a partial reflector at the front surface where light is generated from the diode. The reflection of light in the laser cavity leads to stimulated emission to produce coherent laser light. For intracavity diode lasers, the size of the laser cavity is determined by the size of the diode. For external cavity diode lasers (ECLs), the rear reflector is replaced by a photonic element that allows frequency tuning by adjusting the laser cavity, while the gain region remains within the semiconductor diode. The improved design in this paper uses a silicon-based photonic chip to adjust the laser cavity and the corresponding laser frequency.

[0052] With the continued drive to reduce component size, new ECL architectures are being evaluated to achieve this size reduction. An important avenue for size reduction is to replace the free-space portion of the ECL with waveguide integration. In particular, thermally tunable silicon photonic ring resonator elements are a reasonably direct analog for thermally tunable etalons in free-space ECLs. Therefore, a silicon photonic waveguide chip with a suitably configured ring resonator can be a suitable integration of the free-space portion of a conventional ECL, as described, for example, by Melikyan (Melikyan et al., “Wavelength Stabilized Silicon / III-V Hybrid Laser”, Proc. 42nd ECOC 2016, p. 598, which is incorporated herein by reference). However, integrated photonics brings challenges as well as advantages. In particular, the thermal sensitivity of silicon waveguides is significantly higher than that of the optical path in the free-space etalon; and at the same time, the increased thermal conductivity of the common substrate and the smaller spacing of the integrated optical elements result in stronger thermal gradients across the entire optical element. Thermal gradients and thermal sensitivities often undermine the weak coupling assumption of thermal effects from free-space ECLs, to the point that silicon photonics ECLs generally cannot reliably meet all performance requirements using thermal control techniques from free-space ECLs.

[0053] The exterior of the ECL cavity in a silicon photonics chip typically consists of two or more ring resonators within a silicon waveguide. The ring resonators act as optical filters to select the appropriate frequency. The filters are typically temperature-sensitive and are typically tuned by intentionally adjusting and controlling the temperature of each filter component. Directly measuring the frequency transmission of the filters in these applications is practically impractical, but it has been shown that sufficient transmission can be inferred by monitoring the filter temperature and applying mathematical calibration. It is desirable to precisely know the temperature at the optical path through the filters. However, because both heaters and temperature sensors absorb light and should not be placed too close to the optical path, the applied heat and sensed temperature physically offset the optical path and infer the actual path temperature. Other thermal variations, such as changes in ambient temperature and temperature crosstalk between filters, can also disrupt temperature inference. For free-space-based ECLs, the dominant architecture for existing commercial ECLs, these couplings are weak, and the resulting perturbations can be suppressed through thermal design and calibration enhancements. More information on etalon-based ECL can be found, for example, in U.S. Patent 7,961,374 to Finot et al., entitled “Thermal Control of Optical Filter With Local Silicon Frame,” which is incorporated herein by reference.

[0054] External cavity tunable lasers using silicon photonics are an attractive solution to meet these requirements. The general concept of such laser design is described in G. Valicourt et al., “Photonic Integrated Circuit Based on Hybrid III-V / Silicon Integration,” J. Lightwave Technol. 36, 265-273 (2018) and A. Verdier et al., “Ultrawideband Wavelength-Tunable Hybrid External-Cavity Lasers,” J. Lightwave Technol. 36, 37-43 (2018), both of which are incorporated herein by reference. Their CMOS-compatible fabrication process and on-chip integration of various optical elements show great promise for reducing the cost and size of tunable laser devices, as described by A. Novack et al. in "A Silicon Photonic Transceiver and Hybrid Tunable Laser for 64 Gbaud Coherent Communication," OFC, Th4D.4 (2018) and C. Doerr et al. in "Silicon Photonics Coherent Transceiver in a Ball-Grid Array Package," OFC, paper Th5D.5 (2017), both of which are incorporated herein by reference. In addition, the integration of booster semiconductor optical amplifiers (SOAs) provides a clear path to compensate for the relatively high coupling and propagation losses of silicon waveguides. The use of SOAs with external cavity lasers is described in K. Sato et al., "High Output Power and Narrow Linewidth Silicon Photonic Hybrid Ring-Filter External Cavity Wavelength Tunable Lasers," ECOC, PD 2.3 (2014), which is incorporated herein by reference. This combination allows for the design of long external silicon cavities to reduce the laser spectral linewidth while still achieving high output power.

[0055] In this paper, we demonstrate a hybrid integrated silicon photonic tunable laser for coherent applications. The fiber-coupled output power reaches 140 mW (21.5 dBm) across the entire C-band. To our knowledge, this is the highest output power reported for a silicon photonic tunable laser. This high output power is desirable for compensating for the large losses in coherent transceivers using complex modulation formats. Furthermore, the long external cavity design reduces the laser linewidth to tens of kHz, making it suitable for 16- or 64-QAM modulation. Furthermore, the integrated sensor technology we developed for the silicon photonic chip and the associated control loop enables gridless and precise frequency tuning without the use of a wavelength locker.

[0056] Thanks to mature resistance temperature detector (RTD) sensor technology and associated control loops, the external cavity laser (ECL) design described herein is capable of precise frequency tuning and control. Some of the problems and solutions for thermal application and control of multiple filters on a common integrated optical substrate were described in the applicant's earlier work, described in U.S. Patent 7,447,393 to Yan et al., entitled "Thermal Control of Optical Components," which is incorporated herein by reference. Although the situation addressed therein is significantly different from that of silicon photonic components, the technical findings described herein suggest that similar thermal control methods can be combined with innovative silicon photonic configurations to provide substantial improvements in optical frequency control of compact ECL tunable lasers.

[0057] The reason for using an RTD is to precisely lock the filter temperature against any external thermal disturbances, such as package temperature changes or gain current changes. However, one challenge is that the RTD sensor on the silicon photonics (SiPho) chip cannot be manufactured in direct contact with the silicon waveguide filter due to significant optical losses. Therefore, the RTD is usually made at a certain distance from the waveguide filter (usually about 1 to 2 microns) (this creates a thermal gradient), and the RTD cannot accurately measure the temperature changes of the filter. This configuration contrasts with the applicant's current commercial ECL with a free-space etalon tuning structure, where the RTD is in direct contact with the etalon-based filter and can more accurately measure the filter temperature changes. Figure 1 is the calculated additional frequency error for the SiPho-based ECL, which uses an RTD associated with each of the two ring filters, compared to the current commercial free-space etalon ECL. Even with the lower thermal crosstalk of 1:100 on chip, the SiPho ECL still has an additional 0.5GHz frequency error due to thermal gradients.

[0058] To alleviate the problems of indirect temperature measurement, silicon photonic chips are described as having an additional integrated reference RTD on the SiPho chip and adjusting the heater power and / or thermoelectric cooler (TEC) accordingly to eliminate any thermal disturbances. The chip and typically the laser can typically be placed on a thermoelectric cooler, which is well known in the art to help control the overall device temperature. The three-RTD control method of the SiPho ECL provides high-frequency accuracy similar to that of current commercial ECLs. In addition, as demonstrated below, test data shows that by using only a single reference RTD, calibrating and tuning the two filter heater powers can provide precise wavelength tuning without the need for two other RTDs at the filter. However, in any case, the RTD associated with each ring resonator can provide frequency tuning. In some embodiments, after the device is completed, the frequency is selected and the heater and TEC are calibrated to support setting and maintaining the desired frequency within the tunable range. The initial calibration can then provide a baseline for maintaining the selected frequency during use. Furthermore, embodiments of SiPho chips are described in which trenches can be used to reduce thermal crosstalk so that frequency errors can be correspondingly reduced, and thus the two RTDs associated with each ring resonator can provide more precise adjustment for thermal fluctuations.

[0059] Below, we demonstrate frequency stability and precise frequency tuning of the proposed silicon photonic laser. While gridless frequency tuning can be easily achieved by controlling two ring heaters, precise frequency control down to sub-1 GHz, with respect to drift and mode hopping over the device's lifetime, is very challenging for silicon photonic lasers. This is largely due to the high sensitivity of silicon to thermal disturbances, such as those arising from package temperature variations or current variations in the gain chip / SOA. To address this issue, we applied our proven sensor technology to the fabricated silicon photonic chip.

[0060] High-performance hybrid integrated silicon photonic tunable laser

[0061] As described herein and with reference to Figure 2 The silicon photonic tunable laser 100 is composed of a gain chip 104 and a ring resonator-based silicon photonic filter chip 102. A booster semiconductor optical amplifier (SOA) 106 can be integrated through lens coupling to amplify light before outputting the optical fiber. Figure 2 A schematic layout of a laser device 100 associated with an SOA 106 is shown.

[0062] In one embodiment, the optical device 100 includes a silicon photonic filter chip 102 and a gain chip 104. A spot size converter 116, such as a lens, connects the optical paths of the filter chip 102 and the gain chip 104.

[0063] In some embodiments, the silicon photonic filter chip 102 and the gain chip 104 are placed on a thermoelectric cooler (TEC) 113 to help control the overall device temperature, and the TEC can also be controlled using a controller described below. TEC components are known in the art. For convenience, the entire laser device 100 with the filter chip 102, the gain chip 104, and the TEC (if present) can be referred to as a tunable external cavity laser device, which is typically assembled together in a package.

[0064] In one embodiment, the silicon photonic filter chip 102 is a multilayer device comprising an upper cladding layer 108, a silicon device layer 110, a lower cladding layer 112, and a silicon substrate 114. The upper cladding layer 108 forms the top layer of the filter chip 102; the silicon device layer 110 is located between the upper cladding layer 108 and the lower cladding layer 112; and the lower cladding layer 112 is located on the silicon substrate 114, which forms the bottom of the filter chip 102. In one embodiment, the upper cladding layer 108 and the lower cladding layer 112 comprise silicon dioxide, but other optical materials with a low refractive index may also be used. Furthermore, it should be understood that the term "device layer" refers to a layer that includes "devices" such as waveguides and resonators, which may be located between the upper cladding layer 108 and the lower cladding layer 112 and may be surrounded by one or both of the cladding layers 108.

[0065] A silicon photonics (SiPh) chip typically includes a silicon device layer 110 and a bottom silicon substrate 114 sandwiched between an upper cladding layer 108 (e.g., silicon dioxide) and a lower cladding layer 112 (e.g., silicon dioxide). The ring resonator filter is fabricated at the silicon device layer 110. An integrated heater can be formed on top of the silicon ring resonator, separated by the upper silicon dioxide cladding layer 108. The reason for this arrangement is that the heater cannot be formed directly on the silicon ring resonator due to the large light propagation loss generated. Configuration as Figure 3 shown.

[0066] Silicon photonic chips typically include a silicon waveguide of elemental silicon, which may be doped with dopants, typically embedded in a silicon dioxide (SiO2, which can also be referred to as silicon oxide, although silicon oxide can also be lower oxides with different oxidation states) or other suitable cladding. The cladding confines light within the silicon waveguide due to differences in refractive index or refraction. The waveguides and other structures of a silicon photonic chip can be formed using photolithography or other suitable patterning techniques. Using a silicon oxide cladding allows the processing to be adapted to the silicon-on-insulator (Si-on-insulator) processes used in microelectronics. Due to silicon's high refractive index, the silicon waveguide can have a thickness of approximately 0.2 microns to approximately 0.5 microns. The thickness of the cladding above and below the silicon waveguide can typically range from approximately 0.3 microns to approximately 3 microns. Various ring resonator structures, such as curved silicon waveguides, can be used as filters to provide selection of laser frequencies. Each ring resonator provides stable reflection of various harmonics, and thermal control can be used to manage thermal fluctuations in the ring resonator frequency. Using multiple ring resonators with slightly different spectral ranges allows selection of a harmonic that provides a common frequency for the multiple rings. The laser then emits at this common frequency. Sato et al. further describe this selection process. The resonant rings are positioned adjacent to the waveguides so that the resonant frequencies are coupled between the waveguides through the rings. The waveguides are placed close enough to the waveguides so that there can be good optical coupling without an undesirable degree of loss. Each ring is associated with a heater for both frequency tuning and maintaining a constant ring resonator temperature. Each ring resonator can also be associated with a temperature sensor, which can be an RTD, as described below, to measure the temperature associated with the ring within a specific temperature sensitivity range. In some embodiments, the silicon optical chip is designed with an RTD spaced apart from the heater associated with the ring resonator so that the RTD can measure changes in the chip temperature. The temperature measurement from the chip-level RTD sensor is used in the feedback loop.

[0067] In one embodiment, the silicon photonic filter chip 102 includes a spot size converter 116, a beam splitter-combiner 118, a first waveguide section 120, a first ring resonator 122, a coupled waveguide section 124, a second ring resonator 126, a second waveguide section 128, a first heater 130, a second heater 132, a first ring temperature sensor 134, a second ring temperature sensor 136, and a filter chip temperature sensor 138.

[0068] The spot size converter 116 couples the silicon photonic filter chip 102 to the semiconductor-based gain chip 114 and provides a mode size that matches the losses due to the interface between the filter chip 102 and the gain chip 104. In additional or alternative embodiments, a separate spot size converter can be placed between the gain chip 104 and the silicon photonic filter chip 102. Generally, the gain chip can be a gain chip with a free-space filter used in ECL. Suitable gain chips are described in U.S. Patents 6,882,979 B2, entitled "External Cavity Laser With Continuous Tuning of Grid Generator," by Daiber et al., and 8,462,823 B2, entitled "Small Package Tunable Laser With Beam Splitter," by Daiber et al., both of which are incorporated herein by reference.

[0069] The beam splitter-combiner 118 is coupled to the spot size converter 116 and the first waveguide arm 120 and the second waveguide arm 128. The beam splitter / combiner 118, the first waveguide arm 120, and the second waveguide arm 128 together form part of a multi-filtering Sagnac interferometer. The beam splitter-combiner 118 is configured to split an input optical signal and direct a first portion to the first waveguide 120 and a second portion to the second waveguide 128. The beam splitter-combiner 128 is also configured to combine the light received from the first waveguide 120 and the second waveguide 128 and direct it back to the spot size converter 116.

[0070] A first ring resonator 122, a second ring resonator 126, a first waveguide arm 120, a coupled waveguide section 124, and a second waveguide arm 128 are fabricated at the silicon device layer 110. An upper cladding layer 108 is formed on top of and around the ring resonator and waveguides, while a lower cladding layer 112 is formed below and (possibly) around the ring resonator and waveguides.

[0071] Each of the first ring resonator 122 and the second ring resonator 126 comprises a ring or circular waveguide configured to couple incoming light into the ring and then propagate along the ring. The size and refractive index determine the resonant frequency and harmonics associated with the ring resonator. Heating the ring resonator changes the refractive index and, accordingly, the resonant frequency.

[0072] As shown, each of the first waveguide arm 120 and the second waveguide arm 128 can be shaped to have linear portions connected by curved portions. In other embodiments, the first waveguide portion 120 and the second waveguide portion 128 can be defined as other shapes including linear portions and curved portions. In one embodiment, the first waveguide portion 120 is symmetrical to the second waveguide portion 128 about the longitudinal axis of the photonic chip 102, which extends from a first end (front end) 140 of the photonic chip 102 adjacent to the gain chip 104 to a second end (back end) 142 of the photonic chip 102 opposite the gain chip 104. Due to the annular nature of the Sagnac interferometer, the symmetry of the first waveguide portion 120 and the second waveguide portion 128 is generally unimportant. In one embodiment, and as shown, each of the first waveguide portion 120 and the second waveguide portion 126 terminates at an adjacent second end 142, such that any non-resonant light is generally dissipated.

[0073] In one embodiment, the coupling waveguide 124 is substantially U-shaped and positioned between the first and second ring resonators 122, 126, wherein a curved midsection abuts a pair of linear sections within the U-shape. The coupling waveguide 124 is positioned sufficiently close to the first and second ring resonators to optically couple the elements. Although depicted as a U-shaped structure with a curved midsection, it should be understood that the coupling waveguide 124 may be defined in other shapes. In one embodiment, each end of the coupling waveguide 124 extends axially beyond the first and second ring resonators 122, 126 and terminates adjacent to a second end 142.

[0074] In one embodiment, the first ring resonator 122 is formed between the linear portion of the first waveguide portion 120 and the linear portion of the coupling waveguide 124, so that light can travel between the first ring resonator 122, the waveguide 120, and the coupling waveguide 124. In one embodiment, the first ring resonator 122 is formed so that the shortest path between the first ring resonator 122 and the adjacent first waveguide 120 occurs at a point that bisects the rearmost linear portion of the first waveguide portion 120. Similarly, the second ring resonator 126 is located between the coupling waveguide 124 and the second waveguide 128, so that light can travel between the waveguide 124, the second ring resonator 126, and the second waveguide portion 128. Thus, the optical path or channel between the first waveguide portion 120 and the second waveguide portion 128 is formed to cause light to travel in a generally lateral or radial direction via the first ring resonator 122, the coupling waveguide 124, and the second ring resonator 128 to efficiently reflect light resonating with both ring resonators back to the gain chip 104, except along the opposite arm.

[0075] In one embodiment, the first heater 130 is an integrated heater of the photonic chip 102. The first heater 130 is located near the first ring resonator 122 so that heat can be transferred to the first ring resonator 124 and the resonant frequency of the resonator 122 can be "tuned" as described further below. In one embodiment, the first heater 130 is generally located above the first ring resonator, and in some cases, directly above the first ring resonator, and may be separated from the first ring resonator 122 by the upper cladding 108. In other embodiments, the first heater 130 is located above and slightly offset relative to the plane of the first ring resonator 122 so that it is not completely directly above, and a portion of the upper cladding 108 separates the first heater 130 from the first ring resonator 122. Similarly, in one embodiment, the second heater 132 is an integrated heater of the photonic chip 102. The second heater 132 is located near the second ring resonator 126 so that heat can be transferred to the second ring resonator 126. In one embodiment, the second heater 132 is generally positioned above the second ring resonator 126, and in some cases, directly above the second ring resonator 126, and may be spaced apart from the second ring resonator 126 by the upper cladding layer 108. In other embodiments, the second heater 132 may be positioned above the second ring resonator 126 in the device layer 110 and slightly offset so as not to be directly above it, with a portion of the upper cladding layer 108 spacing the second heater 132 from the second ring resonator 126.

[0076] Gain chips and SOAs are typically based on similar semiconductor technologies. However, the specific functions of gain chips and SOAs differ, and therefore different optimization designs can be considered. Specifically, the gain chip provides a portion of the laser cavity, making its front surface partially reflective to establish a standing wave that drives coherent stimulated emission for lasing. The SOA is not part of the laser cavity and can be designed accordingly to provide power gain solely for light transmitted through the SOA. The composition of the gain chip and SOA is typically different, and waveguide coupling can take into account different waveguide dimensions, for example, through a spot size converter.

[0077] Reference Figure 3 , depicts a portion of a photonic chip 102 in cross-section having a first heater 130 located directly above a first ring resonator 122. The cladding 108 separates the heater 130 from the ring resonator 122. Alternatively, the heater 134 can be located proximate to the ring resonator 122 and in the device layer 110. In one such embodiment, the ring resonator 122 and the heater 130 can be separated by the cladding 108 and / or the cladding 112.

[0078] In one embodiment, heater 130 and heater 132 can be curved, and in one such embodiment, each heater can generally define a curvature that is substantially the same as the curvature of ring resonators 122 and 126, respectively. Having the same or similar curvatures creates a uniform distance from portions of the heaters to adjacent portions of the ring resonator. Furthermore, in one embodiment, first heater 130 and second heater 132 can comprise a material such as a metal or silicon material, for example, platinum, titanium nitride, or polysilicon.

[0079] When current flows through the integrated heater, the temperature of the heater and the surrounding material increases, and the refractive index of the ring resonator filter changes due to the thermo-optical effect. This change in refractive index shifts the resonant frequency of the silicon ring resonator and thereby allows the laser frequency to be controlled. Although the laser frequency can be effectively tuned by this heater current control, the heating material may age due to the high current and high temperature at the heater. This may change the heater resistance over the life of the device and cause errors in the laser frequency. Therefore, it is desirable to perform closed-loop control of the heater current to accurately fix the temperature, and thus the resonant frequency of the silicon ring resonator. Closed-loop control is also desirable to adjust for ambient temperature changes, which change the temperature of the ring resonator due to heating by the heater.

[0080] Refer again Figure 3 In one embodiment, the first ring temperature sensor 134 and the second ring temperature sensor 136 may each include a resistive temperature sensor, such as a resistance temperature detector (RTD). The first ring temperature sensor 134 and the second ring temperature sensor 136 may include a material such as platinum, nickel, copper, doped silicon, or other such materials.

[0081] Ring temperature sensors 134 and 136 are typically located near their respective ring resonators 122 and 126 to detect the temperature of their respective resonators. In some embodiments, first ring temperature sensor 134 and second ring temperature sensor 136 are fabricated directly on their respective ring resonators 122 and 126 to more accurately measure the temperature of the ring resonators and their waveguides. However, in such embodiments where temperature sensors 134 and 136 are fabricated directly on ring resonators 122 and 126, respectively, optical propagation losses may increase due to overlap between the temperature sensor material and the optical modes in the ring resonators.

[0082] Therefore, in some embodiments, Figure 2As shown, the ring temperature sensors 134 and 136 can be placed close to their respective ring resonators 122 and 126, but can be separated by a silicon dioxide material, such as the upper cladding 108. In one embodiment, the first ring temperature sensor 134 and the second ring temperature sensor 136 are at the upper cladding 108 and above (directly above or laterally displaced or both) their respective first ring resonators 122 and second ring resonators 126. Figure 3 In one embodiment, a first ring temperature sensor 134 is depicted formed on top of the upper cladding 108, above and laterally displaced from the first ring resonator 122, and spaced apart from the first ring resonator 122 by a portion of the cladding 108. In one such embodiment, the upper cladding 108 between the ring resonator 122 or 126 and its corresponding ring temperature sensor 128 or 130 is approximately 2 μm thick. Figure 3 In the illustrated alternative embodiment, the ring temperature sensor 134 is laterally displaced in the silicon device layer, which may be particularly suitable if the RTS 134 is formed from doped silicon.

[0083] like Figure 2 As shown, on-chip integrated resistance temperature detectors (RTDs) or temperature sensors using materials such as platinum, nickel, copper, or doped silicon can be fabricated close to the silicon ring resonator. Their resistance readings vary with temperature and can be used as signal feedback in closed-loop control to keep the ring resonator at a constant temperature during the life of the device. Ideally, the RTD should be fabricated directly on the silicon ring resonator to accurately measure the temperature of the silicon waveguide. However, this direct contact configuration significantly increases light propagation losses due to the overlap between the RTD material and the optical mode in the silicon ring waveguide. Therefore, the RTD can be made of a thin metal film deposited on top of the silicon ring resonator, separated from the silicon ring resonator by an upper silicon dioxide cladding, or the RTD can be made adjacent to the silicon ring resonator using doped silicon on the same silicon device layer.

[0084] A filter chip temperature sensor 138, which may also include an RTD, is formed at a portion of the silicon photonic filter chip 102 sufficiently remote from the ring heaters 128 and 130 to be configured to sense the temperature of the entire chip or global chip 112 and provide a chip reference temperature. In one embodiment, a filter chip temperature sensor 136 is formed adjacent to a corner of the silicon photonic filter chip 102, at the end of the chip 112 that includes the SSC 138.

[0085] Semiconductor optical amplifiers used in this manner or in the gain chips of ECLs typically include a pn (or pin) junction of a suitable semiconductor material. There are typically additional layers, which may be intrinsic layers (low dopant layers) and may provide cladding for the optical waveguide. Although a variety of semiconductor materials may generally be used, for optical applications, III-V semiconductors may provide the desired performance. Thus, suitable semiconductors include, for example, indium phosphide, gallium arsenide, and variations thereof. The gain chips used in the specific embodiments described below are based on InGaAsP. Indium phosphide-based optical amplifiers are further described in published U.S. patent application 2005 / 0052726 to Nakagawa et al., entitled “Optical Module and Optical Communication system,” which is incorporated herein by reference. Semiconductor lasers based on various III-V semiconductors are described in published U.S. patent application 2019 / 0097385 to Blauvelt, entitled “Wavelength Stabilized Semiconductor Laser Source,” which is incorporated herein by reference. A ridge laser having five quantum well lasers and epitaxially deposited InGaAsP layers on an InP substrate is described in US Patent Application 2014 / 0140363 to Pezeshki et al., entitled “Semiconductor Distributed Feedback (DB) Laser Array with Integrated Attenuation,” which is incorporated herein by reference.

[0086] The basic design of a semiconductor-based amplifier used as a gain chip or SOA (semiconductor optical amplifier chip) is as follows Figure 4 As shown. Figure 4 , depicts an embodiment of a semiconductor-based amplifier chip 104. As shown, the semiconductor-based amplifier chip 104 includes a substrate 160, a base electrode 162, and a laser element 164. The laser element 164 includes an n-doped layer 166, an active region 168, a p-doped layer 170, and a drive electrode 172. An optional dielectric layer 174 may be placed on the surface of the substrate 160 at a location not covered by the laser element 164. The dielectric layer 174 is formed on the substrate 160. Figure 3 The height of the dielectric layer 174 can be commensurate with the top of the laser element 164 to provide a desired degree of surface isolation. The substrate 160 can include a doped semiconductor with sufficient doping to provide a desired degree of conductivity and polarization. The ends of the gain chip 104 can include a reflective coating 176 covering at least the light emitting layer, although as shown in FIG. Figure 4The entire surface of the device shown covers the gain chip 104 . Figure 4 The opposite end of the semiconductor-based amplifier chip in is the light emitting end of the laser element 164.

[0087] One face of the gain chip can be cut as a laser output port. The other face can be coated with an anti-reflection coating and butt-coupled to the silicon photonic chip. Here, it can be noted that spot size converters are designed on both the gain chip and the silicon photonic chip to achieve mode size matching. The measured butt coupling loss between the two chips is on the order of 1 dB. Such low coupling loss is desirable for silicon photonic devices. The laser output from the gain chip is amplified by a booster SOA and then typically coupled into a single-mode optical fiber through two coupling lenses, respectively. The spot size converter (e.g., a lens) can be designed to adjust the beam size from one waveguide to another, which can be an optical fiber. Appropriate lens alignment is known in the art. See, for example, Arayama's published U.S. patent application 2005 / 0069261, entitled "Optical Semiconductor Device and Method of Manufacturing Same," which is incorporated herein by reference. A multistage spot size converter is described in published U.S. patent application 2019 / / 0170944 to Sodagar et al., entitled “Multistage Spot Size Converter in Silicon Photonics,” which is incorporated herein by reference.

[0088] As described in this article, there are several advantages to using a booster SOA. First, the SOA amplifier provides large output power while allowing low optical power density in the silicon photonic waveguide. This can prevent laser instabilities caused by silicon nonlinear effects, as described by T. Kita et al. in "Narrow Spectral Linewidth Silicon Photonic Wavelength Tunable Laser Diode for Digital Coherent Communication System", IEEE JSTQE 22, 1500612 (2016), which is incorporated herein by reference. Second, the reduced optical power in the silicon chip reduces the absolute losses in waveguide coupling and propagation, thereby improving the power efficiency of the device. Third, because the SOA is outside the laser cavity, it separates laser power control from wavelength tuning, thereby simplifying the laser control loop.

[0089] The transmission spectrum of each ring resonator filter can be tuned using an integrated waveguide heater. By controlling the integrated heater power on both ring resonator filters, lasing modes at the overlapping frequencies of the two transmission peaks of the two ring resonators can be selected over a large spectral range. Light passing through the two cascaded ring filters is then recycled back to the gain medium chip to provide optical feedback for the lasing.

[0090] Reference Figure 5 , a schematic diagram of the overall tunable laser system 190 is depicted to provide further understanding of the overall operation of the device. As shown in the figure, the tunable laser system 190 includes a silicon photonic filter chip 102, a gain chip 104, an SOA 106, and a controller 192.

[0091] As described above, the silicon photonic filter chip 102 includes an SSC (spot size converter) 116 coupled to a combiner-beamsplitter (C / S) 118, which is coupled to a first ring resonator (Res1) 122 and a second ring resonator (Res2) 126 via a first waveguide portion 120 and a second waveguide portion 128, respectively. Although the SSC 116 is described as a component of the silicon photonic filter chip 102, it should be understood that this description also includes components installed between the silicon photonic filter chip 102 and the gain chip 104. The first ring resonator 122 and the second ring resonator 126 are coupled via a coupling waveguide 124. Therefore, the SSC 116, the combiner-beamsplitter 118, the first ring resonator 122, and the second ring resonator 126 are in optical communication with each other.

[0092] The controller 192 may include a microcontroller, a microprocessor, a digital processor, or the like, or a combination thereof, as well as suitable types of memory and other control electronics as are known in the art. Figure 2 As described, the filter chip 102 includes a first heater (Heat 1) 130 and a second heater (Heat 2) 132 and associated first and second resistance temperature sensors (Temp 1) 134 and (Temp 2) 136. The controller 192 is generally in appropriate electrical communication with the heaters 130 and 132. Thus, the controller 192 can be configured to control the amount of heat generated by the heaters and, therefore, how much heat is transferred to the first and second ring resonators 122 and 126.

[0093] The controller 192 is also typically in electrical communication with the first ring temperature sensor 134, the second ring temperature sensor 136, and the filter chip temperature sensor (Temp) 138. The controller 192 is configured to receive input from the first ring temperature sensor 134, the second ring temperature sensor 136, and the filter chip temperature sensor 138 and control the heaters 130 and 132 based on the received input. In one embodiment, the controller 192 is also in electrical communication with the gain chip 104 and is configured to control one or more operations of the gain chip 104. In some embodiments, the controller 192 can perform simple iterative temperature adjustments on the heaters in small increments to adjust the temperature in the appropriate direction. However, a more sophisticated feedback loop can be used, such as the proportional-integral-derivative method discussed further below.

[0094] like Figure 6 As shown in simulation results, when the RTD is separated from the silicon ring resonator by a 2-micron-thick upper silica cladding layer, as the integrated heater is heated, the RTD temperature rises by 17°C while the ring resonator waveguide rises by 31°C. This corresponds to a temperature sensitivity of 55%. In other words, the RTD temperature change is 55% of the temperature change of the silicon ring resonator. Due to temperature gradients, RTDs based on doped silicon in the silicon device layer will also have a temperature sensitivity of less than 1005. Any temperature sensitivity below 100% results in inaccurate measurements of the ring resonator waveguide temperature. This is because the RTD cannot distinguish between local temperature changes in the ring resonator and global temperature changes in the SiPho chip. The former is characterized by an RTD-silicon temperature gradient and a temperature sensitivity below 100%, depending on the distance between the RTD and the ring resonator. The latter is characterized by 100% temperature sensitivity because the RTD is buried in the SiPho chip and experiences exactly the same temperature change as the SiPho chip at thermal equilibrium.

[0095] Global chip temperature variations can be caused by ambient temperature variations, gain medium temperature variations, or thermal crosstalk from other on-chip integrated heaters. Therefore, the RTD resistance signal is the combined effect of local and global heat sources characterized by different temperature sensitivities. Without knowing the relative contribution ratio of these two heat sources, it can lead to an error in the silicon ring resonator's temperature reading. This temperature reading error can be calculated as follows:

[0096]

[0097] Where T RTD_total =T RTD_local +T RTD_global is the total RTD temperature change caused by the two heat sources, and S RTD_local and S RTD_global are the temperature sensitivities of the RTD to the two heat sources, respectively. Figure 3 The calculated ring resonant frequency error is shown, assuming a global SiPho chip temperature variation of ±0.4°C from an ambient temperature of ±40°C and a ring resonator frequency temperature sensitivity of 10 GHz / °C. For a 50% S RTD_local , there will be a 4 GHz laser frequency error, which is higher than the 1 GHz frequency error specification. Even for 80% S RTD_local , there is already a 1GHz frequency error, which consumes all the frequency error margin.

[0098] In addition to the frequency error caused by the limited RTD temperature sensitivity, another significant challenge faced by external cavity lasers using photonic integrated circuits is the significant thermal crosstalk between the ring resonator filters, which is because they are manufactured on the same silicon substrate. When one of the integrated heaters is tuned to control the characteristics of one frequency selective element, the thermal crosstalk from the integrated heater affects the second frequency selective element. In order to keep the second frequency element at a constant temperature, the second integrated heater can be tuned in a PID (proportional-integral-derivative) closed-loop control, which in turn affects the first frequency selective element due to the thermal crosstalk from the second integrated heater. This tuning of multiple integrated heaters in an iterative manner due to thermal crosstalk can affect the tuning stability, tuning accuracy, and tuning time of the frequency selective elements. As Figure 7 As shown, when the integrated heater 2 is heated by 60 mW heater power, the RTD2 resistance reading rises by 1.8%, while the RTD1 reading also changes by about 0.2%, indicating thermal crosstalk from the integrated heater 2.

[0099] One way to address frequency errors and thermal crosstalk is to add a reference RTD to measure the global chip temperature change, such as Figure 2 As shown in the chip RTD in . Therefore, RTD1 and RTD2 located at the two frequency selective element positions can distinguish the contributions of local ring resonator and global chip temperature changes. As described below for a specific prototype embodiment, without this reference chip RTD, the laser frequency shifts as much as 4 GHz when the ambient temperature varies between 10°C and 80°C. In contrast, with the reference chip RTD function enabled, the frequency shift can be reduced by about an order of magnitude. The measured frequency error can be within ±0.5 GHz, and in some embodiments, it is less than the frequency error specification of ±1 GHz. When the power from the SOA increases, this causes a significant increase in temperature in the SiPho chip. This temperature increase is explored below for a prototype embodiment where the SOA current increases from 500 mA to 600 mA and then to 700 mA. With the chip-level RTD sensor enabled, the control loop is able to maintain the laser frequency within the specification range.

[0100] As mentioned above, each ring resonator can also be used with a separate RTD sensor. In addition, as described in this article, chip-scale RTD sensors can provide improved feedback control of the ring resonator temperature. Figure 8 , shows an embodiment of a SiPho chip having a ring resonator with modifications to achieve the improvements described herein, and the ring resonator is configured similarly to the structure of Sato et al. Figure 8 , the filter chip 200 is configured to be coupled to the gain chip 104 in a manner similar to that described above with respect to the filter chip 102. Also similar to the filter chip 102, the filter chip 200 includes a plurality of layers (see Figure 2 ), the plurality of layers include an upper cladding layer 108, a device layer 110, a lower cladding layer 112, and a substrate 114. However, rather than forming a ring waveguide optical path, the waveguide and resonator together with the reflector form a non-circular path or a terminated path, where the incident light follows approximately the same path as the outgoing light, as further described below. The filter chip 200 is relatively Figure 2 The structure in has the disadvantage that no interferometer is provided to provide improved stability and lower sensitivity to optical noise in the laser cavity.

[0101] exist Figure 8 In the illustrated embodiment, the filter chip 200 includes a first waveguide portion 220, a first ring resonator 222, a second waveguide portion 228, a second ring resonator 226, a reflector portion 250, a first heater 230, a second heater 232, a first ring temperature sensor 234, a second ring temperature sensor 236, and a chip temperature sensor 238, in a structure provided by multiple layers. The filter chip 200 defines a first end (front end) 240 and a second end (back end) 242. The first waveguide portion 220, the first ring resonator 222, the second waveguide portion 228, the second ring resonator 226, and the reflector portion 250 form an optical path for transmitting light, which terminates at the reflector portion 250. Light that resonates with the ring resonator is reflected back through the optical path, while other light is generally dissipated.

[0102] In one embodiment, the first waveguide section 220 is formed into an arcuate shape, having a first substantially linear portion adjacent to the front end 240 of the filter chip 200 and configured for optical communication with the gain chip 104; a second substantially linear portion adjacent to the first ring resonator 222; and a curved portion connecting the first and second linear portions. In one embodiment, the second waveguide section 228 may be a substantially straight linear waveguide extending laterally between the first and second ring resonators 222 and 226. The reflector section 250 includes a reflector in communication with the second ring resonator 226. In one embodiment, the reflector section 250 may include the waveguide section 252 and the reflector structure 254. In other embodiments, the reflector section 250 may include only the waveguide 252 acting as a reflector, or only the reflector structure 254. In one embodiment, the reflector 254 may include a metalized mirror, an annular reflector, or another known type of optical reflector.

[0103] The first and second heaters 230 and 232 are similar to the heaters 130 and 132 described in the first embodiment of the filter chip 102 and can be selectively controlled by a controller, such as the controller 192, to heat their respective ring resonators 222 and 226, thereby changing the optical frequency, i.e., “tuning” the laser 100. The first and second ring temperature sensors 234 and 236 are similar to the sensors 134 and 136 described in the first embodiment of the filter chip 102 and sense the temperatures of their respective first and second ring resonators 222 and 226. The chip temperature sensor 238 is similar to the chip sensor 138 of the filter chip 102 and is configured to sense the overall or global temperature of the filter chip 200 at a portion of the chip 102 that is remote from the heaters 130 and 132.

[0104] In operation, and generally speaking, light from the gain chip 104 resonating with the two resonant rings is transmitted into the filter chip 200 along the first waveguide portion 220, through the first ring resonator 222, through the second waveguide 228, through the second ring resonator 226, and to the reflector 250. The reflector 250 reflects the light back along the path of the second ring resonator 226, the second waveguide portion 228, the first ring resonator 222, and the first waveguide portion 220 to be output to the gain chip 104 (see also FIG. Figure 2 ).

[0105] Reference Figure 9Another embodiment of a filter chip 270 is depicted with a non-interferometer-based optical path terminating in a reflector. As described in further detail below, filter chip 270 is similar to chip 200 but includes a series of coupled ring resonators without intervening waveguides. This filter design is adapted from the transmission optical filter structure described in published U.S. patent application 2010 / 0183312 to Bolla et al., entitled “Method and Device for Hitless Tunable Optical Filtering,” which is incorporated herein by reference.

[0106] In one embodiment, Figure 9 As shown, the filter chip 270 includes a plurality of chip layers as described above with reference to the filter chip 102, namely, layers 108-114 (see FIG. Figure 2 ), and a first waveguide 220, an initial or first ring resonator 222, a final ring resonator 226, a reflector 252, an initial or first ring heater 230, a final ring heater 232, an initial or first ring temperature sensor 234, a final ring temperature sensor 236, and a chip sensor 238. An axis extending between the first ends 240 and 242 defines a longitudinal axis.

[0107] like Figure 9 As shown, the first waveguide portion 220 includes a straight linear waveguide extending axially along the chip 270 and is configured to be connected to the gain chip 104 (see FIG. Figure 2 Although the first waveguide portion 220 is depicted as linear, it should be understood that the first waveguide 220 may be defined as other shapes, such as, but not limited to, the curved shape of the waveguide 220 of the filter chip 200 or the curved shape of the waveguide 120 of the filter chip 102.

[0108] The filter chip 270 may include two or more ring resonators including a first ring resonator 222 and a final ring resonator 226 forming a ring resonator string. Ellipse 221 indicates that an additional ring resonator (not depicted) may optionally be located between the first ring resonator 222 and the final ring resonator 226. If there are no additional ring resonators, the first ring resonator 222 and the final ring resonator 226 will be placed adjacent to each other to provide proper optical coupling. In one embodiment, the ring resonators are distributed in a transverse or radial direction, and the ring resonators are adjacent to each other and in optical communication with each other. In one embodiment, as Figure 8 As shown, the ring resonators are linearly aligned in the lateral direction (ie, in a straight line). In other embodiments, some of the ring resonators may be offset from each other in the axial direction.

[0109] The final waveguide 252 extends axially and is formed adjacent to the final ring resonator 226. The final waveguide 252 defines two ends, one end proximate to the chip end 240 and the other end proximate to the chip end 242. In one embodiment, and as shown, the final ring resonator 232 is formed and positioned closer to the chip end 240 than to the chip end 242. The final waveguide 252 acts as a reflector, reflecting light received from the final ring resonator 226 back toward the ring resonator 226. The final waveguide 252 may include other shapes, such as a partial ring or a curved portion, and may include additional reflective elements.

[0110] As described above with reference to the embodiment of the filter chip 102 , the heaters 230 and 240 , along with the ring temperature sensors 234 and 236 , may be used to control and tune the solid-state laser 100 .

[0111] Reference Figure 10 Another embodiment of the silicon photonic filter chip 102 includes Figure 2 In the depicted embodiment, the embodiment of the filter chip 102 includes a spot size converter 116, a beam splitter-combiner 118, a first waveguide section 120, a first ring resonator 122, a second ring resonator 126, a third ring resonator 154, a second waveguide section 128, a first heater 130, a second heater 132, a third heater 150, a first ring temperature sensor 134, a second ring temperature sensor 136, a third ring temperature sensor 152, and a filter chip temperature sensor 138. Similar to Figure 2 An embodiment of Figure 10 The filter chip 102 includes a beam splitter-combiner 118 that splits an incident optical signal such that a first light portion travels along a first waveguide 120 toward a first ring resonator 122 and a second light portion travels along a second waveguide 128 toward a second ring resonator 126. However, in this embodiment, the first ring resonator 122 and the second ring resonator 126 are coupled through one or more ring resonators (e.g., through a third ring resonator 154). In principle, the third ring resonator can impose constraints on the reflected light so that the light resonates properly with all three ring resonators, which can result in greater sideband suppression. Based on this design, if the light resonates with all three ring resonators, light traveling along an arm from the beam splitter-combiner can be coupled into a ring resonator, passed to the third ring resonator 154, then into the opposite ring resonator of the third ring resonator 154, and down the opposite arm to the beam splitter-combiner.

[0112] The second proposed approach is to fabricate thermal isolation trenches in the silicon substrate in such a way that the silicon ring resonator, the integrated heater, and the RTD used for temperature sensing are significantly thermally isolated from the other components on the SiPho integrated circuit. This can significantly improve the RTD temperature sensitivity, thereby reducing frequency errors. Figure 10 A schematic diagram of one of these trench structures is shown. Since all components, including the heater, RTD, and silicon ring, are within the thermally isolated region, they will have nearly the same temperature in thermal equilibrium. In other words, the RTD temperature sensitivity to the local ring resonator becomes close to 100%.

[0113] like Figure 6 As shown in Figure 1, when the RTD temperature sensitivity to the local ring resonator is increased to 95%, the frequency error drops to ~0.2 GHz, which is well below our specified 1 GHz frequency error tolerance. A second benefit of using this thermal isolation trench is that the thermal crosstalk between frequency selective components is significantly reduced because the integrated heater is confined within the thermal isolation region, with very limited generated heat leaking out of the region. Figure 11 to Figure 1 As shown in FIG5 , the thermal isolation trench can have several different structural designs.

[0114] Reference Figure 11 to Figure 1 5 , depicts several embodiments of a silicon photonic filter chip 102 with thermal isolation trenches defined in the chip. Figure 11 to Figure 1 The features described in 5 may be employed not only by the filter chip 102, but also by various other embodiments of the filter chips described herein, including but not limited to the filter chips 200 and 270. The use of thermal isolation trenches around the ring resonator, the integrated heater, and the temperature sensor helps to thermally isolate these components, thereby significantly improving the thermal sensitivity of the temperature sensor, thereby making the temperature sensed by the temperature sensor closer to the temperature of the ring resonator, thereby reducing the frequency tuning error. Although Figure 11 An insulating groove 300 is depicted surrounding the insulating area 300 on the bottom and sides, but other designs or shapes as seen in cross-section may be used, e.g. Figure 13 and Figure 14 Those depicted in . Figure 11 、 Figure 13 as well as Figure 14 Each of depicts a portion of the silicon photonic filter chip 102 viewed in perspective and in cross-section. For illustrative purposes, only a portion of each ring resonator 122 is depicted.

[0115] like Figure 11 As shown, the trench design includes a complete undercut of the silicon below the ring waveguide in the heating area, for example. Figure 11 ( Figure 12 cross section) and Figure 12(Top view of a portion of the silicon photonic filter chip 102), depicting the thermal isolation trench 300. In the top view, the ring resonator 122 is shown in dashed lines to indicate that it is a hidden structure, as it is not on the surface of the structure. In this embodiment, as shown, the heater 130 is located directly above the ring resonator 122 and can be formed in the cladding or other layers. The ring temperature sensor 134 is positioned in the same layer as the heater 130, laterally offset from the heater 130. In the depicted embodiment, the heater 130 defines a lateral width that is greater than the lateral width of the ring resonator 122 to ensure sufficient and uniform heating of the ring resonator 122.

[0116] The thermal isolation trench 300 includes a first portion or bottom portion 302, a second portion or inner portion 304, and a third portion or outer portion 306. As shown, the thermal isolation trench 300 may be generally U-shaped in cross-section and may be arcuate. In one embodiment, the trench 300 is formed by removing portions of the substrate 114, the lower cladding layer 112, and the upper cladding layer 108 surrounding the ring resonator 122, thereby leaving a device support portion 310.

[0117] Thermal isolation trench 300 surrounds thermal isolation region 310 on a first or bottom side, a second or inner side, and a right or outer side. In one embodiment, thermal isolation region 310 includes a portion of layers 114, 112, and 108 in which portions of ring resonator 122, heater 130, and ring temperature sensor 134 are embedded. Thermal isolation region 310 extends from chip base portion 312 and defines an arcuate shape. In one embodiment, the curvature of thermal isolation region 310 is substantially the same as the curvature of ring resonator 122 and forms a bridge-like structure between base portion 312 and another base portion opposite base portion 312.

[0118] In one embodiment, and as Figure 11 and Figure 12 As shown, the thermal isolation trench 300 does not completely circumferentially surround the ring resonator 122 in order to provide some connection structure and support structure for the resonator 122, the heater 130, the ring temperature sensor 134, and the thermal isolation area. Figure 11 and Figure 12 In some embodiments, the thermal isolation grooves 300 extend circumferentially about 60°. In other embodiments, the thermal isolation grooves 300 extend beyond 60° to provide further isolation, which may be beneficial for larger heaters. In one embodiment, the thermal isolation grooves 300 extend circumferentially from 30° to 90°.

[0119] The second isolation trench design is to make the trench only on one side of the ring waveguide, e.g. Figure 13. If there are other components on the other side of the ring waveguide (so Figure 11 The trench etching shown is impractical), this may be a suitable design. Figure 1 3, depicts an alternative thermal isolation trench 300 that includes only a bottom portion and side portions. In this embodiment, the thermal isolation trench 300 includes a bottom portion 302 extending below the thermal isolation region 310, and side portions 306 extending adjacent to and beside the thermal isolation region 310.

[0120] Reference Figure 14 , depicts another alternative thermal isolation trench 300. In this embodiment, a portion of the silicon in the thermal isolation region 310 remains intact to support the ring resonator 122. In this embodiment, the thermal isolation trench 300 includes bottom trench portions 302a and 302b, an inner trench portion 304, and an outer trench portion 306. This becomes an ideal trench design when a lengthy silicon etch process to completely remove the underlying silicon is impractical, or when mechanical stability without underlying silicon support becomes an issue, such as Figure 13 design.

[0121] In other embodiments, for example Figure 1 5, the thermal isolation trench 300 and thermal isolation region 310 can extend 360° around the ring resonator 122, or in other embodiments extend primarily around the circumference, such as approximately 340° as shown, to nearly form a complete ring, but in one embodiment will have an arc length of less than 360°. Such an embodiment can be used to maximize thermal isolation and can also be useful if additional heaters 130 are used. In addition, multiple thermal isolation trenches 300 can be used, each defining an arc length of less than 360° and having a combined arc length of less than 360°, for example, Figure 15 Those depicted in .

[0122] Using this silicon-on-insulator type waveguide structure for silicon photonic chips, an underetch can be performed by etching the silicon dioxide cladding down to the silicon substrate. A steam-based wet etch can then be introduced into the silicon, with the underetching continuing as the etching proceeds. This process is further described by Dong et al. in "Thermally tunable silicon racetrack resonators with ultralow tuning power," Optics Express 2010, Vol. 18(19), 20298-20304, which is incorporated herein by reference.

[0123] SiPho ESLs suitable for use in the context of the present invention are discussed in more detail below in the section directed to specific prototype embodiments.

[0124] Temperature sensors can provide frequency tuning and thermal stability. Whether or not the SiPho chip thermal sensor is sufficient to provide thermal stability of the frequency, frequency tuning involves adjusting the temperature of the ring resonator. Although the frequency may initially be correlated to the specific thermal output of the ring heater, due to temporal variations, it may be beneficial to perform local measurements to further adjust the laser output frequency.

[0125] To maintain thermal stability, closed-loop feedback control can be used. The temperature measured in the chip-level temperature sensor can be evaluated by measuring the voltage at the RTD, which can then be processed by analog analysis or digital processing, where the analog voltage can be processed by an analog-to-digital converter. A microprocessor can be used to control the system. The implementation of a closed loop based on PID (proportional-integral-differential) closed-loop control is well known. The control function has one proportional, one integral, and one involving differential. It is not necessary to use all terms. The PID controller can be used to adjust the voltage supplied to the heater to maintain the chip temperature at a desired value to regulate temperature fluctuations. The use of a PID controller to adjust the optical components in the closed-loop feedback loop is also described in a published U.S. patent application entitled "System and Methods for Multiple-Input, Multiple-Output Controller in a Reconfigurable Optical Network" by Collings et al., which is incorporated herein by reference. A commercial temperature control ship can be used, and a PID actuator controller can be obtained from Omega Engineering (Stamford, CT, USA).

[0126] Specific implementation plan design

[0127] Figure 2Schematic diagram of an external-cavity tunable laser using a silicon photonic integrated circuit. It consists of a gain medium chip and a silicon photonic (SiPh) optical filter chip. The gain section of the gain chip consists of multiple quantum wells based on InGaAsP. The front side of the gain chip is cleaved and serves as the laser output port. This air-III-V interface reflects 32% of the light back to the gain chip as optical feedback. This facet of the gain chip can then be butt-coupled to a SiPho filter chip using active alignment or passive flip-chip bonding. The SiPho external cavity consists of two cascaded ring resonator filters with slightly different transmission spectra. The transmission spectrum of each ring resonator filter can be tuned using an integrated waveguide heater. By controlling the power of the integrated heaters on the two ring resonator filters, lasing modes at the overlapping frequencies of the two ring resonator transmission peaks can be selected over a wide spectral range. Light passing through the two cascaded ring filters is then recycled back to the gain medium chip to provide optical feedback for the laser. A spot size converter (SSC), based on, for example, silicon nitride, can be used to match the mode sizes between the gain medium chip waveguide and the SiPho chip waveguide.

[0128] The silicon photonic chip we designed consists of two cascaded ring resonators and a phase control section in a loop-back configuration, e.g. Figure 2 The two rings can have a nominal free spectral range (FSR) of 300 GHz and 310 GHz, respectively. Thermal tuning is designed to adjust each independently within a few tenths of a part. The FSR and operating wavelength determine the physical size of the rings, and for the prototype SiPho chip, the rings have a diameter of approximately 120-130 microns.

[0129] If the common resonant frequency is set to 195,300 GHz (wavelength approximately 1535 nanometers), the 300 GHz ring will resonate at order 651, while the 310 GHz ring will resonate at order 630: 300*651=310*630=195,300. Each ring will then also resonate at ±n orders of the quoted order, but the quoted order is the only one that strongly overlaps the common frequency. The typical FWHM of the resonance peak will be around 10 GHz. So the finesse for each ring will be (310,300) / 10~30. Roughly speaking, this finesse value means that a typical resonating photon will circulate through each ring an average of 30 times before continuing on. This also means that the "Q" value (resonator quality) for each ring is approximately 195,300 / 10~20,000.

[0130] The two ring resonators have slightly different free spectral ranges (FSRs) to provide a wide 65nm tuning range via the Vernier effect. The coupling ratio between the ring resonator and bus waveguide is carefully optimized to achieve low insertion loss and a narrow filter passband. This provides a sufficiently large side-mode suppression ratio (SMSR) for stable single-mode lasing. Thin-film heaters are fabricated on top of each ring waveguide and phase control section, with a measured 2π power of approximately 50mW for both ring resonators. High-efficiency and high-saturated power gain chips and SOAs are used, essentially the same as those used in existing ECL products.

[0131] The prototype device was tested for performance. The assembled silicon photonic tunable laser was mounted on a thermoelectric cooler (TEC) to maintain a constant device temperature. For all following experiments, the current injected into the gain chip was kept constant at 200mA. The injection current into the SOA can be varied to control the laser output power. Figure 16 The superimposed spectrum of 27 wavelength channels tuned at 65 nm by heating only one ring resonator is shown. If both ring resonator heaters are controlled, the laser wavelength can be tuned continuously over the entire tuning range. In this measurement, as Figure 17 As shown in the point in the lower middle curve, the SOA current is set to 900mA, and the measured fiber-coupled output power is 21.5 to 21.8dBm over the entire C-band range. This large output power is desirable for compensating for transmitter losses using complex modulation formats. Figure 17 As shown in the points in the upper middle curve, a large SMSR (Side Mode Suppression Ratio) exceeding 50 dB is also obtained at each wavelength channel.

[0132] The prototype was used to study the SOA current dependence of output power, spectral linewidth, and relative intensity noise (RIN). Figure 18AThe fiber-coupled output power at 1547.0nm is shown as a function of the SOA current. The figure indicates that the output power reaches 100mW at a 500mA SOA current. When the SOA current is further increased to 700mA, the boost SOA begins to gradually saturate. At a 950mA SOA current, the maximum output power reaches a record high of 150mW. In addition, the laser spectrum linewidth and RIN are measured. We use a frequency discriminator method to measure the intrinsic laser linewidth, as taught by V. Michaud-Belleau et al. in "Passive Coherent Discriminator Using Phase Diversity for The Simultaneous Measurementof Frequency Noise and Intensity Noise of A Continuous-Wave Laser", Metrologia 53, 1154 (2016), which is incorporated herein by reference. It uses a coherent delay line interferometer to convert laser frequency noise into intensity fluctuations, which can then be measured by a photodetector. A frequency noise floor between 100 and 400 MHz is used to estimate the intrinsic Lorentzian linewidth, thus avoiding the effects of 1 / f thermal and electronic noise at lower frequencies. Figure 1 The upper point in Figure 8B shows the linewidth measured at 1547.0nm. Note that there is no noticeable degradation in linewidth even when the SOA current is increased to 900mA. In fact, the linewidth is well below 60kHz when the SOA operating current is between 200 and 900mA. The linewidths of two other wavelengths at the beginning and end of the C-band were also tested, both of which produced linewidths narrower than 80kHz (data not shown here). While such a narrow linewidth is suitable for 16- or 64-QAM modulation formats, further improvement can be expected by optimizing the silicon photonics chip layout, if necessary. Figure 1 The lower plot in Figure 8B shows the relationship between laser RIN and SOA current. For SOA currents between 200 and 900 mA, a low RIN of less than -150 dB / Hz (averaged from 0.1 to 10 GHz) is measured.

[0133] Figure 19A and Figure 1 The line in 9C shows the frequency shift due to changes in SOA current or TEC temperature settings. The dots show the frequency estimated by the reference RTD, which gives a low measurement error within ±0.2 GHz. The corresponding frequency error is plotted in Figure 19B and Figure 19D This demonstrates that the RTD can accurately track laser wavelength drift caused by external thermal perturbations such as SOA current changes or package temperature variations.

[0134] For the prototype device, the simulation results of the temperature gradient around the waveguide and heater are shown in Figure 20 As shown. Figure 6 As shown in the simulation results in , when the RTD is separated from the silicon ring resonator by a 2-micron-thick upper silica cladding layer, the temperature of the RTD increases by 17°C as the ring resonator waveguide increases by 31°C as the integrated heater is heated. The implications of temperature sensitivity below 100% are generally discussed above.

[0135] like Figure 21 As shown in the dots, without the reference chip RTD, the laser frequency shift is as high as 4 GHz when the ambient temperature changes between 10°C and 80°C. In contrast, with the reference chip RTD function enabled, the frequency shift can be reduced by about an order of magnitude. The measured frequency error can be within ±0.5 GHz, which is less than the ±1 GHz frequency error specification. Figure 16 Draw with square dots. Figure 22 As shown in the figure, by increasing the SOA current from 500mA to 600mA and then to 700mA (as indicated by the two arrows in the top frame of the figure), thermal perturbations can be introduced into the ordinary silicon substrate. This SOA current change is required for laser output power tuning, but it will produce temperature changes on the photonic integrated chip. Figure 21 As shown by the solid line in the lower box, if the integrated chip RTD function is turned off, the laser frequency drifts to 7.3GHz and then to 7.0GHz, all while the TEC is turned on to stabilize the chip temperature. Figure 22 As shown by the dotted line in the lower box, the laser frequency can be stabilized back to the original spectral position. The frequency error when the integrated chip RTD is turned on is well below the ±1 GHz frequency error specification. The two observed frequency drops come from PID controller overshoot, which can be corrected by further optimizing the controller parameters. Note that this laser frequency stability against temperature changes is obtained through our integrated sensor technology without the use of any external instrumentation, such as an optical spectrum analyzer (OSA) (as used by H. Guan et al. in “Widely-tunable, narrow-linewidth III-V / silicon hybrid external-cavity laser for coherent communication”, Opt. Express 26, 7920-7933 (2018), which is incorporated herein by reference) or an additional wavelength locker.

[0136] Because the frequency shift caused by thermal disturbances can be accurately tracked, the filter heater power can be adjusted accordingly to precisely compensate and tune to any target frequency. Figure 23 The figure shows the relationship between the target frequency shift and the actual frequency shift after tuning the heater power. For target frequency shifts between -30 and 30 GHz, the frequency tuning shows an error of less than ±0.5 GHz. This is within our specification for SiPhoECL frequency tuning accuracy of ±1 GHz.

[0137] Figure 24 A frequency stabilization experiment is shown to demonstrate the feasibility of this control method by using a single reference RTD and two filter heaters. At approximately 9 minutes and 24 minutes, the SOA current is changed to 600mA and then to 750mA, which causes some thermal disturbance to the silicon photonic chip. The SOA voltage changing with time is plotted in Figure 24 In the upper right box. Figure 24 In the lower right box, changes in the SOA voltage cause the laser frequency to drift by up to 20 GHz (first line). This frequency drift is accurately tracked by the reference RTD (second line, which is indistinguishable from the first line at the plot resolution). At 40 minutes, the control code is enabled, and the frequency is adjusted back to the original spectral position with an error of only 0.2 GHz. The frequency error over time is plotted in the right box. These results demonstrate that the laser frequency can be stabilized against thermal perturbations by simply calibrating and tuning the heater power, and then accurately tuned to any target frequency without knowing the local temperature of the filter.

[0138] In addition to its exceptional performance, most of the packaging and testing processes, as well as the control electronics and gain chip of this silicon photonic laser, are based on our mature commercial products. Therefore, we believe this prototype device has great potential for high-volume production, optionally with further tuning.

[0139] In this paper, we demonstrate a high-performance hybrid integrated silicon photonic tunable laser with a record-breaking fiber output power exceeding 140 mW using an integrated high-saturation-power booster SOA. We achieve a spectral linewidth narrower than 80 kHz and a RIN below -150 dB / Hz, suitable for high-order modulation. The integration of the booster SOA shows no degradation in the laser spectral linewidth or RIN. The integrated sensor technology we developed for the silicon photonic chip also enables precise frequency control down to sub-1 GHz. We further demonstrate the feasibility of this silicon photonic tunable laser for coherent applications.

[0140] The above embodiments are intended to be illustrative and not limiting. Additional embodiments are within the claims and inventive concept. In addition, although the present invention has been described with reference to specific embodiments, it will be appreciated by those skilled in the art that modifications may be made in form and detail without departing from the spirit and scope of the present invention. Any incorporation by reference of the above-mentioned documents is limited so as not to include subject matter that is contrary to the explicit disclosure herein. With respect to the specific structures, compositions and / or methods described herein with components, elements, ingredients or other partitions, unless otherwise expressly stated, it should be understood that the disclosure herein covers specific embodiments, including embodiments of specific components, elements, ingredients, other partitions or combinations thereof, as well as embodiments consisting essentially of these specific components, ingredients or other partitions or combinations thereof that may include additional features that do not change the basic properties of the subject matter as suggested in the discussion. Unless otherwise expressly stated, the term "about" as used herein refers to the measurement error of a specific parameter.

Claims

1. An optical chip, comprising: Input waveguide; A Sagnac interferometer, optically connected to the input waveguide, comprising: at least two waveguide branches, and at least two ring resonators, each coupled to a separate waveguide branch; at least two resistive heaters, each associated with one of the at least two ring resonators; and at least two resistive temperature sensors, each associated with one of the at least two resistive heaters, wherein the controller is connected to receive a signal from each of the at least two resistive temperature sensors to account for one or more temperature measurements in a feedback loop, and wherein a ring resonator of the at least two ring resonators is associated with a thermal isolation trench such that a corresponding resistive heater, a corresponding resistive temperature sensor, and the ring resonator are located within a thermally isolated region relative to other components of the optical chip, The optical chip further comprises a chip temperature sensor configured to sense a global temperature of the optical chip. The controller is configured to control the power of the at least two resistive heaters based on the signal and the global temperature to reduce a frequency error in an output frequency of the optical chip caused by temperature sensitivity of the at least two resistive temperature sensors and external thermal disturbances of the optical chip. 2 . The optical chip according to claim 1 , wherein the thermal isolation trench undercuts the ring resonator and surrounds the ring resonator on a bottom and both sides of the ring resonator. 3 . The optical chip according to claim 1 , wherein the respective resistive heaters are located directly above the ring resonator. The optical chip according to claim 3 , wherein the respective resistive heaters are formed in a cladding layer. The optical chip according to claim 3 , wherein a width of the respective resistive heaters is greater than a width of the ring resonator. 6 . The optical chip of claim 1 , wherein the respective resistive temperature sensors are positioned laterally offset relative to the respective resistive heaters and are located in the same layer as the respective resistive heaters. 7 . The optical chip according to claim 1 , wherein the thermal isolation trench has an arc shape, a curvature of the arc shape substantially matching a curvature of the ring resonator. The optical chip according to claim 1 , wherein the thermal isolation trench extends circumferentially with an arc between 30 degrees and 90 degrees. 9 . The optical chip according to claim 1 , wherein the thermal isolation trench extends circumferentially over an arc of at least 340 degrees.

10. The optical chip according to claim 1, wherein the thermal isolation trench is a first thermal isolation trench, wherein the ring resonator is associated with a second thermal isolation trench, the second thermal isolation trench being located within the thermal isolation region, wherein the first thermal isolation trench has a first radius, the first radius being larger than a radius of the ring resonator, and The second thermal isolation trench has a second radius, and the second radius is smaller than the radius of the ring resonator.

11. A tunable solid-state laser device, comprising: semiconductor-based gain chips; as well as A silicon photonic filter chip with tunable capability, wherein the silicon photonic filter chip comprises: Input waveguide; A Sagnac interferometer, optically connected to the input waveguide, comprising: at least two waveguide branches, and at least two ring resonators, each coupled to a separate waveguide branch; at least two resistive heaters, each associated with one of the at least two ring resonators; and at least two resistive temperature sensors, each associated with one of the at least two resistive heaters, wherein the controller is connected to receive a signal from a resistive temperature sensor of the at least two resistive temperature sensors to account for one or more temperature measurements in a feedback loop, and wherein a ring resonator of the at least two ring resonators is associated with a thermal isolation trench such that a corresponding resistive heater, a corresponding resistive temperature sensor, and the ring resonator are located within a thermally isolated region relative to other components of the silicon photonic filter chip, The silicon photonic filter chip further comprises: a chip temperature sensor configured to sense the global temperature of the silicon photonic filter chip. The controller is configured to control the power of the at least two resistive heaters based on the signal and the global temperature to reduce the frequency error of the output frequency of the silicon photonic filter chip caused by the temperature sensitivity of the at least two resistive temperature sensors and the external thermal disturbance of the optical silicon photonic filter. 12 . The tunable solid-state laser device according to claim 11 , wherein the thermal isolation trench undercuts the ring resonator and surrounds the ring resonator on a bottom and both sides of the ring resonator.

13. The tunable solid-state laser device according to claim 11, wherein the respective resistive heaters are located directly above the ring resonator.

14. The tunable solid-state laser device of claim 13, wherein the respective resistive heaters are formed in a cladding.

15. The tunable solid-state laser device according to claim 13, wherein a width of the respective resistive heater is greater than a width of the ring resonator.

16. The tunable solid-state laser device of claim 11, wherein the respective resistive temperature sensor is positioned laterally offset relative to the respective resistive heater and is located in the same layer as the respective resistive heater.

17. The tunable solid-state laser device of claim 11, wherein the thermal isolation trench has an arc shape, a curvature of the arc shape substantially matching a curvature of the ring resonator.

18. The tunable solid-state laser device of claim 11, wherein the thermal isolation trench extends circumferentially in an arc between 30 degrees and 90 degrees.

19. The tunable solid-state laser device of claim 11, wherein the thermal isolation trench extends circumferentially over an arc of at least 340 degrees.

20. The tunable solid-state laser device according to claim 11, wherein the thermal isolation trench is a first thermal isolation trench, wherein the ring resonator is associated with a second thermal isolation trench, the second thermal isolation trench being located within the thermal isolation region, wherein the first thermal isolation trench has a first radius, the first radius being larger than a radius of the ring resonator, and The second thermal isolation trench has a second radius, and the second radius is smaller than the radius of the ring resonator.

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