Power Module

Abstract

The embodiment of the present invention relates to the technical field of semiconductor devices, and discloses a power module. In the power module of the embodiment of the present invention, by setting through holes in the first metal foil and the third metal foil, and setting the second metal foil used for electrically connecting the gate of the upper bridge chip and the fourth metal foil electrically connecting the gate of the lower bridge chip in different through holes, instead of setting the second metal foil and the fourth metal foil on the outer edges of the first metal foil and the third metal foil, the total area of ​​the metal foil set on the substrate can be reduced, and the integration of the internal structure of the power module can be improved.

Description

Technical Field

[0001] The embodiments of the present invention relate to the technical field of semiconductor devices, and in particular to a power module. Background Art

[0002] Power modules have advantages such as high power density and high application value in the field of semiconductor technology. Power modules usually increase power density by connecting chips in parallel. However, existing power modules have problems such as large module size, low integration, and low reliability. Summary of the invention

[0003] An object of the embodiments of the present invention is to provide a power module to solve the problems of large size, low integration and low reliability of the power module.

[0004] In order to solve the above technical problems, an embodiment of the present invention provides a power module, including:

[0005] A substrate; an upper bridge circuit, comprising a first metal foil, a plurality of second metal foils and a plurality of upper bridge chips, wherein the first metal foil is arranged on the substrate and has a plurality of first through holes, the second metal foils are arranged in the first through holes in a one-to-one correspondence and are electrically insulated from the first metal foil, and the upper bridge chip is arranged on the first metal foil; a lower bridge circuit, comprising a third metal foil, a plurality of fourth metal foils and a plurality of lower bridge chips, the third metal foil is arranged at intervals from the first metal foil and has a plurality of second through holes, the fourth metal foils are arranged in the second through holes in a one-to-one correspondence and are electrically insulated from the third metal foil, and the lower bridge chip is arranged on the third metal foil; wherein the upper bridge chip and the lower bridge chip are field effect transistors, the gate of the upper bridge chip is electrically connected to the second metal foil in a one-to-one correspondence, the second metal foils are electrically connected in sequence, the gate of the lower bridge chip is electrically connected to the fourth metal foil in a one-to-one correspondence, and the fourth metal foils are electrically connected in sequence.

[0006] Optionally, a fifth metal foil is provided on the substrate and located on a side of the third metal foil away from the first metal foil, the source of the upper bridge chip is electrically connected to the first metal foil, and the drain of the upper bridge chip is electrically connected to the third metal foil; the source of the lower bridge chip is electrically connected to the third metal foil, and the drain of the lower bridge chip is electrically connected to the fifth metal foil.

[0007] Optionally, the drain of the upper bridge chip is electrically connected to the third metal foil via a plurality of wires arranged in parallel, and the drain of the lower bridge chip is electrically connected to the fifth metal foil via a plurality of wires arranged in parallel.

[0008] Optionally, a fifth metal foil is provided on the substrate and located on a side of the third metal foil away from the first metal foil, the drain of the upper bridge chip is electrically connected to the first metal foil, and the source of the upper bridge chip is electrically connected to the third metal foil; the drain of the lower bridge chip is electrically connected to the third metal foil, and the source of the lower bridge chip is electrically connected to the fifth metal foil.

[0009] Optionally, the source electrode of the upper bridge chip is electrically connected to the third metal foil via a plurality of wires arranged in parallel, and the source electrode of the lower bridge chip is electrically connected to the fifth metal foil via a plurality of wires arranged in parallel.

[0010] Optionally, there are multiple gate resistors, and at least one gate resistor is provided on each of the second metal foils and each of the fourth metal foils. The gate of the upper bridge chip is electrically connected to the second metal foil via the gate resistor, and the gate of the lower bridge chip is electrically connected to the fourth metal foil via the gate resistor.

[0011] Optionally, a sixth metal foil is provided on the substrate and spaced apart from the first metal foil, the sixth metal foil is electrically insulated from the first metal foil, the third metal foil, the fourth metal foil and the fifth metal foil, and the sixth metal foil is electrically connected to the second metal foil; a first connecting terminal is provided on the sixth metal foil, and the first connecting terminal is electrically connected to the sixth metal foil; a seventh metal foil is provided on the substrate and spaced apart from the third metal foil, the seventh metal foil is electrically insulated from the first metal foil, the second metal foil, the third metal foil, the fifth metal foil and the sixth metal foil, and the seventh metal foil is electrically connected to the fourth metal foil; a second connecting terminal is provided on the seventh metal foil, and the second connecting terminal is electrically connected to the seventh metal foil.

[0012] Optionally, the third metal foil includes a chip connection part and a terminal connection part which are electrically connected to each other, the fourth metal foil and the lower bridge chip are arranged in the chip connection part, the terminal connection part is located between the sixth metal foil and the seventh metal foil, and is electrically insulated from the first metal foil, the second metal foil, the fourth metal foil, the fifth metal foil, the sixth metal foil and the seventh metal foil, a third connection terminal is provided on the terminal connection part, and the third connection terminal is electrically connected to the terminal connection part; a fourth connection terminal is also provided on the fifth metal foil, and the fourth connection terminal is electrically connected to the fifth metal foil.

[0013] Optionally, the first metal foil is further provided with a fifth connecting terminal, which is electrically connected to the first metal foil; the third metal foil is further provided with a sixth connecting terminal, which is electrically connected to the third metal foil; the fifth metal foil is further provided with a seventh connecting terminal, which is electrically connected to the fifth metal foil.

[0014] Optionally, an eighth metal foil is arranged on the surface of the substrate facing away from the first metal foil, and the area of ​​the orthographic projection of the eighth metal foil on the substrate is larger than the area of ​​the orthographic projection of the first metal foil and the third metal foil on the substrate. The eighth metal foil is used to achieve heat dissipation of the power module.

[0015] Compared with the related art, the embodiment of the present invention sets through holes in the first metal foil and the third metal foil, and sets the second metal foil used for electrically connecting the gate of the upper bridge chip and the fourth metal foil electrically connecting the gate of the lower bridge chip in different through holes, instead of setting the second metal foil and the fourth metal foil on the outer edges of the first metal foil and the third metal foil. This can reduce the total area of ​​the metal foil set on the substrate and improve the integration of the internal structure of the power module. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0017] Figure 1 is a schematic diagram of metal foil distribution of a power module according to an embodiment of the present invention;

[0018] Figure 2 is a schematic diagram of chip distribution of a power module according to an embodiment of the present invention;

[0019] Figure 3 yes Figure 1 Section along line AA';

[0020] Figure 4 is a schematic diagram of the internal circuit structure of a power module according to an embodiment of the present invention;

[0021] Figure 5 yes Figure 4 Enlarged view of the middle A1 region;

[0022] Figure 6 is a circuit topology diagram of a power module according to an embodiment of the present invention;

[0023] Figure 7 is a configuration diagram of connection terminals of a power module according to an embodiment of the present invention;

[0024] Figure 8 It is a schematic diagram of the three-dimensional structure of a power module according to an embodiment of the present invention. DETAILED DESCRIPTION

[0025] In order to make the purpose, technical scheme and advantages of the embodiments of the present invention clearer, the following will be described in detail with reference to the accompanying drawings. However, it will be appreciated by those skilled in the art that in the various embodiments of the present invention, many technical details are provided in order to enable the reader to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical scheme claimed in the present application can be implemented.

[0026] In the embodiments of the present invention, the terms "upper", "lower", "left", "right", "front", "back", "top", "bottom", "inner", "outer", "middle", "vertical", "horizontal", "lateral", "longitudinal" and the like indicating directions or positional relationships are based on the directions or positional relationships shown in the accompanying drawings. These terms are mainly used to better describe the present invention and its embodiments, and are not used to limit the indicated devices, elements or components to have a specific direction, or to be constructed and operated in a specific direction.

[0027] In addition, some of the above terms may be used to express other meanings in addition to indicating orientation or positional relationship. For example, the term "on" may also be used to express a certain dependency or connection relationship in some cases. For those skilled in the art, the specific meanings of these terms in the present invention can be understood according to specific circumstances.

[0028] In addition, the terms "installed", "set", "provided with", "opened", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral structure; it can be a mechanical connection, or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be an internal connection between two devices, elements, or components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0029] In addition, the terms "first", "second", etc. are mainly used to distinguish different devices, elements or components (the specific types and structures may be the same or different), and are not used to indicate or imply the relative importance and quantity of the indicated devices, elements or components. Unless otherwise specified, "plurality" means two or more.

[0030] One embodiment of the present invention relates to a power module, comprising: a substrate; an upper bridge circuit, comprising a first metal foil, a plurality of second metal foils and a plurality of upper bridge chips, wherein the first metal foil is arranged on the substrate and has a plurality of first through holes, the second metal foils are arranged in the first through holes in a one-to-one correspondence and are electrically insulated from the first metal foil, and the upper bridge chip is arranged on the first metal foil; a lower bridge circuit, comprising a third metal foil, a plurality of fourth metal foils and a plurality of lower bridge chips, the third metal foil is arranged at intervals from the first metal foil and has a plurality of second through holes, the fourth metal foils are arranged in the second through holes in a one-to-one correspondence and are electrically insulated from the third metal foil, and the lower bridge chip is arranged on the third metal foil; wherein the upper bridge chip and the lower bridge chip are field effect transistors, the gates of the upper bridge chips are electrically connected to the second metal foils in a one-to-one correspondence, the second metal foils are electrically connected in sequence, the gates of the lower bridge chips are electrically connected to the fourth metal foils in a one-to-one correspondence, and the fourth metal foils are electrically connected in sequence.

[0031] The power module of the embodiment of the present invention can reduce the total area of ​​the metal foil arranged on the substrate and improve the integration of the internal structure of the power module by setting through holes in the first metal foil and the third metal foil, and respectively setting the second metal foil used for electrically connecting the gate of the upper bridge chip and the fourth metal foil electrically connecting the gate of the lower bridge chip in different through holes, instead of setting the second metal foil and the fourth metal foil on the outer edges of the first metal foil and the third metal foil.

[0032] The implementation details of the power module of this embodiment are described in detail below. The following content is only provided for easy understanding of the implementation details and is not necessary for implementing this solution.

[0033] See also Figures 1 to 4The power module 100 of this embodiment includes: a substrate 110, an upper bridge circuit 120 and a lower bridge circuit 130. The upper bridge circuit 120 includes a first metal foil 121, a plurality of second metal foils 122 and a plurality of upper bridge chips 123. The first metal foil 121 is disposed on the substrate 110 and has a plurality of first through holes 121a. The second metal foils 122 are disposed in the first through holes 121a in a one-to-one correspondence and are electrically insulated from the first metal foil 121. The upper bridge chips 123 are disposed on the first metal foil 121. The lower bridge circuit 130 includes a third metal foil 131, a plurality of fourth metal foils 132, and a plurality of lower bridge chips 133. The third metal foil 131 is spaced apart from the first metal foil 121 and has a plurality of second through holes 131a. The fourth metal foils 132 are disposed in the second through holes 131a in a one-to-one correspondence and are electrically insulated from the third metal foil 131. The lower bridge chip 133 is disposed on the third metal foil 131. The upper bridge chip 123 and the lower bridge chip 133 are field effect transistors. The gate G of the upper bridge chip 123 is electrically connected to the second metal foil 122 in a one-to-one correspondence, and the second metal foil 122 is electrically connected in sequence. The gate G of the lower bridge chip 133 is electrically connected to the fourth metal foil 132 in a one-to-one correspondence, and the fourth metal foil 132 is electrically connected in sequence.

[0034] Compared with the prior art, this embodiment provides through holes in the first metal foil 121 and the third metal foil 131, and respectively provides the second metal foil 122 for electrically connecting the gate G of the upper bridge chip 123 and the fourth metal foil 132 for electrically connecting the gate G of the lower bridge chip 133 in different through holes, instead of providing the second metal foil 122 and the fourth metal foil 132 at the outer edges of the first metal foil 121 and the third metal foil 131, so that the total area of ​​the metal foil provided on the substrate 110 can be reduced, thereby improving the integration of the internal structure of the power module 100.

[0035] In some embodiments, the main body of the power module 100 may be formed by a circuit board with a conductive layer on one side or two sides, the conductive layer on the circuit board forms the above-mentioned metal foil, and the dielectric layer of the circuit board forms the above-mentioned substrate 110. For example, when a circuit board with copper cladding on one side is used, the copper layer may be divided into a plurality of different regions according to the above-mentioned layout by mechanical cutting, laser cutting or etching, etc., to form the first metal foil 121, the second metal foil 122, the third metal foil 131 and the fourth metal foil 132, respectively, and then the field effect transistor chip is arranged on the first metal foil 121 and the third metal foil 131.

[0036] When using a circuit board with a double-sided conductive layer, for example, a double-sided copper-clad circuit board, the copper on only one side can be segmented, and the copper on the other side remains intact. The fifth metal foil 140 of the power module 100 can be used as a heat sink for the power module 100 to achieve heat dissipation of the power module 100. In addition, the orthographic projection area of ​​the uncut copper layer on the substrate 110 is greater than the total area of ​​the orthographic projections of the first metal foil 121 and the third metal foil 131 on the substrate 110, which can improve the heat dissipation effect. Preferably, the orthographic projection area of ​​the uncut copper layer on the substrate 110 is greater than the total area of ​​the first metal foil 121, the second metal foil 122, the third metal foil 131 and the fourth metal foil 132 on the substrate 110. More preferably, the orthographic projection area of ​​the uncut copper layer on the substrate 110 can completely cover the substrate 110.

[0037] In some embodiments, in order to further improve the heat dissipation effect of the power module 100, a heat dissipation substrate 141 may be welded on the fifth metal foil 140, and the heat dissipation substrate 141 may be made of a material with higher thermal conductivity. When the heat dissipation substrate 141 is a flat plate, it may be suitable for heat dissipation modes such as liquid cooling plate heat dissipation and air cooling heat dissipation, and a device such as a plug-in heat sink may also be provided on the heat dissipation substrate 141.

[0038] It should be noted that the circuit board forming the power module 100 is preferably a circuit board without conductive vias. When the circuit board is a double-sided circuit board, the conductive layers on both sides are insulated from each other.

[0039] See again Figure 2In a specific embodiment, the first metal foil 121 may be provided with six first through holes 121a, and the six first through holes 121a are arranged in a row at intervals, and each of the first through holes 121a is provided with a second metal foil 122. The third metal foil 131 is also provided with six second through holes 131a, and the six second through holes 131a may be aligned with the six first through holes 121a, or may not be aligned, and each of the second through holes 131a is provided with a fourth metal foil 132. The upper bridge chip 123 and the lower bridge chip 133 are also provided with six each, and the six upper bridge chips 123 are arranged in a row at intervals on the first metal foil 121, and are arranged one by one with the six first through holes 121a, and the upper bridge chip 123 is located at the outer edge of the first through hole 121a and close to the side of the third metal foil 131. The six lower bridge chips 133 are arranged in a row, arranged at intervals on the third metal foil 131, and arranged one by one corresponding to the six second through holes 131a, and the lower bridge chips 133 are located on the outer edge of the second through hole 131a and away from the first metal foil 121. Such an arrangement can make the internal structure of the power module 100 more regular, and the circuit layout more reasonable and compact.

[0040] See also Figure 5 In some embodiments, the power module 100 further includes a plurality of gate resistors 150, each of the second metal foil 122 and each of the fourth metal foil 132 is provided with at least one of the gate resistors 150, the gate G of the upper bridge chip 123 is electrically connected to the second metal foil 122 via the gate resistor 150, and the gate G of the lower bridge chip 133 is electrically connected to the fourth metal foil 132 via the gate resistor 150. That is, after the gate G of the upper bridge chip 123 is electrically connected to one end of the corresponding gate resistor 150, the other end of the gate resistor 150 is electrically connected to the second metal foil 122. The gate G of the lower bridge chip 133 is electrically connected to one end of the corresponding gate resistor 150, and the other end of the gate resistor 150 is electrically connected to the fourth metal foil 132. By connecting the gate resistors 150 in series to the gates G of the upper bridge chip 123 and the lower bridge chip 133, the stability and reliability of the power module 100 can be improved.

[0041] By connecting the gate resistor 150 in series to the gate G of the upper bridge chip 123 and the lower bridge chip 133, the current that controls the upper bridge chip 123 and the lower bridge chip 133 to be turned on or off can be limited, thereby reducing the switching speed of the upper bridge chip 123 and the lower bridge chip 133. Specifically, by connecting the gate resistor 150 in series, the gate resistance can be increased to reduce the gate current, thereby reducing the switching speed of the upper bridge chip 123 and the lower bridge chip 133. It can be understood that when the switching speed of the upper bridge chip 123 and the lower bridge chip 133 is too fast, it is easy to cause the components near the power module 100 to be broken down, thereby reducing the reliability of the power module 100.

[0042] Reducing the switching speed of the upper bridge chip 123 and the lower bridge chip 133 is actually slowing down the gate drive, which can reduce the circuit noise generated when the power module 100 is turned on and off, and limit the parasitic capacitance and parasitic inductance inside the power module 100. In addition, the parasitic parameters in the gate loop often cause gate ringing. After the gate resistor 150 is set, the ringing phenomenon can be suppressed due to the damping effect. In addition, the charging and discharging current of the gate G of the upper bridge chip 123 and the lower bridge chip 133 can also be limited. For example, the output stage of the driver can be protected by limiting the peak gate current. Generally speaking, the gate G of the upper bridge chip 123 and the lower bridge chip 133 needs to be connected to a driver. The driver applies a signal to the gate G of the upper bridge chip 123 and the lower bridge chip 133 according to the signal it receives to control the switching of the upper bridge chip 123 and the lower bridge chip 133. When the peak gate current is too large, the output stage of the driver may be damaged. Therefore, by setting the gate resistor 150, the peak gate current can be limited to protect the output stage of the driver.

[0043] Furthermore, by providing the gate resistor 150 , the power of the output stage of the driver can be limited, thereby reducing the power consumption and heat generation of the output stage, thereby ensuring that the power module 100 operates within a safe range.

[0044] See again Figures 2 to 4In some embodiments, the power module 100 further includes a sixth metal foil 160, which is disposed on the substrate 110 and located on a side of the third metal foil 131 away from the first metal foil 121. The source electrode S of the upper bridge chip 123 is electrically connected to the first metal foil 121, and the drain electrode D of the upper bridge chip 123 is electrically connected to the third metal foil 131. The source electrode S of the lower bridge chip 133 is electrically connected to the third metal foil 131, and the drain electrode D of the lower bridge chip 133 is electrically connected to the sixth metal foil 160. For example, the first metal foil 121, the third metal foil 131, and the sixth metal foil 160 may be rectangular, and are sequentially arranged at intervals and insulated from each other. The source electrode S of the upper bridge chip 123 may be fixed and electrically connected to the first metal foil 121 by welding or the like, and the drain electrode D of the upper bridge chip 123 may be electrically connected to the third metal foil 131 by a wire, for example, one end of the wire is welded to the drain electrode D of the upper bridge chip 123, and the other end is welded to the third metal foil 131. The source S of the lower bridge chip 133 can be fixed and electrically connected to the third metal foil 131 by welding, and the drain D can be electrically connected to the sixth metal foil 160 . For example, one end of a wire is welded to the drain D of the lower bridge chip 133 , and the other end is welded to the sixth metal foil 160 .

[0045] See also Figure 5 and Figure 6 In some embodiments, the drain D of the upper bridge chip 123 is electrically connected to the third metal foil 131 via a plurality of first wires 124 arranged in parallel, and the drain D of the lower bridge chip 133 is electrically connected to the sixth metal foil 160 via a plurality of second wires 134 arranged in parallel. By using a plurality of first wires in parallel to electrically connect the drain D of the upper bridge chip 123 and the third metal foil 131, the current when the upper bridge chip 123 is turned on can be increased, thereby increasing the operating current of the power module 100.

[0046] In some other embodiments, the connection positions of the source S and the drain D of the upper bridge chip 123 may be adjusted, and the connection positions of the source S and the drain D of the lower bridge chip 133 may be adaptively adjusted. Specifically, the drain D of the upper bridge chip 123 is electrically connected to the first metal foil 121, and the source S is electrically connected to the third metal foil 131, while the drain D of the lower bridge chip 133 is electrically connected to the third metal foil 131, and the source S is electrically connected to the sixth metal foil 160.

[0047] It can be understood that the source electrode S of the upper bridge chip 123 is electrically connected to the third metal foil 131 through a plurality of parallel wires, and the source electrode S of the lower bridge chip 133 is electrically connected to the sixth metal foil 160 through a plurality of parallel wires.

[0048] See also Figure 2 , Figure 4 and Figure 7 In some embodiments, the power module 100 further includes a seventh metal foil 170, which is disposed on the substrate 110 and spaced apart from the first metal foil 121. The seventh metal foil 170 is electrically insulated from the first metal foil 121, the third metal foil 131, the fourth metal foil 132 and the sixth metal foil 160, and is electrically connected to the second metal foil 122. The seventh metal foil 170 is provided with a first connection terminal 171, and the first connection terminal 171 is electrically connected to the seventh metal foil 170. It can be understood that the gates G of the plurality of upper bridge chips 123 are sequentially connected in parallel and electrically connected to the seventh metal foil 170, and the first connection terminal 171 is provided on the seventh metal foil 170, and the first connection terminal 171 is used to be electrically connected to an external driver, that is, the electrical signal sent by the external driver to the gate G of the upper bridge chip 123 is transmitted to the gate G of each upper bridge chip 123 via the first connection terminal 171 and the seventh metal foil 170.

[0049] See again Figure 7 In some embodiments, the power module 100 further includes an eighth metal foil 180, which is disposed on the substrate and spaced apart from the third metal foil 131. The eighth metal foil 180 is electrically insulated from the first metal foil 121, the second metal foil 122, the third metal foil 131, the sixth metal foil 160 and the seventh metal foil 170, and the eighth metal foil 180 is electrically connected to the fourth metal foil 132. A second connection terminal 181 is disposed on the eighth metal foil 180, and the second connection terminal 181 is electrically connected to the eighth metal foil 180. Similarly, the gates G of the plurality of lower bridge chips 133 are sequentially connected in parallel and electrically connected to the eighth metal foil 180, and the second connection terminal 181 is disposed on the eighth metal foil 180, and the second connection terminal 181 is used to be electrically connected to an external driver, that is, the electrical signal sent by the external driver to the gate G of the lower bridge chip 133 is transmitted to the gate G of each lower bridge chip 133 via the second connection terminal 181 and the eighth metal foil 180.

[0050] It is understandable that the first connection terminal 171 and the second connection terminal 181 may also be connected in parallel in an external circuit.

[0051] See again Figure 2 , Figure 4 , Figure 6 and Figure 7In some embodiments, the third metal foil 131 includes a chip connection portion 131b and a terminal connection portion 131c electrically connected to each other, the fourth metal foil 132 and the lower bridge chip 133 are arranged on the chip connection portion 131b, the terminal connection portion 131c is located between the seventh metal foil 170 and the eighth metal foil 180, and is electrically insulated from the first metal foil 121, the second metal foil 122, the fourth metal foil 132, the sixth metal foil 160, the seventh metal foil 170 and the eighth metal foil 180, and a third connection terminal 131d is provided on the terminal connection portion 131c, and the third connection terminal 131d is electrically connected to the terminal connection portion 131c. For example, the chip connection portion 131b is generally rectangular and is located between the first metal foil 121 and the sixth metal foil 160. The terminal connection portion 131c is also generally square and can be located at a corner of the chip connection portion 131b. The two are arranged in an up-down staggered manner and are electrically connected to the chip connection portion 131b. The chip connection portion 131b and the terminal connection portion 131c can be electrically connected through a wire or can be set as an integral structure. When the above-mentioned different metal foils are obtained by dividing an integral metal plate, it is preferred that the chip connection portion 131b and the terminal connection portion 131c are set as an integral structure. Among them, when the source S of the upper bridge chip 123 is electrically connected to the third metal foil 131, the third connection terminal 131d can serve as the Kelvin source S1 of the upper bridge chip 123.

[0052] It can be understood that when the above-mentioned different metal foils are obtained by dividing a whole metal plate, the edges of the different metal foils in specific directions are flush with each other, so that the internal structure of the power module 100 is relatively regular. For example, the left edges of the first metal foil 121, the third metal foil 131 and the sixth metal foil 160 are aligned with each other, and the top edges of the first metal foil 121 and the seventh metal foil 170 are aligned with each other, and the right edges of the seventh metal foil 170 and the terminal connecting portion 131c, the eighth metal foil 180, and the sixth metal foil 160 are aligned with each other.

[0053] See again Figure 6 and Figure 7 In some embodiments, the sixth metal foil 160 is further provided with a fourth connection terminal 161, and the fourth connection terminal 161 is electrically connected to the sixth metal foil 160. When the source S of the lower bridge chip 133 is electrically connected to the sixth metal foil 160, the fourth connection terminal 161 can serve as the Kelvin source S2 of the lower bridge chip 133.

[0054] By setting a Kelvin source on the circuits of the upper bridge chip 123 and the lower bridge chip 133, the switching speed of the upper bridge chip 123 and the lower bridge chip 133 can be increased, and the switching loss can be reduced, thereby reducing the heat generation of the power module 100. In particular, when the gate G of both the upper bridge chip 123 and the lower bridge chip 133 is provided with the gate resistor 150, the gate resistor 150 will slow down the switching speed of the upper bridge chip 123 and the lower bridge chip 133 to a certain extent, resulting in increased switching power consumption, and on this basis, setting a Kelvin source can reduce the influence of the gate resistor 150, while increasing the switching speed and reducing power consumption, and can also slow down the gate ringing phenomenon.

[0055] See again Figure 7 In some embodiments, the first metal foil 121 is further provided with a fifth connection terminal 121b, and the fifth connection terminal 121b is electrically connected to the first metal foil 121. The third metal foil 131 is further provided with a sixth connection terminal 131e, and the sixth connection terminal 131e is electrically connected to the third metal foil 131. The sixth metal foil 160 is further provided with a seventh connection terminal 162, and the seventh connection terminal 162 is electrically connected to the sixth metal foil 160. The fifth connection terminal 121b can be used as the P terminal of the power module 100, the sixth connection terminal 131e can be used as the U / V / W terminal of the power module 100, and the seventh connection terminal 162 can be used as the N terminal of the power module 100.

[0056] When the drain D of the upper bridge chip 123 is electrically connected to the first metal foil 121, and the source S thereof is electrically connected to the third metal foil 131, and the drain D of the lower bridge chip 133 is electrically connected to the third metal foil 131, and the source S thereof is electrically connected to the sixth metal foil 160, the fifth connection terminal 121b can serve as the drain lead-out terminal of the upper bridge chip 123, the sixth connection terminal 131e serves as the source lead-out terminal of the upper bridge chip 123 and also as the drain lead-out terminal of the lower bridge chip 133, and the seventh connection terminal 162 serves as the source lead-out terminal of the lower bridge chip 133.

[0057] When the source S of the upper bridge chip 123 is electrically connected to the first metal foil 121, and the drain D thereof is electrically connected to the third metal foil 131, and the source S of the lower bridge chip 133 is electrically connected to the third metal foil 131, and the drain D thereof is electrically connected to the sixth metal foil 160, the fifth connection terminal 121b can serve as the source lead-out terminal of the upper bridge chip 123, the sixth connection terminal 131e serves as the drain lead-out terminal of the upper bridge chip 123 and also as the source lead-out terminal of the lower bridge chip 133, and the seventh connection terminal 162 serves as the drain lead-out terminal of the lower bridge chip 133.

[0058] See also Figure 8 In some embodiments, the power module 100 further includes a housing 190, which can cooperate with the dielectric layer of the circuit board or the heat dissipation substrate 141 to surround the above-mentioned different metal foils and components such as chips, while exposing different connection terminals to facilitate the connection of the connection terminals to external circuits.

[0059] The housing 190 may be filled with a potting material to fix the chip and other devices to prevent the internal devices of the power module 100 from being damaged or disconnected due to vibration during use or transportation. The potting material may be soft silicone gel or hard epoxy resin, and in particular, some potting materials with good thermal conductivity may be used to improve the heat dissipation effect of the power module 100.

[0060] The power module provided by the embodiment of the present invention is introduced in detail above. Specific examples are used in this article to illustrate the principle and implementation of the present invention. The description of the above implementation is only used to help understand the idea of ​​the present invention. There may be changes in the specific implementation and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A power module, characterized in that: include: substrate; The upper bridge circuit comprises a first metal foil, a plurality of second metal foils and a plurality of upper bridge chips, wherein the first metal foil is arranged on the substrate and has a plurality of first through holes, the second metal foils are arranged in the first through holes in a one-to-one correspondence and are electrically insulated from the first metal foil, and the upper bridge chip is arranged on the first metal foil; A lower bridge circuit, comprising a third metal foil, a plurality of fourth metal foils and a plurality of lower bridge chips, wherein the third metal foil is spaced apart from the first metal foil and has a plurality of second through holes, the fourth metal foils are arranged in the second through holes in a one-to-one correspondence and are electrically insulated from the third metal foil, and the lower bridge chip is arranged on the third metal foil; Among them, the upper bridge chip and the lower bridge chip are field effect transistors, the gate of the upper bridge chip is electrically connected to the second metal foil one by one, the second metal foil is electrically connected in sequence, the gate of the lower bridge chip is electrically connected to the fourth metal foil one by one, and the fourth metal foil is electrically connected in sequence.

2. The power module according to claim 1, characterized in that: Also includes: The fifth metal foil is arranged on the substrate and is located on the side of the third metal foil away from the first metal foil. The source of the upper bridge chip is electrically connected to the first metal foil, and the drain of the upper bridge chip is electrically connected to the third metal foil; the source of the lower bridge chip is electrically connected to the third metal foil, and the drain of the lower bridge chip is electrically connected to the fifth metal foil.

3. The power module according to claim 2, characterized in that: The drain of the upper bridge chip is electrically connected to the third metal foil via a plurality of wires arranged in parallel, and the drain of the lower bridge chip is electrically connected to the fifth metal foil via a plurality of wires arranged in parallel.

4. The power module according to claim 1, characterized in that: Also includes: The fifth metal foil is arranged on the substrate and is located on the side of the third metal foil away from the first metal foil. The drain of the upper bridge chip is electrically connected to the first metal foil, and the source of the upper bridge chip is electrically connected to the third metal foil; the drain of the lower bridge chip is electrically connected to the third metal foil, and the source of the lower bridge chip is electrically connected to the fifth metal foil.

5. The power module according to claim 4, characterized in that: The source electrode of the upper bridge chip is electrically connected to the third metal foil via a plurality of wires arranged in parallel, and the source electrode of the lower bridge chip is electrically connected to the fifth metal foil via a plurality of wires arranged in parallel.

6. The power module according to any one of claims 1 to 5, characterized in that: Also includes: A plurality of gate resistors, each of the second metal foils and each of the fourth metal foils is provided with at least one of the gate resistors, the gate of the upper bridge chip is electrically connected to the second metal foil via the gate resistor, and the gate of the lower bridge chip is electrically connected to the fourth metal foil via the gate resistor.

7. The power module according to any one of claims 1 to 5, characterized in that: Also includes: a sixth metal foil, disposed on the substrate and spaced apart from the first metal foil, the sixth metal foil being electrically insulated from the first metal foil, the third metal foil, the fourth metal foil and the fifth metal foil, and being electrically connected to the second metal foil; a first connecting terminal being disposed on the sixth metal foil, and the first connecting terminal being electrically connected to the sixth metal foil; The seventh metal foil is arranged on the substrate and is spaced apart from the third metal foil. The seventh metal foil is electrically insulated from the first metal foil, the second metal foil, the third metal foil, the fifth metal foil and the sixth metal foil, and is electrically connected to the fourth metal foil. A second connecting terminal is provided on the seventh metal foil, and the second connecting terminal is electrically connected to the seventh metal foil.

8. The power module according to claim 7, characterized in that: The third metal foil comprises a chip connection portion and a terminal connection portion electrically connected to each other, the fourth metal foil and the lower bridge chip are arranged on the chip connection portion, the terminal connection portion is located between the sixth metal foil and the seventh metal foil, and is electrically insulated from the first metal foil, the second metal foil, the fourth metal foil, the fifth metal foil, the sixth metal foil and the seventh metal foil, and a third connection terminal is arranged on the terminal connection portion, and the third connection terminal is electrically connected to the terminal connection portion; The fifth metal foil is further provided with a fourth connection terminal, and the fourth connection terminal is electrically connected to the fifth metal foil.

9. The power module according to claim 7, characterized in that: The first metal foil is also provided with a fifth connection terminal, which is electrically connected to the first metal foil; the third metal foil is also provided with a sixth connection terminal, which is electrically connected to the third metal foil; the fifth metal foil is also provided with a seventh connection terminal, which is electrically connected to the fifth metal foil.

10. The power module according to any one of claims 1 to 5, characterized in that: Also includes: An eighth metal foil is arranged on the surface of the substrate facing away from the first metal foil, the area of ​​the orthographic projection of the eighth metal foil on the substrate is larger than the area of ​​the orthographic projection of the first metal foil and the third metal foil on the substrate, and the eighth metal foil is used to achieve heat dissipation of the power module.

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