Preparation method of deep trench isolation structure and deep trench isolation structure

Through the method of fractional deposition and ion implantation, combined with insulating material layer filling and annealing treatment, the problem of unstable polysilicon resistance in deep trench isolation structure is solved, and the resistance stability and conduction ability are improved.

CN118866808BActive Publication Date: 2024-12-10NEXCHIP SEMICON CO LTD
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Patent Information

Application Number
CN202411328600.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-09-24
Publication Date
2024-12-10
Estimated Expiration
2044-09-24

AI Technical Summary

Technical Problem

The existing deep trench isolation structure is prone to cavity/crack defects in the top area when polysilicon is filled, resulting in unstable resistance. Due to the limited ion diffusion distance, the polysilicon resistance is large, which is not conducive to conduction.

Method used

The doped polysilicon layer is formed by fractional deposition and fractional ion implantation. The deep trench is not filled when the polysilicon is first deposited. Then the insulating material layer is deposited to fill the deep trench, and the doped polysilicon layer is backfilled to form a doped polysilicon packet. The conductive layer of the insulating substance is covered and the uniformity of the doping ion distribution is improved by inclined implantation and annealing treatment.

Benefits of technology

It effectively avoids the occurrence of cavity/crack defects in the insulating material layer of the polycrystalline silicon layer, improves the resistance stability and conductivity of the polycrystalline silicon layer, and reduces the resistance value.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention provides a preparation method of a deep trench isolation structure and a deep trench isolation structure, and specifically relates to the field of semiconductor technology. The preparation method comprises: providing a substrate, on which a deep trench is formed; forming an insulating dielectric layer on the sidewalls of the deep trench and on the substrate on both sides of the deep trench, and injecting ions into the substrate at the bottom of the deep trench; forming a first polysilicon layer in the deep trench, and injecting ions into the first polysilicon layer to form a first doped polysilicon layer; filling an insulating material layer in the first doped polysilicon layer; forming a second doped polysilicon layer on the top of the deep trench, so that the second doped polysilicon layer and the first doped polysilicon layer jointly cover the insulating material layer to form a closed conductive layer. The DTI structure prepared by the method reduces the resistance of the polysilicon layer, improves the conduction capability, and avoids the influence of voids / cracks defects on the resistance of polysilicon.
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Description

Technical Field

[0001] The present invention belongs to the field of semiconductor technology, and in particular relates to a preparation method of a deep trench isolation structure and the deep trench isolation structure. Background Art

[0002] The essence of a power management integrated circuit (PMIC) is a power converter that can convert unstable or unsuitable power into a stable power supply that can be used by electronic products, and this power supply is not affected by changes in input voltage and load.

[0003] In power management products, the Deep Trench Oxide Isolation (DTI) process is usually used to dig trenches in the substrate to deposit B-doped polysilicon and connect it to the bottom substrate to achieve the electrostatic discharge (ESD) function. However, when the DTI process fills the deep trenches with polysilicon, the top area is prone to premature closing, resulting in void / seam defects, which leads to unstable polysilicon resistance; and due to the limited ion diffusion distance, the ion diffusion in the middle of the polysilicon is small, resulting in a very large overall polysilicon resistance, which is not conducive to conduction. Summary of the invention

[0004] In view of the above shortcomings of the prior art, the present invention provides a method for preparing a deep trench isolation structure and a deep trench isolation structure to improve the problem of unstable polysilicon resistance of the deep trench isolation structure.

[0005] To achieve the above-mentioned object and other related objects, the present invention provides a method for preparing a deep trench isolation structure, the method comprising the following steps:

[0006] Providing a substrate having a deep trench formed thereon;

[0007] forming an insulating dielectric layer on the sidewalls of the deep trench and the substrate at both sides of the deep trench, and implanting ions into the substrate at the bottom of the deep trench;

[0008] forming a first polysilicon layer in the deep trench, and injecting ions into the first polysilicon layer to form a first doped polysilicon layer;

[0009] Filling an insulating material layer in the first doped polysilicon layer;

[0010] A second doped polysilicon layer is formed on the top of the deep trench, so that the second doped polysilicon layer and the first doped polysilicon layer jointly cover the insulating material layer to form a closed conductive layer.

[0011] In one embodiment of the present invention, the step of injecting ions into the first polysilicon layer includes: performing a first ion implantation into the first polysilicon layer by means of an inclined implantation method; rotating the substrate at a set angle, and performing a second ion implantation into the first polysilicon layer by means of an inclined implantation method, and repeating the rotation and inclined ion implantation steps until the first polysilicon layer on each side wall of the deep trench is implanted with ions.

[0012] In one embodiment of the present invention, the cross-section of the deep trench is square, and the step of injecting ions into the first polysilicon layer includes: performing a first ion implantation on the first polysilicon layer on the first side wall of the deep trench by means of an inclined implantation method; rotating the substrate 90°, and performing a second ion implantation on the first polysilicon layer on the second side wall adjacent to the first side wall by means of an inclined implantation method; rotating the substrate 90° again, and performing a third ion implantation on the first polysilicon layer on the third side wall opposite to the first side wall by means of an inclined implantation method; and rotating the substrate 90° again, and performing a fourth ion implantation on the first polysilicon layer on the fourth side wall adjacent to the other side of the first side wall by means of an inclined implantation method.

[0013] In one embodiment of the present invention, the step of filling the first doped polysilicon layer with an insulating material layer includes: depositing the insulating material layer in the deep trench and on the substrate on both sides of the deep trench using a sub-atmospheric pressure chemical vapor deposition or a high aspect ratio deposition process.

[0014] In one embodiment of the present invention, the step of forming a second doped polysilicon layer on the top of the deep trench includes:

[0015] Removing the insulating material layer on the substrate at both sides of the deep trench and a portion of the insulating material layer in the deep trench to form an opening at the top of the deep trench;

[0016] Etching the first doped polysilicon layer on the substrate at both sides of the deep trench;

[0017] forming a second polysilicon layer in the opening;

[0018] Ions are implanted into the second polysilicon layer to form a second doped polysilicon layer.

[0019] In one embodiment of the present invention, after forming the second doped polysilicon layer on the top of the deep trench, an annealing step is further included. The annealing step includes: annealing at a temperature of 950° C. for 10 minutes to 250 minutes.

[0020] In one embodiment of the present invention, the steps of forming an insulating dielectric layer on the sidewalls of the deep trench and the substrate on both sides of the deep trench, and implanting ions into the substrate at the bottom of the deep trench include:

[0021] forming an insulating dielectric layer on the inner wall of the deep trench and the substrate at both sides of the deep trench;

[0022] Etching the insulating dielectric layer at the bottom of the deep trench to expose the substrate at the bottom of the deep trench;

[0023] Ions are implanted into the substrate at the bottom of the deep trench, and the type of the implanted ions is the same as the doping type of the substrate.

[0024] In one embodiment of the present invention, the thickness of the first polysilicon layer is 1000 angstroms to 5000 angstroms, and the concentration of ions implanted into the first polysilicon layer is 1E15 to 1E16 ion / cm 2 .

[0025] In one embodiment of the present invention, the ions implanted into the substrate at the bottom of the deep trench are of the same type as the ions implanted into the first polysilicon layer and the doped ions of the second doped polysilicon layer, and the implanted ions include B ions.

[0026] The present invention also provides a deep trench isolation structure, which includes a substrate, an insulating dielectric layer, a first doped polysilicon layer, a second doped polysilicon layer and an insulating material layer, wherein a deep trench is provided on the substrate, and the insulating dielectric layer is arranged on the side walls of the deep trench and on the substrate on both sides of the deep trench; the first doped polysilicon layer is arranged on the insulating dielectric layer in the deep trench and at the bottom of the deep trench; the insulating material layer is filled in the first doped polysilicon, and the second doped polysilicon layer is arranged on the top of the deep trench and together with the first doped polysilicon layer, covers the insulating material layer to form a closed conductive layer.

[0027] To summarize, the preparation method of the deep trench isolation structure provided by the present invention, when preparing the deep trench isolation structure, adopts the method of fractional deposition and fractional ion implantation to form a doped polysilicon layer, the deep trench is not filled when the polysilicon is deposited for the first time, and then an insulating material layer is deposited to fill the deep trench, and then the doped polysilicon layer is backfilled to form a conductive layer of doped polysilicon coated with insulating material.

[0028] The unexpected effect produced by the present invention is that since the polysilicon layer in the deep trench is deposited in batches and is filled with an insulating material layer in the middle, voids / cracks will only appear in the insulating material layer in the deep trench, and defects such as voids / cracks will not appear in the polysilicon layer of the outer circle, thereby improving the stability of the resistance of the polysilicon layer.

[0029] Furthermore, during the ion implantation process after the first deposition of polysilicon, an inclined implantation method is adopted, and the substrate is rotated at a set angle in combination with the shape of the deep trench, and ion implantation is performed on the polysilicon layer on each side wall of the deep trench, so that the doped ion distribution of the polysilicon layer is more uniform, thereby improving the conductivity of the polysilicon layer.

[0030] Furthermore, the annealing treatment after the deposition of the polysilicon layer can promote the diffusion of doped ions into the polysilicon layer. Moreover, since the polysilicon layer is only filled in the outer ring of the deep trench, its thickness is 1000 angstroms to 5000 angstroms. The annealing process is sufficient to allow the doped ions to diffuse into the entire polysilicon layer, improve the uniformity of the distribution of doped ions in the polysilicon layer, and effectively reduce the resistance of the polysilicon layer. At a temperature of 950°C, annealing for 10 minutes to 250 minutes can complete the ion diffusion of the polysilicon layer, which can avoid the failure of other devices caused by long-term heat treatment.

[0031] Of course, any product implementing the present invention does not necessarily need to achieve all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0033] Figure 1 A flow chart of a method for preparing a deep trench isolation structure in one embodiment of the present invention;

[0034] Figure 2 A schematic diagram of the structure of a substrate in one embodiment of the present invention;

[0035] Figure 3 A schematic diagram of a structure for forming an insulating dielectric layer and injecting ions into the bottom of a deep trench in one embodiment of the present invention;

[0036] Figure 4 It is a schematic diagram of a structure for forming a first polysilicon layer in one embodiment of the present invention;

[0037] Figure 5 It is a schematic diagram of the structure of implanting ions into the first polysilicon layer in one embodiment of the present invention;

[0038] Figure 6 It is a schematic diagram of a structure for forming an insulating material layer in one embodiment of the present invention;

[0039] Figure 7A schematic diagram of a structure in which a portion of an insulating material layer is removed to form an opening in one embodiment of the present invention;

[0040] Figure 8 It is a schematic diagram of a structure in which the first doped polysilicon layer on both sides of the deep trench is removed in one embodiment of the present invention;

[0041] Fig. 9 A schematic diagram of a structure for forming a second polysilicon layer in one embodiment of the present invention;

[0042] Fig.10 FIG. 4 is a schematic structural diagram of a deep trench isolation structure in one embodiment of the present invention.

[0043] Description of labels:

[0044] 100, substrate; 110, deep trench; 111, ion implantation region; 120, insulating dielectric layer; 130, first doped polysilicon layer; 131, first polysilicon layer; 140, insulating material layer; 141, opening; 150, second doped polysilicon layer; 151, second polysilicon layer. DETAILED DESCRIPTION

[0045] The following describes the embodiments of the present invention by specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.

[0046] It should be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present invention, and thus the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0047] In the present invention, if the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. appear, the orientation or position relationship indicated is based on the orientation or position relationship shown in the drawings, which is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, if the terms "first" and "second" appear, they are only used for description and distinction purposes, and cannot be understood as indicating or implying relative importance.

[0048] Deep Trench Isolation (DTI) is often used in power management products to implement the electrostatic discharge (ESD) function of semiconductor devices. In the ESD protection structure, it is necessary to form an electrical connection between the polysilicon filled in the deep trench and the substrate (bulk). In this way, when an ESD event occurs, the current can be quickly directed from the sensitive area of ​​the device to the substrate, thereby protecting the device from damage.

[0049] The conventional DTI process is to first implant ions (Ion Implantation, referred to as IMP) at the bottom of the deep trench, then fill it with non-doped polysilicon (poly), and then implant ions on the top of the polysilicon, and then diffuse the ions into the interior of the Poly through ultra-high temperature and ultra-long time high temperature diffusion (drive in) to achieve the purpose of polysilicon doping and conduction. This method requires ultra-high temperature and ultra-long time high temperature diffusion (1200℃ 900min can only diffuse 12μm), which can easily cause other devices to fail, and due to the limited diffusion distance, the ion diffusion in the middle of the polysilicon filling layer is small, resulting in a very large overall polysilicon resistance, which is not conducive to conduction. In addition, the top area of ​​the polysilicon filled deep trench (the maximum aspect ratio is 40:1) is prone to premature closing to produce void / crack defects (Void / Seamdefect), resulting in unstable resistance.

[0050] Based on this, the present invention provides a method for preparing a deep trench isolation structure and a deep trench isolation structure prepared by the preparation method, which can be applied to power management products to improve the above-mentioned problems.

[0051] See also Figures 1 to 10 The present invention provides a method for preparing a deep trench isolation structure, the method comprising steps S1 to S5:

[0052] S1, providing a substrate 100, on which a deep trench 110 is formed (see Figure 2 );

[0053] S2, forming an insulating dielectric layer 120 on the sidewalls of the deep trench 110 and the substrate 100 on both sides of the deep trench 110, and implanting ions into the substrate 100 at the bottom of the deep trench 110 (see Figure 3 );

[0054] S3, forming a first polysilicon layer 131 in the deep trench 110, and injecting ions into the first polysilicon layer 131 to form a first doped polysilicon layer 130 (see Figure 4 and Figure 5 );

[0055] S4, filling the first doped polysilicon layer 130 inside the deep trench 110 with an insulating material layer 140 (see Figure 7 );

[0056] S5, forming a second doped polysilicon layer 150 on the top of the deep trench 110, so that the second doped polysilicon layer 150 and the first doped polysilicon layer 130 together cover the insulating material layer 140 to form a closed conductive layer (see Fig.10 ).

[0057] See also Figure 1 and Figure 2 The substrate 100 in step S1 is used to support the device structure formed thereon, and it can be any material suitable for forming a semiconductor device. For example, the substrate 100 can be a silicon (Si) substrate, a germanium (Ge) substrate, a silicon germanium (SiGe) substrate, a silicon-on-insulator (SOI) substrate, a germanium-on-insulator (GOI), silicon carbide (SiC), aluminum nitride (AlN), indium nitride (InN), gallium nitride (GaN), gallium arsenide (GaAs), indium phosphide (InP), silicon germanium (GeSi), sapphire or other semiconductor materials formed by III / V compounds, etc.; the substrate 100 can also be a stacked structure, such as a silicon / silicon germanium stack, etc.

[0058] Further, the substrate 100 can be a P-type substrate or an N-type substrate. When the substrate 100 is a P-type substrate, the doping ions are trivalent ions such as boron (B), aluminum (Al), gallium (Ga) or indium (In); when the substrate 100 is an N-type substrate, the doping ions are pentavalent ions such as phosphorus (P), arsenic (As) or antimony (Sb). In this application, the substrate 100 is a P-type substrate as an example for description.

[0059] The formation method of the deep trench 110 on the substrate 100 can adopt conventional processes in the art. As an example, the formation process of the deep trench 110 is as follows: first, an epitaxial layer (not shown in the figure) is formed on the substrate 100. In this example, the substrate 100 adopts a P-type substrate, and the epitaxial layer adopts a P-type epitaxial layer. The epitaxial layer can be formed on the surface of the substrate 100 by epitaxial growth, which can provide a smooth surface and facilitate the subsequent process. Then, a pad oxide layer (not shown in the figure) is formed on the epitaxial layer. The pad oxide layer can be formed by a deposition method, such as chemical vapor deposition, atomic layer deposition, etc. Then, a photoresist layer is formed on the pad oxide layer, for example, a photoresist layer is formed on the pad oxide layer by spin coating, and a deep groove pattern is formed on the photoresist layer through exposure and development processes. The deep groove pattern is used to define the position of the deep trench isolation structure. In some embodiments, the deep trench pattern can be annular or polygonal, and specifically, the deep trench pattern is square. Then, the pad oxide layer, the epitaxial layer, and the substrate 100 are etched in sequence using the photoresist layer as a mask. The etching method may be, for example, a dry etching process, a wet etching process, or an etching method combining a dry etching process and a wet etching process. After the etching is completed, the photoresist layer is removed, and a deep trench 110 is formed in the substrate 100. The aspect ratio of the deep trench 110 is set according to the actual production situation, for example, it may be 10:1, 40:1, 50:1, and the like. In other embodiments, a photoresist layer may also be formed on the surface of the substrate 100, and a deep trench pattern may be formed on the photoresist layer through exposure and development processes, and then the substrate 100 is etched using the photoresist layer as a mask to form the deep trench 110.

[0060] See also Figure 1 and Figure 3 In step S2, the insulating dielectric layer 120 can be made of conventional insulating dielectric materials in the art. For example, silicon dioxide (SiO2), the silicon dioxide layer can be formed using the chemical vapor deposition (CVD) method of tetraethoxysilane (TEOS). The specific process is as follows: A SiO2 layer is formed on the inner wall (bottom wall and side wall) of the deep trench 110 and the substrate 100 on both sides of the deep trench 110 using the TEOS process. The deposition thickness of the SiO2 layer is, for example, 4000 angstroms to 6000 angstroms; specifically, it can be 4000 angstroms, 5000 angstroms, 6000 angstroms, etc. Next, etch back the insulating dielectric layer 120 at the bottom of the deep trench 110 so that it is connected to the substrate 100 to serve as the ion implantation area 111, such as Figure 3As shown. At the same time, the bottom of the deep trench 110 is connected to the substrate 100, so that the doped polysilicon layer formed later can contact the substrate 100 and act as a conductor. The insulating dielectric layer 120 on the sidewall of the deep trench 110 is retained to play an electrical isolation role and prevent lateral diffusion of ions during the subsequent doping process. Then, the ions are injected. At this time, no additional mask is required. The insulating dielectric layer 120 on both sides of the deep trench 110 is directly used as a hard mask to block the ions from being injected into other areas of the substrate 100, ensuring that only the substrate 100 at the bottom of the deep trench 110 is injected with ions. In this process, the type of ions injected into the ion implantation area 111 is the same as the doping type of the substrate 100. In this embodiment, the substrate 100 is a P-type substrate, and the injected ions are P-type ions, for example, B ions. The injection concentration of B ions can be 1E15 ion / cm 2 ~1E16 ion / cm 2 , for example, 1E15 ion / cm 2 、5E15 ion / cm 2 、8E15 ion / cm 2 or 1E16 ion / cm 2 ,etc.

[0061] See also Figure 1 , Figures 4 to 5 , the specific process of step S3 is as follows:

[0062] A first polysilicon layer 131 is deposited in the deep trench 110. The first polysilicon layer 131 covers the surface of the insulating dielectric layer 120 and the bottom of the deep trench 110. Figure 4 .

[0063] In some embodiments, a chemical vapor deposition (CVD) process is used to deposit polysilicon on the surface of the substrate 100 for the first time, and the polysilicon is deposited on the exposed surface of the substrate 100, that is, the surface of the insulating dielectric layer 120 and the bottom of the deep trench 110, to form a first polysilicon layer 131. The deposition thickness of the first polysilicon layer 131 does not fill the deep trench 110, and can be determined according to actual production conditions. As an example, the deposition thickness of the first polysilicon layer 131 is 1000 angstroms to 5000 angstroms. For example, the deposition thickness of the first polysilicon layer 131 can be 1000 angstroms, 2000 angstroms, 3000 angstroms or 5000 angstroms, and so on.

[0064] Ions are implanted into the first polysilicon layer 131 to form a first doped polysilicon layer 130. Figure 5 .

[0065] After the first polysilicon layer 131 is deposited, ion implantation is performed to form the first doped polysilicon layer 130. In this step, the implanted ion type is the same as the ion type implanted at the bottom of the deep trench 110, for example, B ions, and the ion implantation concentration is 1E15 ion / cm 2 ~1E16 ion / cm 2 .

[0066] Since the deep trench 110 has a certain depth, in order to ensure that the first polysilicon layer 131 on each side wall of the deep trench 110 is implanted with ions, the ions are implanted in a tilted implantation manner, and after the implantation of one side wall is completed, the substrate 100 needs to be rotated according to a set angle, and the ion implantation is performed again in a tilted implantation manner, and the rotation and tilted ion implantation steps are repeated until the same concentration of ions is implanted on each side wall of the deep trench 110. The rotation angle of the substrate 100 each time can be determined according to the structure of the deep trench and actual production needs.

[0067] Taking the cross section of the deep trench 110 as an example, the deep trench 110 of this structure has four side walls. The first ion implantation is performed on the first polysilicon layer 131 by using an inclined implantation method, so that the first polysilicon layer 131 on the first side wall of the deep trench 110 is implanted with ions. Then, the substrate 100 is rotated 90 degrees, and the second ion implantation is performed on the first polysilicon layer 131 by using an inclined implantation method, so that the first polysilicon layer 131 on the second side wall adjacent to the first side wall of the deep trench 110 is implanted with ions. Then, the substrate 100 is rotated 90 degrees, and the second ion implantation is performed on the first polysilicon layer 131 by using an inclined implantation method, so that the first polysilicon layer 131 on the second side wall adjacent to the first side wall of the deep trench 110 is implanted with ions. The substrate 100 is rotated 90° (rotated 180° compared to the initial position), and the first polysilicon layer 131 is ion-implanted for the third time in a tilted implantation manner, so that the first polysilicon layer 131 on the third side wall of the deep trench 110 opposite to the first side wall is ion-implanted; the substrate 100 is then rotated 90° (rotated 270° compared to the initial position), and the first polysilicon layer 131 is ion-implanted for the fourth time in a tilted implantation manner, so that the first polysilicon layer 131 on the fourth side wall of the deep trench 110 adjacent to the other side of the first side wall is ion-implanted. The above tilted implantation angle is related to the aspect ratio of the deep trench 110. See Figure 5 Taking the aspect ratio of the deep trench 110 as 40:1 (here, the aspect ratio of the deep trench after the first polysilicon layer 131 is deposited), as an example, the maximum value θ of the angle θ between the ion implantation direction and the sidewall of the deep trench 110 during the tilted implantation is max Satisfy: θ max =arctan (1 / 40), θ max =1.4°, when θ≤θ max=1.4°, ions can be implanted into all first polysilicon layers 131 on the sidewalls of the deep trench 110. In other embodiments, for deep trenches 110 of different shapes, the angle of the tilted implantation can be calculated according to the above principle, which will not be listed here one by one.

[0068] See also Figure 6 , step S4 is to fill the deep trench 110 with an insulating material layer 140. The insulating material layer 140 can be made of conventional insulating materials in the art. For example, silicon dioxide (SiO2). The filling method of the insulating material layer 140 is, for example, to deposit the insulating material layer 140 on the first doped polysilicon layer 130 in the deep trench 110 and on both sides of the deep trench 110 by using processes such as sub-atmospheric chemical vapor deposition (SACVD) or high aspect ratio process (HARP). The deposition thickness of the insulating material layer 140 must be sufficient to fill the deep trench 110. It should be noted that, since the top area of ​​the deep trench 110 is prone to premature closing during the deposition process, there may be some void defects in the insulating material layer 140. Here, the insulating material layer 140 fills the deep trench 110 and ignores the void defects therein.

[0069] See also Figures 7 to 10 In step S5, a second doped polysilicon layer 150 is formed to cover the insulating material layer 140 together with the first doped polysilicon layer 130 to form a closed conductive layer.

[0070] The specific process of step S5 includes:

[0071] The insulating material layer 140 on the substrate 100 on both sides of the deep trench 110 and the insulating material layer 140 in a part of the deep trench 110 are removed to form an opening 141 at the top of the deep trench 110. Figure 7 .

[0072] In some embodiments, the insulating material layer 140 on the substrate 100 and the insulating material layer 140 filled in a portion of the deep trench 110 can be removed by chemical mechanical polishing (CMP) and / or etch back processes, and an opening 141 is formed at the top of the deep trench 110 to reserve space for the subsequent formation of the second doped polysilicon layer 150. In this way, the first doped polysilicon layer 130 and the second doped polysilicon layer 150 are in contact to form a closed conductive layer, which is connected to the substrate 100 at the bottom of the deep trench 110. There is no restriction on the depth of the opening 141 here, and it can be set according to actual production conditions. It should be noted that the depth of the opening 141 can at least allow the second doped polysilicon layer 150 to completely cover the insulating material layer 140 filled in the middle. Furthermore, the depth of the opening 141 is the same as the thickness of the first doped polysilicon layer 130, so that the thickness of the second doped polysilicon layer 150 formed subsequently is consistent with the thickness of the first doped polysilicon layer 130.

[0073] The first doped polysilicon layer 130 on the substrate 100 on both sides of the deep trench 110 is etched. Figure 8 .

[0074] Since a polysilicon layer is also deposited on the surface of the substrate 100 on both sides of the deep trench 110 when polysilicon is deposited for the first time, in order to maintain good insulation isolation performance of the DTI, the doped polysilicon layer on the substrate 100 on both sides of the deep trench 110 needs to be removed. The removal method can be etching, such as a dry etching process, a wet etching process, or an etching method combining a dry etching process and a wet etching process.

[0075] A second polysilicon layer 151 is formed in the opening 141. Fig. 9 .

[0076] In some embodiments, a chemical vapor deposition (CVD) process is used to deposit polysilicon on the surface of the substrate 100 for a second time. This time, the polysilicon is deposited on the exposed surface of the substrate 100 , i.e., in the opening 141 at the top of the deep trench 110 and on the insulating dielectric layer 120 on both sides of the deep trench 110 , to form a second polysilicon layer 151 .

[0077] Ions are implanted into the second polysilicon layer 151 to form a second doped polysilicon layer 150. Fig.10 .

[0078] Before ion implantation, the second polysilicon layer 151 on both sides of the deep trench 110 is removed, and only the second polysilicon layer 151 in the opening 141 is retained. The removal method is, for example, a chemical mechanical polishing (CMP) process. Afterwards, ions are implanted into the second polysilicon layer 151 at the top to form a second doped polysilicon layer 150. The type of ions implanted this time is the same as the type and concentration of ions implanted in the first doped polysilicon layer 130.

[0079] In some embodiments, after the top ion implantation is completed, an annealing process is also included to diffuse the doped ions implanted in the above process from the surface of the polysilicon layer to the inside of the polysilicon layer, thereby improving the uniformity of ion doping. In addition, since the first polysilicon layer 131 is implanted with ions in an inclined implantation manner, and in order to ensure that the polysilicon layer of the side wall is implanted with ions as a whole, the inclination angle is relatively large, and the first polysilicon layer 131 at the bottom of the deep trench 110 may not be implanted with ions, or even only a small amount of ions may be implanted. Through the annealing process, the ions implanted at the bottom of the deep trench 110 can be diffused into the first polysilicon layer 131 to form a first doped polysilicon layer 130 with uniform ion distribution. Therefore, the annealing process can improve the uniformity of doped ion distribution and improve the resistance of polysilicon.

[0080] The annealing process is selected according to the thickness of the polysilicon layer. For example, the thickness of the first polysilicon layer 131 is 1000 angstroms to 5000 angstroms. To evenly diffuse the doped ions into the entire polysilicon layer, the layer can be kept warm at 950°C for 10 minutes to 250 minutes. The thicker the polysilicon layer, the longer the annealing time. For example, if the thickness of the first polysilicon layer 131 is 2000 angstroms, the annealing time can be 40 minutes; if the thickness of the first polysilicon layer 131 is 1000 angstroms, the annealing time can be 10 minutes; or if the thickness of the first polysilicon layer 131 is 5000 angstroms, the annealing time can be 250 minutes, and so on.

[0081] After the annealing process is completed, the second doped polysilicon layer 150 and the first doped polysilicon layer 130 form a closed conductive layer. The insulating material layer 140 is filled in the conductive layer surrounded by the first doped polysilicon layer 130 and the second doped polysilicon layer 150 .

[0082] The preparation method of the deep trench isolation structure of the present invention can reduce the polysilicon resistance of the DTI structure, improve the conduction capability, and avoid the influence of void / crack defects on the resistance value by depositing polysilicon in batches, injecting ions in batches, and filling insulating materials in the middle of the polysilicon.

[0083] See also Fig.10Based on the same inventive concept, the present invention also provides a deep trench isolation structure, which includes a substrate 100, an insulating dielectric layer 120, a first doped polysilicon layer 130, a second doped polysilicon layer 150 and an insulating material layer 140.

[0084] The substrate 100 is used to support the device structure formed thereon, and it can be any material suitable for forming a semiconductor device. For example, a silicon (Si) substrate, a germanium (Ge) substrate, a silicon germanium (SiGe) substrate, a silicon-on-insulator (SOI) substrate, a germanium-on-insulator (GOI), silicon carbide (SiC), aluminum nitride (AlN), indium nitride (InN), gallium nitride (GaN), gallium arsenide (GaAs), indium phosphide (InP), silicon germanium (GeSi), sapphire or other semiconductor materials formed by III / V compounds, etc.; the substrate 100 can also be a stacked structure, such as a silicon / silicon germanium stack, etc. The substrate 100 is a P-type substrate or an N-type substrate. In this embodiment, the substrate 100 uses a P-type substrate.

[0085] One or more deep trenches 110 are provided on the substrate 100. The size (characteristic dimension CD, depth, aspect ratio, etc.) of the deep trenches 110 can be selected according to actual production needs. The deep trenches 110 are formed by a conventional process in the art. An ion implantation region 111 is provided in the substrate 100 at the bottom of the deep trench 110. The ion implantation type of the region is the same as the doping type of the substrate 100.

[0086] The insulating dielectric layer 120 is disposed on the sidewalls of the deep trench 110 and on the substrate 100 on both sides of the deep trench 110; it plays an electrical isolation role to prevent lateral diffusion of ions in the subsequent doping process. The insulating dielectric layer 120 is, for example, a SiO2 layer formed using a TEOS process. The deposition thickness of the SiO2 layer is, for example, 4000 angstroms to 6000 angstroms; specifically, it can be 4000 angstroms, 5000 angstroms, 6000 angstroms, etc.

[0087] The first doped polysilicon layer 130 is disposed on the insulating dielectric layer 120 on the sidewall of the deep trench 110 and at the bottom of the deep trench 110, and is in contact with the ion implantation region 111, thereby achieving conduction with the substrate 100 at the bottom of the deep trench 110. The doping ions of the first doped polysilicon layer 130 are the same as the doping ions of the substrate 100. In one embodiment, the substrate 100 is a P-type substrate, and the implanted ions are P-type ions, for example, B ions. The doping ions of the first doped polysilicon layer 130 are B ions, and the implantation concentration of the B ions may be 1E15 ion / cm 2 ~1E16 ion / cm 2 , for example, 1E15 ion / cm2 、5E15 ion / cm 2 、8E15 ion / cm 2 or 1E16 ion / cm 2 The first doped polysilicon layer 130 does not fill up the deep trench 110, and its thickness can be determined according to actual production conditions. As an example, the thickness of the first doped polysilicon layer 130 is 1000 angstroms to 5000 angstroms, such as 1000 angstroms, 2000 angstroms, 3000 angstroms or 5000 angstroms, and so on.

[0088] The second doped polysilicon layer 150 is disposed on the top of the deep trench 110 and contacts both ends of the first doped polysilicon layer 130 to form a closed conductive layer.

[0089] The insulating material layer 140 is filled between the first doped polysilicon layer 130 and the second doped polysilicon layer 150, thereby forming a DTI structure with the outer circle being doped polysilicon and the inner circle being filled with the insulating material layer 140. This can not only reduce the resistance of the DTI polysilicon and improve the conduction capability, but also avoid the influence of void / crack defects on the resistance value.

[0090] The deep trench isolation structure of the present invention first forms a first doped polysilicon layer in the deep trench, then fills the first doped polysilicon layer with an insulating material layer, and finally forms a second doped polysilicon layer on the top to cover the insulating material layer together with the first doped polysilicon layer to form a closed conductive layer. Since the middle of the deep trench is filled with insulating material and the polysilicon layer is deposited in batches on the outer circle, voids / cracks in the polysilicon layer are avoided, thereby improving the stability of the resistance of the polysilicon layer. When ion implantation is performed on the polysilicon layer on each side wall of the deep trench, a method of batched tilted implantation is adopted, and combined with an appropriate annealing process, the doped ion distribution of the polysilicon layer is made more uniform, the resistance of the polysilicon layer is reduced, and the conductivity of the polysilicon layer is improved. Therefore, the present invention effectively overcomes some practical problems in the prior art and has a high utilization value and use significance.

[0091] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for preparing a deep trench isolation structure, It is characterized in that The following steps are involved: Providing a substrate having a deep trench formed thereon; forming an insulating dielectric layer on the sidewalls of the deep trench and the substrate at both sides of the deep trench, and implanting ions into the substrate at the bottom of the deep trench; forming a first polysilicon layer in the deep trench, and injecting ions into the first polysilicon layer to form a first doped polysilicon layer; Filling an insulating material layer in the first doped polysilicon layer; A second doped polysilicon layer is formed on the top of the deep trench, so that the second doped polysilicon layer and the first doped polysilicon layer jointly cover the insulating material layer to form a closed conductive layer.

2. The method for preparing a deep trench isolation structure according to claim 1, It is characterized in that The step of injecting ions into the first polysilicon layer comprises: performing a first ion implantation into the first polysilicon layer by means of an inclined implantation method; rotating the substrate at a set angle, and performing a second ion implantation into the first polysilicon layer by means of an inclined implantation method, and repeating the steps of rotating and inclined ion implantation until the first polysilicon layer on each side wall of the deep trench is implanted with ions.

3. The method for preparing a deep trench isolation structure according to claim 2, It is characterized in that The cross-section of the deep trench is square, and the step of injecting ions into the first polysilicon layer includes: performing a first ion implantation on the first polysilicon layer on the first side wall of the deep trench by means of an inclined implantation method; rotating the substrate 90°, and performing a second ion implantation on the first polysilicon layer on the second side wall adjacent to the first side wall by means of an inclined implantation method; rotating the substrate 90° again, and performing a third ion implantation on the first polysilicon layer on the third side wall opposite to the first side wall by means of an inclined implantation method; and rotating the substrate 90° again, and performing a fourth ion implantation on the first polysilicon layer on the fourth side wall adjacent to the other side of the first side wall by means of an inclined implantation method.

4. The method for preparing a deep trench isolation structure according to claim 1, It is characterized in that The step of filling the first doped polysilicon layer with an insulating material layer comprises: depositing the insulating material layer in the deep trench and on the substrate on both sides of the deep trench by using a sub-atmospheric pressure chemical vapor deposition or a high aspect ratio deposition process.

5. The method for preparing a deep trench isolation structure according to claim 4, It is characterized in that The step of forming a second doped polysilicon layer on the top of the deep trench comprises: Removing the insulating material layer on the substrate at both sides of the deep trench and a portion of the insulating material layer in the deep trench to form an opening at the top of the deep trench; Etching the first doped polysilicon layer on the substrate at both sides of the deep trench; forming a second polysilicon layer in the opening; Ions are implanted into the second polysilicon layer to form a second doped polysilicon layer.

6. The method for preparing a deep trench isolation structure according to any one of claims 1 to 5, It is characterized in that After forming the second doped polysilicon layer on the top of the deep trench, an annealing step is also included. The annealing step includes: annealing at a temperature of 950° C. for 10 minutes to 250 minutes.

7. The method for preparing a deep trench isolation structure according to claim 1, It is characterized in that The steps of forming an insulating dielectric layer on the sidewalls of the deep trench and the substrate on both sides of the deep trench, and implanting ions into the substrate at the bottom of the deep trench include: forming an insulating dielectric layer on the inner wall of the deep trench and the substrate at both sides of the deep trench; Etching the insulating dielectric layer at the bottom of the deep trench to expose the substrate at the bottom of the deep trench; Ions are implanted into the substrate at the bottom of the deep trench, and the type of the implanted ions is the same as the doping type of the substrate.

8. The method for preparing a deep trench isolation structure according to claim 1, It is characterized in that The thickness of the first polysilicon layer is 1000 angstroms to 5000 angstroms; the concentration of ions implanted into the first polysilicon layer is 1E15 to 1E16 ion / cm 2 .

9. The method for preparing a deep trench isolation structure according to claim 1, It is characterized in that The ions implanted into the substrate at the bottom of the deep trench are of the same type as the ions implanted into the first polysilicon layer and the doped ions of the second doped polysilicon layer, and the implanted ions include B ions.

10. A deep trench isolation structure, It is characterized in that include: A substrate, wherein a deep groove is provided on the substrate; An insulating dielectric layer is disposed on the sidewalls of the deep trench and on the substrate at both sides of the deep trench; A first doped polysilicon layer is disposed on the insulating dielectric layer in the deep trench and at the bottom of the deep trench; an insulating material layer filled in the first doped polysilicon layer; The second doped polysilicon layer is arranged on the top of the deep trench and covers the insulating material layer together with the first doped polysilicon layer to form a closed conductive layer.

Citation Information

Patent Citations

  • Low gate charge deep trench power MOS device and manufacturing method thereof

    CN101719516A

  • Super junction charge balance structure and preparation method thereof

    CN116387341A

  • Formation method of semiconductor device

    CN118610154A

  • Memory cell with a vertical transistor and fabrication method thereof

    US20050167721A1

  • Multilayer Isolation Structure for High Voltage Silicon-On-Insulator Device

    US20220037199A1