A CMOS pixel structure with large full well charge

Abstract

The invention relates to a CMOS pixel structure with a large full well charge, belonging to the field of semiconductors; the Si:N structure is a cubic structure; wherein n vertical layers are uniformly attached to the front side wall of the Si:N structure; the other n vertical layers are symmetrically and uniformly attached to the rear side wall of the Si:N structure; the horizontal layer is uniformly attached to the upper surface of the Si:N structure; each vertical layer is correspondingly installed with a vertical MOS structure; the horizontal MOS structure is uniformly attached to the upper surface of the horizontal layer; each horizontal MOS structure is correspondingly installed with a driving electrode on the upper surface; n is a positive integer not less than 2; the invention can make full use of the pixel space area to store photogenerated charges, greatly improve the storage efficiency of the pixel for the photogenerated charges, thereby realizing a substantial improvement in the full well of the pixel; at the same time, the control efficiency of the electrode for charge transmission can be improved, and a higher charge transmission efficiency and high-speed charge transfer can be realized.

Description

Technical Field

[0001] The invention belongs to the field of semiconductors and relates to a CMOS pixel structure with a large full well charge. Background Art

[0002] Image sensors play an extremely important role in cameras. The performance of image sensors plays a decisive role in the quality of images. Image sensor TDI (Time Delay Integration) technology is a method of delayed integration for multiple exposures of the same target, which greatly improves the ability to collect light energy. It has the advantages of high responsiveness, low noise, and wide dynamic range. It can also output signals with a certain signal-to-noise ratio in dark scenes, and plays an important role in industrial detection and environmental monitoring.

[0003] TDI technology was first applied to CCD (Charge Couple Device) image sensors, namely TDI-CCD image sensors. However, since the process of CCD image sensors is different from the mass-produced CMOS process, a large number of CMOS (Complementary Metal Oxide Semiconductor) circuits cannot be directly integrated. With the development of CMOS image sensors, the advantages of CCD and CMOS are combined to develop a new type of TDI-CMOS image sensor.

[0004] TDI image sensors, whether early TDI-CCD or the latest TDI-CMOS images, use horizontal MOS structure electrodes to drive the charge packets below the electrodes to achieve charge storage and transfer. However, this driving structure does not make sufficient use of the charge storage in the spatial area of ​​the pixel and has low control efficiency, resulting in low full well charge and transfer efficiency of the pixel. Summary of the invention

[0005] The technical problem solved by the present invention is: to overcome the shortcomings of the prior art and propose a CMOS pixel structure with a large full well charge, which can fully utilize the pixel space area to store photogenerated charges, greatly improve the storage efficiency of the pixel for photogenerated charges, thereby achieving a significant increase in the pixel full well; at the same time, it can improve the control efficiency of the electrode for charge transfer, achieve higher charge transfer efficiency and high-speed charge transfer.

[0006] The solution of the present invention is:

[0007] A CMOS pixel structure with a large full well charge, comprising a Si:N structure, two sets of vertical Layer, 1 level layer, 2 groups of vertical MOS structures, 1 group of horizontal MOS structures and 1 group of driving electrodes;

[0008] Among them, the Si:N structure is a cubic structure; one group of vertical The layer is evenly attached to the front side wall of the Si:N structure; another group of vertical The layer is symmetrically and evenly attached to the rear sidewall of the Si:N structure; horizontal The layer is evenly attached to the upper surface of the Si:N structure; each group of vertical A set of vertical MOS structures is installed on each layer; the horizontal MOS structures are evenly attached to the horizontal The upper surface of the layer; a group of driving electrodes is installed corresponding to the upper surface of the horizontal MOS structure.

[0009] In the above-mentioned CMOS pixel structure with large full well charge, each group of vertical The layer consists of n vertical layer; each group of vertical MOS structures includes n vertical MOS structures; each group of horizontal MOS structures includes n horizontal MOS structures; n vertical Layers are evenly spaced; each vertical One vertical MOS structure is installed on each layer; n horizontal MOS structures are evenly arranged on the horizontal The upper surface of the layer; n is a positive integer not less than 2.

[0010] In the above-mentioned CMOS pixel structure with a large full well charge, the vertical The layer is a rectangular plate structure; A rectangular groove is provided on the outer side wall of the layer along the vertical direction; a corresponding vertical MOS structure is embedded in the groove.

[0011] In the above-mentioned CMOS pixel structure with a large full well charge, both ends of each horizontal MOS structure are respectively connected to a vertical MOS structure located on the front side wall of the Si:N structure and a symmetrical vertical MOS structure located on the rear side wall of the Si:N structure, that is, each horizontal MOS structure and the corresponding two vertical MOS structures form an inverted U-shaped frame.

[0012] In the above-mentioned CMOS pixel structure with a large full well charge, in each frame, a contact column is respectively arranged at the top of the two vertical MOS structures, and a contact column is arranged on the upper surface of the horizontal MOS structure; the corresponding driving electrode is arranged on the upper surface of the frame, and the bottom of the driving electrode is in contact with all three contact columns.

[0013] In the above-mentioned CMOS pixel structure with a large full well charge, the contact pillar located on the horizontal MOS structure is arranged at the center of the upper surface of the horizontal MOS structure.

[0014] In the above-mentioned CMOS pixel structure with a large full well charge, the vertical MOS structure is made of metal material; and the horizontal MOS structure is made of POLY material.

[0015] In the above-mentioned CMOS pixel structure with a large full well charge, the CMOS pixel structure includes n inverted U-shaped frames; the distance between two adjacent inverted U-shaped frames is 100 nm.

[0016] In the above-mentioned CMOS pixel structure with a large full well charge, the charge transfer direction of the CMOS pixel structure is: The layer is located in the plane and perpendicular to the horizontal MOS structure.

[0017] In the above-mentioned CMOS pixel structure with a large full well charge, L×K CMOS pixel structures are spliced ​​into an array to form an L×K pixel array; wherein, L CMOS pixel structures are spliced ​​along the charge transfer direction, and K CMOS pixel structures are spliced ​​along the axial direction of the horizontal MOS structure.

[0018] The beneficial effects of the present invention compared with the prior art are:

[0019] (1) The present invention uses both a vertical MOS structure and a horizontal MOS structure as the driving electrode of the pixel, so that the top and the left and right sides of the pixel are all under the control of the driving electrode;

[0020] (2) The present invention can fully utilize the pixel space area to store photogenerated charges, greatly improving the storage efficiency of the pixel for photogenerated charges, thereby achieving a significant increase in the pixel full well;

[0021] (3) The present invention can improve the control efficiency of the electrode for charge transfer through multi-directional control of the top and left and right sides of the pixel, thereby achieving higher charge transfer efficiency and high-speed charge transfer;

[0022] (4) The pixel structure of the present invention is suitable for large full well and high-speed transmission CMOS applications, especially TDI-CMOS pixel applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a schematic diagram of the overall structure of the CMOS pixel of the present invention;

[0024] Figure 2 A top view of the CMOS pixel structure of the present invention;

[0025] Figure 3 For the present invention Figure 2 Schematic diagram of AA direction in;

[0026] Figure 4Schematic diagram of the pixel array of the present invention. DETAILED DESCRIPTION

[0027] The present invention will be further described below in conjunction with the embodiments.

[0028] The present invention provides a CMOS pixel structure with a large full well charge, which can fully utilize the pixel space area to store photogenerated charges, greatly improving the storage efficiency of the pixel for photogenerated charges, thereby achieving a significant increase in the pixel full well; at the same time, it can improve the control efficiency of the electrode for charge transfer, achieving higher charge transfer efficiency and high-speed charge transfer.

[0029] CMOS pixel structure with large full well charge, such as Figure 1 As shown, it specifically includes Si: N structure 1 and 2 groups of vertical Layer 2, 1 level Layer 3, 2 groups of vertical MOS structures 4, 1 group of horizontal MOS structures 5 and 1 group of driving electrodes 6. Among them, the Si:N structure 1 is a cube structure; Layer 2 is evenly attached to the front side wall of Si:N structure 1; another group of vertical Layer 2 is symmetrically and evenly attached to the rear sidewall of Si:N structure 1; horizontal Layer 3 is evenly attached to the upper surface of Si:N structure 1; each group of vertical A set of vertical MOS structures 4 is installed on layer 2; horizontal MOS structures 5 are evenly attached to the horizontal A group of driving electrodes 6 are installed on the upper surface of the horizontal MOS structure 5.

[0030] Each group of vertical Layer 2 includes n vertical Layer 2; each group of vertical MOS structures 4 includes n vertical MOS structures 4; each group of horizontal MOS structures 5 includes n horizontal MOS structures 5; n vertical Layer 2 is evenly arranged; each vertical Layer 2 corresponds to installing a vertical MOS structure 4; n horizontal MOS structures 5 are evenly arranged on the horizontal The upper surface of layer 3; n is a positive integer not less than 2.

[0031] The accompanying drawings of the present invention take n=4 as an example for illustration.

[0032] In the present invention, vertical Layer 2 is a rectangular plate structure; A rectangular groove is formed on the outer wall of the layer 2 in the vertical direction; the corresponding vertical MOS structure 4 is embedded in the groove. Figure 2 shown.

[0033] like Figure 3 As shown, both ends of each horizontal MOS structure 5 are connected to a vertical MOS structure 4 located on the front side wall of the Si:N structure 1 and a symmetrical vertical MOS structure 4 located on the rear side wall of the Si:N structure 1, that is, each horizontal MOS structure 5 and the corresponding two vertical MOS structures 4 form an inverted U-shaped frame. In each frame, a contact column 7 is respectively arranged at the top of the two vertical MOS structures 4, and a contact column 7 is arranged on the upper surface of the horizontal MOS structure 5; the corresponding driving electrode 6 is arranged on the upper surface of the frame, and the bottom of the driving electrode 6 is in contact with all three contact columns 7. The contact column 7 located on the horizontal MOS structure 5 is arranged at the center of the upper surface of the horizontal MOS structure 5.

[0034] The vertical MOS structure 4 is made of metal material; the horizontal MOS structure 5 is made of POLY material.

[0035] The CMOS pixel structure includes n inverted U-shaped frames; the distance between two adjacent inverted U-shaped frames is 100 nm.

[0036] The charge transfer direction of the CMOS pixel structure is set as: The plane where the layer 3 is located is perpendicular to the direction of the horizontal MOS structure 5. The L×K CMOS pixel structures are arrayed to form an L×K pixel array, such as Figure 4 As shown, L CMOS pixel structures are spliced ​​along the charge transfer direction, and K CMOS pixel structures are spliced ​​along the axial direction of the horizontal MOS structure 5. The 4 external driving signals drive the driving electrodes of each pixel respectively.

[0037] The present invention uses both a vertical MOS structure and a horizontal MOS structure as driving electrodes of the pixel, so that the top and the left and right sides of the pixel are all under the control of the driving electrode. The technical advantages brought by this electrode driving control method are, on the one hand, that the spatial area of ​​the pixel can be fully utilized to store the photogenerated charges, which greatly improves the storage efficiency of the pixel for the photogenerated charges, thereby achieving a significant increase in the pixel full well; on the other hand, through multi-directional control of the top and the left and right sides of the pixel, the control efficiency of the electrode for the charge transfer can be improved, thereby achieving a higher charge transfer efficiency and high-speed charge transfer.

[0038] This pixel structure is suitable for large full well and high-speed transmission CMOS applications, especially TDI-CMOS pixel applications.

[0039] Although the present invention has been disclosed as above in the form of a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art may make possible changes and modifications to the technical solution of the present invention by using the methods and technical contents disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the protection scope of the technical solution of the present invention.

Claims

1. A CMOS pixel structure with a large full well charge, characterized in that: Including Si:N structure (1), 2 sets of vertical Layers (2), 1 level layer (3), two groups of vertical MOS structures (4), a group of horizontal MOS structures (5) and a group of driving electrodes (6); Among them, the Si:N structure (1) is a cubic structure; one group of vertical The layer (2) is evenly attached to the front side wall of the Si:N structure (1); another set of vertical Layer (2) is symmetrically and evenly attached to the rear sidewall of the Si:N structure (1); horizontal The layer (3) is evenly attached to the upper surface of the Si:N structure (1); each group of vertical A set of vertical MOS structures (4) is installed on the layer (2); the horizontal MOS structures (5) are evenly attached to the horizontal The upper surface of the layer (3); a group of driving electrodes (6) are installed correspondingly on the upper surface of the horizontal MOS structure (5); Each group of vertical Layer (2) includes n vertical layer (2); each group of vertical MOS structures (4) includes n vertical MOS structures (4); each group of horizontal MOS structures (5) includes n horizontal MOS structures (5); n vertical Layers (2) are evenly arranged; each vertical One vertical MOS structure (4) is installed in each layer (2); n horizontal MOS structures (5) are evenly arranged in the horizontal The upper surface of layer (3); n is a positive integer not less than 2; The vertical Layer (2) is a rectangular plate structure; A rectangular groove is provided on the outer side wall of the layer (2) in the vertical direction; a corresponding vertical MOS structure (4) is embedded in the groove; Two ends of each horizontal MOS structure (5) are respectively connected to a vertical MOS structure (4) located on the front side wall of the Si:N structure (1) and a symmetrical vertical MOS structure (4) located on the rear side wall of the Si:N structure (1), that is, each horizontal MOS structure (5) and the corresponding two vertical MOS structures (4) form an inverted U-shaped frame; In each frame, the tops of the two vertical MOS structures (4) are respectively provided with a contact column (7), and the upper surface of the horizontal MOS structure (5) is provided with a contact column (7); the corresponding driving electrode (6) is provided on the upper surface of the frame, and the bottom of the driving electrode (6) is in contact with the three contact columns (7).

2. A CMOS pixel structure with a large full well charge according to claim 1, characterized in that: The contact column (7) located on the horizontal MOS structure (5) is arranged at the center position of the upper surface of the horizontal MOS structure (5).

3. The CMOS pixel structure with a large full well charge according to claim 1, characterized in that: The vertical MOS structure (4) is made of metal material; and the horizontal MOS structure (5) is made of POLY material.

4. The CMOS pixel structure with a large full well charge according to claim 1, characterized in that: The CMOS pixel structure includes n inverted U-shaped frames; the distance between two adjacent inverted U-shaped frames is 100 nm.

5. The CMOS pixel structure with a large full well charge according to claim 2, characterized in that: The charge transfer direction of the CMOS pixel structure is: in the horizontal The layer (3) is located in a plane and is perpendicular to the direction of the horizontal MOS structure (5).

6. The CMOS pixel structure with large full well charge according to claim 5, characterized in that: L×K CMOS pixel structures are spliced ​​into an array to form an L×K pixel array; wherein the L CMOS pixel structures are spliced ​​along the charge transfer direction, and the K CMOS pixel structures are spliced ​​along the axial direction of the horizontal MOS structure (5).

Images