Substrate alignment method, device, computer equipment, readable storage medium and program product for chip transfer

The initial dot matrix is ​​acquired through the vision sensor and affine transformation and clustering process, and the corner point chip is determined as the alignment reference point, which solves the problem of low alignment accuracy of the substrate in the prior art and achieves higher alignment accuracy.

CN118888504BActive Publication Date: 2025-03-14MAXWELL TECH (ZHUHAI) CO LTD
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Patent Information

Application Number
CN202411355924.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-09-27
Publication Date
2025-03-14
Estimated Expiration
2044-09-27

AI Technical Summary

Technical Problem

In the prior art, during the chip transfer process of Micro LED display panels, the accuracy of the substrate alignment is low, mainly because the production of cross marks on the substrate is prone to introduce errors.

Method used

The initial lattice is obtained by using vision sensors, and the corner chip is determined as the reference point of the alignment through affine transformation and clustering processing, which avoids the error introduced by the mark.

Benefits of technology

The accuracy of substrate alignment is improved, and by removing noise points, the accurate alignment between the chip and the pad is ensured, and the overall alignment accuracy is improved.

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Abstract

The present application relates to the field of display technology, specifically to a substrate alignment method, device, computer equipment, computer-readable storage medium and computer program product for chip transfer. The method comprises: based on a visual sensor, obtaining an initial dot matrix corresponding to a first captured image; based on an affine matrix corresponding to the initial dot matrix, performing an affine transformation on the initial dot matrix to obtain an intermediate dot matrix; performing clustering processing on the intermediate dot matrix to screen out the main category with the largest number of chip points, and obtaining a processed dot matrix based on the chip points in the main category; based on the position of the corner point in the processed dot matrix, determining the target position of the visual sensor, until the position of the corner point belongs to a preset range, and using the corner point as the alignment reference point of the first substrate for alignment. The use of this method can improve the alignment accuracy during the bonding process.
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Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a substrate alignment method, device, computer equipment, computer-readable storage medium and computer program product for chip transfer. Background Art

[0002] With the continuous development of display technology, Micro Light Emitting Diode (Micro LED) technology has emerged. Micro LED display panels use small-sized LED chips to form a display array, and each LED chip can be driven and lit individually.

[0003] The process of manufacturing Micro LED display panels involves transferring LED chips to the driving substrate. The specific steps include: forming an LED chip array on the upper substrate, aligning the upper substrate with the driving substrate, and then using a high-energy laser beam as a heat source to bond the LED chips on the upper substrate to the pads on the driving substrate, and finally removing the upper substrate.

[0004] Currently, the upper substrate and the driving substrate are mainly aligned by making a cross-shaped mark on the substrate and using the mark as a reference point. However, making the mark is prone to introduce errors, resulting in low alignment accuracy. Summary of the invention

[0005] Based on this, it is necessary to provide a substrate alignment method, device, computer equipment, computer-readable storage medium and computer program product for chip transfer that can improve alignment accuracy in response to the above technical problems.

[0006] In a first aspect, the present application provides a substrate alignment method for chip transfer, comprising:

[0007] Based on the visual sensor, an initial dot matrix corresponding to a first captured image is acquired; wherein the first captured image corresponds to a side of the first substrate where the chip array is disposed;

[0008] Based on the affine matrix corresponding to the initial lattice, the initial lattice is affine transformed to obtain an intermediate lattice; wherein the affine matrix includes an affine matrix between a target sub-lattice in the initial lattice and a preset standard sub-lattice, and the relative position relationship between each chip point in the target sub-lattice is closest to the standard sub-lattice;

[0009] Performing clustering processing on the intermediate dot matrix to screen out a main category with the largest number of chip dots, and obtaining a processed dot matrix based on the chip dots in the main category;

[0010] Based on the position of the corner point in the processed dot matrix, the target position of the visual sensor is determined until the position of the corner point belongs to a preset range, and the corner point is used as an alignment reference point of the first substrate for alignment.

[0011] In one embodiment, after clustering the intermediate dot matrix, a category with the largest number of chip dots is screened out, and a processed dot matrix is ​​obtained based on the chip dots in the largest category, and then the process includes:

[0012] Traversing each chip point in the processed dot matrix, determining the predicted positions of chip points other than the current chip point based on the position of the current chip point and a preset relative position relationship, and obtaining a predicted position set corresponding to each chip point;

[0013] Determine a target chip point from the various chip points, wherein the error between the predicted position set corresponding to the target chip point and the actual position of the various chip points is minimal;

[0014] Based on the relative position relationship between each chip point and the target chip point, the corner points in the processed dot matrix are determined.

[0015] In one embodiment, before determining the corner points in the processed dot matrix based on the relative position relationship between each chip point and the target chip point, the method includes:

[0016] Based on the predicted position set corresponding to the target chip point and the actual position of each chip point, the missing points in the processed dot matrix are determined.

[0017] In one embodiment, the dot spacing of the standard sub-dot matrix is ​​smaller than the dot spacing of the target sub-dot matrix, and the clustering process of the intermediate dot matrix includes:

[0018] Calculating the Euclidean distance between each chip point in the intermediate dot matrix;

[0019] Based on the Euclidean distances between the chip points, clustering is performed on the intermediate point array.

[0020] In one embodiment, before performing affine transformation on the initial dot matrix based on the affine matrix corresponding to the initial dot matrix to obtain the intermediate dot matrix, the method includes:

[0021] Preprocessing the initial dot matrix; the preprocessing method of the initial dot matrix includes at least one of the following:

[0022] Rotating the initial dot matrix so that the points in each row of the initial dot matrix are located on a line parallel to the reference horizontal coordinate, and the points in each column of the initial dot matrix are located on a line parallel to the reference vertical coordinate;

[0023] The initial point matrix is ​​subjected to Euclidean clustering processing.

[0024] In one embodiment, the method further comprises:

[0025] Based on the visual sensor, an initial dot matrix corresponding to the second captured image is obtained; wherein, the second captured image corresponds to a side of the second substrate where a pad array is provided, and the initial dot matrix corresponding to the second captured image is used to determine the alignment reference point of the second substrate for alignment after affine transformation and clustering processing.

[0026] In a second aspect, the present application further provides a substrate alignment device, comprising:

[0027] A dot matrix acquisition module, used to acquire an initial dot matrix corresponding to a first captured image based on a visual sensor; wherein the first captured image corresponds to a side of the first substrate where a chip array is disposed;

[0028] An affine transformation module, configured to perform an affine transformation on the initial lattice based on an affine matrix corresponding to the initial lattice to obtain an intermediate lattice; wherein the affine matrix includes an affine matrix between a target sub-lattice in the initial lattice and a preset standard sub-lattice, and the relative position relationship between each chip point in the target sub-lattice is closest to the standard sub-lattice;

[0029] A cluster processing module, used for performing cluster processing on the intermediate dot matrix, screening out a main category with the largest number of chip dots, and obtaining a processed dot matrix based on the chip dots in the main category;

[0030] The substrate alignment module is used to determine the target position of the visual sensor based on the position of the corner point in the processed dot matrix until the position of the corner point belongs to a preset range, and align the corner point as the alignment reference point of the first substrate.

[0031] In a third aspect, the present application further provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of any of the above-described methods when executing the computer program.

[0032] In a fourth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program implements the steps of any of the methods described above when executed by a processor.

[0033] In a fifth aspect, the present application also provides a computer program product, including a computer program, which implements the steps of any of the methods described above when executed by a processor.

[0034] The above-mentioned substrate alignment method, device, computer equipment, computer-readable storage medium and computer program product for chip transfer can avoid errors caused by introducing marks on the substrate by adopting corner point chips as alignment reference points, thereby improving the accuracy of alignment. By performing affine transformation on the chip dot matrix corresponding to the chip array, the distribution of noise points can be deviated, and then through clustering processing, the noise in the dot matrix can be removed, thereby avoiding the problem of not being able to accurately find the corner points of the upper substrate due to chip misalignment, thereby further improving the accuracy of alignment. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the drawings required for use in the embodiments of the present application or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0036] Figure 1 is a schematic diagram of a first captured image in one embodiment;

[0037] Figure 2 is a schematic diagram of a first captured image when there is chip misalignment in one embodiment;

[0038] Figure 3 is a schematic diagram of a first captured image when a chip is missing in one embodiment;

[0039] Figure 4 is a schematic flow chart of a substrate alignment method for chip transfer in one embodiment;

[0040] Figure 5 is a schematic flow chart of a substrate alignment method for chip transfer in another embodiment;

[0041] Figure 6 A schematic diagram of a process of filling in missing points in a dot matrix after processing in one embodiment;

[0042] Figure 7 is a schematic flow chart of the steps of clustering the intermediate dot matrix in one embodiment;

[0043] Figure 8 A schematic diagram of a process of classifying various chip points into different categories in one embodiment;

[0044] Fig. 9 A schematic diagram of a process of obtaining a processed dot matrix based on chip dots in the main category in an embodiment;

[0045] Fig.10A schematic diagram of a process flow of a substrate alignment method for chip transfer in yet another embodiment;

[0046] Fig.11 A schematic diagram of a process of rotating an initial dot matrix in one embodiment;

[0047] Fig.12 A schematic diagram of a process of performing Euclidean clustering processing on an initial point matrix in one embodiment;

[0048] Fig.13 is a schematic flow chart of a substrate alignment method for chip transfer in yet another embodiment;

[0049] Fig.14 is a structural block diagram of a substrate alignment device in one embodiment;

[0050] Fig.15 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0051] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0052] At present, as the size of LED chips and the pixel pitch continue to shrink, the requirements for the alignment accuracy between LED chips and pads are getting higher and higher (for example, less than 2 microns). Introducing a mark as a reference point to align the upper substrate and the driving substrate cannot accurately align the LED chip and the pad. Therefore, the present disclosure provides a substrate alignment method using a corner chip as a reference point.

[0053] For example, in the process of using a visual sensor to determine the position of a corner chip, the visual sensor's field of view cannot cover the entire area of ​​the upper substrate, and the visual sensor needs to be moved continuously to find the corner chip. For example, the corner chip under the current field of view of the visual sensor can be repeatedly determined (e.g. Figure 1 C1 in the figure), move the visual sensor so that the center of the visual sensor's field of view is aligned with the corner chip, and re-shoot until the corner chip of the upper substrate is within the field of view of the visual sensor. In this process, there is chip misalignment (such as Figure 2 as shown) or the chip is missing (as shown Figure 3 The situation shown in the figure will cause the movement of the visual sensor to be offset, and it will not be able to accurately find the corner chip of the upper substrate.

[0054] In one embodiment, Figure 4As shown, a substrate alignment method for chip transfer is provided. This embodiment uses the method applied to a terminal as an example for illustration. It can be understood that the method can also be applied to a server, and can also be applied to a system including a terminal and a server, and is implemented through the interaction between the terminal and the server. In this embodiment, the method includes the following steps:

[0055] Step S102, based on the visual sensor, obtaining an initial dot matrix corresponding to the first captured image; wherein the first captured image corresponds to a side of the first substrate where the chip array is disposed.

[0056] For example, the camera coordinate system and the product coordinate system can be first merged to teach the mark position, and the second substrate can be straightened after the camera is moved to obtain the coordinates of the second substrate mark; then the first substrate can be moved to the teaching position, and the chip array set on the first substrate can be photographed by the camera to obtain the first photographed image, and then the first substrate can be straightened. Furthermore, the first photographed image can be matched with the template chip image to obtain the initial dot matrix composed of the chip points arranged in the array.

[0057] Step S104, based on the affine matrix corresponding to the initial lattice, the initial lattice is affine transformed to obtain an intermediate lattice; wherein the affine matrix includes an affine matrix between a target sub-lattice in the initial lattice and a preset standard sub-lattice, and the relative position relationship between each chip point in the target sub-lattice is closest to the standard sub-lattice.

[0058] The target sub-lattice may be determined by traversing each chip point in the initial lattice, calculating the relative position relationship between each chip point and its 8 neighboring chip points, determining 9 points whose relative position relationship is closest to the standard sub-lattice, and obtaining the target sub-lattice. In a possible implementation, the residual error between the target sub-lattice and the standard sub-lattice is the smallest after affine transformation.

[0059] It is understandable that the number of points included in the target sub-lattice is less than the number of points included in the initial lattice. For example, the target sub-lattice may also include 4 points. In this case, the first formula may be used to determine the affine matrix corresponding to the initial lattice. The first formula may include:

[0060] ;

[0061] Among them, P 1 , P 2 , P 3 , P 4 is the point included in the target sub-lattice, P 2 , P 3 , P 4 P 1neighboring points, and x1 + y1 < x2 + y2, x1 + y1 < x3 + y3, x1 + y1 < x4 + y4, M is an affine matrix, and d is the set spacing of the standard sub-lattice.

[0062] Step S106: Perform clustering processing on the intermediate lattice, screen out the category with the largest number of chip points, and obtain the processed lattice based on the chip points in the largest category.

[0063] Among them, the intermediate lattice is obtained based on the affine matrix between the target sub-lattice and the standard sub-lattice. The relative positional relationship between the chip points in the target sub-lattice is closest to that of the standard sub-lattice. However, the relative positional relationship between noise points (e.g., misaligned chip points) and other points is different from that of non-noise points. Therefore, the noise points in the intermediate lattice will deviate from the distribution of non-noise points.

[0064] Exemplarily, a clustering algorithm can be used to classify the chip points in the intermediate lattice to retain the main class and remove the noise points in the intermediate lattice. Among them, the clustering algorithm depends on the spatial distribution characteristics of the points, and the clustering algorithm can be Euclidean clustering or hierarchical clustering, etc.

[0065] Step S108: Determine the target position of the vision sensor based on the positions of the corner points in the processed lattice until the positions of the corner points belong to a preset range, and use the corner points as the alignment reference points for the first substrate for alignment.

[0066] Among them, the corner point can be a chip point with the smallest abscissa and the largest ordinate in the upper left corner, or a chip point with the largest abscissa and ordinate in the upper right corner, a chip point with the smallest abscissa and ordinate in the lower left corner, or a chip point with the largest abscissa and the smallest ordinate in the lower right corner.

[0067] Exemplarily, in the case where the coordinates of the current corner point in the world coordinate system do not belong to the preset range, the target position of the camera can be determined as the position of the current corner point, the camera is moved to take a new picture, and step S102 is executed again; in the case where the coordinates of the current corner point in the world coordinate system belong to the preset range, the grating value and the true value of the current point can be recorded to obtain the position of the alignment reference point of the first substrate, and the first substrate and the second substrate are aligned according to the position of the alignment reference point of the first substrate and the position marked on the second substrate.

[0068] In the above substrate alignment method for chip transfer, by using the corner chip as the alignment reference point, the error caused by introducing marks on the substrate can be avoided, and the alignment accuracy is improved. By performing an affine transformation on the chip lattice corresponding to the chip array, the distribution of noise points can be deviated. Furthermore, through clustering processing, the noise in the lattice can be removed, and the problem of being unable to accurately find the corner points of the upper substrate due to chip misalignment is avoided, further improving the alignment accuracy.

[0069] In an exemplary embodiment, Figure 5 As shown, the above substrate alignment method may further include:

[0070] Step S1072, traverse each chip point in the processed dot matrix, determine the predicted positions of chip points other than the current chip point based on the position of the current chip point and the preset relative position relationship, and obtain the predicted position set corresponding to each chip point.

[0071] Step S1074, determining a target chip point from each chip point, wherein the error between the predicted position set corresponding to the target chip and the actual position of each chip point is the smallest.

[0072] Exemplarily, the target chip point can be determined by calculating the cumulative mean square error. For example, the second formula can be used to calculate the position error between the current chip point and other chip points except the current chip point. The second formula may include:

[0073] ;

[0074] Among them, xi is the horizontal coordinate of the i-th chip point other than the current chip point, yi is the vertical coordinate of the i-th chip point other than the current chip point, a=(xi-x) / / d, b=(yi-y) / / d, x is the horizontal coordinate of the current chip point, y is the vertical coordinate of the current chip point, and d is the set spacing.

[0075] Optionally, other algorithms such as support vector machines (SVM) may be used to determine the target chip point from various chip points.

[0076] Step S1076, determining the corner points in the processed dot matrix based on the relative position relationship between each chip point and the target chip point.

[0077] Exemplarily, a coordinate system may be established with the target chip point as a base point, the coordinates of each chip point in the coordinate system may be determined, and the corner point may be determined through the coordinate values.

[0078] Optionally, the position of each chip point may be converted into a row and a column relative to the target chip point, and then each row and column may be traversed in a bucketing manner to determine the corner point.

[0079] Furthermore, the substrate alignment method may further include:

[0080] Step S1075, based on the predicted position set corresponding to the target chip point and the actual position of each chip point, determine the missing points in the processed dot matrix.

[0081] For example, the predicted position set corresponding to the target chip point and the actual position of each chip point can be compared. When there is a predicted position without a corresponding actual position, it is determined that there is a missing point in the processed dot matrix. Figure 6 , when it is determined that there are missing points in the processed dot matrix, the missing points can be filled in according to the predicted positions. Among them, C20 is the target chip point, C21 is the corner point, and C22 is the missing point to be filled in.

[0082] In an exemplary embodiment, the initial dot matrix may be scaled to further concentrate the distribution of non-noise points. In this case, the dot spacing of the standard sub-dot matrix may be smaller than the dot spacing of the target sub-dot matrix. Figure 7 As shown, the above step of clustering the intermediate point matrix may include:

[0083] Step A1, calculating the Euclidean distance between each chip point in the middle dot matrix.

[0084] Step A2: clustering the intermediate points based on the Euclidean distance between the chip points.

[0085] For example, please refer to Figure 8 , affine transformation and Euclidean clustering are performed on the initial point matrix to divide each chip point into different categories (e.g. Figure 8 Divide the chip points into 3 categories); please refer to Fig. 9 , filter out the main category with the largest number of chip points, retain the chip points in the main category, and obtain the processed dot matrix. Among them, the dot spacing of the standard sub-dot matrix can be 1, that is, the initial dot matrix can be normalized.

[0086] In an exemplary embodiment, the initial lattice may be preprocessed, such as Fig.10 As shown, the above substrate alignment method may further include:

[0087] Step S1011, rotating the initial dot matrix so that the points in each row of the initial dot matrix are located on a line parallel to the reference horizontal coordinate, and the points in each column of the initial dot matrix are located on a line parallel to the reference vertical coordinate.

[0088] Step S1012, performing Euclidean clustering processing on the initial point matrix.

[0089] For example, the shooting angle of the camera may be biased, such as Fig.11 As shown, the initial lattice can be straightened first; there may be noise points with large position deviations in the initial lattice, such as Fig.12 As shown, the far-end noise can be removed by Euclidean clustering before the initial point matrix is ​​affine transformed.

[0090] In an exemplary embodiment, Fig.13 As shown, the corner chip can also be used as a reference point, and the substrate alignment method can also include:

[0091] Step S200, based on the visual sensor, obtain the initial dot matrix corresponding to the second captured image; wherein the second captured image corresponds to a side of the second substrate where the pad array is provided, and the initial dot matrix corresponding to the second captured image is used to perform affine transformation and clustering processing to determine the alignment reference point of the second substrate for alignment.

[0092] Among them, the steps of performing affine transformation and clustering processing on the initial point matrix corresponding to the second captured image can refer to the above-mentioned steps S104 and S106 respectively; the step of determining the alignment reference point of the second substrate for alignment can refer to the above-mentioned step S108, and the embodiments of the present application will not be described in detail here.

[0093] Furthermore, after the corner chip and / or corner pad are used as reference points for preliminary alignment of the upper substrate and the driving substrate, the coordinates of the chip on the upper substrate and the pad on the driving substrate at the current position can be obtained through template matching to align the chip and the pad to further improve the accuracy of bonding.

[0094] In summary, in the above-mentioned substrate alignment method for chip transfer, by using the corner point chip as the alignment reference point, it is possible to avoid errors caused by introducing marks on the substrate, thereby improving the accuracy of alignment. By performing an affine transformation on the chip dot matrix corresponding to the chip array, the distribution of noise points can be deviated, and then through clustering processing, the noise in the dot matrix can be removed, thereby avoiding the problem of being unable to accurately find the corner points of the upper substrate due to chip misalignment, thereby further improving the accuracy of alignment.

[0095] It should be understood that, although the various steps in the flowcharts involved in the above-mentioned embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps does not have a strict order restriction, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-mentioned embodiments can include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0096] Based on the same inventive concept, the embodiment of the present application also provides a substrate alignment device for implementing the substrate alignment method involved above. The implementation solution provided by the device to solve the problem is similar to the implementation solution recorded in the above method, so the specific limitations in one or more substrate alignment device embodiments provided below can refer to the limitations of the substrate alignment method above, and will not be repeated here.

[0097] In an exemplary embodiment, Fig.14 As shown, a substrate alignment device 300 is provided, comprising: a dot matrix acquisition module 301, an affine transformation module 302, a clustering processing module 303 and a substrate alignment module 304, wherein:

[0098] The dot matrix acquisition module 301 is used to acquire an initial dot matrix corresponding to a first captured image based on a visual sensor; wherein the first captured image corresponds to a side of the first substrate where a chip array is disposed.

[0099] The affine transformation module 302 is used to perform an affine transformation on the initial dot matrix based on the affine matrix corresponding to the initial dot matrix to obtain an intermediate dot matrix; wherein the affine matrix includes an affine matrix between a target sub-dot matrix in the initial dot matrix and a preset standard sub-dot matrix, and the relative position relationship between each chip point in the target sub-dot matrix is ​​closest to the standard sub-dot matrix.

[0100] The cluster processing module 303 is used to perform cluster processing on the intermediate dot matrix, screen out the main category with the largest number of chip points, and obtain the processed dot matrix based on the chip points in the main category.

[0101] The substrate alignment module 304 is used to determine the target position of the visual sensor based on the position of the corner point in the processed dot matrix until the position of the corner point belongs to a preset range, and align the corner point as the alignment reference point of the first substrate.

[0102] In an exemplary embodiment, the substrate alignment device 300 further includes a corner point determination module, and the corner point determination module is used to:

[0103] Traversing each chip point in the processed dot matrix, determining the predicted positions of chip points other than the current chip point based on the position of the current chip point and the preset relative position relationship, and obtaining a set of predicted positions corresponding to each chip point;

[0104] Determine a target chip point from each chip point, wherein the error between the predicted position set corresponding to the target chip point and the actual position of each chip point is minimal;

[0105] Based on the relative position relationship between each chip point and the target chip point, the corner points in the processed dot matrix are determined.

[0106] In an exemplary embodiment, the corner point determination module is further used to determine missing points in the processed dot matrix based on a predicted position set corresponding to the target chip point and an actual position of each chip point.

[0107] In an exemplary embodiment, the dot spacing of the standard sub-dot matrix may be smaller than the dot spacing of the target sub-dot matrix, and the clustering processing module 303 is further used to:

[0108] Calculate the Euclidean distance between each chip point in the middle dot matrix;

[0109] Based on the Euclidean distance between each chip point, the intermediate point array is clustered.

[0110] In an exemplary embodiment, the substrate alignment device 300 further includes a pre-processing module, and the pre-processing module is used to:

[0111] The initial dot matrix is ​​rotated so that the points in each row of the initial dot matrix are located on a line parallel to the reference horizontal coordinate, and the points in each column of the initial dot matrix are located on a line parallel to the reference vertical coordinate;

[0112] Perform Euclidean clustering on the initial lattice.

[0113] In an exemplary embodiment, the dot matrix acquisition module 301 is further used for:

[0114] Based on the visual sensor, an initial dot matrix corresponding to the second captured image is obtained; wherein the second captured image corresponds to a side of the second substrate where a pad array is provided, and the initial dot matrix corresponding to the second captured image is used to perform affine transformation and clustering processing to determine the alignment reference point of the second substrate for alignment.

[0115] Each module in the above-mentioned substrate alignment device can be implemented in whole or in part by software, hardware or a combination thereof. Each module can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in a computer device in the form of software, so that the processor can call and execute the operations corresponding to each module.

[0116] In an exemplary embodiment, a computer device is provided. The computer device may be a server, and its internal structure diagram may be as shown in FIG. Fig.15As shown. The computer device includes a processor, a memory, an input / output interface (Input / Output, referred to as I / O) and a communication interface. Among them, the processor, the memory and the input / output interface are connected through a system bus, and the communication interface is connected to the system bus through the input / output interface. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store data. The input / output interface of the computer device is used to exchange information between the processor and an external device. The communication interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a substrate alignment method for chip transfer is implemented.

[0117] Those skilled in the art will understand that Fig.15 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0118] In an exemplary embodiment, a computer device is provided, including a memory and a processor, wherein a computer program is stored in the memory, and the processor implements the steps in the above-mentioned method embodiments when executing the computer program.

[0119] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps in the above method embodiments are implemented.

[0120] In one embodiment, a computer program product is provided, including a computer program, which implements the steps in the above method embodiments when executed by a processor.

[0121] A person of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, an artificial intelligence (AI) processor, etc., but are not limited to this.

[0122] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0123] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A substrate alignment method for chip transfer, characterized in that: The method comprises: Based on the visual sensor, an initial dot matrix corresponding to a first captured image is acquired; wherein the first captured image corresponds to a side of the first substrate where the chip array is disposed; A target sub-lattice is selected from the initial lattice, an affine matrix between the target sub-lattice and a preset standard sub-lattice is determined, and based on the affine matrix, an affine transformation is performed on the initial lattice to obtain an intermediate lattice; wherein the relative position relationship between the chip points in the target sub-lattice is closest to the standard sub-lattice; Performing clustering processing on the intermediate dot matrix to screen out a main category with the largest number of chip dots, and obtaining a processed dot matrix based on the chip dots in the main category; Traversing each chip point in the processed dot matrix, determining the predicted positions of chip points other than the current chip point based on the position of the current chip point and a preset relative position relationship, and obtaining a predicted position set corresponding to each chip point; Determine a target chip point from the various chip points, wherein the error between the predicted position set corresponding to the target chip point and the actual position of the various chip points is minimal; Determining corner points in the processed dot matrix based on the relative position relationship between each chip point and the target chip point; Based on the position of the corner point in the processed dot matrix, the target position of the visual sensor is determined until the position of the corner point belongs to a preset range, and the corner point is used as an alignment reference point of the first substrate for alignment.

2. The method according to claim 1, characterized in that Before determining the corner points in the processed dot matrix based on the relative position relationship between each chip point and the target chip point, the method includes: Based on the predicted position set corresponding to the target chip point and the actual position of each chip point, the missing points in the processed dot matrix are determined.

3. The method according to claim 1, characterized in that The point spacing of the standard sub-point matrix is ​​smaller than the point spacing of the target sub-point matrix, and the clustering process of the intermediate point matrix includes: Calculating the Euclidean distance between each chip point in the intermediate dot matrix; Based on the Euclidean distances between the chip points, clustering is performed on the intermediate point array.

4. The method according to claim 1, characterized in that: Before performing affine transformation on the initial lattice based on the affine matrix to obtain an intermediate lattice, the method includes: Preprocessing the initial dot matrix; the preprocessing method of the initial dot matrix includes at least one of the following: Rotating the initial dot matrix so that the points in each row of the initial dot matrix are located on a line parallel to the reference horizontal coordinate, and the points in each column of the initial dot matrix are located on a line parallel to the reference vertical coordinate; The initial point matrix is ​​subjected to Euclidean clustering processing.

5. The method according to claim 1, characterized in that The method further comprises: Based on the visual sensor, an initial dot matrix corresponding to the second captured image is obtained; wherein, the second captured image corresponds to a side of the second substrate where a pad array is provided, and the initial dot matrix corresponding to the second captured image is used to determine the alignment reference point of the second substrate for alignment after affine transformation and clustering processing.

6. A substrate alignment device, characterized in that: The device comprises: A dot matrix acquisition module, used to acquire an initial dot matrix corresponding to a first captured image based on a visual sensor; wherein the first captured image corresponds to a side of the first substrate where a chip array is disposed; An affine transformation module is used to select a target sub-lattice from the initial lattice, determine an affine matrix between the target sub-lattice and a preset standard sub-lattice, and perform an affine transformation on the initial lattice based on the affine matrix to obtain an intermediate lattice; wherein the relative position relationship between the chip points in the target sub-lattice is closest to the standard sub-lattice; A cluster processing module, used for performing cluster processing on the intermediate dot matrix, screening out a main category with the largest number of chip dots, and obtaining a processed dot matrix based on the chip dots in the main category; A corner point determination module, used to traverse each chip point in the processed dot matrix, determine the predicted positions of chip points other than the current chip point based on the position of the current chip point and a preset relative position relationship, and obtain a set of predicted positions corresponding to each chip point; The corner point determination module is further used to determine a target chip point from the various chip points, wherein the error between the predicted position set corresponding to the target chip point and the actual position of the various chip points is minimal; The corner point determination module is further used to determine the corner points in the processed dot matrix based on the relative position relationship between each chip point and the target chip point; The substrate alignment module is used to determine the target position of the visual sensor based on the position of the corner point in the processed dot matrix until the position of the corner point belongs to a preset range, and align the corner point as the alignment reference point of the first substrate.

7. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 5 are implemented.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 5 are implemented.

9. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 5 are implemented.

Citation Information

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