A method and system for calculating voltage-dividing impedance of new energy high voltage ride-through test

Abstract

The present invention discloses a method and system for calculating the voltage-dividing impedance of a new energy high-voltage ride-through test. The method includes establishing a voltage-dividing impedance calculation model; obtaining a set target fault voltage set, wherein the target fault voltage set is a set of ratios of the positive-sequence voltage to the rated positive-sequence voltage of the power grid when a high-voltage ride-through fault occurs in a set of multiple high-voltage ride-through test circuits; for each ratio in the target fault voltage set, each ratio is substituted into the voltage-dividing impedance calculation model for calculation, and the impedance of the voltage-dividing circuit in the high-voltage ride-through test circuit is determined according to the calculation result. The solution provided by the present invention can realize the rapid calculation of the voltage-dividing impedance of the high-voltage ride-through test through a program, and has higher calculation efficiency and calculation accuracy than the manual calculation method, and can significantly improve the efficiency of the new energy hardware-in-the-loop test.

Description

Technical Field

[0001] The present invention relates to the field of new energy hardware-in-the-loop testing technology, and in particular to a voltage-dividing impedance calculation method and system for a new energy high-voltage ride-through test. Background Art

[0002] New energy hardware-in-the-Loop (HIL testing) is a technology used to develop and test new energy systems (wind and solar power generation systems). This testing method combines actual hardware with a simulation environment to comprehensively test and verify the performance of new energy systems before actual deployment. Through hardware-in-the-loop testing, technicians can test the hardware of new energy systems without relying on the actual operating environment, thereby shortening the R&D cycle and reducing costs; through hardware-in-the-loop testing, the performance of new energy systems can be evaluated and optimized; through hardware-in-the-loop testing, technicians can quickly change test parameters and scenarios to verify the system's adaptability to different environments and operating conditions. In short, new energy hardware-in-the-loop testing is of great significance in various fields such as the design, development, research, and optimization of new energy.

[0003] At present, testing the high voltage ride-through performance of new energy is a very important test content in the new energy hardware-in-the-loop test. A typical approach is to add a grounded voltage divider circuit (such as Figure 1 As shown in the figure, the grid voltage is raised by controlling the on and off of the voltage divider circuit, thereby simulating the high voltage ride-through fault of renewable energy. However, at present, the impedance setting of the voltage divider circuit is generally calculated manually. For high voltage test scenarios that require multiple voltage increases of different amplitudes, manual calculation efficiency is low, affecting the overall efficiency of hardware-in-the-loop testing. Summary of the invention

[0004] In order to solve the technical problem that the manual calculation method of the impedance of the voltage divider circuit in the existing new energy high voltage ride through test is inefficient, the embodiment of the present invention provides a method and system for calculating the voltage divider impedance of the new energy high voltage ride through test.

[0005] The technical solution of the embodiment of the present invention is achieved as follows:

[0006] An embodiment of the present invention provides a method for calculating voltage-dividing impedance of a new energy high voltage ride-through test, the method comprising: establishing a voltage-dividing impedance calculation model; obtaining a set target fault voltage set; the target fault voltage set is a set composed of the ratios of the positive-sequence voltage to the rated positive-sequence voltage of the power grid when a high voltage ride-through fault occurs in a set of multiple high voltage ride-through test circuits; for each ratio in the target fault voltage set, substituting each ratio into the voltage-dividing impedance calculation model for calculation, and determining the impedance of the voltage-dividing circuit in the high voltage ride-through test circuit according to the calculation result;

[0007] Wherein, the voltage division impedance calculation model is:

[0008]

[0009] in, The target fault voltage set The i-th element of is the capacitive reactance of the voltage divider circuit With impedance The ratio of , They are respectively the impedance and inductive reactance of the main circuit in the high voltage ride through test circuit.

[0010] In one embodiment, determining the impedance of the voltage divider circuit in the high voltage ride through test circuit according to the calculation results includes: determining a maximum value in the calculation results; and determining the maximum value as the impedance of the voltage divider circuit in the high voltage ride through test circuit.

[0011] In one embodiment, after determining the impedance of the voltage divider circuit in the high voltage ride through test circuit according to the calculation result, the method further includes: With impedance The capacitive reactance of the voltage divider circuit in the high voltage ride through test circuit is determined by the ratio of and the impedance of the voltage divider circuit in the high voltage ride through test circuit.

[0012] In one embodiment, after determining the capacitive reactance of the voltage divider circuit in the high voltage ride-through test circuit, the method further includes: controlling the input and output of the impedance and capacitive reactance of the voltage divider circuit by adjusting the opening and closing of the switch in a preset system according to the determined impedance of the voltage divider circuit and the capacitive reactance of the voltage divider circuit, so as to complete the new energy high voltage ride-through test simulation.

[0013] An embodiment of the present invention provides a voltage-dividing impedance calculation system for a new energy high voltage ride-through test, the system comprising a high voltage ride-through test circuit and a processing model; the processing model is used to establish a voltage-dividing impedance calculation model; a set target fault voltage set is obtained; the target fault voltage set is a set composed of the ratios of the positive sequence voltage to the rated positive sequence voltage of the power grid when a high voltage ride-through fault occurs in a set of multiple high voltage ride-through test circuits; for each ratio in the target fault voltage set, each ratio is substituted into the voltage-dividing impedance calculation model for calculation, and the impedance of the voltage-dividing circuit in the high voltage ride-through test circuit is determined according to the calculation result;

[0014] Wherein, the voltage division impedance calculation model is:

[0015]

[0016] in, The target fault voltage set The i-th element of is the capacitive reactance of the voltage divider circuit With impedance The ratio of , They are respectively the impedance and inductive reactance of the main circuit in the high voltage ride through test circuit.

[0017] In one embodiment, the processing model is further used to determine a maximum value in the calculation result; and the maximum value is determined as the impedance of the voltage divider circuit in the high voltage ride through test circuit.

[0018] In one embodiment, the processing model is also used to set the capacitive reactance of the voltage divider circuit. With impedance The capacitive reactance of the voltage divider circuit in the high voltage ride through test circuit is determined by the ratio of and the impedance of the voltage divider circuit in the high voltage ride through test circuit.

[0019] In one embodiment, the processing model is also used to control the input and output of the impedance and capacitance of the voltage divider circuit by adjusting the opening and closing of the switch in a preset system according to the determined impedance of the voltage divider circuit and the capacitance of the voltage divider circuit, so as to complete the new energy high voltage ride-through test simulation.

[0020] An embodiment of the present invention further provides a storage medium, in which a computer program is stored. When the computer program is executed by a processor, the steps of the above method are implemented.

[0021] An embodiment of the present invention further provides a computer program product, including a computer program, and the computer program implements the steps of the above method when executed by a processor.

[0022] The method and system for calculating the voltage-dividing impedance of a new energy high voltage ride-through test provided by the embodiment of the present invention establish a voltage-dividing impedance calculation model; obtain a set target fault voltage set; the target fault voltage set is a set composed of the ratios of the positive sequence voltage to the rated positive sequence voltage of the power grid when a high voltage ride-through fault occurs in multiple set high voltage ride-through test circuits; for each ratio in the target fault voltage set, substitute each ratio into the voltage-dividing impedance calculation model for calculation, and determine the impedance of the voltage-dividing circuit in the high voltage ride-through test circuit according to the calculation result. The scheme provided by the present invention can realize the rapid calculation of the voltage-dividing impedance of the high voltage ride-through test through a program, and has higher calculation efficiency and calculation accuracy than the manual calculation method, and can significantly improve the efficiency of the new energy hardware in-the-loop test. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 This is a schematic diagram of a new energy high voltage ride through test circuit according to an embodiment of the present invention;

[0024] Figure 2 A schematic diagram of a flow chart of a method for calculating voltage-dividing impedance in a new energy high voltage ride-through test according to an embodiment of the present invention;

[0025] Figure 3 A schematic diagram of a first voltage fault ride-through curve for simulating a high voltage ride-through fault according to an embodiment of the present invention;

[0026] Figure 4 A schematic diagram of a second voltage fault ride-through curve for simulating a high voltage ride-through fault according to an embodiment of the present invention;

[0027] Figure 5 A schematic diagram of a third voltage fault ride-through curve for simulating a high voltage ride-through fault according to an embodiment of the present invention;

[0028] Figure 6 1 is a diagram showing the internal structure of a computer device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0029] The present invention will be described in further detail below with reference to the accompanying drawings and embodiments.

[0030] The embodiment of the present invention provides a method for calculating the voltage-dividing impedance of a new energy high voltage ride-through test. Figure 2 As shown, the method includes:

[0031] Step 101: Establish a voltage-dividing impedance calculation model;

[0032] Step 102: obtaining a set target fault voltage set; the target fault voltage set is a set consisting of ratios of positive sequence voltages to rated positive sequence voltages of a power grid when a high voltage ride through fault occurs in a set of multiple high voltage ride through test circuits;

[0033] Step 103: for each ratio in the target fault voltage set, substitute each ratio into the voltage divider impedance calculation model for calculation, and determine the impedance of the voltage divider circuit in the high voltage ride through test circuit according to the calculation result;

[0034] Wherein, the voltage division impedance calculation model is:

[0035]

[0036] in, The target fault voltage set The i-th element of is the capacitive reactance of the voltage divider circuit With impedance The ratio of , They are respectively the impedance and inductive reactance of the main circuit in the high voltage ride through test circuit.

[0037] The method of this embodiment is mainly used for high voltage ride-through test in new energy hardware in-the-loop test. Specifically, the high voltage ride-through test circuit in this embodiment can be found in Figure 1 . The high voltage ride-through test circuit in this embodiment includes a main circuit and a voltage divider circuit. The main circuit connects the new energy power generation unit and the power grid. One end of the voltage divider circuit is connected to the new energy power generation unit through a switch, and the other end is grounded. This embodiment directly calculates the impedance and capacitive reactance of the voltage divider circuit through a program to simulate the high voltage ride-through fault of new energy. Compared with manual calculation methods, it has higher calculation efficiency and accuracy, and can significantly improve the efficiency of new energy hardware in-the-loop testing.

[0038] Specifically, the model calculation result in this embodiment is two roots of a quadratic equation. This embodiment will first determine the maximum value of the calculation result (i.e., take the larger one), and determine the maximum value as the impedance of the voltage divider circuit in the high voltage ride-through test circuit.

[0039] In addition, after determining the impedance of the voltage divider circuit, the present embodiment can further calculate the capacitive reactance of the voltage divider circuit using the parameter k in the model. Thus, after determining the impedance and capacitive reactance of the voltage divider circuit, the impedance and capacitive reactance of the voltage divider circuit are controlled by adjusting the opening and closing of the switch in the preset system according to the determined impedance of the voltage divider circuit and the capacitive reactance of the voltage divider circuit, so as to complete the new energy high voltage ride-through test simulation.

[0040] Below, this embodiment will list an embodiment in a specific application scenario to explain this solution in detail.

[0041] This embodiment is a high voltage ride-through test in a hardware-in-the-loop test of a photovoltaic inverter. The hardware-in-the-loop test platform of the photovoltaic inverter is the RT-Lab system. The main circuit impedance of the test model , inductive reactance .

[0042] (1) Setting the target fault voltage set for high voltage ride-through test ;

[0043] (2) Manually set the ratio of capacitance to impedance in the voltage divider impedance ;

[0044] (3) Set the target fault voltage The first element in Substitute into the voltage-dividing impedance calculation model of this embodiment to calculate a, b, and c, and obtain: a=2.2, b=-0.1872, c=0.001701, and complete the solution in the voltage-dividing impedance calculation model;

[0045] (4) The solution is the two roots of the quadratic equation, which are x1=0.0747 and x2=0.0103. The larger of them is taken as the impedance of the voltage divider circuit. ,Right now , and the capacitive reactance of the voltage divider circuit ;

[0046] (5) Set the target fault voltage set in (1) Substituting the elements in into the voltage divider impedance calculation model, the voltage divider impedance corresponding to different target fault voltages can be obtained, as shown in Table 1:

[0047]

[0048] According to the calculation results in Table 1, the impedance and capacitance of the voltage divider circuit are set in RT-Lab, and the high voltage ride-through fault simulation of the hardware-in-the-loop test is realized by opening and closing the switch. The voltage fault ride-through curve obtained by simulation is shown in Figures 3 to 5 As shown. Figures 3 to 5 The actual value of high voltage fault ride-through achieved by setting the voltage divider impedance according to Table 1 can be calculated, as shown in Table 2:

[0049]

[0050] As shown in Table 2, the voltage division impedance calculation method of the present invention can realize the rapid and accurate setting of the high voltage ride-through target fault voltage, thereby improving the efficiency of new energy hardware in-the-loop testing.

[0051] The method for calculating the voltage-dividing impedance of a new energy high voltage ride-through test provided by an embodiment of the present invention establishes a voltage-dividing impedance calculation model; obtains a set target fault voltage set; the target fault voltage set is a set composed of the ratios of the positive sequence voltage to the rated positive sequence voltage of the power grid when a high voltage ride-through fault occurs in multiple set high voltage ride-through test circuits; for each ratio in the target fault voltage set, substitutes each ratio into the voltage-dividing impedance calculation model for calculation, and determines the impedance of the voltage-dividing circuit in the high voltage ride-through test circuit according to the calculation result. The scheme provided by the present invention can realize the rapid calculation of the voltage-dividing impedance of the high voltage ride-through test through a program, and has higher calculation efficiency and calculation accuracy than the manual calculation method, and can significantly improve the efficiency of the new energy hardware-in-the-loop test.

[0052] The embodiment of the present invention also provides a new energy high voltage ride through test voltage division impedance calculation system, the system includes a high voltage ride through test circuit and a processing model;

[0053] The processing model is used to establish a voltage-dividing impedance calculation model; obtain a set target fault voltage set; the target fault voltage set is a set composed of the ratios of the positive-sequence voltage to the rated positive-sequence voltage of the power grid when a high voltage ride-through fault occurs in a set of multiple high voltage ride-through test circuits; for each ratio in the target fault voltage set, substitute each ratio into the voltage-dividing impedance calculation model for calculation, and determine the impedance of the voltage-dividing circuit in the high voltage ride-through test circuit according to the calculation result;

[0054] Wherein, the voltage division impedance calculation model is:

[0055]

[0056] in, The target fault voltage set The i-th element of is the capacitive reactance of the voltage divider circuit With impedance The ratio of , They are respectively the impedance and inductive reactance of the main circuit in the high voltage ride through test circuit.

[0057] In one embodiment, the processing model is further used to determine a maximum value in the calculation result; and the maximum value is determined as the impedance of the voltage divider circuit in the high voltage ride through test circuit.

[0058] In one embodiment, the processing model is also used to set the capacitive reactance of the voltage divider circuit. With impedance The capacitive reactance of the voltage divider circuit in the high voltage ride through test circuit is determined by the ratio of and the impedance of the voltage divider circuit in the high voltage ride through test circuit.

[0059] The above-mentioned system provided in this embodiment belongs to the same concept as the above-mentioned method embodiment. The specific implementation process thereof is detailed in the method embodiment and will not be repeated here.

[0060] In order to implement the method of the embodiment of the present invention, the embodiment of the present invention also provides a computer program product, which includes computer instructions, and the computer instructions are stored in a computer-readable storage medium. The processor of the computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device performs the steps of the above method.

[0061] Based on the hardware implementation of the above program modules, and in order to implement the method of the embodiment of the present invention, the embodiment of the present invention further provides an electronic device (computer device). Specifically, in one embodiment, the computer device may be a terminal, and its internal structure diagram may be as follows: Figure 6 As shown. The computer device includes a processor A01, a network interface A02, a display screen A04, an input device A05 and a memory (not shown in the figure) connected through a system bus. Among them, the processor A01 of the computer device is used to provide computing and control capabilities. The memory of the computer device includes an internal memory A03 and a non-volatile storage medium A06. The non-volatile storage medium A06 stores an operating system B01 and a computer program B02. The internal memory A03 provides an environment for the operation of the operating system B01 and the computer program B02 in the non-volatile storage medium A06. The network interface A02 of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor A01, the method of any one of the above embodiments is implemented. The display screen A04 of the computer device can be a liquid crystal display screen or an electronic ink display screen, and the input device A05 of the computer device can be a touch layer covered on the display screen, or a key, trackball or touchpad set on the computer device housing, or an external keyboard, touchpad or mouse, etc.

[0062] Those skilled in the art will understand that Figure 6 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0063] The device provided by the embodiment of the present invention includes a processor, a memory, and a program stored in the memory and executable on the processor. When the processor executes the program, the method of any one of the above embodiments is implemented.

[0064] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0065] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0066] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0067] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0068] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0069] The memory may include non-permanent memory in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. The memory is an example of a computer-readable medium.

[0070] Computer readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include temporary computer readable media (transitory media), such as modulated data signals and carrier waves.

[0071] It can be understood that the memory of the embodiment of the present invention can be a volatile memory or a non-volatile memory, and can also include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a magnetic random access memory (FRAM), a flash memory, a magnetic surface memory, an optical disc, or a compact disc read-only memory (CD-ROM); the magnetic surface memory can be a disk memory or a tape memory. The volatile memory can be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static random access memory (SRAM), synchronous static random access memory (SSRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM, SyncLink Dynamic Random Access Memory), and direct RAMbus random access memory (DRRAM, Direct Rambus Random Access Memory).The memories described in the embodiments of the present invention are intended to include, but are not limited to, these and any other suitable types of memories.

[0072] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0073] The above are only embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included within the scope of the claims of the present application.

Claims

1. A method for calculating the voltage-dividing impedance of a new energy high voltage ride-through test, characterized in that: The method comprises: Establish a voltage-dividing impedance calculation model; Acquire a set target fault voltage set; the target fault voltage set is a set consisting of ratios of positive sequence voltages to rated positive sequence voltages of a power grid when a high voltage ride through fault occurs in a set of multiple high voltage ride through test circuits; For each ratio in the target fault voltage set, substituting each ratio into the voltage divider impedance calculation model for calculation, and determining the impedance of the voltage divider circuit in the high voltage ride through test circuit according to the calculation result; Wherein, the voltage division impedance calculation model is: in, The target fault voltage set The i-th element of is the capacitive reactance of the voltage divider circuit With impedance The ratio of , They are respectively the impedance value and inductive reactance value of the main circuit in the high voltage ride through test circuit; Wherein, determining the impedance of the voltage divider circuit in the high voltage ride through test circuit according to the calculation result includes: determining a maximum value among the calculation results; The maximum value is determined as the impedance of a voltage divider circuit in the high voltage ride through test circuit.

2. The method for calculating the voltage-dividing impedance of the new energy high voltage ride-through test according to claim 1 is characterized in that: After determining the impedance of the voltage divider circuit in the high voltage ride through test circuit according to the calculation result, the method further includes: According to the set voltage divider circuit capacitive reactance With impedance The capacitive reactance of the voltage divider circuit in the high voltage ride through test circuit is determined by the ratio of and the impedance of the voltage divider circuit in the high voltage ride through test circuit.

3. The method for calculating the voltage-dividing impedance of the new energy high voltage ride-through test according to claim 2 is characterized in that: After determining the capacitive reactance of the voltage divider circuit in the high voltage ride through test circuit, the method further includes: According to the determined impedance of the voltage divider circuit and the capacitive reactance of the voltage divider circuit, the impedance and capacitive reactance of the voltage divider circuit are controlled by adjusting the opening and closing of the switch in the preset system to complete the new energy high voltage ride-through test simulation.

4. A new energy high voltage ride-through test voltage division impedance calculation system, characterized in that: The system includes a high voltage ride through test circuit and a processing model; The processing model is used to establish a voltage-dividing impedance calculation model; obtain a set target fault voltage set; the target fault voltage set is a set composed of the ratios of the positive-sequence voltage to the rated positive-sequence voltage of the power grid when a high voltage ride-through fault occurs in a set of multiple high voltage ride-through test circuits; for each ratio in the target fault voltage set, substitute each ratio into the voltage-dividing impedance calculation model for calculation, and determine the impedance of the voltage-dividing circuit in the high voltage ride-through test circuit according to the calculation result; Wherein, the voltage division impedance calculation model is: in, The target fault voltage set The i-th element of is the capacitive reactance of the voltage divider circuit With impedance The ratio of , They are respectively the impedance value and inductive reactance value of the main circuit in the high voltage ride through test circuit; Wherein, the processing model is also used to determine the maximum value in the calculation result; and the maximum value is determined as the impedance of the voltage divider circuit in the high voltage ride through test circuit.

5. The new energy high voltage ride through test voltage division impedance calculation system according to claim 4, characterized in that: The processing model is also used to set the capacitive reactance in the voltage divider circuit. With impedance The capacitive reactance of the voltage divider circuit in the high voltage ride through test circuit is determined by the ratio of and the impedance of the voltage divider circuit in the high voltage ride through test circuit.

6. The new energy high voltage ride through test voltage division impedance calculation system according to claim 5, characterized in that: The processing model is also used to control the input and output of the impedance and capacitance of the voltage divider circuit by adjusting the opening and closing of the switch in a preset system according to the determined impedance of the voltage divider circuit and the capacitance of the voltage divider circuit, so as to complete the new energy high voltage ride-through test simulation.

7. A storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 3 are implemented.

8. A computer program product, characterized in that The invention comprises a computer program, which implements the steps of the method according to any one of claims 1 to 3 when being executed by a processor.

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