Synchronous closing pulse time calculation method, system, storage medium and device

Abstract

The present invention discloses a synchronous closing pulse moment calculation method, system, storage medium and device, and relates to the technical field of closing pulse moment calculation. It includes setting the allowable value of pressure difference and the allowable value of frequency difference, testing the sampling point of the closing circuit action time tn; collecting the instantaneous value of three-phase voltage, and calculating the voltage amplitude and frequency; calculating the frequency difference and voltage amplitude difference on both sides; checking whether the voltage amplitude difference and frequency difference on both sides meet the allowable value, and calculating the closing time. The present invention does not have the error caused by the frequency change of the Fourier algorithm, improves the accuracy of the synchronous closing pulse sending time calculation, and reduces the impact when the unit is connected to the grid.

Description

Technical Field

[0001] The present invention relates to the technical field of closing pulse moment calculation, in particular to a synchronous closing pulse moment calculation method, system, storage medium and equipment. Background Art

[0002] After starting, synchronous motors such as generators, phase regulators and pumped storage units are generally connected to the grid for operation. Due to the differences in voltage amplitude, phase and frequency between the synchronous motor and the grid before grid connection, forced grid connection may cause a large impact and even damage the primary equipment.

[0003] In actual projects, synchronization is generally used to achieve the grid-connected function, among which the automatic quasi-synchronous device is a synchronization device implemented by a microcomputer. The automatic quasi-synchronous device can measure the time from the issuance of the closing command to the closing of the circuit breaker before the synchronous motor is put into operation. This time is also called the lead-in time; after the synchronous motor is put into operation, the synchronous motor terminal voltage and the grid side voltage can be collected, and the amplitude, phase and frequency of the two voltages can be calculated in real time. The time to issue the circuit breaker closing command is determined based on the calculation results and the measured lead-in time, so that the voltage amplitude, phase and frequency inconsistency on both sides of the grid-connected switch when the synchronous motor is connected to the grid is within the allowable range, reducing the impact of the grid connection.

[0004] The calculation of voltage amplitude, phase and frequency of existing synchronous devices all involve Fourier algorithm. Since the frequency is constantly changing and Fourier algorithm requires at least one cycle of data window, the voltage amplitude, phase and frequency calculated by Fourier algorithm have large cumulative errors, resulting in certain errors in the calculation of the time when the closing pulse is sent. The error in the time when the closing pulse is sent leads to certain inconsistencies in the voltage amplitude, phase and frequency on both sides of the grid-connected switch during actual grid connection, and there is still a certain impact risk when the synchronous motor is connected to the grid. Summary of the invention

[0005] In view of the problems existing in the calculation of the time when the closing pulse is issued in the prior art, the present invention is proposed.

[0006] Therefore, the problem to be solved by the present invention is how to eliminate the error caused by the frequency change in the Fourier algorithm.

[0007] In order to solve the above technical problems, the present invention provides the following technical solutions:

[0008] In the first aspect, the present invention provides a method for calculating the synchronous closing pulse moment, which includes setting the allowable value of voltage difference and the allowable value of frequency difference, testing the sampling point of the closing circuit action time tn, and performing encryption processing; collecting the instantaneous value of the three-phase voltage, and calculating the voltage amplitude and frequency; calculating the frequency difference and the voltage amplitude difference on both sides; checking whether the voltage amplitude difference and the frequency difference on both sides meet the allowable value, and calculating the closing time.

[0009] As a preferred solution of the synchronous closing pulse timing calculation method of the present invention, the current point data of the three-phase voltage on both sides after sampling is assumed to be x(k,n), wherein k is 1, 2, 3 respectively representing the A phase, B phase and C phase on one side, k is 4, 5, 6 respectively representing the A phase, B phase and C phase on the other side, and n is the sampling point count; for each k value, y(k,n) is calculated:

[0010] y(k,n)=[x(k,n)-x(k,n-1)] / Ts,

[0011] Among them, y(k,n) is the difference value of x(k,n), Ts is the sampling period, and n is the nth sampling point.

[0012] As a preferred solution of the synchronous closing pulse time calculation method of the present invention, wherein: the test closing circuit action time is tn sampling points and includes the following steps:

[0013] ,

[0014] ,

[0015] in, and are the effective values ​​of the voltages on both sides of the nth sampling point respectively;

[0016] ,

[0017] ,

[0018] in, and are the frequency values ​​on both sides of the nth sampling point respectively;

[0019] For each k value: when x(k,n)>0 and x(k,n-1)<0, record z(k)=n; where z(k) is the sampling point count corresponding to the zero crossing point of the kth analog quantity; if k>3, n1=z(k-3), n2=z(k); otherwise n1=z(k), n2=z(k+3), calculate :

[0020] ,

[0021] in, is the number of sampling points corresponding to the voltage phase difference on both sides; n1 is the sampling point count when the k-th voltage passes through zero, and n2 is the sampling point count when the other side voltage corresponding to the k-th voltage passes through zero; when |U1(n)-U2(n)|< And |f1(n)- f2(n)|< When the phase difference is dn sampling points, the closing pulse is issued after a delay of tn time.

[0022] As a preferred solution of the synchronous closing pulse timing calculation method of the present invention, wherein: the acquisition of the instantaneous value of the three-phase voltage and the calculation of the voltage amplitude and frequency include: assuming that the instantaneous value of the three-phase voltage is:

[0023] ,

[0024] ,

[0025] ,

[0026] in, , , is the instantaneous value of the three-phase voltage, is the voltage amplitude, is the angular frequency, is the frequency, is the initial phase angle, t is the time; the voltage amplitude is derived and frequency :

[0027] ,

[0028] .

[0029] As a preferred solution of the synchronous closing pulse timing calculation method of the present invention, the calculation of the frequency difference between the two sides includes: assuming that the voltages of the corresponding phases on both sides are respectively:

[0030] ,

[0031] ,

[0032] ,

[0033] in, and are the voltage amplitudes on both sides respectively; for The angular frequency, for The angular frequency, and They are and The frequency, and They are and Initial phase angle.

[0034] As a preferred solution of the synchronous closing pulse timing calculation method of the present invention, the calculation of the frequency difference and voltage amplitude difference on both sides includes the following steps: and The times of zero crossing are and , then when When it passes zero, The phase of ; Assume that After time, and The phase is the same, then ,but:

[0035] ,

[0036] when When it passes zero, time, and The phases are the same, considering the circuit breaker closing circuit action time , then after The closing command is issued at the time, and the circuit breaker closes and The phases are the same; the voltage amplitude difference and frequency difference on both sides meet the requirements, and when the voltage of a phase on one side is detected to be zero, the calculated Time to issue a closing command.

[0037] As a preferred solution of the synchronous closing pulse timing calculation method of the present invention, the judgment of whether the voltage amplitude difference and frequency difference on both sides meet the allowable value includes: the frequency difference meets the requirement that: the frequency on both sides and The absolute value of the difference satisfies the condition: ; The voltage amplitude difference meets the requirement that: the voltage amplitude on both sides and The absolute value of the difference satisfies the condition: .

[0038] In the second aspect, the present invention provides a synchronous closing pulse moment calculation system, which includes a parameter setting module for setting the allowable value of voltage difference and the allowable value of frequency difference, and testing the sampling point of the closing circuit action time tn; a voltage acquisition and calculation module for acquiring the instantaneous value of the three-phase voltage and calculating the voltage amplitude and frequency; a difference calculation module for calculating the frequency difference and the voltage amplitude difference on both sides; a judgment and closing time calculation module for checking whether the voltage amplitude difference and the frequency difference on both sides meet the allowable value, and calculating the closing time.

[0039] In a third aspect, the present invention provides a computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: when the computer program instructions are executed by the processor, the steps of the synchronous closing pulse moment calculation method as described in the first aspect of the present invention are implemented.

[0040] In a fourth aspect, the present invention provides a computer-readable storage medium having a computer program stored thereon, wherein: the computer program instructions, when executed by a processor, implement the steps of the synchronous closing pulse moment calculation method as described in the first aspect of the present invention.

[0041] The beneficial effects of the present invention are as follows: the voltage, frequency and voltage zero-crossing point involved in the method for calculating the timing of synchronous closing pulse issuance of the present invention are all calculated in the time domain, the voltage involved in the method for calculating the timing of synchronous closing pulse issuance can be calculated using only one sampling point, the frequency can be calculated using only two sampling points, there are a total of six zero-crossing points in the three-phase voltage within one cycle, the calculation cycle of the zero-crossing point only requires 1 / 6 of a cycle, the entire calculation process only requires 1 / 6 of a cycle plus 2 sampling points, which is greatly reduced compared to the data window of one cycle of the Fourier algorithm, and there is no error caused by the frequency change of the Fourier algorithm, thereby improving the accuracy of the calculation of the timing of synchronous closing pulse issuance and reducing the impact when the unit is connected to the grid. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0043] Figure 1 This is a flow chart of the method for calculating the timing of issuing the synchronous closing pulse.

[0044] Figure 2 This is the main program flow chart of the method for calculating the timing of issuing the synchronous closing pulse.

[0045] Figure 3 This is a diagram showing the actual measured results of the device for calculating the synchronous closing pulse moment. DETAILED DESCRIPTION

[0046] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are described in detail below in conjunction with the accompanying drawings.

[0047] In the following description, many specific details are set forth to facilitate a full understanding of the present invention, but the present invention may also be implemented in other ways different from those described herein, and those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0048] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The term "in one embodiment" that appears in different places in this specification does not necessarily refer to the same embodiment, nor does it refer to a separate or selective embodiment that is mutually exclusive with other embodiments.

[0049] Example 1

[0050] Reference Figure 1~Figure 2 , which is the first embodiment of the present invention, and provides a method for calculating the synchronous closing pulse time, such as Figure 1 As shown, including

[0051] S1: Set the allowable pressure difference Allowable value of sum frequency difference , test the sampling point with closing circuit action time tn, and perform encryption processing.

[0052] The voltages on both sides that need to be connected to the grid are sampled, with a sampling period of Ts. At the nth sampling point, the following steps are performed:

[0053] Assume that the current point data of the three-phase voltage on both sides after sampling is x(k,n), where k is 1, 2, 3, respectively representing phase A, phase B, and phase C on one side, k is 4, 5, 6, respectively representing phase A, phase B, and phase C on the other side, and n is the sampling point count;

[0054] For each value of k, calculate y(k,n)=[x(k,n)-x(k,n-1)] / Ts;

[0055] ,

[0056] ,

[0057] Among them, y(k,n) is the difference value of x(k,n), and are the effective values ​​of the voltages on both sides of the nth sampling point, Ts is the sampling period, and n is the nth sampling point.

[0058] ,

[0059] ,

[0060] in, and They are the frequency values ​​on both sides of the nth sampling point.

[0061] For each k value: when x(k,n)>0 and x(k,n-1)<0, let z(k)=n; where z(k) is the sampling point count corresponding to the zero-crossing point of the kth analog quantity.

[0062] Furthermore, a data encryption method is used to encrypt the sampled data to ensure the security of the data during transmission and storage. The specific steps are as follows:

[0063] The encryption key is dynamically generated based on the zero-crossing information z(k). The specific steps are as follows: for each analog quantity k, calculate the time interval of its zero-crossing point: Δt(k)=z(k)-z(k-1), sort all Δt(k) values, take the median as the base value B, and use the hash function H and the current timestamp T to generate a dynamic key: Key = H(B||T). This method incorporates signal characteristics into the key generation process, increases the uniqueness and security of the key, and uses AES encryption.

[0064] Furthermore, the mean μ and standard deviation σ of all x(k,n) are calculated to generate a feature vector V= [μ,σ,max(z(k)), min(z(k))], the feature vector V is hashed and signed, and the signature S is transmitted together with the encrypted data. The receiver can ensure the integrity and authenticity of the data by verifying the signature, where max(z(k)) and min(z(k)) respectively represent the maximum and minimum sampling point indexes in the sampling point counts corresponding to the zero-crossing points of all analog quantities k.

[0065] If k>3, n1=z(k-3), n2=z(k), otherwise n1=z(k), n2=z(k+3), calculate :

[0066] ,

[0067] in, is the number of sampling points corresponding to the voltage phase difference on both sides; n1 is the sampling point count when the k-th voltage passes through zero, and n2 is the sampling point count when the voltage on the other side corresponding to the k-th voltage passes through zero.

[0068] When |U1(n)-U2(n)|< And |f1(n)- f2(n)|< When the phase difference is dn sampling points, the closing pulse is issued after a delay of tn time.

[0069] Further, if |U(k,n)| < Umin or |U(k,n)| > Umax, where Umin and Umax are respectively the preset minimum and maximum allowable voltage values, then it is determined that the voltage is abnormal; where U(k,n) is the voltage value of the k-th analog quantity at the n-th sampling point.

[0070] If |f(k,n)| < fmin or |f(k,n)| > fmax, where fmin and fmax are respectively the preset minimum and maximum allowable frequency values, then it is determined that the frequency is abnormal; where f(k,n) is the frequency value of the k-th analog quantity at the n-th sampling point.

[0071] Calculate ΔU(k,n) = |U(k,n) - U(k,n - 1)|. If ΔU(k,n) > ΔU th , where ΔU th is the preset voltage mutation threshold, then it is determined that there is a voltage mutation;

[0072] Calculate Δf(k,n) = |f(k,n) - f(k,n - 1)|. If Δf(k,n) > Δf th , where Δf th is the preset frequency mutation threshold, then it is determined that there is a frequency mutation.

[0073] If voltage abnormality or frequency abnormality is detected, record the abnormality type and timestamp, pause the closing calculation process, start the self-check program, and check the sampling device and signal line. If there are N consecutive abnormalities, where N is a parameter that can be set and all samplings are abnormal, then trigger an alarm and require manual intervention.

[0074] If voltage mutation or frequency mutation is detected, record the mutation type and timestamp, increase the sampling frequency from Ts to Ts / 2, and continue for M sampling periods, where M is a parameter that can be set; during the high-frequency sampling period, use the moving average filtering algorithm to smooth the data. If the mutation phenomenon disappears during the high-frequency sampling period, then restore the normal sampling frequency; otherwise, trigger an alarm and require manual intervention.

[0075] When the abnormality or mutation situation is lifted, the system automatically resumes normal operation, re-initializes the calculation parameters, discards the data during the abnormal period, and waits for Q sampling periods of stable operation before restarting the closing calculation process, where Q is a parameter that can be set.

[0076] Introduce a data credibility index C(n), with an initial value of 1. Each time an abnormality or mutation is detected:

[0077] C(n) = C(n) × 0.9,

[0078] For each normal sampling period:

[0079] C(n) = min(C(n)×1.1,1),

[0080] When C(n) <C th , the system will enter a high alert state, increasing the sampling frequency and abnormal detection sensitivity, where C th is a configurable confidence threshold.

[0081] It can be seen that the present invention combines the dynamic characteristics of the signal itself (i.e., the distribution of zero-crossing points) with the time factor, and generates a unique and unpredictable key Key by sorting and taking the median as the basic value B, and then combining the hash function H and the timestamp T. This method not only enhances the security of the key, but also makes the encryption process closely related to the signal content, effectively resisting attacks based on statistical characteristics; in addition, the feature vector is hashed and signed to ensure the integrity and authenticity of the data. max(z(k)) and min(z(k)) as part of the feature vector not only reflect the global range of the signal zero-crossing point, but also imply the frequency component information of the signal. Because the distribution of zero-crossing points is directly related to the signal frequency, the signature can more comprehensively reflect the signal characteristics, thereby improving the accuracy and reliability of data verification.

[0082] S2: Collect the instantaneous values ​​of the three-phase voltage and calculate the voltage amplitude and frequency.

[0083] Assume that the instantaneous values ​​of the three-phase voltages are:

[0084] ,

[0085] ,

[0086] ,

[0087] in, , , is the instantaneous value of the three-phase voltage, is the voltage amplitude, is the angular frequency, is the frequency, is the initial phase angle, t is the time; after derivation, we can get:

[0088] ,

[0089] ,

[0090] The voltage amplitude can be calculated and frequency .

[0091] S3: Calculate the frequency difference and voltage amplitude difference on both sides.

[0092] Assume that the voltages of the corresponding phases on both sides are:

[0093] ,

[0094] ,

[0095] ,

[0096] in, and are the voltage amplitudes on both sides respectively; for The angular frequency, for The angular frequency, and They are and The frequency, and They are and Initial phase angle.

[0097] Assumptions and The times of zero crossing are and , then when When it passes zero, The phase of .

[0098] Assume that After time, and The phase is the same, then , we can deduce:

[0099] ,

[0100] when When it passes through zero, according to the above formula, time, and The phases are the same, considering the circuit breaker closing circuit action time ,exist When crossing zero, The closing command is issued at the time, and the circuit breaker closes and Same phase.

[0101] The voltage amplitude difference and frequency difference on both sides meet the requirements, and when the voltage of a phase on one side is detected to be zero, the calculated Time to issue a closing command.

[0102] Preferably, the circuit breaker closing circuit action time The calculation method is:

[0103] The device sets the closing circuit action time setting value , the setting value is set by the user; the closing circuit action time setting value is read on the device , and assign it to , after each synchronous closing command is issued, perform the following steps:

[0104] Record the time when the closing command is issued ;

[0105] Calculate the absolute value of the voltage difference between the corresponding phases on both sides;

[0106] Record the time when the absolute value of the voltage difference between the three phases on both sides is less than 0.5% of the rated voltage, which is recorded as ;

[0107] remember ,remember ;

[0108] The circuit breaker closing circuit action time is .

[0109] S4: Check whether the voltage amplitude difference and frequency difference on both sides meet the specified allowable value, and calculate the closing time.

[0110] Preferably, whether the voltage amplitude difference and frequency difference on both sides meet the specified allowable value is determined as follows:

[0111] The frequency difference meets the requirement: the frequency on both sides and The absolute value of the difference satisfies the condition: ;

[0112] The voltage amplitude difference meets the requirement: the voltage amplitude on both sides and The absolute value of the difference satisfies the condition: .

[0113] Furthermore, the present embodiment also provides a synchronous closing pulse moment calculation system, including a parameter setting module, which is used to set the allowable value of the voltage difference and the allowable value of the frequency difference, and to test the sampling point of the closing circuit action time tn; a voltage acquisition and calculation module, which is used to acquire the instantaneous value of the three-phase voltage and calculate the voltage amplitude and frequency; a difference calculation module, which is used to calculate the frequency difference and the voltage amplitude difference on both sides; a judgment and closing time calculation module, which is used to check whether the voltage amplitude difference and the frequency difference on both sides meet the allowable value, and calculate the closing time.

[0114] This embodiment also provides a computer device, which is suitable for the synchronous closing pulse moment calculation method, including a memory and a processor; the memory is used to store computer executable instructions, and the processor is used to execute computer executable instructions to implement the synchronous closing pulse moment calculation method proposed in the above embodiment.

[0115] The computer device may be a terminal, and the computer device includes a processor, a memory, a communication interface, a display screen and an input device connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The communication interface of the computer device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be achieved through WIFI, an operator network, NFC (near field communication) or other technologies. The display screen of the computer device may be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer device may be a touch layer covered on the display screen, or a key, trackball or touchpad provided on the housing of the computer device, or an external keyboard, touchpad or mouse, etc.

[0116] This embodiment also provides a storage medium on which a computer program is stored. When the program is executed by a processor, the method for calculating the synchronous closing pulse timing proposed in the above embodiment is implemented.

[0117] In summary, the voltage, frequency and voltage zero-crossing point involved in the calculation method for the synchronous closing pulse sending time are all calculated in the time domain. The voltage involved in the calculation method for the synchronous closing pulse sending time can be calculated using only 1 sampling point, and the frequency can be calculated using only 2 sampling points. There are 6 zero-crossing points in the three-phase voltage within one cycle, and the calculation cycle of the zero-crossing point only requires 1 / 6 of the cycle. The entire calculation process only requires 1 / 6 of the cycle plus 2 sampling points, which is greatly reduced compared to the data volume of 1 cycle of the Fourier algorithm. In addition, there is no error caused by frequency change in the Fourier algorithm, which improves the accuracy of the calculation of the synchronous closing pulse sending time and reduces the impact when the unit is connected to the grid.

[0118] Example 2

[0119] Reference Figure 3 , which is the second embodiment of the present invention, and this embodiment provides a method for calculating the synchronous closing pulse moment. In order to verify the beneficial effects of the present invention, scientific demonstration is carried out through experiments.

[0120] The voltage simulation on both sides of the automatic quasi-synchronous device is loaded through the relay protection tester. The closing pulse output of the automatic quasi-synchronous device is connected to the simulated circuit breaker through the operation box. The actual measurement results of the device are as follows: Figure 3As shown, Figure 3 It is a schematic diagram of the voltage on both sides. The red and green frequencies are 50Hz and 49.6Hz respectively, and the effective values ​​of the voltage are 57.74V and 55V respectively.

[0121] exist Figure 3 At 1160ms, the device calculates that the voltage phase difference on both sides will meet the requirement after 40ms. Since the closing circuit action time of the device is set to 37ms, a closing pulse is issued at 1163ms to ensure that the actual closing moment is the moment when the voltage phase on both sides meets the requirement after 40ms.

[0122] Moreover, when applied in actual projects, actual project recordings show that after the device issues a closing command, the voltage phases on both sides are basically the same when the actual synchronization is successful, and no impact will be caused when closing the circuit, which verifies the effectiveness of the technical solution of the present invention.

[0123] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present invention, which should all be included in the scope of the claims of the present invention.

Claims

1. The synchronous closing pulse time calculation method is characterized by: include, Set the allowable value of pressure difference and frequency difference, test the sampling point with closing circuit action time tn, and perform encryption processing; Collect the instantaneous value of three-phase voltage and calculate the voltage amplitude and frequency; Calculate the frequency difference and voltage amplitude difference on both sides; Check whether the voltage amplitude difference and frequency difference on both sides meet the allowable value, and calculate the closing time; The test of the sampling point of the closing circuit action time tn comprises the following steps: Among them, U1(n) and U2(n) are the effective values ​​of the voltages on both sides of the nth sampling point respectively; Among them, f1(n) and f2(n) are the frequency values ​​on both sides of the nth sampling point; For each value of k: when x(k,n)>0 and x(k,n-1)<0, let z(k)=n; Wherein, z(k) is the sampling point count corresponding to the zero-crossing point of the k-th analog quantity; If k>3, n1=z(k-3), n2=z(k); Otherwise n1=z(k),n2=z(k+3), calculate dn: Wherein, dn is the number of sampling points corresponding to the voltage phase difference on both sides; n1 is the sampling point count when the k-th voltage passes through zero, and n2 is the sampling point count when the voltage on the other side corresponding to the k-th voltage passes through zero; When |U1(n)-U2(n)| set And |f1(n)-f2(n)| <f set When the phase difference is dn sampling points, the closing pulse is issued after a delay of tn time;​ The collecting of three-phase voltage instantaneous values ​​and calculating voltage amplitude and frequency includes: Assume the instantaneous value of the three-phase voltage is: Among them, U a , U b , U c is the instantaneous value of the three-phase voltage, U is the voltage amplitude, ω=2πf is the angular frequency, f is the frequency, is the initial phase angle, t is the time; The voltage amplitude U and frequency f are derived as follows: The calculation of the frequency difference between the two sides includes: Assume that the voltages of the corresponding phases on both sides are: Δf=f1-f2 Among them, U m1 and U m2 are the voltage amplitudes on both sides respectively; ω1 is the angular frequency of U1, U2 is the angular frequency of U2, f1 and f2 are the frequencies of U1 and U2 respectively, and They are the initial phase angles of U1 and U2 respectively; The calculation of the frequency difference and the voltage amplitude difference on both sides comprises the following steps: Assume that the time when U1 and U2 cross zero is t1 and t2 respectively, then when U2 crosses zero, the phase of U1 is 2πf1(t2-t1); Assume that after t Δ After time, U1 and U2 have the same phase, then 2πf1(t2-t1+t Δ )=2πf2t Δ ,but: When U2 passes through zero, then t Δ time, U1 and U2 are in phase, considering the circuit breaker closing circuit action time tn′, then after t Δ -tn′ time, the closing command is issued, and the phases of U1 and U2 are the same when the circuit breaker is closed; When the voltage amplitude difference and frequency difference on both sides meet the requirements and the voltage of a phase on one side is detected to be zero-crossing, then at t Δ -tn′ time to issue a closing command; The judgment of whether the voltage amplitude difference and frequency difference on both sides meet the allowable value includes: The frequency difference is required to meet the following requirements: The absolute value of the difference between the frequencies f1 and f2 on both sides meets the condition: |f1-f2|<(f1+f2) / 200; The voltage amplitude difference is required to meet the following requirements: The voltage amplitude U on both sides m1 and U m2 The absolute value of the difference satisfies the condition: |U m1 -U m2 |<2.5(U m1 +U m2 ) / rated voltage.

2. The synchronous closing pulse timing calculation method according to claim 1, characterized in that: Assume that the current point data of the three-phase voltage on both sides after sampling is x(k,n), where k is 1, 2, 3, respectively representing phase A, phase B, and phase C on one side, k is 4, 5, 6, respectively representing phase A, phase B, and phase C on the other side, and n is the sampling point count; For each value of k, calculate y(k,n): y(k,n)=[x(k,n)-x(k,n-1)] / Ts Among them, y(k,n) is the difference value of x(k,n), Ts is the sampling period, and n is the nth sampling point.

3. A synchronous closing pulse time calculation system, based on the synchronous closing pulse time calculation method according to any one of claims 1 and 2, characterized in that: Also includes, Parameter setting module, used to set the allowable value of pressure difference and frequency difference, and test the sampling point with closing circuit action time tn; Voltage acquisition and calculation module, used to acquire the instantaneous value of three-phase voltage and calculate the voltage amplitude and frequency; A difference calculation module is used to calculate the frequency difference and voltage amplitude difference on both sides; The judgment and closing time calculation module is used to check whether the voltage amplitude difference and frequency difference on both sides meet the allowable value and calculate the closing time.

4. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the synchronous closing pulse timing calculation method described in any one of claims 1 and 2 are implemented.

5. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the synchronous closing pulse timing calculation method described in any one of claims 1 and 2 are implemented.

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