A reference source temperature coefficient adjustment circuit and method

Abstract

The present invention discloses a reference source temperature coefficient adjustment circuit and method. The power supply forms a current source proportional to temperature by connecting the first and second resistors in parallel and respectively connects to the positive and negative input terminals of the error amplifier. The output terminal forms a reference source voltage which is connected to the positive input terminal through the first resistor to form feedback. The positive input terminal is also connected to the emitter of the second triode, and the negative input terminal is also connected to the emitter of the first triode through the third resistor. The base and collector of the first and second triodes are connected to the ground. The reference source voltage VREF=VBE+VPTAT=VBEQP2+IPTAT×R1, VBE is a voltage with a negative temperature coefficient, VPTAT is a voltage proportional to temperature, and VBEQP2 is a voltage with a negative temperature coefficient of the second triode. The first-order linear temperature compensation is realized by the present application, and a simple circuit structure obtains a good and easily adjustable temperature coefficient.

Description

Technical Field

[0001] The present invention relates to the field of chips and integrated circuits, and in particular to a reference source temperature coefficient adjustment circuit and method. Background Art

[0002] The bandgap reference is one of the most important and widely used functional modules of integrated circuits. The bandgap reference is a circuit that provides a reference voltage or reference current. It has the advantage of being almost independent of process and temperature changes, and is widely used in high-precision comparators, data converters, and other analog integrated circuits. Its basic principle is to use the sum of a voltage with a positive temperature coefficient and a voltage with a negative temperature coefficient, and the temperature coefficients of the two cancel each other out, thereby achieving a voltage reference that is independent of temperature.

[0003] When the voltage temperature coefficient is not required, the first-order temperature compensation method is basically used, that is, the voltage with a negative temperature coefficient and the voltage with a positive temperature coefficient are used to eliminate the influence of temperature and obtain a reference voltage that is independent of temperature. If a smaller temperature coefficient is required, a high-order temperature compensation method is required. Although the structure of the bandgap reference source works based on the same principle, there are many ways to implement it. In order to eliminate the influence of high-order temperature effects, the compensation circuit structure is different for bandgap reference sources with different structures.

[0004] Conventional bandgap reference sources generally only perform first-order temperature compensation. As the temperature increases, the second-order or higher-order temperature effect of VBE becomes more obvious, which in turn causes the output voltage of the reference to drift more, resulting in the output voltage offset under relatively high temperature conditions not meeting the requirements of the working application. In addition, the circuit will have different output performance in the low temperature section and the high temperature section, and there will be large changes and fluctuations in the entire process from low temperature to high temperature. The circuit consistency performance is greatly affected by the large temperature changes from low to high. Summary of the invention

[0005] The purpose of the present invention is to provide a reference source temperature coefficient adjustment circuit, which realizes first-order and high-order temperature compensation through a simple circuit structure, and especially adopts a nonlinear method to perform comprehensive compensation to obtain an output voltage with good performance in both low temperature and high temperature sections, and further expects to obtain a better temperature coefficient over the entire temperature range.

[0006] In order to achieve the above technical objectives, the present invention provides a reference source temperature coefficient adjustment circuit, which includes: a current source IPTAT which is proportional to temperature is connected to the positive input terminal and the negative input terminal of the error amplifier EA1 through a first resistor R1 and a second resistor R2 respectively, the output terminal of the error amplifier EA1 outputs a reference source voltage VREF, and the reference source voltage VREF is also connected to the positive input terminal of the error amplifier EA1 through the first resistor R1 to form feedback, wherein: the positive input terminal of the error amplifier EA1 is also connected to the emitter of the second transistor QP2, and the negative input terminal of the error amplifier EA1 is connected to the emitter of the second transistor QP2. The input end is also connected to the emitter of the first transistor QP1 via the third resistor R3, and the base and collector of the second transistor QP2 and the base and collector of the first transistor QP1 are all connected to the ground relative to the power supply VDD; the regulating circuit forms a first-order linear temperature compensation, and the reference source voltage VREF is calculated as Formula 20: VREF=VBE+VPTAT=VBEQP2+IPTAT×R1, wherein: VBE is a voltage with a negative temperature coefficient, VPTAT is a voltage proportional to temperature, and VBEQP2 is a voltage with a negative temperature coefficient of the second transistor QP2;

[0007] It also includes a nonlinear compensation current INL, and the nonlinear compensation current INL is connected in parallel with a current source IPTAT that is proportional to the temperature and is directly connected to the ground after passing through the first resistor R1. The nonlinear compensation current INL includes a first front compensation current INL1 and a first rear compensation current INL3 that are equal to each other and flow through the first resistor R1. The adjustment circuit forms first-order linear temperature compensation and high-order nonlinear compensation. The reference source voltage VREF is also calculated as Formula 30: VREF=VBE+VPTAT+VNL=VBEQP2+IPTAT×R1+INL×R1, wherein: VNL is the nonlinear compensation voltage formed by the first resistor R1.

[0008] The present invention provides a reference source temperature coefficient adjustment circuit, which adopts a simple circuit structure, forms a negative temperature coefficient voltage of the second transistor QP2 and a voltage VPTAT proportional to the temperature through a first resistor R1 and a second transistor QP2 at the positive input end of an error amplifier EA1, realizes further linear compensation of the reference source structure, and obtains a better and conveniently adjustable temperature coefficient.

[0009] As a further improvement, the first transistor QP1 and the second transistor QP2 are vertical PNP transistors manufactured using CMOS technology, and the area ratio of the two is 8:1. The resistance values ​​of the first resistor R1 and the second resistor R2 are equivalent. The reference source voltage VREF is externally output and connected to the input stage of the buffer amplifier to serve as a reference voltage for other circuit modules. The reference source voltage VREF is calculated by formula 4: VREF=VBEQP2+IPTAT×R1=VBEQP2+VT×ln8×(R1 / R3), where: VT=kT / q, k is the Boltzmann constant equal to 1.38×10 -23 J / K, q is the electron charge equal to 1.6×10 -19 C, T is the absolute temperature, and VT is approximately equal to 25.8mV at room temperature.

[0010] As a further improvement, a fourth resistor R4 is also connected between the base of the second transistor QP2 and the ground to form a voltage with a negative temperature coefficient that decreases with increasing temperature in the first-order linear temperature compensation. The calculation of the reference source voltage VREF is also based on Formula 18: VREF=VBE+VPTAT+VNL=VBEQP2+IPTAT×R1+IPTAT×R4 / b+INL×R1, where: b is the amplification factor of the first transistor QP1.

[0011] As a further improvement, as the temperature increases, IPTAT / b in Formula 18 becomes smaller, IPTAT×R4 / b and VBEQP2 are both voltages with negative temperature coefficients, and the larger the fourth resistor R4 is, the larger IPTAT×R4 / b, which is a voltage with a negative temperature coefficient, is.

[0012] As a further improvement, when the fourth resistor R4 is larger, the top of the first-order temperature compensation curve of the reference source voltage VREF is located further back in a relatively low temperature region.

[0013] As a further improvement, the nonlinear compensation voltage VNL is a nonlinear compensation term. As the temperature increases, the nonlinear compensation voltage VNL also increases, and the entire temperature compensation curve of the reference source voltage VREF will rise as a whole as the temperature increases.

[0014] As a further improvement, when the vertex of the first-order compensation curve in the reference source voltage VREF moves to the low temperature region, the overall upward curve of the entire temperature compensation curve of the reference source voltage VREF becomes smaller, and the output variation of the reference source voltage VREF will be reduced to a smaller range.

[0015] As a further improvement, the nonlinear compensation current INL includes a first nonlinear compensation current I1 and a second nonlinear compensation current I2 connected in parallel, the first nonlinear compensation current I1 includes the first front compensation current INL1 and the first rear compensation current INL3 that are equal to each other flowing before and after the first resistor R1, the second nonlinear compensation current I2 includes a second front compensation current INL2 and a second rear compensation current INL4 that are equal to each other flowing before and after the first resistor R1, and the first nonlinear compensation current I1 is greater than the second nonlinear compensation current I2.

[0016] Correspondingly, the present invention also provides a reference source temperature coefficient adjustment method, which adopts a reference source temperature coefficient adjustment circuit provided by the present invention, wherein the reference source voltage VREF has the voltage VBE with a negative temperature coefficient; the voltage VPTAT proportional to temperature obtained by multiplying the current source IPTAT proportional to temperature and the first resistor R1 is used to adjust and realize the first-order linear temperature compensation of the reference source voltage VREF; the nonlinear compensation voltage VNL obtained by multiplying the nonlinear compensation current INL and the first resistor R1 is used to adjust and realize the high-order linear temperature compensation of the reference source voltage VREF; by relatively increasing the resistance value of the fourth resistor R4, the vertex of the first-order temperature compensation curve of the reference source voltage VREF is adjusted and realized to be located in a relatively low temperature zone as it moves backward, and the output change of the reference source voltage VREF will be reduced to a smaller range.

[0017] As a further improvement, the nonlinear compensation current INL includes a first nonlinear compensation current I1 and a second nonlinear compensation current I2 connected in parallel, and the first nonlinear compensation current I1 is greater than the second nonlinear compensation current I2; the nonlinear compensation current INL is further flexibly adjusted by the second nonlinear compensation current I2 to further achieve a better temperature coefficient compensation effect.

[0018] The present invention further adopts a simple circuit structure, which realizes a further first-order linear compensation of the reference source structure through the second transistor QP2 at the positive input terminal of the error amplifier EA1 and the fourth resistor R4 connected to its base, and also realizes the function of adjusting the top of the first-order temperature compensation curve before and after by selecting the resistance value of the fourth resistor R4, especially the adjustment to the relatively low temperature zone backward.

[0019] The present invention further adopts a simple circuit structure, and realizes high-order nonlinear compensation to meet the output characteristics of the reference source voltage VREF in the high temperature area by the nonlinear compensation current INL flowing only through the first resistor R1 but not through the second transistor QP2. At the same time, the vertex of the first-order temperature compensation curve is moved back to the low temperature area in combination with the resistance value selection of the fourth resistor R4, so that the curve after the comprehensive superposition of the reference source voltage VREF is optimized in the high temperature area, and a good smaller variation range is achieved in the entire temperature range. As an optimization, a simple circuit structure is adopted to provide an additional smaller nonlinear current source, which can more flexibly adjust the compensation current to achieve a better temperature coefficient compensation effect. In addition, the circuit structure of the present invention is simple in structure and can be implemented using a more conventional production process, avoiding the need to use a larger area PMOS tube for directly generating a special current mirror circuit, as well as the greater difficulties in process manufacturing and layout design matching.

[0020] The present invention also provides a CMOS process reference source temperature coefficient adjustment circuit, which includes a first-order compensation reference source circuit connected to a power supply VDD, and the first-order compensation reference source circuit includes: a third, fourth, fifth, and sixth PMOS tubes MP3, MP4, MP5, and MP6 whose sources are mutually connected in parallel to the power supply VDD and whose gates are mutually connected in series; the drain of the third PMOS tube MP3 is connected to its gate and to the drain of the third NMOS tube NM3, the drain of the fourth PMOS tube MP4 is sequentially connected in series to the second and third resistors R2 and R3 and the emitter of the first transistor QP1; the drain of the fifth PMOS tube MP5 is respectively connected in parallel to the sources of the first and second PMOS tubes MP1 and MP2, the drains of the first and second PMOS tubes MP1 and MP2 are respectively connected to the drains of the first and second NMOS tubes MN1 and MN2, the gate of the second PMOS tube MP2 is connected between the second and third resistors R2 and R3, the gates of the first and second NMOS tubes MN1 and MN2 are mutually connected to the first NMOS The drain of the sixth PMOS transistor MP6 is connected in series with a voltage output node of a reference source voltage VREF, a first resistor R1, a gate of the first PMOS transistor MP1, a voltage output node of a nonlinear compensation current source VB and an emitter of the second transistor QP2. The reference source voltage VREF is calculated as follows: VREF=VBE+VPTAT+VNL=VBEQP2+IPTAT×R1+INL×R1, wherein: VBE is a voltage with a negative temperature coefficient, VPTAT is a voltage proportional to temperature, VNL is a nonlinear compensation voltage formed by the first resistor R1, VBEQP2 is a voltage with a negative temperature coefficient of the second transistor QP2, IPTAT is a current source proportional to temperature, and INL is a nonlinear compensation current formed by the first resistor R1.

[0021] As a further improvement, the gate of the third NMOS transistor NM3 is connected to the drain of the second PMOS transistor MP2, and a compensation capacitor is connected between the gate of the third NMOS transistor NM3 and the gate of the second PMOS transistor MP2.

[0022] As a further improvement, the source of the third NMOS transistor NM3, the bases and collectors of the first and second transistors QP1 and QP2, and the sources of the first and second NMOS transistors MN1 and MN2 are all connected to the ground relative to the power supply VDD.

[0023] As a further improvement, a fourth resistor R4 is connected between the base of the second transistor QP2 and the ground, and the calculation of the reference source voltage VREF is also based on Formula 18: VREF=VBE+VPTAT+VNL=VBEQP2+IPTAT×R1+IPTAT×R4 / b+INL×R1, wherein: b is the gain of the first transistor QP1.

[0024] As a further improvement, the first and second PMOS tubes MP1 and MP2 are PMOS tubes of the same type and size, the third, fourth, fifth and sixth PMOS tubes MP3, MP4, MP5 and MP6 are PMOS tubes of the same type that provide bias current and the respective drain current ratios are 1:1:2:1, the first and second NMOS tubes MN1 and MN2 are NMOS tubes of the same type and size, the first and second triodes QP1 and QP2 are used to generate the current source IPTAT that is proportional to the temperature and the ratio is The first, second, third and fourth resistors R1, R2, R3 and R4 are resistors of the same type. The current source IPTAT which is proportional to the temperature flows through the first resistor R1 and forms a reference source for the first-order compensation with the second transistor QP2. The fourth resistor R4 is a resistor for adjusting the top of the first-order compensation temperature curve. The third resistor R3 is a resistor that withstands a positive temperature coefficient △VBE and generates the current source IPTAT which is proportional to the temperature. The resistance values ​​of the first and second resistors R1 and R2 are the same.

[0025] The present invention provides a reference source temperature coefficient adjustment circuit and method, which realizes first-order and high-order comprehensive compensation and optimizes the compensation effect in the high-temperature area. The circuit structure is simple and obtains a good temperature coefficient in the full temperature range. There is no need to increase a lot of devices and chip area for nonlinear compensation. Compared with conventional structures, a better temperature coefficient can be obtained, thereby meeting the needs of reference voltage low temperature drift applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is the structure diagram of the first-order temperature compensation circuit;

[0027] Figure 2 It is the first-order temperature compensation reference source voltage temperature curve characteristic diagram;

[0028] Figure 3 It is the structure diagram of the first-order temperature compensation and vertex adjustment circuit;

[0029] Figure 4 A schematic diagram showing the relationship between the vertex of the first-order temperature compensation curve and the magnitude of the fourth resistor;

[0030] Figure 5 It is the structure diagram of the first-order and high-order temperature compensation circuit;

[0031] Figure 6 It is the characteristic diagram of the reference source voltage temperature curve without adjustment of the first-order temperature compensation vertex;

[0032] Figure 7 It is the circuit structure diagram of first-order and high-order temperature compensation and vertex adjustment;

[0033] Figure 8 The temperature curve characteristic diagram of the reference source voltage in the low temperature area where the first-order temperature compensation vertex is shifted backward;

[0034] Fig. 9 It is the circuit structure diagram of first-order, two-way high-order temperature compensation and vertex adjustment;

[0035] Fig.10 The temperature curve characteristic diagram of the reference source voltage using two nonlinear compensation currents;

[0036] Fig.11 This is the circuit structure diagram of the CMOS process reference source temperature coefficient adjustment circuit;

[0037] Fig.12 This is the Spice simulation diagram of the temperature curve of the first-order temperature compensation reference source voltage;

[0038] Fig.13 It is the Spice simulation diagram of the voltage temperature curve of the first-order and high-order temperature compensation reference source;

[0039] Fig.14 This is the Spice simulation diagram of the voltage temperature curve of the first-order and two-way high-order temperature compensation reference source. DETAILED DESCRIPTION

[0040] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0041] like Figure 1 to Figure 2As shown, the present invention provides a reference source temperature coefficient adjustment circuit, which includes: a current source IPTAT which is proportional to temperature is connected to the positive input terminal and the negative input terminal of the error amplifier EA1 through a first resistor R1 and a second resistor R2 respectively; the output terminal of the error amplifier EA1 outputs a reference source voltage VREF, and the reference source voltage VREF is also connected to the positive input terminal of the error amplifier EA1 through the first resistor R1 to form feedback; the positive input terminal of the error amplifier EA1 is also connected to the emitter of the second transistor QP2, and the negative input terminal of the error amplifier EA1 is also connected to the emitter of the second transistor QP2. The emitter of the first transistor QP1 is connected via the third resistor R3, and the base and collector of the second transistor QP2 are connected to the ground relative to the power supply VDD as are the base and collector of the first transistor QP1; the regulating circuit forms a first-order linear temperature compensation, and the reference source voltage VREF is calculated as Formula 20: VREF=VBE+VPTAT=VBEQP2+IPTAT×R1, wherein: VBE is a voltage with a negative temperature coefficient, VPTAT is a voltage proportional to the temperature, and VBEQP2 is a voltage with a negative temperature coefficient of the second transistor QP2.

[0042] The present invention provides a reference source temperature coefficient adjustment circuit, which adopts a simple circuit structure, forms a negative temperature coefficient voltage of the second transistor QP2 and a voltage VPTAT proportional to the temperature through a first resistor R1 and a second transistor QP2 at the positive input end of an error amplifier EA1, realizes further linear compensation of the reference source structure, and obtains a better and conveniently adjustable temperature coefficient.

[0043] As a further improvement, the first transistor QP1 and the second transistor QP2 are vertical PNP transistors manufactured using CMOS technology, and the area ratio of the two is 8:1. The resistance values ​​of the first resistor R1 and the second resistor R2 are equivalent. The reference source voltage VREF is externally output and connected to the input stage of the buffer amplifier to serve as a reference voltage for other circuit modules. The reference source voltage VREF is calculated by formula 4: VREF=VBEQP2+IPTAT×R1=VBEQP2+VT×ln8×(R1 / R3), where: VT=kT / q, k is the Boltzmann constant equal to 1.38×10 -23 J / K, q is the electron charge equal to 1.6×10 -19 C, T is the absolute temperature, and VT is approximately equal to 25.8mV at room temperature.

[0044] like Figure 3 to Figure 4As shown, as a further improvement, a fourth resistor R4 is also connected between the base of the second transistor QP2 and the ground to form a voltage with a negative temperature coefficient that decreases with increasing temperature in the first-order linear temperature compensation. The calculation of the reference source voltage VREF is also formula eight: VREF=VBEQP2+IPTAT×R1+IPTAT×R4 / b, where: b is the amplification factor of the first transistor QP1.

[0045] As a further improvement, as the temperature increases, IPTAT / b in Formula 8 becomes smaller, IPTAT×R4 / b and VBEQP2 are both voltages with negative temperature coefficients, and the larger the fourth resistor R4 is, the larger IPTAT×R4 / b, as a voltage with a negative temperature coefficient, is.

[0046] As a further improvement, when the fourth resistor R4 is larger, the top of the first-order temperature compensation curve of the reference source voltage VREF is located further back in a relatively low temperature region.

[0047] like Figures 5 to 10 As shown, as a further improvement, it also includes a nonlinear compensation current INL, the nonlinear compensation current INL is connected in parallel with a current source IPTAT that is proportional to the temperature and is directly connected to the ground after passing through the first resistor R1, the nonlinear compensation current INL includes a first front compensation current INL1 and a first rear compensation current INL3 that are equal to each other and flow through the first resistor R1; the adjustment circuit forms a first-order linear temperature compensation and a high-order nonlinear compensation, and the reference source voltage VREF is also calculated as Formula 30: VREF=VBE+VPTAT+VNL=VBEQP2+IPTAT×R1+INL×R1, wherein: VNL is the nonlinear compensation voltage formed by the first resistor R1.

[0048] As a further improvement, the nonlinear compensation voltage VNL is a nonlinear compensation term. As the temperature increases, the nonlinear compensation voltage VNL also increases, and the entire temperature compensation curve of the reference source voltage VREF will rise as a whole as the temperature increases.

[0049] As a further improvement, when the vertex of the first-order compensation curve in the reference source voltage VREF moves to the low temperature region, the overall upward curve of the entire temperature compensation curve of the reference source voltage VREF becomes smaller, and the output variation of the reference source voltage VREF will be reduced to a smaller range.

[0050] As a further improvement, the nonlinear compensation current INL includes a first nonlinear compensation current I1 and a second nonlinear compensation current I2 connected in parallel, the first nonlinear compensation current I1 includes the first front compensation current INL1 and the first rear compensation current INL3 that are equal to each other flowing before and after the first resistor R1, the second nonlinear compensation current I2 includes a second front compensation current INL2 and a second rear compensation current INL4 that are equal to each other flowing before and after the first resistor R1, and the first nonlinear compensation current I1 is greater than the second nonlinear compensation current I2.

[0051] Accordingly, Figures 1 to 10 The present invention also provides a reference source temperature coefficient adjustment method, which adopts a reference source temperature coefficient adjustment circuit provided by the present invention, wherein the reference source voltage VREF has the voltage VBE with a negative temperature coefficient; the voltage VPTAT proportional to temperature obtained by multiplying the current source IPTAT proportional to temperature by the first resistor R1 is used to adjust and realize the first-order linear temperature compensation of the reference source voltage VREF; the nonlinear compensation voltage VNL obtained by multiplying the nonlinear compensation current INL by the first resistor R1 is used to adjust and realize the high-order linear temperature compensation of the reference source voltage VREF; by relatively increasing the resistance value of the fourth resistor R4, the vertex of the first-order temperature compensation curve of the reference source voltage VREF is adjusted and realized to be located in a relatively low temperature zone as it moves backward, and the output change of the reference source voltage VREF will be reduced to a smaller range.

[0052] As a further improvement, the nonlinear compensation current INL includes a first nonlinear compensation current I1 and a second nonlinear compensation current I2 connected in parallel, and the first nonlinear compensation current I1 is greater than the second nonlinear compensation current I2; the nonlinear compensation current INL is further flexibly adjusted by the second nonlinear compensation current I2 to further achieve a better temperature coefficient compensation effect.

[0053] The present invention further adopts a simple circuit structure, which realizes a further first-order linear compensation of the reference source structure through the second transistor QP2 at the positive input terminal of the error amplifier EA1 and the fourth resistor R4 connected to its base, and also realizes the function of adjusting the top of the first-order temperature compensation curve before and after by selecting the resistance value of the fourth resistor R4, especially the adjustment to the relatively low temperature zone backward.

[0054] The present invention further adopts a simple circuit structure, and realizes high-order nonlinear compensation to meet the output characteristics of the reference source voltage VREF in the high temperature area by the nonlinear compensation current INL that only flows through the first resistor R1 but not through the second transistor QP2. At the same time, the vertex of the first-order temperature compensation curve is moved back to the low temperature area in combination with the resistance value of the fourth resistor R4, so that the curve after the comprehensive superposition of the reference source voltage VREF is optimized in the high temperature area, and a good smaller variation range is achieved in the entire temperature range. As an optimization, a simple circuit structure is adopted to provide an additional smaller nonlinear current source, which can more flexibly adjust the compensation current to achieve a better temperature coefficient compensation effect. In addition, the simple circuit structure of the present invention is simple in structure and can be realized by a more conventional production process, avoiding the need to use a larger area PMOS tube for directly generating a special current mirror circuit, and avoiding great difficulties in matching process manufacturing and layout design.

[0055] like Fig.11As shown, the present invention also provides a CMOS process reference source temperature coefficient adjustment circuit, which includes a first-order compensation reference source circuit connected to a power supply VDD, and the first-order compensation reference source circuit includes: a third, fourth, fifth, and sixth PMOS tubes MP3, MP4, MP5, and MP6 whose sources are mutually connected in parallel to the power supply VDD and whose gates are mutually connected in series; the drain of the third PMOS tube MP3 is connected to its gate and to the drain of the third NMOS tube NM3, the drain of the fourth PMOS tube MP4 is sequentially connected in series to the second and third resistors R2 and R3 and the emitter of the first transistor QP1; the drain of the fifth PMOS tube MP5 is respectively connected in parallel to the sources of the first and second PMOS tubes MP1 and MP2, the drains of the first and second PMOS tubes MP1 and MP2 are respectively connected to the drains of the first and second NMOS tubes MN1 and MN2, the gate of the second PMOS tube MP2 is connected between the second and third resistors R2 and R3, the gates of the first and second NMOS tubes MN1 and MN2 are mutually connected to the first NM The drain of the OS transistor MN1 is connected to form a differential input pair of the error amplifier formed by the first and second PMOS transistors MP1 and MP2, and the first and second NMOS transistors MN1 and MN2 are used as current mirror sources of the single-ended output of the differential pair; the drain of the sixth PMOS transistor MP6 is connected in series with a reference source voltage VREF voltage output node, a first resistor R1, a gate of the first PMOS transistor MP1, a nonlinear compensation current source VB voltage output node and an emitter of the second transistor QP2 in sequence; the reference source voltage VREF is calculated as Formula 30: VREF=VBE+VPTAT+VNL=VBEQP2+IPTAT×R1+INL×R1, wherein: VBE is a voltage with a negative temperature coefficient, VPTAT is a voltage proportional to temperature, VNL is a nonlinear compensation voltage formed by the first resistor R1, VBEQP2 is a voltage with a negative temperature coefficient of the second transistor QP2, IPTAT is a current source proportional to temperature, and INL is a nonlinear compensation current formed by the first resistor R1.

[0056] As a further improvement, the gate of the third NMOS transistor NM3 is connected to the drain of the second PMOS transistor MP2, and a compensation capacitor is connected between the gate of the third NMOS transistor NM3 and the gate of the second PMOS transistor MP2.

[0057] As a further improvement, the source of the third NMOS transistor NM3, the bases and collectors of the first and second transistors QP1 and QP2, and the sources of the first and second NMOS transistors MN1 and MN2 are all connected to the ground relative to the power supply VDD.

[0058] As a further improvement, a fourth resistor R4 is connected between the base of the second transistor QP2 and the ground, and the calculation of the reference source voltage VREF is also based on Formula 18: VREF=VBEQP2+IPTAT×R1+INL×R1+IPTAT×R4 / b, wherein: b is the gain of the first transistor QP1.

[0059] As a further improvement, the first and second PMOS tubes MP1 and MP2 are PMOS tubes of the same type and size, the third, fourth, fifth and sixth PMOS tubes MP3, MP4, MP5 and MP6 are PMOS tubes of the same type that provide bias current and the respective drain current ratios are 1:1:2:1, the first and second NMOS tubes MN1 and MN2 are NMOS tubes of the same type and size, the first and second triodes QP1 and QP2 are used to generate the current source IPTAT that is proportional to the temperature and the ratio is The first, second, third and fourth resistors R1, R2, R3 and R4 are resistors of the same type. The current source IPTAT which is proportional to the temperature flows through the first resistor R1 and forms a reference source for the first-order compensation with the second transistor QP2. The fourth resistor R4 is a resistor for adjusting the top of the first-order compensation temperature curve. The third resistor R3 is a resistor that withstands a positive temperature coefficient △VBE and generates the current source IPTAT which is proportional to the temperature. The resistance values ​​of the first and second resistors R1 and R2 are the same.

[0060] The present invention provides a reference source temperature coefficient adjustment circuit and method, which realizes first-order and high-order comprehensive compensation and optimizes the compensation effect in the high-temperature area. The circuit structure is simple and obtains a good temperature coefficient in the full temperature range. There is no need to increase a lot of devices and chip area for nonlinear compensation. Compared with conventional structures, a better temperature coefficient can be obtained, thereby meeting the needs of reference voltage low temperature drift applications.

[0061] In a preferred embodiment of the present invention, Figure 1 It is a reference source temperature coefficient adjustment circuit. QP1 and QP2 are vertical PNP tubes manufactured using conventional CMOS technology. The area ratio between the two is 8:1. EA1 is an error amplifier. The resistance values ​​of resistors R1 and R2 are equivalent. IPTAT is a current source proportional to temperature. VREF output is connected to the buffer amplifier input stage (MOS tube gate) as the reference voltage of other circuit modules. Therefore, IPTAT passing through VREF will only flow through R1 and have the following relationship:

[0062] IPTAT=IcQP1=IcQP2(1)

[0063] According to the "virtual short" principle of the error amplifier, the voltages at the in-phase and direction terminals are equal, then

[0064] IcQP1×R3+VBEQP1=VBEQP2 (2)

[0065] Therefore, the reference source voltage VREF is calculated as Formula 20:

[0066] VREF=VBE+VPTAT=VBEQP2+IPTAT×R1 (20)

[0067] IcQP1=[VBEQP2-VBEQP1] / R3=VT×ln8 / R3=IPTAT(3)

[0068] Where VT = kT / q, k is the Boltzmann constant equal to 1.38×10 -23 J / K, q is the electron charge equal to 1.6×10 - 19 C, T is the absolute temperature, VT is approximately equal to 25.8mV at room temperature. IPTAT is the current proportional to temperature, so there is a first-order temperature compensation reference source voltage calculation formula 4:

[0069] VREF=VBEQP2+IPTAT×R1=VBEQP2+VT×ln8×(R1 / R3)(4)

[0070] As an improvement, in order to reduce the temperature coefficient, the present invention also provides a simple circuit structure to achieve nonlinear compensation. Figures 5 to 8 As shown, the nonlinear compensation current INL includes the front compensation current INL1 and the rear compensation current INL3. After the front compensation current INL1 flows through R1, the rear compensation current INL3 reaches the power ground, and INL1=INL3. In this way, high-order compensation is achieved without affecting VBEQP2, that is, the nonlinear compensation current INL does not flow into QP2, which will not cause changes in VBEQP2 and cause instability in VREF. The reference source voltage VREF is calculated as Formula 30:

[0071] VREF=VBE+VPTAT+VNL=VBEQP2+IPTAT×R1+INL×R1 (30)

[0072] Wherein: VNL is the nonlinear compensation voltage formed by the first resistor R1.

[0073] Therefore, the nonlinear compensation problem is solved by a simple circuit structure provided by the present invention, while avoiding interference with VREF and causing instability.

[0074] Figure 2It is the characteristic diagram of the voltage-temperature curve of the first-order temperature-compensated reference source. VPTAT is the second term in Equation 4. To obtain a better temperature coefficient, the highest point of the output curve of VREF is generally preferably selected in the region of 40˚C to 60˚C according to the operating temperature range of -40˚C to 125˚C. For adding a non-linear compensation term, if the highest point (vertex) of the first-order temperature-compensation curve does not change, that is, it still remains in the relatively high-temperature region, then the highest point (vertex) of the reference-source voltage-temperature curve after high-order non-linear temperature compensation will move backward (towards the relatively low temperature), and instead, the overall curve will actually show a worse temperature coefficient. As Figure 5 and Figure 6 shown, VNL is the non-linear compensation term. As the temperature increases, VNL also increases, and the entire high-order compensation curve will翘 upwards as a whole with the increase of temperature, and the change amplitude is relatively large.

[0075] Figure 3 It is the circuit diagram for adjusting the highest point (vertex) of the first-order temperature-compensation curve. R4 is the newly added resistor. The base current of QP2 flows through R4, and Equation 2 is modified to:

[0076] IcQP1×R3 + VBEQP1 = VBEQP2 + IcQP2×R4 / b (5)

[0077] In Equation 5, b is the amplification factor of the first triode QP1. Since IcQP1 = IcQP2, therefore:

[0078] IcQP1×[R3 - R4 / b] = VBEQP2 - VBEQP1 = VT×ln8 (6)

[0079] IcQP1 = VT×ln8 / [R3×(1 - R4 / (b×R3)] = IPTAT (7)

[0080] Compared with Equation 3, Equation 7 has an additional denominator term of (1 - R4 / (b×R3)). The value of b is between 10 and 20, and R3 is approximately 5 to 10 times that of R4. Therefore, R4 << b×R3, and IPTAT will increase slightly. Equation 4 will become:

[0081] VREF = VBEQP2 + IPTAT×R1 + IPTAT×R4 / b (8)

[0082] The first term in formula 8 is a negative temperature coefficient term, the second term is a positive temperature coefficient term, and the third term seems to be a positive temperature coefficient term, but in fact the denominator b in the third term is also a positive temperature coefficient term. It can be seen from formula 7 that the terms related to IPTAT and temperature are VT and R3. The temperature coefficient of R3 is 0.5ppm / ˚C (0.005% change at 100˚C) from the spice model. It can be considered that its resistance value has almost no change in the full temperature range. R1 and R2, R3, and R4 are the same type of resistors. The change of VT is 0.086mV / ˚C, and the temperature coefficient of b is generally 5000~7000ppm / ˚C. It is calculated from the spice model combined with the characteristic curve. Figure 3 The temperature coefficient of transistor b used in the calculation is close to 9000ppm / °C, so the VT change is calculated in the range of 25°C~125°C:

[0083] (0.086mV / ˚C×100˚C) / (25.8mV)=33.3%(9)

[0084] The change in b is:

[0085] 9000ppm / ˚C×100˚C=90% (10)

[0086] It can be seen from formulas 7, 9 and 10 that IPTAT / b decreases with increasing temperature. The third term in formula 8 is a negative temperature coefficient. Like VBEQP2, the larger R4 is, the larger the negative temperature coefficient of the third term is. Figure 4 It is a first-order temperature compensation curve diagram of VREF under different R4. The vertex of the curve is selected by adjusting the resistance value of R4. That is, when the fourth resistor R4 is larger, the vertex of the first-order temperature compensation curve of the reference source voltage VREF is located further back in the relatively low temperature zone.

[0087] Figure 5 and Figure 6 This is a temperature curve diagram of the high-order temperature compensation reference voltage VREF without adjusting the highest point (top) of the first-order compensation curve. As mentioned above, the entire high-order compensation curve will rise as the temperature increases, and the change range will be large. Figure 7 and Figure 8 After the highest point of the first-order compensation curve moves to the low temperature area, the high-order temperature compensation reference voltage VREF temperature curve can control the output change within a smaller range.

[0088] How to select the setting of the first-order temperature compensation curve is to select the temperature point at which the nonlinear compensation item starts to work. Generally, it is best to select a point close to the center of the entire operating temperature range, such as -40˚C~125˚C. The middle temperature point is around 40˚C. Due to the existence of high-order effects, the temperature point is adjusted according to the actual effect. The detection and startup nonlinear compensation circuit of the general temperature point is realized by the NPN tube VBE decreasing with temperature. In the CMOS process, additional process levels need to be added to realize the production of NPN tubes, which will increase the cost. In fact, the threshold voltage Vth of the NMOS tube is also a negative temperature coefficient. In the spice model, the temperature coefficient of the threshold voltage Vth of the NMOS is represented by KT1, and the general value is between -0.3~-0.5V.

[0089] When the offset effect is ignored, the temperature variation relationship of the threshold voltage is:

[0090] Vth(T)=Vth(Tref)+KT1×(T / Tref-1)(11)

[0091] T is the temperature at which the threshold voltage is to be determined, Tref is the reference temperature point, and the threshold voltage at this temperature is Vth(Tref), where T and Tref are absolute temperatures. According to formula 11, assuming KT1=-0.4V, the threshold voltage Vth is 0.7V at room temperature (Tref=298K), then the threshold voltage at 125˚C (398K) is: Vth(398K)=0.7+(-0.4)×(398 / 298-1)=0.566V

[0092] The threshold voltage drops by 134mV compared to room temperature. NMOS can be used as a temperature detection device.

[0093] IPTAT is a temperature-related quantity, and its change is relatively stable. It can be used as a reference current source for NMOS that detects temperature. At the same time, when NMOS works in the saturation region, the current is nonlinear. Therefore, the current of the NMOS tube that detects temperature can be used as a reference current source for the nonlinear compensation current.

[0094] like Fig. 9As shown, R4 is used to adjust the highest point of the first-order temperature compensation curve within the specified temperature range. The nonlinear compensation currents INL1 and INL2 flow through R1 and then through INL3 and INL4 to the power ground without flowing through QP2. At the same time, INL1=INL3, INL2=INL4, and INL2 and INL4 are current sources with smaller values, which are used to further fine-tune the compensation curve. R4 is used to adjust the highest point of the first-order temperature compensation curve within the specified temperature range to obtain a better temperature coefficient. The above method can achieve high-order compensation without affecting VBEQP2. VB and VREF are the output voltages of the nodes at both ends of the first resistor R1.

[0095] Based on the above technical solution of the present invention, Fig.11 As shown, the present invention also provides a CMOS process reference source temperature coefficient adjustment circuit, MP1~MP6, MN1, MN2, MN3, R1~R4, C1 constitute a first-order compensation reference source circuit. MP1 and MP2 are PMOS tubes of the same type and size, constituting a differential input pair of error amplifiers. MP3~MP6 are PMOS tubes of the same type that provide bias currents, and the relative ratio of the width-to-length ratio of the MP3~MP6 devices, or the current ratio, is 1:1:2:1, that is, the drain current of MP5 is twice that of the other three tubes. MN1 and MN2 are NMOS tubes of the same type and size, serving as current mirror sources for the single-ended output of the differential pair. QP1 and QP2 are 8:1 PNP tubes of the same type that generate a positive temperature coefficient current source IPTAT. R1~R4 are resistors of the same type. R1 flows through IPTAT and QP2 to form a reference source for first-order compensation. R4 is a resistor for adjusting the top of the first-order compensation temperature curve. R3 is a resistor that withstands △VBE (positive temperature coefficient) to generate IPTAT. The resistance value of R2 is the same as that of R1. The generation and size of the first-order reference source are calculated as shown in formulas 5~8. VREF and VB are circuit node voltages located at both ends of the first resistor R1, which are used to inject and lead out nonlinear compensation current sources. MN4 is the error amplifier secondary amplifier circuit, and C1 is a Miller compensation capacitor used to stabilize the reference source loop.

[0096] The calculation of the reference source voltage VREF is also calculated as Formula 18:

[0097] VREF=VBE+VPTAT+VNL=VBEQP2+IPTAT×R1+IPTAT×R4 / b+INL×R1 (18)

[0098] Wherein: b is the gain of the first transistor QP1.

[0099] MP7, R5 and MN4 form a temperature detection circuit. MP7 mirrors the IPTAT current, which flows through R5 to generate a detection voltage. Under certain temperature and voltage conditions, MN4 is turned on, thereby generating a reference current source for the nonlinear compensation current source. The drain-source voltage VdsMN4 of MN4 is the power supply voltage VDD minus the gate-source voltage VgsMP8 of MP8. The voltage of VgsMP8 is close to 1V, VDD=5V, and the threshold voltage Vth of MN4 is about 0.7V. Therefore, MN4 is in a saturated state when it is turned on. Therefore, the drain current of MN4 is:

[0100] IdsMN4=u×Cox×(W / L) / 2×(IPTAT×R5-Vth) 2 (12)

[0101] u is the electron mobility, Cox is the gate oxide capacitance per unit area, and W / L is the width-to-length ratio of the NMOS tube. Cox and W / L are constants. u is related to temperature. As the temperature increases, u decreases. According to the spice model, the temperature coefficient of u is defined as UTE, which is a negative value. The UTE of the NMOS tube used in this patent is -1.336.

[0102] At absolute temperature T, the electron mobility of the NMOS tube is:

[0103] u(T)=u(Tref)×(T / Tref) UTE (13)

[0104] Tref is the reference absolute temperature point, and u(Tref) is the electron mobility at the reference temperature point. u changes nonlinearly with temperature, that is, as the temperature increases, the electron mobility decreases nonlinearly.

[0105] (IPTAT×R5-Vth) in Formula 12 2 The term is also a nonlinear term. Combined with formula 13, IdsMN4 can be used as a reference current reference source for nonlinear compensation.

[0106] The same type of PMOS tubes MP8, MP9 and MP10 form a current mirror. The ratio of the three PMOS tubes is m:1:1. The drain current of MP8 is equal to the drain current of MN4, so the drain current of MP9 and MP10 is 1 / m of the drain current of MN4. The drain of MP9 is connected to the VREF terminal, and the drain current is injected into R1. The drain current of MP10 serves as the reference current source for the current mirror circuit of three NMOS tubes MN5, MN6 and MN7 of the same type and size. The drain of MN6 is connected to R1, and the current injected by MP9 is led out to the ground, avoiding the nonlinear compensation current from flowing into QP2, and realizing effective temperature compensation.

[0107] The same type of MP11, MP12, and MP13 form a current mirror circuit that outputs a smaller nonlinear current, with a ratio of n:1:1. Since the drain current of MN7 is 1 / n of that of MN4, the drain current of MP12 is equal to 1 / (m×n) of the drain current of MN4 and is injected into R1. Similarly, in the current mirror circuit composed of MP13, MN8, and MN9, the drain current of MN9 is 1 / (m×n) of that of MN4. The reason for using a smaller nonlinear current source is that the compensation current can be adjusted more flexibly to achieve a better temperature coefficient compensation effect. In addition, a current mirror circuit that directly generates (m×n):1 requires a larger area of ​​PMOS tube, which is very difficult to match in process manufacturing and layout design. Fig.10 Also available as Fig.11 Schematic diagram of compensation effect.

[0108] Combining Formula 8 and Formula 12, the calculation of the reference source voltage VREF in the final expression is also Formula 14:

[0109] VREF=VBEQP2+IPTAT×R1+IPTAT×R4 / b+[1 / m+1 / (m×n)]×u×Cox×(W / L) / 2×(IPTAT×R5-Vth) 2 ×R1 (14)

[0110] Fig.12 This is the simulation result of the first-order temperature compensation curve, and the highest vertex is selected at -25°C. In the range of -40°C~150°C, the highest vertex is (-25°C, 1.2303V), the lowest point is (150°C, 1.2247V), and the VREF difference between the highest and lowest points is 5.6mV.

[0111] Fig.13 This is the VREF simulation result after adding I1=1 / m IdsMN4. In the range of -40˚C~150˚C, the VREF difference between the highest and lowest points is 1.6mV, the highest point is (-25˚C, 1.2303V), and the lowest point is (150˚C, 1.22906V). Fig.12 In comparison, the difference is reduced by 4mV.

[0112] Fig.14 This is the VREF simulation result diagram with I1=1 / m IdsMN4 and I2=1 / (m×n) IdsMN4 added at the same time. It can be seen that within the range of -40˚C~150˚C, the VREF difference between the highest and lowest points is 0.16mV, the highest point is (-25˚C, 1.2303V), and the lowest point is (139˚C, 1.23014V). The calculated value of the temperature coefficient is:

[0113] △VREF / VREF / (temperature range)=0.16mV / 1.23V / [150˚C-(-40˚C)]=0.68ppm / ˚C

[0114] In general engineering applications, it is believed that the temperature coefficient of a first-order temperature compensation reference source is around 10~20ppm / ˚C. Fig.12 , Fig.13 and Fig.14 From the results, it can be seen that the compensation structure proposed in this scheme has greatly improved the temperature coefficient and is significantly better than the current technical level.

[0115] The circuit structure and adjustment method thereof provided by the present invention propose a temperature-dependent nonlinear current source generation method based on the CMOS process. The circuit structure is simple and does not require the addition of many devices and chip areas for nonlinear compensation. Compared with conventional structures, a better temperature coefficient can be obtained, thereby meeting the requirements of low temperature drift applications of the reference voltage.

[0116] It should be understood that the scope of the present invention is not limited to the non-limiting embodiments, and it should be understood that the non-limiting embodiments are only described as examples. The substantial protection scope required by this application is more embodied in the scope provided by the independent claims, as well as its dependent claims.

Claims

1. A reference source temperature coefficient adjustment circuit, comprising: The current source IPTAT which is proportional to the temperature is connected to the positive input terminal and the negative input terminal of the error amplifier EA1 through the first resistor R1 and the second resistor R2 respectively. The output terminal of the error amplifier EA1 outputs a reference source voltage VREF, and the reference source voltage VREF is also connected to the positive input terminal of the error amplifier EA1 through the first resistor R1 to form feedback, characterized in that: The positive input terminal of the error amplifier EA1 is also connected to the emitter of the second transistor QP2, the negative input terminal of the error amplifier EA1 is also connected to the emitter of the first transistor QP1 via the third resistor R3, the base and collector of the second transistor QP2 and the base and collector of the first transistor QP1 are both connected to the ground relative to the power supply VDD; The regulating circuit forms a first-order linear temperature compensation, and the reference source voltage VREF is calculated as Formula 20: VREF=VBE+VPTAT=VBEQP2+IPTAT×R1, wherein: VBE is a voltage with a negative temperature coefficient, VPTAT is a voltage proportional to temperature, and VBEQP2 is a voltage with a negative temperature coefficient of the second transistor QP2; It also includes a nonlinear compensation current INL, the nonlinear compensation current INL is connected in parallel with a current source IPTAT that is proportional to the temperature and is directly connected to the ground after passing through the first resistor R1, and the nonlinear compensation current INL includes a first front compensation current INL1 and a first rear compensation current INL3 that flow before and after the first resistor R1 and are equal; The regulation circuit forms first-order linear temperature compensation and high-order nonlinear compensation, and the reference source voltage VREF is calculated as Formula 30: VREF=VBE+VPTAT+VNL=VBEQP2+IPTAT×R1+INL×R1, wherein: VNL is the nonlinear compensation voltage formed by the first resistor R1.

2. A reference source temperature coefficient adjustment circuit according to claim 1, characterized in that: The first transistor QP1 and the second transistor QP2 are vertical PNP transistors manufactured using a CMOS process, and the area ratio between the two is 8:

1. The resistance values ​​of the first resistor R1 and the second resistor R2 are equivalent. The reference source voltage VREF is externally output and connected to the input stage of the buffer amplifier to serve as a reference voltage for other circuit modules. The calculation of the reference source voltage VREF is also as follows: VREF=VBEQP2+IPTAT×R1=VBEQP2+VT×ln8×(R1 / R3), where: VT=kT / q, k is the Boltzmann constant equal to 1.38×10 -23 J / K, q is the electron charge equal to 1.6×10 -19 C, T is the absolute temperature, and VT is approximately equal to 25.8mV at room temperature.

3. The reference source temperature coefficient adjustment circuit according to claim 1, characterized in that: A fourth resistor R4 is also connected between the base of the second transistor QP2 and the ground to form a voltage with a negative temperature coefficient that decreases with increasing temperature in the first-order linear temperature compensation. The calculation of the reference source voltage VREF is also based on Formula 18: VREF=VBE+VPTAT+VNL=VBEQP2+IPTAT×R1+IPTAT×R4 / b+INL×R1, where: b is the amplification factor of the first transistor QP1.

4. A reference source temperature coefficient adjustment circuit according to claim 3, characterized in that: As the temperature increases, IPTAT / b in the formula 18 becomes smaller, and IPTAT×R4 / b and VBEQP2 are both voltages with negative temperature coefficients. When the fourth resistor R4 is larger, IPTAT×R4 / b, which is a voltage with a negative temperature coefficient, becomes larger.

5. A reference source temperature coefficient adjustment circuit according to claim 4, characterized in that: When the fourth resistor R4 is larger, the top of the first-order temperature compensation curve of the reference source voltage VREF is located further back in a relatively low temperature region.

6. A reference source temperature coefficient adjustment circuit according to claim 5, characterized in that: The nonlinear compensation voltage VNL is a nonlinear compensation term. As the temperature increases, the nonlinear compensation voltage VNL also increases. The entire temperature compensation curve of the reference source voltage VREF will rise as a whole as the temperature increases.

7. A reference source temperature coefficient adjustment circuit according to claim 6, characterized in that: When the vertex of the first-order compensation curve of the reference source voltage VREF moves to the low temperature region, the overall upward curvature of the entire temperature compensation curve of the reference source voltage VREF becomes smaller, and the output variation of the reference source voltage VREF will be reduced to a smaller range.

8. A reference source temperature coefficient adjustment circuit according to claim 7, characterized in that: The nonlinear compensation current INL includes a first nonlinear compensation current I1 and a second nonlinear compensation current I2 connected in parallel, the first nonlinear compensation current I1 includes the first front compensation current INL1 and the first rear compensation current INL3 that are equal to each other and flow through the first resistor R1, the second nonlinear compensation current I2 includes a second front compensation current INL2 and a second rear compensation current INL4 that are equal to each other and flow through the first resistor R1, and the first nonlinear compensation current I1 is greater than the second nonlinear compensation current I2.

9. A method for adjusting a reference source temperature coefficient, characterized in that: According to claim 3, the reference source temperature coefficient adjustment circuit is used, wherein the reference source voltage VREF has the voltage VBE with a negative temperature coefficient; By means of the voltage VPTAT proportional to temperature obtained by multiplying the current source IPTAT proportional to temperature by the first resistor R1, the first-order linear temperature compensation of the reference source voltage VREF is adjusted and implemented; The nonlinear compensation voltage VNL obtained by multiplying the nonlinear compensation current INL and the first resistor R1 is used to adjust and implement high-order linear temperature compensation of the reference source voltage VREF; By relatively increasing the resistance of the fourth resistor R4, the top of the first-order temperature compensation curve of the reference source voltage VREF is adjusted and realized to be located in a relatively low temperature region, and the output variation of the reference source voltage VREF will be reduced to a smaller range.

10. A reference source temperature coefficient adjustment method according to claim 9, characterized in that: The nonlinear compensation current INL includes a first nonlinear compensation current I1 and a second nonlinear compensation current I2 connected in parallel, and the first nonlinear compensation current I1 is greater than the second nonlinear compensation current I2; The nonlinear compensation current INL can be further flexibly adjusted through the second nonlinear compensation current I2 to further achieve a better temperature coefficient compensation effect.

11. A CMOS process reference source temperature coefficient adjustment circuit, characterized in that: It includes a first-order compensation reference source circuit connected to a power supply VDD, the first-order compensation reference source circuit includes: a third, fourth, fifth, and sixth PMOS tubes MP3, MP4, MP5, and MP6, whose sources are connected in parallel to the power supply VDD and whose gates are connected in series with each other; The drain of the third PMOS transistor MP3 is connected to its gate and connected to the drain of the third NMOS transistor NM3, and the drain of the fourth PMOS transistor MP4 is sequentially connected in series to the second and third resistors R2, R3 and the emitter of the first transistor QP1; The drain of the fifth PMOS transistor MP5 is connected in parallel to the source of the first and second PMOS transistors MP1 and MP2, respectively; the drains of the first and second PMOS transistors MP1 and MP2 are connected to the drains of the first and second NMOS transistors MN1 and MN2, respectively; the gate of the second PMOS transistor MP2 is connected between the second and third resistors R2 and R3; the gates of the first and second NMOS transistors MN1 and MN2 are mutually connected to the drain of the first NMOS transistor MN1, so as to form a differential input pair of the error amplifier formed by the first and second PMOS transistors MP1 and MP2; the first and second NMOS transistors MN1 and MN2 are used as current mirror sources of the single-ended output of the differential pair; The drain of the sixth PMOS transistor MP6 is sequentially connected in series with a reference source voltage VREF voltage output node, a first resistor R1, a gate of the first PMOS transistor MP1, a nonlinear compensation current source VB voltage output node and an emitter of the second transistor QP2; The reference source voltage VREF is calculated as Formula 30: VREF=VBE+VPTAT+VNL=VBEQP2+IPTAT×R1+INL×R1, wherein: VBE is a voltage with a negative temperature coefficient, VPTAT is a voltage proportional to temperature, VNL is a nonlinear compensation voltage formed by the first resistor R1, VBEQP2 is a voltage with a negative temperature coefficient of the second transistor QP2, IPTAT is a current source proportional to temperature, and INL is a nonlinear compensation current passing through the first resistor R1.

12. A CMOS process reference source temperature coefficient adjustment circuit according to claim 11, characterized in that: The gate of the third NMOS transistor NM3 is connected to the drain of the second PMOS transistor MP2 , and a compensation capacitor is connected between the gate of the third NMOS transistor NM3 and the gate of the second PMOS transistor MP2 .

13. A CMOS process reference source temperature coefficient adjustment circuit according to claim 12, characterized in that: The source of the third NMOS transistor NM3, the bases and collectors of the first and second transistors QP1 and QP2, and the sources of the first and second NMOS transistors MN1 and MN2 are all connected to a ground relative to the power source VDD.

14. A CMOS process reference source temperature coefficient adjustment circuit according to claim 13, characterized in that: A fourth resistor R4 is also connected between the base of the second transistor QP2 and the ground. The calculation of the reference source voltage VREF is also based on Formula 18: VREF=VBE+VPTAT+VNL=VBEQP2+IPTAT×R1+IPTAT×R4 / b+INL×R1, wherein: b is the gain of the first transistor QP1.

15. A CMOS process reference source temperature coefficient adjustment circuit according to claim 14, characterized in that: The first and second PMOS tubes MP1 and MP2 are PMOS tubes of the same type and size. The third, fourth, fifth and sixth PMOS tubes MP3, MP4, MP5 and MP6 are PMOS tubes of the same type for providing bias current and their respective drain current ratios are 1:1:2:

1. The first and second NMOS tubes MN1 and MN2 are NMOS tubes of the same type and size. The first and second triodes QP1 and QP2 generate the current source IPTAT proportional to the temperature and the ratio is 8:

1. The same type of PNP tube, the first, second, third and fourth resistors R1, R2, R3 and R4 are the same type of resistors, the current source IPTAT proportional to the temperature flows through the first resistor R1 and forms a reference source for the first-order compensation with the second transistor QP2, the fourth resistor R4 is a resistor for adjusting the top of the first-order compensation temperature curve, the third resistor R3 is a resistor that withstands the positive temperature coefficient △VBE and generates the current source IPTAT proportional to the temperature, and the resistance values ​​of the first and second resistors R1 and R2 are the same.

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