RF front-end modules and RF chips

By using bias circuits and temperature compensation circuits in the RF front-end module, the problem of slow increase in signal output of the RF amplifier module is solved, reducing complexity and energy consumption, and improving RF performance and service life.

CN119070847BActive Publication Date: 2025-01-14LANSUS TECH INC
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Patent Information

Application Number
CN202411525034.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-10-30
Publication Date
2025-01-14
Estimated Expiration
2044-10-30

AI Technical Summary

Technical Problem

In TDD systems such as WIFI, the RF amplifier module slowly rises due to the time required to turn on to normal gain, affecting performance quality.

Method used

A radio frequency front-end module is designed, including a first chip and a second chip on the substrate, a bias circuit is provided on the first chip for providing a bias voltage, and an amplification circuit and a temperature compensation circuit are provided on the second chip, through The electrical connection enables signal amplification and temperature error compensation, reduces transmission power control complexity, and reduces radiation and energy consumption.

Benefits of technology

It effectively reduces the complexity of RF front-end modules and RF chips in transmit power control, reduces radiation, reduces energy consumption, improves service life, and optimizes RF performance.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention is applicable to the field of radio frequency technology, and in particular, relates to a radio frequency front-end module and a radio frequency chip, comprising a substrate and a first chip and a second chip arranged on the substrate, the first chip and the second chip being electrically connected; a bias circuit is provided on the first chip, the bias circuit is used to provide a bias voltage; an amplifier circuit and a temperature compensation circuit are provided on the second chip, the amplifier circuit is used to amplify the received signal, and the temperature compensation circuit is used to compensate for the error caused by temperature; the first end of the bias circuit is used to receive an enable signal, the second end of the bias circuit is electrically connected to the first end of the temperature compensation circuit, the first end of the amplifier circuit is used to receive an external logic control signal, and the second end of the amplifier circuit is connected to the second end of the temperature compensation circuit. Compared with the prior art, the present invention effectively reduces the complexity of the radio frequency front-end module and the radio frequency chip in realizing transmission power control, reduces radiation, reduces energy consumption, and increases service life.
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Description

Technical Field

[0001] The present invention is applicable to the field of radio frequency technology, and in particular relates to a radio frequency front-end module and a radio frequency chip. Background Art

[0002] Mobile communication terminals have become more and more common in today's society for wireless communication. Their increasingly powerful processing capabilities have made mobile communication terminals gradually evolve into mobile multimedia centers. In the mobile communication system, there are currently two main technical routes, cellular mobile communication and WIFI. These two systems are still evolving, and their common characteristics are larger communication bandwidth and higher transmission rate to meet the growing usage needs of users.

[0003] In communication systems such as WIFI, RF amplifier modules are often required. RF amplifier modules are used for RF output signals. Since WIFI is a TDD (Time Division Duplexing) system, the operation of the amplifier circuit is often controlled by an enable signal. The enable signal is synchronized with the RF signal in the time domain and has corresponding requirements on the timing. Since it takes a certain amount of time (usually a few us) for the RF amplifier module to go from being turned on to normal gain, there will be a slow rise process at the leading edge of the output signal, which will lead to a deterioration in performance quality.

[0004] Therefore, a new RF front-end module and RF chip are urgently needed to solve the above problems. Summary of the invention

[0005] The present invention provides a radio frequency front-end module and a radio frequency chip, aiming to reduce the complexity of the radio frequency front-end module and the radio frequency chip in realizing transmission power control, reduce radiation, reduce energy consumption, and increase service life.

[0006] In a first aspect, the present invention provides a radio frequency front-end module, the radio frequency front-end module comprising a substrate and a first chip and a second chip disposed on the substrate, the first chip and the second chip being electrically connected;

[0007] The first chip is provided with a bias circuit, and the bias circuit is used to provide a bias voltage; the second chip is provided with an amplifier circuit and a temperature compensation circuit, the amplifier circuit is used to amplify the received signal, and the temperature compensation circuit is used to compensate for the error caused by the temperature on the signal; the first end of the bias circuit is used to receive an enable signal, the second end of the bias circuit is electrically connected to the first end of the temperature compensation circuit, the first end of the amplifier circuit is used to receive an external logic control signal, the second end of the amplifier circuit is connected to the second end of the temperature compensation circuit, and the third end of the amplifier circuit is used to output a signal;

[0008] The bias circuit includes a first resistor, a cascade diode circuit, a voltage stabilizing circuit, and a first pulse generating circuit and / or a second pulse generating circuit, wherein the first end of the first resistor serves as the first end of the bias circuit, the second end of the first resistor and the first end of the cascade diode circuit are connected to the first end of the voltage stabilizing circuit, the second end of the cascade diode circuit is grounded, the second end of the voltage stabilizing circuit serves as the second end of the bias circuit, the first end of the first pulse generating circuit is connected to the first end of the first resistor, the second end of the first pulse generating circuit is connected to the second end of the first resistor, the first end of the second pulse generating circuit is connected to the third end of the voltage stabilizing circuit, and the second end of the second pulse generating circuit is grounded; the first pulse generating circuit and the second pulse generating circuit are used to generate a pulse signal, and the voltage stabilizing circuit is used to provide a stable bias voltage;

[0009] Preferably, the voltage stabilizing circuit includes a first triode, a second triode, a second resistor, a third resistor, a fourth resistor and a first capacitor, the collector of the first triode is connected to the first end of the second resistor and is used to connect the supply voltage, the base of the first triode and the second end of the second resistor are respectively connected to the collector of the second triode, the emitter of the first triode is respectively connected to the first end of the third resistor and the first end of the first capacitor, and the emitter of the first triode serves as the second end of the voltage stabilizing circuit; the emitter of the second triode serves as the first end of the voltage stabilizing circuit, the base of the second triode is respectively connected to the second end of the third resistor and the first end of the fourth resistor, and the base of the second triode serves as the third end of the voltage stabilizing circuit, the second end of the fourth resistor is grounded, and the second end of the first capacitor is grounded.

[0010] Preferably, the first pulse generating circuit includes a fifth resistor and a second capacitor, the first end of the fifth resistor serves as the first end of the first pulse generating circuit, the second end of the fifth resistor is connected to the first end of the second capacitor, and the second end of the second capacitor serves as the second end of the first pulse generating circuit.

[0011] Preferably, the second pulse generating circuit includes a sixth resistor and a third capacitor, the first end of the sixth resistor serves as the first end of the second pulse generating circuit, the second end of the sixth resistor is connected to the first end of the third capacitor, and the second end of the third capacitor serves as the second end of the second pulse generating circuit.

[0012] Preferably, the cascade diode circuit includes a third transistor and a fourth transistor, the collector of the third transistor serves as the first end of the cascade diode circuit, the base of the third transistor is respectively connected to the second end of the first resistor and the emitter of the third transistor, the emitter of the third transistor is respectively connected to the collector of the fourth transistor and the base of the fourth transistor, and the emitter of the fourth transistor serves as the second end of the cascade diode circuit.

[0013] Preferably, the temperature compensation circuit includes a seventh resistor, an eighth resistor, a ninth resistor and a fifth transistor, the first end of the seventh resistor is used to connect to the supply voltage, the second end of the seventh resistor is connected to the collector of the fifth transistor, the base of the fifth transistor serves as the first end of the temperature compensation circuit, the emitter of the fifth transistor is respectively connected to the first end of the eighth resistor and the first end of the ninth resistor, the second end of the eighth resistor is grounded, and the second end of the ninth resistor serves as the second end of the temperature compensation circuit.

[0014] Preferably, the amplifier circuit includes a fourth capacitor, a fifth capacitor, a first inductor and a sixth transistor, the first end of the fourth capacitor serves as the first end of the amplifier circuit, the second end of the fourth capacitor is connected to the base of the sixth transistor, the base of the sixth transistor serves as the second end of the amplifier circuit, the emitter of the sixth transistor is grounded, the collector of the sixth transistor is respectively connected to the first end of the first inductor and the first end of the fifth capacitor, the second end of the first inductor is used to connect to an external power supply voltage, and the second end of the fifth capacitor serves as the third end of the amplifier circuit.

[0015] Preferably, the first chip is further provided with a first pin, the first pin is connected to the second end of the voltage stabilizing circuit, the second chip is further provided with a second pin, the second pin is connected to the first end of the temperature compensation circuit, and the first pin and the second pin are connected via a wire.

[0016] In a second aspect, the present invention further provides a radio frequency chip, wherein the radio frequency chip comprises a radio frequency front-end module as described in any one of the above embodiments.

[0017] Compared with the prior art, the present invention is provided with a substrate and a first chip and a second chip arranged on the substrate, the first chip and the second chip are electrically connected; a bias circuit is provided on the first chip, the bias circuit is used to provide a bias voltage; an amplifier circuit and a temperature compensation circuit are provided on the second chip, the amplifier circuit is used to amplify the received signal, and the temperature compensation circuit is used to compensate for the error caused by temperature; the first end of the bias circuit is used to receive an enable signal, the second end of the bias circuit is electrically connected to the first end of the temperature compensation circuit, the first end of the amplifier circuit is used to receive an external logic control signal, the second end of the amplifier circuit is connected to the second end of the temperature compensation circuit, and the third end of the amplifier circuit is used to output a signal. The present invention effectively reduces the complexity of the RF front-end module and the RF chip in realizing the transmission power control, reduces radiation, reduces energy consumption, and improves the service life. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The present invention will be described in detail below in conjunction with the accompanying drawings. The above and other aspects of the present invention will become clearer and easier to understand through the detailed description made in conjunction with the following drawings. In the accompanying drawings:

[0019] Figure 1 is a structural schematic diagram of a radio frequency front-end module having a first pulse generating circuit provided in an embodiment of the present invention;

[0020] Figure 2 for Figure 1 Voltage waveform of the RF front-end module;

[0021] Figure 3 is a schematic structural diagram of a radio frequency front-end module having a second pulse generating circuit provided in an embodiment of the present invention;

[0022] Figure 4 for Figure 3 Voltage waveform of the RF front-end module. DETAILED DESCRIPTION

[0023] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0024] Embodiment 1

[0025] Please refer to Figure 1-Figure 4The present invention provides a radio frequency front-end module 100, the radio frequency front-end module 100 includes a substrate and a first chip DIE1 and a second chip DIE2 disposed on the substrate, the first chip DIE1 and the second chip DIE2 are electrically connected. Specifically, the first chip DIE1 can be a CMOS process chip but is not limited to the CMOS process, the second chip DIE2 can be a GAAS process chip but is not limited to the GAAS process, and both can be chips of other processes.

[0026] The first chip DIE1 is provided with a bias circuit 1, and the bias circuit 1 is used to provide a bias voltage; the second chip DIE2 is provided with an amplifier circuit 3 and a temperature compensation circuit 2, and the amplifier circuit 3 is used to amplify the received signal, and the temperature compensation circuit 2 is used to compensate for the error caused by the temperature to the signal; the first end of the bias circuit 1 is used to receive an enable signal, the second end of the bias circuit 1 is electrically connected to the first end of the temperature compensation circuit 2, the first end of the amplifier circuit 3 is used to receive an external logic control signal, the second end of the amplifier circuit 3 is connected to the second end of the temperature compensation circuit 2, and the third end of the amplifier circuit 3 is used to output a signal;

[0027] The bias circuit 1 includes a first resistor R1, a cascaded diode circuit 11 and a voltage stabilizing circuit 12, wherein a first end of the first resistor R1 serves as a first end of the bias circuit 1, a second end of the first resistor R1 and a first end of the cascaded diode circuit 11 are connected to a first end of the voltage stabilizing circuit 12, a second end of the cascaded diode circuit 11 is grounded, and a second end of the voltage stabilizing circuit 12 serves as a second end of the bias circuit 1; the voltage stabilizing circuit 12 is used to provide a stable bias voltage;

[0028] The bias circuit 1 also includes a first pulse generating circuit 13 and / or a second pulse generating circuit 14, wherein the first end of the first pulse generating circuit 13 is connected to the first end of the first resistor R1, the second end of the first pulse generating circuit 13 is connected to the second end of the first resistor R1, the first end of the second pulse generating circuit 14 is connected to the third end of the voltage stabilizing circuit 12, and the second end of the second pulse generating circuit 14 is grounded; the first pulse generating circuit 13 and the second pulse generating circuit 14 are used to generate pulse signals. In the embodiment of the present invention, the voltage stabilizing circuit 12 includes a first transistor Q1, a second transistor Q2, a second resistor R2, a third resistor R3, a fourth resistor R4 and a first capacitor C1. The collector of the first transistor Q1 is connected to the first end of the second resistor R2 and is used to connect the power supply voltage VDD. The base of the first transistor Q1 and the second end of the second resistor R2 are respectively connected to the collector of the second transistor Q2. The emitter of the first transistor Q1 is respectively connected to the first end of the third resistor R3 and the first end of the first capacitor C1. The emitter of the first transistor Q1 serves as the second end of the voltage stabilizing circuit 12. The emitter of the second transistor Q2 serves as the first end of the voltage stabilizing circuit 12. The base of the second transistor Q2 is respectively connected to the second end of the third resistor R3 and the first end of the fourth resistor R4. The base of the second transistor Q2 serves as the third end of the voltage stabilizing circuit 12. The second end of the fourth resistor R4 is grounded, and the second end of the first capacitor C1 is grounded. Specifically, the first transistor Q1 and the second transistor Q2 are NPN transistors.

[0029] In the embodiment of the present invention, the first pulse generating circuit 13 includes a fifth resistor R5 and a second capacitor C2, the first end of the fifth resistor R5 serves as the first end of the first pulse generating circuit 13, the second end of the fifth resistor R5 is connected to the first end of the second capacitor C2, and the second end of the second capacitor C2 serves as the second end of the first pulse generating circuit 13.

[0030] In an embodiment of the present invention, the second pulse generating circuit 14 includes a sixth resistor R6 and a third capacitor C3, the first end of the sixth resistor R6 serves as the first end of the second pulse generating circuit 14, the second end of the sixth resistor R6 is connected to the first end of the third capacitor C3, and the second end of the third capacitor C3 serves as the second end of the second pulse generating circuit 14.

[0031] In the embodiment of the present invention, the cascade diode circuit 11 includes a third triode Q3 and a fourth triode Q4, the collector of the third triode Q3 serves as the first end of the cascade diode circuit 11, the base of the third triode Q3 is respectively connected to the second end of the first resistor R1 and the emitter of the third triode Q3, the emitter of the third triode Q3 is respectively connected to the collector of the fourth triode Q4 and the base of the fourth triode Q4, and the emitter of the fourth triode Q4 serves as the second end of the cascade diode circuit 11. Specifically, the third triode Q3 and the fourth triode Q4 are NPN transistors. Since the base and collector of the third triode Q3 are connected, a PN junction is formed with the emitter of the third triode Q3, and the base and collector of the fourth triode Q4 are connected, a PN junction is formed with the emitter of the fourth triode Q4. Therefore, the base and collector of the third triode Q3 will maintain a stable standard voltage Vref. At the same time, since the third transistor Q3 and the fourth transistor Q4 can be connected in greater numbers, different standard voltages Vref can be generated.

[0032] In an embodiment of the present invention, the temperature compensation circuit 2 includes a seventh resistor R7, an eighth resistor R8, a ninth resistor R9 and a fifth transistor Q5, the first end of the seventh resistor R7 is used to connect to the power supply voltage VDD, the second end of the seventh resistor R7 is connected to the collector of the fifth transistor Q5, the base of the fifth transistor Q5 serves as the first end of the temperature compensation circuit 2, the emitter of the fifth transistor Q5 is respectively connected to the first end of the eighth resistor R8 and the first end of the ninth resistor R9, the second end of the eighth resistor R8 is grounded, and the second end of the ninth resistor R9 serves as the second end of the temperature compensation circuit 2.

[0033] In the embodiment of the present invention, the amplifier circuit 3 includes a fourth capacitor C4, a fifth capacitor C5, a first inductor L1 and a sixth transistor Q6, the first end of the fourth capacitor C4 serves as the first end of the amplifier circuit 3, the second end of the fourth capacitor C4 is connected to the base of the sixth transistor Q6, the base of the sixth transistor Q6 serves as the second end of the amplifier circuit 3, the emitter of the sixth transistor Q6 is grounded, the collector of the sixth transistor Q6 is respectively connected to the first end of the first inductor L1 and the first end of the fifth capacitor C5, the second end of the first inductor L1 is used to connect the external power supply voltage VCC, and the second end of the fifth capacitor C5 serves as the third end of the amplifier circuit 3.

[0034] In the embodiment of the present invention, the first chip DIE1 is further provided with a first pin PAD1, the first pin PAD1 is connected to the second end of the voltage stabilizing circuit 12, the second chip DIE2 is further provided with a second pin PAD2, the second pin PAD2 is connected to the first end of the temperature compensation circuit 2, and the first pin PAD1 and the second pin PAD2 are connected by a wire. The first pin PAD1 and the second pin PAD2 can also be connected in other ways, such as bonding line connection, buckle connection, etc.

[0035] In the embodiment of the present invention, when the RF front-end module 100 is in the initial state, the voltage of the enable signal is 0V, then the voltage of the collector of the third transistor Q3 is 0V, and the voltage of the emitter of the first transistor Q1 is 0V. If the voltage of the emitter of the first transistor Q1 increases due to some reason, after passing through the third resistor R3, the base voltage of the second transistor Q2 increases, and the collector and emitter of the second transistor Q2 are turned on, so that the voltage of the collector of the second transistor Q2 is pulled down, and then the emitter voltage of the first transistor Q1 is reduced. Therefore, the emitter voltage of the first transistor Q1 is always kept at a low voltage.

[0036] When the voltage of the enable signal is changed to a high level, for example, 3.3V, the collector of the third transistor Q3 maintains a high voltage, and the base voltage value is between the PN junction voltages of the third transistor Q3 and the fourth transistor Q4, such as 1.4V, that is, there is a standard voltage Vref=1.4V. At this time, the emitter of the first transistor Q1 outputs a stable high voltage VPAD1. When the voltage of VPAD1 rises due to some reason, the voltage of the base of the second transistor Q2 rises, and the collector voltage of the second transistor Q2 drops, so that the voltage of VPAD1 drops. When the voltage of VPAD1 drops due to some reason, the base voltage of the second transistor Q2 drops, and the collector voltage of the second transistor Q2 rises, so that the voltage of VPAD1 rises. Therefore, through the negative feedback of the first transistor Q1 and the second transistor Q2, VPAD1 can maintain a stable voltage. The voltage divider ratio of the third resistor R3 and the fourth resistor R4 can be used to adjust the voltage value of VPAD1. When the voltage division ratio of the third resistor R3 and the fourth resistor R4 (ie, R3 / R4 ) increases, VPAD1 increases, and when it decreases, VPAD1 decreases.

[0037] Please refer to Figure 1-2 , Figure 1 1 is a schematic diagram of the structure of a radio frequency front-end module 100 having a first pulse generating circuit 13 provided in an embodiment of the present invention. Figure 2 for Figure 1The voltage waveform of the RF front-end module 100. When the bias circuit 1 includes the first pulse generating circuit 13, a steep rising edge is generated at the moment when the enable signal is just turned on. The rising edge signal is transmitted to the base and collector of the third transistor Q3 through the series circuit composed of the fifth resistor R5 and the second capacitor C2, and a sharp pulse higher than the normal level is generated at the collector of the third transistor Q3. After the closed-loop action of the first transistor Q1 and the second transistor Q2, a sharp pulse is generated at the leading edge of VPAD1. Its voltage waveform is as follows Figure 2 As shown, the leading edge of the bias voltage (current) finally delivered to the base of the sixth transistor Q6 also generates a sharp pulse. This pulse enables the sixth transistor Q6 to be turned on more quickly, thereby optimizing the RF performance.

[0038] Please refer to Figure 3-4 , Figure 3 1 is a schematic diagram of the structure of a radio frequency front-end module 100 having a second pulse generating circuit 14 provided in an embodiment of the present invention. Figure 4 for Figure 3 Voltage waveform diagram of the RF front-end module 100. A series circuit consisting of a sixth resistor R6 and a third capacitor C3 is added to the base of the second triode Q2, and the second end of the third capacitor C3 is grounded. When the enable signal is changed to a high level, the emitter of the first triode Q1 will produce a steep high-level rising edge. The rising edge signal is transmitted to the base of the second triode Q2 through the voltage divider network consisting of the third resistor R3, the fourth resistor R4, the sixth resistor R6 and the third capacitor C3. At this time, the third capacitor C3 will be charged, the impedance of the series network consisting of the sixth resistor R6 and the third capacitor C3 is low, and the voltage at the emitter of the first triode is also low, so the emitter of the first triode Q1 will output a pulse higher than the normal voltage. After several us to tens of us, the voltage of the third capacitor C3 increases, the impedance of the series network consisting of the sixth resistor R6 and the third capacitor C3 increases, and the emitter output voltage of the first triode Q1 tends to be stable.

[0039] What requires instructions is: Figure 1 and Figure 3 In the structural diagram of only setting the first pulse generating circuit 13 or the second pulse generating circuit 14 for the RF front-end module 100, the first pulse generating circuit 13 and the second pulse generating circuit 14 are in an and / or relationship. The first pulse generating circuit 13 and the second pulse generating circuit 14 can also be simultaneously set in the bias circuit 1 according to actual conditions.

[0040] It should be noted that the structure of each circuit in the present invention is not limited to its form (such as the cascade diode circuit 11, the voltage stabilizing circuit 12, the pulse generating circuit 13, etc.), and any circuit that can realize these functions in the prior art is feasible. For example, taking the voltage stabilizing circuit 12 as an example, in the present invention, the voltage stabilizing circuit 12 is specifically a circuit structure composed of a first transistor Q1, a second transistor Q2, a second resistor R2, a third resistor R3, a fourth resistor R4 and a first capacitor C1, which is used to provide a stable bias voltage. It should be noted that for the present invention, the voltage stabilizing circuit 12 is not limited to the above structure, and any other voltage stabilizing circuit in the prior art that can realize the function of providing a stable bias voltage is feasible.

[0041] Compared with the prior art, the present invention is provided with a substrate and a first chip and a second chip arranged on the substrate, the first chip and the second chip are electrically connected; a bias circuit is provided on the first chip, the bias circuit is used to provide a bias voltage; an amplifier circuit and a temperature compensation circuit are provided on the second chip, the amplifier circuit is used to amplify the received signal, and the temperature compensation circuit is used to compensate for the error caused by temperature; the first end of the bias circuit is used to receive an enable signal, the second end of the bias circuit is electrically connected to the first end of the temperature compensation circuit, the first end of the amplifier circuit is used to receive an external logic control signal, the second end of the amplifier circuit is connected to the second end of the temperature compensation circuit, and the third end of the amplifier circuit is used to output a signal. The present invention effectively reduces the complexity of the RF front-end module and the RF chip in realizing the transmission power control, reduces radiation, reduces energy consumption, and improves the service life.

[0042] Embodiment 2

[0043] An embodiment of the present invention further provides a radio frequency chip, which includes the radio frequency front-end module 100 as described in the above embodiment and can achieve the same technical effect. Please refer to the description in the above embodiment and will not be repeated here.

[0044] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0045] The embodiments of the present invention are described above in conjunction with the accompanying drawings. What is disclosed is only the preferred embodiment of the present invention. However, the present invention is not limited to the above-mentioned specific implementation manner. The above-mentioned specific implementation manner is only illustrative rather than restrictive. Under the enlightenment of the present invention, ordinary technicians in this field can also make many forms and equivalent changes without departing from the scope of protection of the purpose of the present invention and the claims, all of which are within the protection of the present invention.

Claims

1. A radio frequency front-end module, characterized in that: The RF front-end module includes a substrate and a first chip and a second chip disposed on the substrate, wherein the first chip and the second chip are electrically connected; The first chip is provided with a bias circuit, and the bias circuit is used to provide a bias voltage; the second chip is provided with an amplifier circuit and a temperature compensation circuit, the amplifier circuit is used to amplify the received signal, and the temperature compensation circuit is used to compensate for the error caused by the temperature on the signal; the first end of the bias circuit is used to receive an enable signal, the second end of the bias circuit is electrically connected to the first end of the temperature compensation circuit, the first end of the amplifier circuit is used to receive an external logic control signal, the second end of the amplifier circuit is connected to the second end of the temperature compensation circuit, and the third end of the amplifier circuit is used to output a signal; The bias circuit includes a first resistor, a cascade diode circuit, a voltage stabilizing circuit, and a first pulse generating circuit and / or a second pulse generating circuit, wherein the first end of the first resistor serves as the first end of the bias circuit, the second end of the first resistor and the first end of the cascade diode circuit are connected to the first end of the voltage stabilizing circuit, the second end of the cascade diode circuit is grounded, the second end of the voltage stabilizing circuit serves as the second end of the bias circuit, the first end of the first pulse generating circuit is connected to the first end of the first resistor, the second end of the first pulse generating circuit is connected to the second end of the first resistor, the first end of the second pulse generating circuit is connected to the third end of the voltage stabilizing circuit, and the second end of the second pulse generating circuit is grounded; the first pulse generating circuit and the second pulse generating circuit are used to generate a pulse signal, and the voltage stabilizing circuit is used to provide a stable bias voltage; The cascade diode circuit includes a third triode and a fourth triode, the collector of the third triode serves as the first end of the cascade diode circuit, the base of the third triode is respectively connected to the second end of the first resistor and the collector of the third triode, the emitter of the third triode is respectively connected to the collector of the fourth triode and the base of the fourth triode, and the emitter of the fourth triode serves as the second end of the cascade diode circuit; The temperature compensation circuit includes a seventh resistor, an eighth resistor, a ninth resistor and a fifth transistor. The first end of the seventh resistor is used to connect to the power supply voltage, the second end of the seventh resistor is connected to the collector of the fifth transistor, the base of the fifth transistor serves as the first end of the temperature compensation circuit, the emitter of the fifth transistor is respectively connected to the first end of the eighth resistor and the first end of the ninth resistor, the second end of the eighth resistor is grounded, and the second end of the ninth resistor serves as the second end of the temperature compensation circuit.

2. The RF front-end module according to claim 1, characterized in that: The voltage stabilizing circuit includes a first triode, a second triode, a second resistor, a third resistor, a fourth resistor and a first capacitor. The collector of the first triode is connected to the first end of the second resistor and is used to connect the power supply voltage. The base of the first triode and the second end of the second resistor are respectively connected to the collector of the second triode. The emitter of the first triode is respectively connected to the first end of the third resistor and the first end of the first capacitor. The emitter of the first triode serves as the second end of the voltage stabilizing circuit. The emitter of the second triode serves as the first end of the voltage stabilizing circuit. The base of the second triode is respectively connected to the second end of the third resistor and the first end of the fourth resistor. The base of the second triode serves as the third end of the voltage stabilizing circuit. The second end of the fourth resistor is grounded, and the second end of the first capacitor is grounded.

3. The RF front-end module according to claim 1, characterized in that: The first pulse generating circuit includes a fifth resistor and a second capacitor, the first end of the fifth resistor serves as the first end of the first pulse generating circuit, the second end of the fifth resistor is connected to the first end of the second capacitor, and the second end of the second capacitor serves as the second end of the first pulse generating circuit.

4. The RF front-end module according to claim 1, wherein: The second pulse generating circuit includes a sixth resistor and a third capacitor, the first end of the sixth resistor serves as the first end of the second pulse generating circuit, the second end of the sixth resistor is connected to the first end of the third capacitor, and the second end of the third capacitor serves as the second end of the second pulse generating circuit.

5. The RF front-end module according to claim 1, wherein: The amplifier circuit includes a fourth capacitor, a fifth capacitor, a first inductor and a sixth transistor. The first end of the fourth capacitor serves as the first end of the amplifier circuit, the second end of the fourth capacitor is connected to the base of the sixth transistor, the base of the sixth transistor serves as the second end of the amplifier circuit, the emitter of the sixth transistor is grounded, the collector of the sixth transistor is respectively connected to the first end of the first inductor and the first end of the fifth capacitor, the second end of the first inductor is used to connect to an external power supply voltage, and the second end of the fifth capacitor serves as the third end of the amplifier circuit.

6. The RF front-end module according to claim 1, characterized in that: The first chip is also provided with a first pin, which is connected to the second end of the voltage stabilizing circuit. The second chip is also provided with a second pin, which is connected to the first end of the temperature compensation circuit. The first pin and the second pin are connected via a wire.

7. A radio frequency chip, characterized in that: The radio frequency chip includes the radio frequency front-end module as described in any one of claims 1-6.

Citation Information

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