Dual-frequency multi-channel switchable receiver system applied to satellite navigation and implementation method
By powering and biasing the second-level mixer of the GNSS dual-band receiver, the chip compatibility in dual-band and multi-channel application scenarios is achieved, and the problem of chip incompatibility in the existing technology is solved. Reduces production costs and increases versatility.
Patent Information
- Application Number
- CN202411292907.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-14
- Publication Date
- 2024-12-10
AI Technical Summary
In the prior art, the same GNSS chip cannot be used in dual-band and multi-channel application scenarios at the same time, resulting in the need to develop chips with different functions, increasing production and management costs and reducing the versatility of the chip.
By performing feed and bias settings in the GNSS dual-frequency receiver that meets preset requirements, it can be used as an intermediate frequency amplifier or switch to switch the mixing structure, thereby switching in different application scenarios It is a single-stage or double-stage mixed frequency structure.
The compatibility of the same chip in dual-band and multi-channel application scenarios is achieved, reducing production and management costs, improving the versatility of GNSS chips without the need for additional power consumption.
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Figure CN119105052A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of dual-frequency, multi-channel switchable receivers applied to satellite navigation, and in particular to a dual-frequency, multi-channel switchable receiver system applied to satellite navigation and an implementation method thereof. Background Art
[0002] Current navigation and positioning terminals have two important requirements for Global Navigation Satellite System (GNSS) chips: (1) GNSS chips that cover dual frequency bands to improve positioning accuracy; (2) GNSS chips that cover only a single frequency but have multiple channels for applications such as angle and attitude detection. However, based on current technology, the two are not compatible and require two chips with different RF architectures. The specific analysis is as follows:
[0003] For single-frequency multi-channel applications, each channel of the GNSS chip's RF receiver uses the same circuit design, using a single-stage mixer architecture to down-convert the navigation signal to an intermediate frequency signal for baseband processing. The architecture block diagram is shown in the figure. Figure 1 shown.
[0004] For dual-frequency applications, the RF receiver should be able to cover the high and low frequency bands of various GNSS signals, such as the L1 band (center frequency 1575MHz) and L5 band (center frequency 1176MHz) of the GPS navigation system; the B1 band (center frequency 1575MHz) and B2 band (center frequency 1189MHz) of the Beidou navigation system. Figure 1 The first-stage mixer mixing structure has a high frequency of the intermediate frequency signal of one sideband, so the sampling rate of the ADC is required to be increased. However, due to the increasingly stringent requirements of the area and power consumption of GNSS chips, this solution cannot meet the needs of modern technology. Therefore, for dual-frequency receiver applications, the typical GNSS receiver architecture is as follows: Figure 2 As shown, L1 adopts a one-stage mixing structure, and L5 adopts a one- or two-stage mixing structure to reduce the frequency of the intermediate frequency signal to a range acceptable to the ADC.
[0005] Figure 1 and Figure 2 Different architectures mean that the same chip cannot be used for both dual-frequency and multi-channel applications. The traditional approach is to develop chips with corresponding functions according to different requirements, which increases production and management costs and reduces the versatility of a single GNSS chip. Summary of the Invention
[0006] The main purpose of the present invention is to solve the technical problem in the prior art that the same chip cannot be used for dual-frequency and multi-channel application scenarios at the same time.
[0007] A first aspect of the present invention provides a method for implementing a dual-frequency multi-channel switchable receiver for satellite navigation, comprising:
[0008] Setting the feed and bias of a second-stage mixer in a GNSS dual-frequency receiver to meet preset requirements so that the second-stage mixer can be used as an intermediate frequency amplifier or switch.
[0009] When the second-stage mixer is used as an intermediate frequency amplifier or a switch, the two-stage mixing structure of the GNSS dual-frequency receiver is switched to a single-stage mixing structure.
[0010] Optionally, in a first implementation of the first aspect of the present invention, when the receiver is a GNSS dual-frequency receiver, the external control signal SW of the second-stage mixer is set to a high level, and the second-stage mixer currently works as a mixer to provide an intermediate frequency signal.
[0011] Optionally, in a second implementation of the first aspect of the present invention, when the receiver is a single-frequency dual-channel receiver, the external control signal SW of the second-stage mixer is set to a low level. The second-stage mixer currently works as an amplifier to amplify the signal mixed by the first-stage mixer, and both signal chains operate in the same frequency band.
[0012] Optionally, in a third implementation of the first aspect of the present invention, when the receiver is a GNSS dual-frequency receiver, the external control signal SW of the second-stage mixer is set to a high level, and the second-stage mixer currently operates as a mixer to provide an intermediate frequency signal, including: the second-stage mixer includes: a power supply VDD, an external control signal SW, an inverter U1A, a local oscillator signal, a bias voltage, a transistor, a resistor, and a capacitor;
[0013] The external control signal SW controls switches U2A, U6A, U5A, U7A, U3A, and U4A, and is connected to the input of inverter U1A. The output of inverter U1A is opposite to the external control signal SW.
[0014] When the external control signal SW is high, the switches U2A, U6A, U5A, and U7A are turned on, and the switches U3A and U4A are turned off; the local oscillator signal L0_P is fed into the gates of transistors Q1 and Q6 via switch U6A; the local oscillator signal L0_N is fed into the gates of transistors Q2 and Q4 via switch U7A; the bias voltage BIAS1 is connected to the resistor R3 via switch U2A to provide a DC bias for transistor Q1; the bias voltage BIAS2 is connected to the resistor R4 via switch U5A to provide a DC bias for transistor Q6;
[0015] Currently, the second-stage mixer works as a mixer, mixing the RF signals RF_P and RF_N fed through capacitors C3 and C4 with local oscillator signals L0_P and L0_N to generate intermediate frequency signals, and outputs them to the intermediate frequency circuit through capacitors C1 and C2.
[0016] Optionally, in a fourth implementation of the first aspect of the present invention, when the receiver is a single-frequency dual-channel receiver, the external control signal SW of the second-stage mixer is set to a low level, and the second-stage mixer currently operates as an amplifier to amplify the signal mixed by the first-stage mixer, and both signal chains operate in the same frequency band, including:
[0017] When the external control signal SW is at a low level, the switches U2A, U6A, U5A, and U7A are disconnected, and the switches U3A and U4A are connected; when the switch U4A is turned on, one end of the resistor R4 is connected to the ground through U4A, and the other end is connected to the gates of the transistors Q2 and Q4. The gates of the transistors Q2 and Q4 are at ground potential, which is equivalent to an open switch, and the signal cannot continue to propagate through the transistors Q2 and Q4; when the switch U3A is turned on, one end of the resistor R3 is connected to the power supply voltage VDD through U3A, and the other end is connected to the gates of the transistors Q1 and Q6; here, the gates of the transistors Q1 and Q6 are at the power supply voltage VDD, and the drains and sources of the transistors Q1 and Q6 are connected, which is equivalent to a closed switch, and no longer has the mixing function;
[0018] The resistor R1 and the transistor Q3 , as well as the resistor R3 and the transistor Q5 , respectively form common-source amplifiers to amplify the output signals RF_P and RF_N and output them through the capacitors C2 and C1 .
[0019] A second aspect of the present invention provides a dual-frequency multi-channel switchable receiver system for satellite navigation, comprising:
[0020] A setting module is used to set the feeding and bias of the second-stage mixer in the GNSS dual-frequency receiver to meet preset requirements, so that the current second-stage mixer is used as an intermediate frequency amplifier or a switch;
[0021] The switching module is used to switch the two-stage mixing structure of the GNSS dual-frequency receiver to a single-stage mixing structure when the current second-stage mixer is used as an intermediate frequency amplifier or a switch.
[0022] Optionally, in a first implementation method of the second aspect of the present invention, the setting module includes: when the receiver is a GNSS dual-frequency receiver, the external control signal SW of the second-stage mixer is set to a high level, and the second-stage mixer currently works as a mixer to provide an intermediate frequency signal.
[0023] Optionally, in a second implementation of the second aspect of the present invention, the setting module includes: when the receiver is a single-frequency dual-channel receiver, the external control signal SW of the second-stage mixer is set to a low level, and the second-stage mixer currently works as an amplifier to amplify the signal mixed by the first-stage mixer, and both signal chains operate in the same frequency band.
[0024] Optionally, in a third implementation of the second aspect of the present invention, when the receiver is a GNSS dual-frequency receiver, the external control signal SW of the second-stage mixer is set to a high level, and the second-stage mixer currently operates as a mixer to provide an intermediate frequency signal, including: the second-stage mixer includes: a power supply VDD, an external control signal SW, an inverter U1A, a local oscillator signal, a bias voltage, a transistor, a resistor, and a capacitor;
[0025] The external control signal SW controls switches U2A, U6A, U5A, U7A, U3A, and U4A, and is connected to the input of inverter U1A. The output of inverter U1A is opposite to the external control signal SW.
[0026] When the external control signal SW is high, the switches U2A, U6A, U5A, and U7A are turned on, and the switches U3A and U4A are turned off; the local oscillator signal L0_P is fed into the gates of transistors Q1 and Q6 via switch U6A; the local oscillator signal L0_N is fed into the gates of transistors Q2 and Q4 via switch U7A; the bias voltage BIAS1 is connected to the resistor R3 via switch U2A to provide a DC bias for transistor Q1; the bias voltage BIAS2 is connected to the resistor R4 via switch U5A to provide a DC bias for transistor Q6;
[0027] Currently, the second-stage mixer works as a mixer, mixing the RF signals RF_P and RF_N fed through capacitors C3 and C4 with local oscillator signals L0_P and L0_N to generate intermediate frequency signals, and outputs them to the intermediate frequency circuit through capacitors C1 and C2.
[0028] Optionally, in a fourth implementation of the second aspect of the present invention, when the receiver is a single-frequency dual-channel receiver, the external control signal SW of the second-stage mixer is set to a low level, and the second-stage mixer currently operates as an amplifier to amplify the signal mixed by the first-stage mixer, and both signal chains operate in the same frequency band, including:
[0029] When the external control signal SW is at a low level, the switches U2A, U6A, U5A, and U7A are disconnected, and the switches U3A and U4A are connected; when the switch U4A is turned on, one end of the resistor R4 is connected to the ground through U4A, and the other end is connected to the gates of the transistors Q2 and Q4. The gates of the transistors Q2 and Q4 are at ground potential, which is equivalent to an open switch, and the signal cannot continue to propagate through the transistors Q2 and Q4; when the switch U3A is turned on, one end of the resistor R3 is connected to the power supply voltage VDD through U3A, and the other end is connected to the gates of the transistors Q1 and Q6; here, the gates of the transistors Q1 and Q6 are at the power supply voltage VDD, and the drains and sources of the transistors Q1 and Q6 are connected, which is equivalent to a closed switch, and no longer has the mixing function;
[0030] The resistor R1 and the transistor Q3 , as well as the resistor R3 and the transistor Q5 , respectively form common-source amplifiers to amplify the output signals RF_P and RF_N and output them through the capacitors C2 and C1 .
[0031] Compared with the prior art, the present invention has the following beneficial effects:
[0032] 1. The present invention can avoid the need to develop chips with corresponding functions according to different requirements. By setting the power supply and bias of a single chip, a GNSS navigation chip can be configured for dual-frequency or multi-channel application scenarios.
[0033] 2. The dual-frequency, multi-channel, switchable receiver for satellite navigation provided by the present invention reduces production and management costs and improves the versatility of a single GNSS chip.
[0034] 3. The present invention enables the two-stage mixing structure of a dual-frequency receiver to be switched to a single-stage mixing structure without adding additional power consumption design. BRIEF DESCRIPTION OF THE DRAWINGS
[0035] Other features, objects and advantages of the present invention will become more apparent upon reading the detailed description of non-limiting embodiments with reference to the following drawings:
[0036] Figure 1 Schematic diagram of a traditional single-frequency multi-channel receiver.
[0037] Figure 2 Schematic diagram of a typical GNSS dual-frequency receiver architecture.
[0038] Figure 3 FIG. 1 is a schematic diagram of a dual-frequency multi-channel switchable receiver applied to satellite navigation in this embodiment.
[0039] Figure 4 This is the principle diagram of the second-stage mixer in this embodiment. DETAILED DESCRIPTION
[0040] The embodiment of the present invention provides a dual-frequency multi-channel switchable receiver system and implementation method for satellite navigation, wherein the second-stage mixer in the GNSS dual-frequency receiver is fed and biased to meet preset requirements so that the second-stage mixer is currently used as an intermediate frequency amplifier or switch; when the second-stage mixer is currently used as an intermediate frequency amplifier or switch, the two-stage mixing structure of the GNSS dual-frequency receiver is switched to a single-stage mixing structure. When the receiver is a GNSS dual-frequency receiver, the external control signal SW of the second-stage mixer is set to a high level, and the second-stage mixer currently works as a mixer to provide an intermediate frequency signal. When the receiver is a single-frequency dual-channel receiver, the external control signal SW of the second-stage mixer is set to a low level, and the second-stage mixer currently works as an amplifier to amplify the signal mixed by the first-stage mixer, and both signal chains operate in the same frequency band. The present invention solves the technical problem in the prior art that the same chip cannot be used for dual-frequency and multi-channel application scenarios at the same time.
[0041] The terms "first," "second," "third," "fourth," and the like (if any) in the description and claims of the present invention and in the accompanying drawings are used to distinguish similar objects and are not necessarily used to describe a particular order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate so that the embodiments described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "including" or "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product, or apparatus that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units that are not explicitly listed or that are inherent to these processes, methods, products, or apparatus.
[0042] For ease of understanding, the specific process of the embodiment of the present invention is described below. Figure 1 As shown, a first embodiment of a method for implementing a dual-frequency multi-channel switchable receiver for satellite navigation according to an embodiment of the present invention includes:
[0043] 101. Setting a feed and bias that meets preset requirements for a second-stage mixer in a GNSS dual-frequency receiver, so that the second-stage mixer can be used as an intermediate frequency amplifier or switch;
[0044] 102. When the second-stage mixer is used as an intermediate frequency amplifier or a switch, the two-stage mixing structure of the GNSS dual-frequency receiver is switched to a single-stage mixing structure.
[0045] In this embodiment, when the receiver is a GNSS dual-frequency receiver, the external control signal SW of the second-stage mixer is set to a high level, and the second-stage mixer currently operates as a mixer, providing an intermediate frequency signal. When the receiver is a single-frequency dual-channel receiver, the external control signal SW of the second-stage mixer is set to a low level, and the second-stage mixer currently operates as an amplifier, amplifying the signal mixed by the first-stage mixer. Both signal chains operate in the same frequency band.
[0046] The second-stage mixer includes: a power supply VDD, an external control signal SW, an inverter U1A, a local oscillator signal, a bias voltage, a transistor, a resistor, and a capacitor;
[0047] The external control signal SW controls switches U2A, U6A, U5A, U7A, U3A, and U4A, and is connected to the input of inverter U1A. The output of inverter U1A is opposite to the external control signal SW.
[0048] When the external control signal SW is at a high level, the switches U2A, U6A, U5A, and U7A are turned on, and the switches U3A and U4A are turned off; the local oscillator signal L0_P is fed into the gates of transistors Q1 and Q6 through the switch U6A; the local oscillator signal L0_N is fed into the gates of transistors Q2 and Q4 through the switch U7A; the bias voltage BIAS1 is connected to the resistor R3 through the switch U2A to provide a DC bias for the transistor Q1; the bias voltage BIAS2 is connected to the resistor R4 through the switch U5A to provide a DC bias for the transistor Q6;
[0049] Currently, the second-stage mixer works as a mixer, mixing the RF signals RF_P and RF_N fed through capacitors C3 and C4 with local oscillator signals L0_P and L0_N to generate intermediate frequency signals, and outputs them to the intermediate frequency circuit through capacitors C1 and C2.
[0050] When the external control signal SW is at a low level, the switches U2A, U6A, U5A, and U7A are disconnected, and the switches U3A and U4A are connected; when the switch U4A is turned on, one end of the resistor R4 is connected to the ground through U4A, and the other end is connected to the gates of the transistors Q2 and Q4. The gates of the transistors Q2 and Q4 are at ground potential, which is equivalent to an open switch, and the signal cannot continue to propagate through the transistors Q2 and Q4; when the switch U3A is turned on, one end of the resistor R3 is connected to the power supply voltage VDD through U3A, and the other end is connected to the gates of the transistors Q1 and Q6; here, the gates of the transistors Q1 and Q6 are at the power supply voltage VDD, and the drains and sources of the transistors Q1 and Q6 are connected, which is equivalent to a closed switch, and no longer has the mixing function;
[0051] The resistor R1 and the transistor Q3 , as well as the resistor R3 and the transistor Q5 , respectively form common-source amplifiers to amplify the output signals RF_P and RF_N and output them through the capacitors C2 and C1 .
[0052] The above describes the implementation method of the dual-frequency multi-channel switchable receiver applied to satellite navigation in the embodiment of the present invention. The following describes the dual-frequency multi-channel switchable receiver system applied to satellite navigation in the embodiment of the present invention. Figure 3-4 In one embodiment of the present invention, a dual-frequency multi-channel switchable receiver system for satellite navigation includes:
[0053] like Figure 3 As shown in Figure 1, the second mixer U3 of channel L5 can be used as an intermediate frequency amplifier or switch through special design, and no longer used as a mixer. When used as an intermediate frequency amplifier or switch, its structure is the same as Figure 1 The dual-channel receivers shown are identical, so that the original dual-frequency receiver covering L1 and L5 becomes a single-frequency dual-channel receiver.
[0054] Figure 4 yes Figure 3 The circuit schematic of the second-stage mixer in the dual-band application is used as the second-stage mixer of the L5 channel of the dual-band receiver. At this time, the SW signal is high, so switches U2A and U5A are turned on, and voltages BIAS1 and BIAS2 are configured to form the bias voltages required for Q1, Q2, Q4, and Q6. At the same time, U3A and U4A are disconnected, and switches U6A and U7A are turned on. The two local oscillator signals LO_P and LO_N are fed into the gates of Q1, Q2, Q4, and Q6. The device operates in mixer mode. Figure 3 The differential signal after mixing in U2 is fed into the mixer through the RF_P and RF_N terminals, and mixed with the local oscillator signal to generate a secondary mixed intermediate frequency signal.
[0055] When used as a single-frequency dual-channel receiver, the SW control signal is set to a low level, switches U2A and U5A are disconnected, bias voltages BIAS1 and BIAS2 are invalid, and U6A and U7A are disconnected. Local oscillator signals LO_P and LO_N cannot be fed into the gates of transistors Q1, Q2, Q4, and Q6. At this time, switch U4A is turned on, and the gates of Q2 and Q4 are grounded through resistor R4, so the signal chain where Q2 and Q4 are located is disconnected. U3A is turned on, and the gates of Q1 and Q6 are connected to the power supply voltage VDD through resistor R3, so the signal chain where Q1 and Q6 are located is connected. At this time, the device no longer works as a mixer, but two common-source amplifiers composed of Q3, R1 and Q5, R2 respectively. Its function changes from a mixer to an intermediate frequency signal amplifier, and the intermediate frequency signal is generated by Figure 3The RF_P and RF_N after mixing in U2 are fed into the circuit, and after passing through the Q3 and Q5 amplifiers, they are output by I F_P and I F_N to the next stage circuit.
[0056] A second embodiment of a dual-frequency multi-channel switchable receiver system for satellite navigation according to an embodiment of the present invention includes:
[0057] Q1, Q2, Q3 and Q4, Q5, and Q6 form the core of the circuit. Depending on different feeding methods, they can be used as mixers or amplifiers. R1 is connected to the drains of Q1 and Q4, and R2 is connected to the drains of Q2 and Q6. R1 and R2 serve as loads of the mixer or amplifier, providing gain for the mixer or amplifier.
[0058] C1 and C2 are connected to the drains of Q2 and Q6 respectively and serve as output DC blocking capacitors. The DC component of the signal passing through C1 and C2 is filtered out, leaving only the mixed or amplified RF AC signal.
[0059] C3 and C4 are connected to the gates of Q3 and Q5 respectively and serve as input DC blocking capacitors. The DC component of the signal passing through C3 and C4 is filtered out, leaving only the mixed-frequency AC signal.
[0060] R3, R4, R5, and R6 are bias resistors that provide DC bias for Q1, Q2, Q3, Q4, Q5, and Q6.
[0061] SW is an external control signal used to control switches U2A, U6A, U5A, and U7A. It is connected to the input of an inverter, U1A, whose output is the inverse of the SW signal. When SW is high, U2A, U6A, U5A, and U7A are turned on, while U3A and U4A are turned off. Local oscillator signals LO_P and LO_N are fed to the gates of transistors Q1, Q6, and Q2, Q4 via U6A and U7A. Bias voltages BIAS1 and BIAS2 are connected to resistors R3 and R4 via U2A and U5A to provide DC bias for Q1 and Q6. At this point, the device operates in mixer mode. RF signals RF_P and RF_N, fed through C3 and C4, are mixed with the local oscillator signals LO_P and LO_N to generate an intermediate frequency (IF) signal, which is then output to the IF circuit via C1 and C2.
[0062] When SW is at a low level, the switch U4A is turned on, one end of the resistor R4 is connected to the ground through U4A, and the other end is connected to the gates of Q2 and Q4. Therefore, the gates of Q2 and Q4 are at ground potential, which is equivalent to a disconnected switch, and the signal cannot continue to propagate through Q2 and Q4.
[0063] When SW is low, U2A, U6A, U5A, and U7A are disconnected, and DC biases BIAS1 and BIAS2, local oscillator signals LO_P and LO_N, and the gates of Q1, Q6, Q2, and Q4 are disconnected. Switch U3A is turned on, and one end of resistor R3 is connected to the power supply voltage VDD through U3A, while the other end is connected to the gates of Q1 and Q6. At this point, the gates of Q1 and Q6 are at the power supply voltage VDD, and the drains and sources of Q1 and Q6 are connected, equivalent to closed switches. The devices no longer have a mixing function, and resistors R1 and Q3, and resistors R2 and Q5, respectively, form common-source amplifiers that amplify the input signals RF_P and RF_N and output them through capacitors C2 and C1.
[0064] according to Figure 3 When this chip is used in a GNSS dual-frequency receiver, SW is set to a high level, U3 works as a mixer, and provides an intermediate frequency signal for the L5 channel; when this chip is used in a GNSS single-frequency dual-channel receiver, SW is set to a low level, U3 works as an amplifier, and amplifies the signal after U1 mixing. Both signal chains work in the same frequency band.
[0065] In summary, this solution avoids the need to develop chips with corresponding functions according to different needs. Through special circuit design, a single chip can be configured as a GNSS navigation chip for dual-frequency or multi-channel application scenarios.
[0066] The present invention also provides a computer-readable storage medium, which may be a non-volatile computer-readable storage medium or a volatile computer-readable storage medium. The computer-readable storage medium stores instructions, which, when executed on a computer, cause the computer to execute the steps of a method for implementing a dual-frequency, multi-channel, switchable receiver for satellite navigation.
[0067] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described systems, devices, and units can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.
[0068] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.
[0069] As described above, the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that the technical solutions described in the above embodiments can still be modified, or some of the technical features thereof can be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A method for implementing a dual-frequency multi-channel switchable receiver for satellite navigation, It is characterized in that include: Feeding and biasing the second mixer in the GNSS dual-frequency receiver to meet preset requirements, so that the second mixer can be used as an intermediate frequency amplifier or a switch; When the second-stage mixer is used as an intermediate frequency amplifier or a switch, the two-stage mixing structure of the GNSS dual-frequency receiver is switched to a single-stage mixing structure.
2. The method for implementing a dual-frequency multi-channel switchable receiver for satellite navigation according to claim 1, It is characterized in that When the receiver is a GNSS dual-frequency receiver, the external control signal SW of the second-stage mixer is set to a high level, and the second-stage mixer currently works as a mixer to provide an intermediate frequency signal.
3. The method for implementing a dual-frequency multi-channel switchable receiver for satellite navigation according to claim 1, It is characterized in that When the receiver is a single-frequency dual-channel receiver, the external control signal SW of the second-stage mixer is set to a low level. The second-stage mixer currently works as an amplifier to amplify the signal mixed by the first-stage mixer. Both signal chains work in the same frequency band.
4. The method for implementing a dual-frequency multi-channel switchable receiver for satellite navigation according to claim 2, It is characterized in that When the receiver is a GNSS dual-frequency receiver, the external control signal SW of the second-stage mixer is set to a high level, and the second-stage mixer currently works as a mixer to provide an intermediate frequency signal, including: the second-stage mixer includes: a power supply VDD, an external control signal SW, an inverter U1A, a local oscillator signal, a bias voltage, a transistor, a resistor, and a capacitor; The external control signal SW controls switches U2A, U6A, U5A, U7A, U3A and U4A, and is connected to the input end of the inverter U1A, and the output of the inverter U1A is opposite to the external control signal SW; When the external control signal SW is at a high level, the switches U2A, U6A, U5A, and U7A are turned on, and the switches U3A and U4A are turned off; the local oscillator signal L0_P is fed into the gates of the transistors Q1 and Q6 through the switch U6A; the local oscillator signal L0_N is fed into the gates of the transistors Q2 and Q4 through the switch U7A; the bias voltage BIAS1 is connected to the resistor R3 through the switch U2A to provide a DC bias for the transistor Q1; the bias voltage BIAS2 is connected to the resistor R4 through the switch U5A to provide a DC bias for the transistor Q6; Currently, the second-stage mixer works as a mixer, mixing the radio frequency signals RF_P and RF_N fed through the capacitors C3 and C4 with the local oscillator signals L0_P and L0_N to generate intermediate frequency signals, and outputs them to the intermediate frequency circuit through the capacitors C1 and C2.
5. The method for implementing a dual-frequency multi-channel switchable receiver for satellite navigation according to claim 4, It is characterized in that When the receiver is a single-frequency dual-channel receiver, the external control signal SW of the second-stage mixer is set to a low level. The second-stage mixer currently works as an amplifier to amplify the signal mixed by the first-stage mixer. Both signal chains work in the same frequency band, including: When the external control signal SW is at a low level, the switches U2A, U6A, U5A, and U7A are disconnected, and the switches U3A and U4A are connected; when the switch U4A is turned on, one end of the resistor R4 is connected to the ground through U4A, and the other end is connected to the gates of the transistors Q2 and Q4. The gates of the transistors Q2 and Q4 are at the ground potential, which is equivalent to a disconnected switch, and the signal cannot continue to propagate through the transistors Q2 and Q4; when the switch U3A is turned on, one end of the resistor R3 is connected to the power supply voltage VDD through U3A, and the other end is connected to the gates of the transistors Q1 and Q6; here, the gates of the transistors Q1 and Q6 are the power supply voltage VDD, and the drains and sources of the transistors Q1 and Q6 are connected, which is equivalent to a closed switch, and no longer has a mixing function; The resistor R1 and the transistor Q3, and the resistor R3 and the transistor Q5 respectively form a common source amplifier, which amplifies the output signals RF_P and RF_N and then outputs them through the capacitors C2 and C1.
6. A dual-frequency multi-channel switchable receiver system for satellite navigation, It is characterized in that include: A setting module, used for setting the feeding and biasing of the second-stage mixer in the GNSS dual-frequency receiver to meet preset requirements, so that the current second-stage mixer is used as an intermediate frequency amplifier or a switch; The switching module is used to switch the two-stage mixing structure of the GNSS dual-frequency receiver to a single-stage mixing structure when the second-stage mixer is currently used as an intermediate frequency amplifier or a switch.
7. The dual-frequency multi-channel switchable receiver system for satellite navigation according to claim 6, It is characterized in that The setting module includes: when the receiver is a GNSS dual-frequency receiver, the external control signal SW of the second-stage mixer is set to a high level, and the second-stage mixer currently works as a mixer to provide an intermediate frequency signal.
8. The dual-frequency multi-channel switchable receiver system for satellite navigation according to claim 6, It is characterized in that The setting module includes: when the receiver is a single-frequency dual-channel receiver, the external control signal SW of the second-stage mixer is set to a low level. Currently, the second-stage mixer works as an amplifier to amplify the signal mixed by the first-stage mixer, and both signal links work in the same frequency band.
9. The dual-frequency multi-channel switchable receiver system for satellite navigation according to claim 7, It is characterized in that When the receiver is a GNSS dual-frequency receiver, the external control signal SW of the second-stage mixer is set to a high level, and the second-stage mixer currently works as a mixer to provide an intermediate frequency signal, including: the second-stage mixer includes: a power supply VDD, an external control signal SW, an inverter U1A, a local oscillator signal, a bias voltage, a transistor, a resistor, and a capacitor; The external control signal SW controls switches U2A, U6A, U5A, U7A, U3A and U4A, and is connected to the input end of the inverter U1A, and the output of the inverter U1A is opposite to the external control signal SW; When the external control signal SW is at a high level, the switches U2A, U6A, U5A, and U7A are turned on, and the switches U3A and U4A are turned off; the local oscillator signal L0_P is fed into the gates of the transistors Q1 and Q6 through the switch U6A; the local oscillator signal L0_N is fed into the gates of the transistors Q2 and Q4 through the switch U7A; the bias voltage BIAS1 is connected to the resistor R3 through the switch U2A to provide a DC bias for the transistor Q1; the bias voltage BIAS2 is connected to the resistor R4 through the switch U5A to provide a DC bias for the transistor Q6; Currently, the second-stage mixer works as a mixer, mixing the radio frequency signals RF_P and RF_N fed through the capacitors C3 and C4 with the local oscillator signals L0_P and L0_N to generate intermediate frequency signals, and outputs them to the intermediate frequency circuit through the capacitors C1 and C2.
10. The dual-frequency multi-channel switchable receiver system for satellite navigation according to claim 9, It is characterized in that When the receiver is a single-frequency dual-channel receiver, the external control signal SW of the second-stage mixer is set to a low level. The second-stage mixer currently works as an amplifier to amplify the signal mixed by the first-stage mixer. Both signal chains work in the same frequency band, including: When the external control signal SW is at a low level, the switches U2A, U6A, U5A, and U7A are disconnected, and the switches U3A and U4A are connected; when the switch U4A is turned on, one end of the resistor R4 is connected to the ground through U4A, and the other end is connected to the gates of the transistors Q2 and Q4. The gates of the transistors Q2 and Q4 are at the ground potential, which is equivalent to a disconnected switch, and the signal cannot continue to propagate through the transistors Q2 and Q4; when the switch U3A is turned on, one end of the resistor R3 is connected to the power supply voltage VDD through U3A, and the other end is connected to the gates of the transistors Q1 and Q6; here, the gates of the transistors Q1 and Q6 are the power supply voltage VDD, and the drains and sources of the transistors Q1 and Q6 are connected, which is equivalent to a closed switch, and no longer has a mixing function; The resistor R1 and the transistor Q3, and the resistor R3 and the transistor Q5 respectively form a common source amplifier, which amplifies the output signals RF_P and RF_N and then outputs them through the capacitors C2 and C1.
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Reconfigurable radio frequency receiving device and radio frequency reconstruction method
CN121232216A
