Low-dropout linear voltage stabilizing circuit, low-dropout linear voltage regulator and electronic equipment

Abstract

The invention discloses a low-dropout linear voltage stabilizing circuit, a low-dropout linear voltage regulator and electronic equipment, and relates to the technical field of integrated circuits. A basic low-dropout linear voltage stabilization unit is connected with a low-voltage stabilization unit; the basic low-dropout linear voltage stabilization unit is configured to generate an output voltage by utilizing the low-voltage stabilization unit; the low-voltage stabilization unit is configured to reduce the impedance of two non-dominant poles in the basic low-dropout linear voltage stabilization unit so as to improve the loop bandwidth and enhance the loop stability. The low-dropout linear voltage stabilizing circuit is made by adopting a 180nm process, can be externally hung with a high-capacity capacitor, works at the temperature of 77K-300K, and meets the load current of 0-50mA. The low-dropout linear voltage stabilizing circuit is higher in output driving capability. And the stability of the FVF loop is enhanced, so that a high-capacity capacitor can be externally hung at the output end, the overshoot during transient response is reduced, the impact resistance is relatively high, and the output noise is also reduced to a certain extent.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a low voltage drop linear voltage regulator circuit, a low voltage drop linear regulator and an electronic device. Background Art

[0002] At present, some traditional LDO (Low Dropout Regulator) circuits based on FVF (Flipped Voltage Follower) structure can realize the function of output following input, and have low output impedance and strong output driving capability. However, their output voltage swing is small, making it difficult to achieve the effect of low voltage following.

[0003] In order to solve the above problems, another solution is to add a buffer before the power tube. However, due to process limitations, the output end of the LDO of this architecture can only be connected to a smaller capacitor, otherwise it will affect the stability of the FVF loop. Therefore, the output capacitance of this LDO structure is generally in the picofarad (pF) level, and the ability to resist shock is relatively small and greatly limited. Summary of the invention

[0004] In view of the above problems, the present invention provides a low voltage drop linear voltage regulator circuit, a low voltage drop linear regulator and an electronic device that solve the above problems or partially solve the above problems.

[0005] A first aspect of an embodiment of the present invention provides a low voltage difference linear voltage stabilization circuit, the low voltage difference linear voltage stabilization circuit comprising: a basic low voltage difference linear voltage stabilization unit and a low voltage stabilization unit; The basic low voltage difference linear voltage stabilizing unit is connected to the low voltage stabilizing unit; The basic low-dropout linear voltage stabilization unit is configured to generate an output voltage using the low voltage stabilization unit, and the output voltage can follow the input voltage of the low voltage; The low voltage stabilization unit is configured to reduce the impedance of two non-main poles in the basic low voltage drop linear voltage stabilization unit to increase the loop bandwidth and enhance the loop stability; The low voltage difference linear voltage regulator circuit is manufactured by 180nm process, can be externally connected with large-capacity capacitors, operates at a temperature of 77K~300K, and meets a load current of 0~50mA.

[0006] Optionally, the basic low voltage difference linear voltage stabilizing unit comprises: an error amplification structure, a voltage generation structure, and a flip voltage follower structure; The error amplification structure is used to amplify the input voltage so that the voltage of the middle node of the voltage generation structure is equal to the input voltage; The voltage generating structure is used to generate a target bias voltage so that the output voltage generated by the flip voltage follower structure is equal to the voltage of the intermediate node.

[0007] Optionally, the error amplification structure includes: an error amplifier; the voltage generation structure includes: a first transistor, a third transistor, and a fifth transistor; the flip voltage follower structure includes: a second transistor, a fourth transistor, and a pass transistor; The inverting terminal of the error amplifier is connected to the first terminal of the third transistor and the third terminal of the fifth transistor respectively, the non-inverting terminal receives the input voltage, and the third terminal of the fifth transistor is the intermediate node; The output end of the error amplifier is connected to the second end of the third transistor and the second end of the fourth transistor respectively, and the output end of the error amplifier generates the target bias voltage; The first terminal of the fifth transistor receives a power supply voltage, and the second terminal receives a first bias voltage; The third end of the third transistor is connected to the third end and the second end of the first transistor and the second end of the second transistor respectively; A first terminal of the first transistor is grounded; The first end of the pass transistor receives the power supply voltage, the second end is connected to the low voltage stabilizing unit, and the third end is connected to the first end of the fourth transistor, and the first end of the fourth transistor outputs the output voltage as a main pole; The third end of the fourth transistor is connected to the third end of the second transistor and the low voltage stabilizing unit respectively; A first terminal of the second transistor is grounded.

[0008] Optionally, the error amplification structure includes: an error amplifier; the voltage generation structure includes: a first transistor, a third transistor, a fifth transistor and a grounding capacitor; the flip voltage follower structure includes: a second transistor, a fourth transistor and a pass transistor The inverting terminal of the error amplifier is connected to the first terminal of the third transistor and the third terminal of the fifth transistor respectively, the non-inverting terminal receives the input voltage, and the third terminal of the fifth transistor is the intermediate node; The output end of the error amplifier is connected to the second end of the third transistor, the second end of the fourth transistor, and the first end of the grounding capacitor respectively, and the output end of the error amplifier generates the target bias voltage; The second end of the grounding capacitor is grounded; The first terminal of the fifth transistor receives a power supply voltage, and the second terminal receives a first bias voltage; The third end of the third transistor is connected to the third end and the second end of the first transistor and the second end of the second transistor respectively; A first terminal of the first transistor is grounded; The first end of the pass transistor receives the power supply voltage, the second end is connected to the low voltage stabilizing unit, the third end is connected to the first end of the fourth transistor, and the first end of the fourth transistor outputs the output voltage as a main pole; The third end of the fourth transistor is connected to the third end of the second transistor and the low voltage stabilizing unit respectively; A first terminal of the second transistor is grounded.

[0009] Optionally, the low voltage stabilization unit includes: a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor and a tenth transistor; The first terminal of the sixth transistor receives the power supply voltage; The second end of the sixth transistor is connected to the third end of the sixth transistor, the second end of the pass transistor, the first end of the seventh transistor, the third end of the ninth transistor, and the third end of the tenth transistor, respectively, and the third end of the sixth transistor is the second non-main pole of the two non-main poles; The second end of the seventh transistor is connected to the third end of the fourth transistor, and the second end of the seventh transistor is the first non-main pole of the two non-main poles; The third end of the seventh transistor is connected to the third end of the eighth transistor and the second end of the ninth transistor respectively; The second terminal of the eighth transistor receives a third bias voltage, and the first terminal is grounded; The first terminal of the tenth transistor receives the power supply voltage, and the second terminal receives the second bias voltage; A third terminal of the ninth transistor is grounded.

[0010] Optionally, the basic low voltage drop linear voltage regulator unit utilizes the gain negative feedback characteristic of the operational amplifier to make the voltage of the intermediate node equal to the input voltage; The first transistor and the second transistor have matching characteristics, and the third transistor and the fourth transistor have matching characteristics, so that the output voltage is equal to the voltage of the intermediate node, and then the output voltage is equal to the input voltage.

[0011] Optionally, the gate-source voltage of the sixth transistor and the seventh transistor is used to reduce the voltage of the first non-main pole, so that the output voltage can follow a lower input voltage; Using the characteristics of the sixth transistor and the ninth transistor, the current flowing through the sixth transistor and the ninth transistor changes adaptively with the change of the load current; The low voltage stabilization unit is used to reduce the impedance of the second non-main pole to pull the pole of the second non-main pole farther away, and the parameters of the second transistor and the fourth transistor are adjusted respectively so that the zero poles between the first non-main pole and the binding line zero point cancel each other, thereby increasing the loop bandwidth and enhancing the loop stability.

[0012] Optionally, the large-capacitance capacitor has a capacitance greater than μF.

[0013] A second aspect of an embodiment of the present invention provides a low voltage dropout linear regulator, and the low voltage dropout linear regulator comprises: a low voltage dropout linear regulator circuit as described in any one of the first aspects.

[0014] A third aspect of an embodiment of the present invention provides an electronic device, wherein the electronic device includes the low voltage dropout linear regulator as described in the second aspect.

[0015] The low voltage difference linear voltage regulator circuit provided by the present invention includes: a basic low voltage difference linear voltage regulator unit and a low voltage stabilization unit. The basic low voltage difference linear voltage regulator unit is connected to the low voltage stabilization unit; the basic low voltage difference linear voltage regulator unit is configured to generate an output voltage using the low voltage stabilization unit, and the output voltage can follow the input voltage of the low voltage; the low voltage stabilization unit is configured to reduce the impedance of the two non-main poles in the basic low voltage difference linear voltage regulator unit to increase the loop bandwidth and enhance the loop stability. Among them, the low voltage difference linear voltage regulator circuit is made of 180nm process, which can be externally connected with a large-capacity capacitor, works at a temperature of 77K~300K, and meets the load current of 0~50mA.

[0016] The low-voltage difference linear voltage stabilization circuit proposed in the present invention creatively adds a low-voltage stabilization unit on the basis of the traditional FVF structure, realizes the function of buffer, and the load current can withstand light load 0mA to heavy load 50mA. Due to the effect of the low-voltage stabilization unit, the output impedance of the FVF structure is lower than that of the traditional source follower, and the output driving ability is stronger. And the voltage of the first non-main pole is pressed lower, so that the output voltage can achieve a lower input voltage follow. At the same time, the second non-main pole is pulled away by the low-voltage stabilization unit structure. When the load current increases, the pole of the second non-main pole will also be pulled farther, and the zero-pole cancellation between the first non-main pole and the zero point of the binding line is realized, and the stability of the FVF loop is enhanced, so that the output end can be externally connected with a large-capacity capacitor, reduce the overshoot during transient response, have a strong ability to resist shock, and reduce the output noise to a certain extent. The low-voltage difference linear voltage stabilization circuit of the present invention has a high practical value. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the detailed description of the preferred embodiments below. The accompanying drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present invention. Moreover, the same reference symbols are used throughout the accompanying drawings to represent the same components. In the accompanying drawings: Figure 1 This is the traditional LDO circuit structure diagram based on FVF structure; Figure 2 This is another traditional LDO circuit diagram based on FVF structure; Figure 3 It is a modular schematic diagram of a low voltage difference linear voltage stabilization circuit according to an embodiment of the present invention; Figure 4 It is a circuit structure diagram of a relatively good low voltage difference linear voltage stabilizing circuit in an embodiment of the present invention; Figure 5 It is a circuit structure diagram of another preferred low voltage difference linear voltage stabilizing circuit in an embodiment of the present invention. DETAILED DESCRIPTION

[0018] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, are only part of the embodiments of the present invention, not all of the embodiments, and are not used to limit the present invention.

[0019] The inventors have found that some conventional LDO (Low Dropout Regulator) circuits based on FVF (Flipped Voltage Follower) structures, referring to Figure 1 As shown, although it can achieve output V OUT Follow input V IN function, and the output impedance is low, with strong output drive capability. But its output voltage V OUT The swing is small, and it is difficult to achieve the effect of low voltage following. That is, when the input voltage V IN When the voltage is low, the output voltage V OUT Hard to follow.

[0020] In order to solve this problem, another LDO circuit is proposed. Figure 2 As shown in the figure, a buffer is added before the power tube. Since the input capacitance and output resistance of the buffer are generally small, the two non-main poles ( Figure 2 Medium 21 The drain and Mpass The gate of the transistor is pulled further away to improve stability; adding a buffer can effectively 21 The drain voltage decreases, the output voltage V OUT It can achieve lower voltage tracking and increase output swing. However, due to process limitations and the influence of PVT (process, temperature, environment and other factors), the output end of the LDO of this architecture can only be connected with a smaller capacitor ( Figure 2 Medium Capacitor C L ), otherwise it will affect the stability of the FVF loop. Therefore, the LDO structure generally has an output capacitance on the chip, which is generally in the order of a few picofarads (pF), and its ability to resist shock is relatively small and greatly limited.

[0021] In order to solve the above problems, the inventor creatively proposes a low voltage drop linear voltage regulator circuit, a low voltage drop linear voltage regulator and an electronic device of the present invention. The technical solution of the present invention is explained and illustrated in detail below.

[0022] Reference Figure 3 , shows a modular schematic diagram of a low voltage difference linear voltage regulator circuit according to an embodiment of the present invention, and the low voltage difference linear voltage regulator circuit according to the embodiment of the present invention comprises: a basic low voltage difference linear voltage regulator unit and a low voltage stabilization unit. The basic low voltage difference linear voltage regulator unit is connected to the low voltage stabilization unit; the basic low voltage difference linear voltage regulator unit is configured to generate an output voltage using the low voltage stabilization unit, and the output voltage can follow the input voltage of the low voltage.

[0023] The low voltage stabilization unit is configured to reduce the impedance of the two non-main poles in the basic low voltage difference linear voltage stabilization unit to increase the loop bandwidth and enhance the loop stability. Among them, the low voltage difference linear voltage stabilization circuit is made of 180nm process, which can be externally connected with large-capacity capacitors, work at a temperature of 77K~300K, and meet the load current of 0~50mA. That is, the low voltage difference linear voltage stabilization circuit based on the flip voltage follower proposed in the present invention is different from the traditional low voltage difference linear voltage stabilization circuit that cannot be externally connected with large-capacity capacitors, cannot track low voltage input voltage, and can only work under non-low temperature conditions. It can not only be externally connected with large-capacity capacitors, but also can follow lower input voltages, meet the load current conditions and work under low temperature conditions.

[0024] Preferably, the basic low voltage difference linear voltage regulator unit includes: an error amplification structure, a voltage generation structure, and a flip voltage follower structure. The error amplification structure is used to amplify the input voltage so that the voltage of the middle node of the voltage generation structure is equal to the input voltage; the voltage generation structure is used to generate a target bias voltage so that the output voltage generated by the flip voltage follower structure is equal to the voltage of the middle node.

[0025] Specifically, the error amplification structure includes: an error amplifier; the voltage generation structure includes: a first transistor, a third transistor, and a fifth transistor; the grounding capacitor is optional, which is explained in detail below. The flip voltage follower structure includes: a second transistor, a fourth transistor, and a pass transistor; the low voltage stabilization unit includes: a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, and a tenth transistor.

[0026] In order to better understand the connection relationship between the above-mentioned basic error amplification structure, voltage generation structure, flip voltage follower structure and low voltage stabilization unit, refer to Figure 4 The circuit structure diagram of a preferred low voltage difference linear voltage regulator circuit is shown in FIG. Figure 4 The circuit structure diagram without grounding capacitor is shown.

[0027] The inverting terminal of the error amplifier is connected to the first terminal of the third transistor M3 and the third terminal of the fifth transistor M5 respectively, and the non-inverting terminal receives the input voltage V IN , the third terminal of the fifth transistor M5 is the middle node, Figure 4 A is used to represent the intermediate node.

[0028] The output end of the error amplifier is connected to the second end of the third transistor M3 and the second end of the fourth transistor M4 respectively, and the output end of the error amplifier generates a target bias voltage V set The first terminal of the fifth transistor M5 receives the power supply voltage V DD , the second end receives the first bias voltage V BP1 .

[0029] The third end of the third transistor M3 is connected to the third end of the first transistor M1 and the second end of the first transistor M1 and the second end of the second transistor M2 respectively; the first end of the first transistor M1 is grounded.

[0030] Through transistor M PASS The first end receives the power supply voltage V DD The second end is connected to the low voltage stabilization unit, the third end is connected to the first end of the fourth transistor M4, and the first end of the fourth transistor M4 is used as the main pole to output the voltage V OUT .

[0031] The third end of the fourth transistor M4 is connected to the third end of the second transistor M2 and the low voltage stabilizing unit respectively; the first end of the second transistor M2 is grounded. Figure 4 C L Indicates an external large-capacity capacitor.

[0032] Above Figure 4 Since the error amplifier has the characteristic of gain negative feedback, its loop stability is good, so the target bias voltage V setIt is relatively stable and does not require a ground capacitor. set The stability of the output voltage V OUT stability, so if the output voltage V OUT When stability requirements are low, no ground capacitor is required to increase the target bias voltage V set stability, which can reduce the area cost to a certain extent; and if the output voltage V OUT When the stability requirement is very high, an additional ground capacitor is needed to increase the target bias voltage V set The stability of the grounding capacitor is small, and it will occupy a certain area, which slightly increases the area cost.

[0033] Reference Figure 5 Another circuit structure diagram of a low voltage difference linear voltage regulator circuit is shown in FIG. Figure 5 The circuit diagram with grounding capacitor is shown. Figure 5 The inverting terminal of the error amplifier is connected to the first terminal of the third transistor M3 and the third terminal of the fifth transistor M5 respectively, and the non-inverting terminal receives the input voltage V IN , the third terminal of the fifth transistor M5 is the middle node, Figure 5 A is used to represent the intermediate node.

[0034] The output terminal of the error amplifier is connected to the second terminal of the third transistor M3, the second terminal of the fourth transistor M4, and the grounding capacitor C X The first end of the error amplifier is connected to the output end of the error amplifier to generate the target bias voltage V set ; Grounding capacitance C X The second end of the fifth transistor M5 is grounded. The first end of the fifth transistor M5 receives the power supply voltage V DD , the second end receives the first bias voltage V BP1 .

[0035] The third end of the third transistor M3 is connected to the third end of the first transistor M1 and the second end of the first transistor M1 and the second end of the second transistor M2 respectively; the first end of the first transistor M1 is grounded.

[0036] Through transistor M PASS The first end receives the power supply voltage V DD The second end is connected to the low voltage stabilization unit, the third end is connected to the first end of the fourth transistor M4, and the first end of the fourth transistor M4 is used as the main pole to output the voltage V OUT .

[0037] The third end of the fourth transistor M4 is connected to the third end of the second transistor M2 and the low voltage stabilizing unit respectively; the first end of the second transistor M2 is grounded.

[0038] The first terminal of the sixth transistor M6 receives the power supply voltage V DD The second end of the sixth transistor M6 and the third end of the sixth transistor M6, through the transistor M PASS The second end of the seventh transistor M7, the first end of the seventh transistor M7, the third end of the ninth transistor M9, the tenth transistor M 10 The third ends of the sixth transistor M6 are respectively connected, and the third end of the sixth transistor M6 is the second non-main pole of the two non-main poles. Figure 4 , 5 C is used to represent it.

[0039] The second end of the seventh transistor M7 is connected to the third end of the fourth transistor M4, and the second end of the seventh transistor M7 is the first non-main pole of the two non-main poles. Figure 4 , 5 In the figure, they are all represented by B. The third end of the seventh transistor M7 is connected to the third end of the eighth transistor M8 and the second end of the ninth transistor M9 respectively.

[0040] The second terminal of the eighth transistor M8 receives the third bias voltage V BN , the first end is grounded; the tenth transistor M 10 The first end receives the power supply voltage V DD , the second end receives the second bias voltage V BP2 ; The third terminal of the ninth transistor M9 is grounded. Figure 5 C L Indicates an external large-capacity capacitor.

[0041] Since it is necessary to connect a large-capacity capacitor to the output end of the low-voltage difference linear voltage regulator circuit, the capacitance of the large-capacity capacitor is greater than 5uF (a capacitor of the order of microfarad (μF)). If there is no low-voltage stabilization unit, the voltage of the first non-main pole B is higher, resulting in the output voltage V OUT It cannot follow lower input voltages (e.g. voltages below 2.5V), but can only follow higher input voltages. It also needs to be able to work normally under load currents of 0-50mA and temperatures of 77K-300K. OUT That node), so the influence of the binding wire inductance and resistance of the output node needs to be considered, so the entire integrated circuit is more difficult to stabilize when using 180nm process.

[0042] After adding the low voltage stabilization unit, combined with the above Figure 4 , Figure 5 As shown in the circuit structure diagram, the low voltage stabilization unit utilizes the gate-source voltage V GS , can reduce the voltage of the first non-main pole B, thereby making the output voltage V OUTIt can follow a lower input voltage and at the same time utilize the channels of the sixth transistor M6 and the seventh transistor M7 to reduce the impedance of the first non-main pole B.

[0043] At the same time, the characteristics of the sixth transistor M6 and the ninth transistor M9 are utilized so that the current flowing through the sixth transistor M6 and the ninth transistor M9 changes adaptively with the change of the load current, thereby saving the power consumption of the entire circuit.

[0044] The entire low voltage stabilization unit is also used to reduce the impedance of the second non-main pole C, thereby pulling the pole of the second non-main pole C farther away. By adjusting the parameters of the second transistor M2 and the fourth transistor M4 (generally adjusting the width-to-length ratio), the zero poles between the first non-main pole B and the binding zero point (the main node generates the binding zero point) are canceled, thereby enhancing the loop stability of the FVF and increasing the loop bandwidth. When the load current increases, the pole of the second non-main pole C will also be pulled farther away, and the loop will be more stable, so that the external large-capacity capacitor can be better utilized.

[0045] Based on the above low voltage dropout linear voltage regulator circuit, an embodiment of the present invention further provides a low voltage dropout linear voltage regulator, and the low voltage dropout linear voltage regulator includes: any low voltage dropout linear voltage regulator circuit as described above.

[0046] Based on the above-mentioned low voltage dropout linear regulator, an embodiment of the present invention further provides an electronic device, wherein the electronic device includes the above-mentioned low voltage dropout linear regulator.

[0047] In summary, the low voltage difference linear voltage regulator circuit provided by the present invention includes: a basic low voltage difference linear voltage regulator unit and a low voltage stabilization unit. The basic low voltage difference linear voltage regulator unit is connected to the low voltage stabilization unit; the basic low voltage difference linear voltage regulator unit is configured to generate an output voltage using the low voltage stabilization unit, and the output voltage can follow the input voltage of the low voltage; the low voltage stabilization unit is configured to reduce the impedance of the two non-main poles in the basic low voltage difference linear voltage regulator unit to increase the loop bandwidth and enhance the loop stability. Among them, the low voltage difference linear voltage regulator circuit is made of 180nm process, which can be externally connected with large-capacity capacitors, operates at a temperature of 77K~300K, and meets the load current of 0~50mA.

[0048] The low-voltage difference linear voltage stabilization circuit proposed in the present invention creatively adds a low-voltage stabilization unit on the basis of the traditional FVF structure, realizes the function of buffer, and the load current can withstand light load 0mA to heavy load 50mA. Due to the effect of the low-voltage stabilization unit, the output impedance of the FVF structure is lower than that of the traditional source follower, and the output driving ability is stronger. And the voltage of the first non-main pole is pressed lower, so that the output voltage can achieve a lower input voltage follow. At the same time, the second non-main pole is pulled away by the low-voltage stabilization unit structure. When the load current increases, the pole of the second non-main pole will also be pulled farther, and the zero-pole cancellation between the first non-main pole and the zero point of the binding line is realized, and the stability of the FVF loop is enhanced, so that the output end can be externally connected with a large-capacity capacitor, reduce the overshoot during transient response, have a strong ability to resist shock, and reduce the output noise to a certain extent. The low-voltage difference linear voltage stabilization circuit of the present invention has a high practical value.

[0049] Although the preferred embodiments of the present invention have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0050] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

[0051] The embodiments of the present invention are described above in conjunction with the accompanying drawings, but the present invention is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the enlightenment of the present invention, ordinary technicians in this field can also make many forms without departing from the scope of protection of the purpose of the present invention and the claims, which all fall within the protection of the present invention.

Claims

1. A low voltage difference linear voltage regulator circuit based on a flip voltage follower, characterized in that: The low voltage difference linear voltage stabilization circuit comprises: a basic low voltage difference linear voltage stabilization unit and a low voltage stabilization unit; The basic low voltage difference linear voltage stabilizing unit is connected to the low voltage stabilizing unit; The basic low-dropout linear voltage stabilization unit is configured to generate an output voltage using the low voltage stabilization unit, and the output voltage can follow the input voltage of the low voltage; The low voltage stabilization unit is configured to reduce the impedance of two non-main poles in the basic low voltage drop linear voltage stabilization unit to increase the loop bandwidth and enhance the loop stability; The low voltage difference linear voltage regulator circuit is manufactured by 180nm process, can be externally connected with large-capacity capacitors, operates at a temperature of 77K~300K, and meets a load current of 0~50mA.

2. The low voltage difference linear voltage regulator circuit according to claim 1, characterized in that: The basic low voltage difference linear voltage stabilizing unit comprises: an error amplification structure, a voltage generation structure, and a flip voltage follower structure; The error amplification structure is used to amplify the input voltage so that the voltage of the middle node of the voltage generation structure is equal to the input voltage; The voltage generating structure is used to generate a target bias voltage so that the output voltage generated by the flip voltage follower structure is equal to the voltage of the intermediate node.

3. The low voltage difference linear voltage regulator circuit according to claim 2, characterized in that: The error amplification structure includes: an error amplifier; the voltage generation structure includes: a first transistor, a third transistor, and a fifth transistor; the flip voltage follower structure includes: a second transistor, a fourth transistor, and a pass transistor; The inverting terminal of the error amplifier is connected to the first terminal of the third transistor and the third terminal of the fifth transistor respectively, the non-inverting terminal receives the input voltage, and the third terminal of the fifth transistor is the intermediate node; The output end of the error amplifier is connected to the second end of the third transistor and the second end of the fourth transistor respectively, and the output end of the error amplifier generates the target bias voltage; The first terminal of the fifth transistor receives a power supply voltage, and the second terminal receives a first bias voltage; The third end of the third transistor is connected to the third end and the second end of the first transistor and the second end of the second transistor respectively; A first terminal of the first transistor is grounded; The first end of the pass transistor receives the power supply voltage, the second end is connected to the low voltage stabilizing unit, and the third end is connected to the first end of the fourth transistor, and the first end of the fourth transistor outputs the output voltage as a main pole; The third end of the fourth transistor is connected to the third end of the second transistor and the low voltage stabilizing unit respectively; A first terminal of the second transistor is grounded.

4. The low voltage difference linear voltage regulator circuit according to claim 2, characterized in that: The error amplification structure includes: an error amplifier; the voltage generation structure includes: a first transistor, a third transistor, a fifth transistor and a grounding capacitor; the flip voltage follower structure includes: a second transistor, a fourth transistor and a pass transistor The inverting terminal of the error amplifier is connected to the first terminal of the third transistor and the third terminal of the fifth transistor respectively, the non-inverting terminal receives the input voltage, and the third terminal of the fifth transistor is the intermediate node; The output end of the error amplifier is connected to the second end of the third transistor, the second end of the fourth transistor, and the first end of the grounding capacitor respectively, and the output end of the error amplifier generates the target bias voltage; The second end of the grounding capacitor is grounded; The first terminal of the fifth transistor receives a power supply voltage, and the second terminal receives a first bias voltage; The third end of the third transistor is connected to the third end and the second end of the first transistor and the second end of the second transistor respectively; A first terminal of the first transistor is grounded; The first end of the pass transistor receives the power supply voltage, the second end is connected to the low voltage stabilizing unit, the third end is connected to the first end of the fourth transistor, and the first end of the fourth transistor outputs the output voltage as a main pole; The third end of the fourth transistor is connected to the third end of the second transistor and the low voltage stabilizing unit respectively; A first terminal of the second transistor is grounded.

5. The low voltage difference linear voltage regulator circuit according to claim 3 or 4, characterized in that: The low voltage stabilization unit includes: a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor and a tenth transistor; The first terminal of the sixth transistor receives the power supply voltage; The second end of the sixth transistor is connected to the third end of the sixth transistor, the second end of the pass transistor, the first end of the seventh transistor, the third end of the ninth transistor, and the third end of the tenth transistor, respectively, and the third end of the sixth transistor is the second non-main pole of the two non-main poles; The second end of the seventh transistor is connected to the third end of the fourth transistor, and the second end of the seventh transistor is the first non-main pole of the two non-main poles; The third end of the seventh transistor is connected to the third end of the eighth transistor and the second end of the ninth transistor respectively; The second terminal of the eighth transistor receives a third bias voltage, and the first terminal is grounded; The first terminal of the tenth transistor receives the power supply voltage, and the second terminal receives the second bias voltage; A third terminal of the ninth transistor is grounded.

6. The low voltage difference linear voltage regulator circuit according to claim 3 or 4, characterized in that: The basic low voltage difference linear voltage stabilization unit utilizes the gain negative feedback characteristic of the operational amplifier to make the voltage of the intermediate node equal to the input voltage; The first transistor and the second transistor have matching characteristics, and the third transistor and the fourth transistor have matching characteristics, so that the output voltage is equal to the voltage of the intermediate node, and then the output voltage is equal to the input voltage.

7. The low voltage difference linear voltage regulator circuit according to claim 5, characterized in that: Using the gate-source voltages of the sixth transistor and the seventh transistor to reduce the voltage of the first non-main pole, thereby allowing the output voltage to follow a lower input voltage; Using the characteristics of the sixth transistor and the ninth transistor, the current flowing through the sixth transistor and the ninth transistor changes adaptively with the change of the load current; The low voltage stabilization unit is used to reduce the impedance of the second non-main pole to pull the pole of the second non-main pole farther away, and the parameters of the second transistor and the fourth transistor are adjusted respectively so that the zero poles between the first non-main pole and the binding line zero point cancel each other, thereby increasing the loop bandwidth and enhancing the loop stability.

8. The low voltage difference linear voltage regulator circuit according to claim 1, characterized in that: The large-capacitance capacitor has a capacitance greater than μF.

9. A low voltage dropout linear regulator, characterized in that: The low voltage dropout linear regulator comprises: a low voltage dropout linear regulator circuit as described in any one of claims 1-8.

10. An electronic device, characterized in that: The electronic device comprises the low voltage dropout linear regulator as claimed in claim 9.

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