Photoetching hot spot detection method and device, electronic equipment and storage medium

Abstract

The invention provides a photoetching hot spot detection method and device, electronic equipment and a storage medium, and relates to the technical field of manufacturability design of integrated circuits. The method comprises the following steps: acquiring an original design pattern for producing a target chip, and generating an optical feature image set corresponding to the original design pattern; the optical feature image set comprises at least one optical feature image; inputting all the optical feature images into a pre-trained manufacturability design model, so that the manufacturability design model performs prediction according to all the optical feature images, and outputting a predicted resist pattern; a resist profile included in the predicted resist pattern is identified, and a lithographic hot spot on the resist profile is determined. According to the mode, the detection efficiency of the photoetching hot spots is improved while the detection precision of the photoetching hot spots is ensured.

Description

Technical Field

[0001] The present application relates to the technical field of integrated circuit manufacturability design, and in particular to a photolithography hotspot detection method, device, electronic device and storage medium. Background Art

[0002] In the semiconductor industry, chip design and chip manufacturing belong to two different fields. In order to ensure that the designed chip can be manufactured with high yield, the chip design must follow a series of geometric rules defined by the chip manufacturing factory. With the continuous development of the semiconductor industry, chip design based on a series of geometric rules can no longer guarantee its manufacturability.

[0003] In order to ensure its manufacturability, the concept of Design for Manufacturability (DFM) came into being. The main goal of DFM is to identify lithography hot spots in chip design. At present, the most reliable way to implement DFM is to start from the chip design step and complete the entire data processing flow. The data processing flow includes two operations: the first operation is to perform optical proximity correction (OPC), and the second operation is to perform lithography manufacturability inspection on the photomask data after OPC (i.e., post-OPC data). The lithography manufacturability inspection operation first applies the OPC model to the post-OPC data, then calculates and predicts the contour of the bottom of the photoresist on the wafer, and finally identifies the lithography "hot spots" from the contours of the bottom of these photoresists.

[0004] The existing photolithography hotspot detection method requires additional OPC. Since the photolithography process information and OPC process information in the OPC configuration are very sensitive information that needs to be protected, the DFM of this method must be performed on-site at the manufacturing plant, but not at the design plant. This method has certain execution limitations, and the method greatly limits the application of gradually shortening the cycle time of the chip designed for manufacturability through the DFM iteration process. It can be seen that the existing technology has the technical problem of low efficiency in photolithography hotspot detection. Summary of the invention

[0005] The present application provides a photolithography hotspot detection method, device, electronic device and storage medium to solve the problem of low efficiency of photolithography hotspot detection in the prior art.

[0006] According to a first aspect of the present application, a lithography hotspot detection method is provided, comprising:

[0007] Acquire an original design graphic of a production target chip, and generate an optical characteristic image set corresponding to the original design graphic; the optical characteristic image set includes at least one optical characteristic image;

[0008] Inputting all the optical characteristic images into a pre-trained design for manufacturability model, so that the design for manufacturability model makes predictions based on all the optical characteristic images and outputs predicted resist patterns;

[0009] A resist profile included in the predicted resist pattern is identified, and a lithography hotspot on the resist profile is determined.

[0010] Optionally, generating an optical feature image set corresponding to the original design graphic includes:

[0011] Determining the light transfer function of the original design pattern;

[0012] The optical characteristic image set is generated according to the light transfer function of the original design pattern and a preset optical characteristic formula; wherein the preset optical characteristic formula is:

[0013]

[0014] Among them, S i (x, y, z = z0; f = f0) is the i-th optical feature image in the optical feature image set, x and y are the coordinates of the resist in the exposure field on the wafer, φ i (x, y, z = z0; f = f0) is the eigenfunction of the transmission cross coefficient matrix when the exposure focal plane is set to f = f0 and the resist depth is set to z = z0, represents a convolution operation, and D is the light transfer function of the original design graphic.

[0015] Optionally, determining the lithography hotspot on the resist profile comprises:

[0016] A position on the resist profile that meets the lithography manufacturability rule is found and the position is determined as a lithography hotspot.

[0017] Optionally, the lithography hotspot detection further includes:

[0018] Acquire a data set, the data set comprising a training subset, a validation subset and a test subset; wherein each subset in the data set comprises an optical feature image set sample and an actual resist pattern sample corresponding to the optical feature image set sample;

[0019] Generate an initial weight matrix; wherein each weight in the initial weight matrix is ​​used to reflect the importance of different feature areas in the predicted resist pattern sample;

[0020] The design for manufacturability model is trained according to the data set and the initial weight matrix to obtain a trained design for manufacturability model.

[0021] Optionally, the manufacturability design model is a neural network model; wherein the neural network model includes a deep convolutional neural network.

[0022] Optionally, the predicted resist pattern is a chemical image, a scanning electron microscope image or a three-dimensional structure image.

[0023] Optionally, when the predicted resist pattern is a chemical image, the identifying a resist profile contained in the predicted resist pattern comprises:

[0024] The predicted resist pattern is sheared according to a preset threshold value to obtain a resist contour.

[0025] According to a second aspect of the present application, a lithography hotspot detection device is provided, comprising:

[0026] An acquisition generation module is used to acquire an original design graphic of a production target chip and generate an optical characteristic image set corresponding to the original design graphic; the optical characteristic image set includes at least one optical characteristic image;

[0027] An input-output module, used for inputting all the optical characteristic images into a pre-trained design for manufacturability model, so that the design for manufacturability model makes predictions based on all the optical characteristic images and outputs predicted resist patterns;

[0028] The identification and determination module is used to identify the resist profile contained in the predicted resist pattern and determine the photolithography hotspot on the resist profile.

[0029] According to a third aspect of the present application, there is provided an electronic device, comprising: at least one processor and a memory;

[0030] The memory stores computer-executable instructions;

[0031] The at least one processor executes the computer-executable instructions stored in the memory, so that the at least one processor performs the lithography hotspot detection method as described in the first aspect above.

[0032] According to a fourth aspect of the present application, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer execution instructions, and when the computer execution instructions are executed by a processor, the method for detecting lithography hotspots as described in the first aspect above is used.

[0033] According to a fifth aspect of the present application, a computer program product is provided, comprising a computer program, which, when executed by a processor, implements the lithography hotspot detection method described in the first aspect.

[0034] The present application provides a method for detecting photolithography hotspots, comprising: obtaining an original design graphic of a target chip to be produced, and generating an optical feature image set corresponding to the original design graphic; the optical feature image set comprises at least one optical feature image; all optical feature images are input into a pre-trained design for manufacturability model, so that the design for manufacturability model makes predictions based on all optical feature images and outputs predicted resist graphics; and the resist contour contained in the predicted resist graphics is identified, and the photolithography hotspots on the resist contour are determined.

[0035] The optical feature image set in the present application may contain all the information of the original design graphics. The optical feature image set corresponding to the original design graphics is used as the input of the manufacturability design model. On the one hand, it can ensure the accuracy of the predicted resist graphics, and thus ensure the detection accuracy of the lithography hotspots. On the other hand, compared with the prior art of first performing optical proximity correction processing on the original design graphics to obtain a mask pattern, and then determining the lithography hotspots based on the mask pattern, the present application does not require additional optical proximity correction processing, and can quickly obtain the predicted resist graphics, thereby improving the detection efficiency of the lithography hotspots on the resist contour.

[0036] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present application, nor is it intended to limit the scope of the present application. Other features of the present application will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0038] Figure 1 A schematic diagram of a process for identifying the contour of a chemical image in a photoresist provided by the prior art;

[0039] Figure 2 A schematic diagram of a process for detecting a photolithography hotspot provided in an embodiment of the present application;

[0040] Figure 3 Schematic diagrams of two implementation methods of resist patterns;

[0041] Figure 4 A schematic diagram of a process for obtaining a resist profile contained in a resist pattern in a first implementation manner;

[0042] Figure 5 A schematic flow chart of another photolithography hotspot detection method provided in an embodiment of the present application;

[0043] Figure 6A schematic diagram of a predicted photoresist profile and an actual photoresist profile provided in an embodiment of the present application;

[0044] Figure 7 Another schematic diagram of predicted photoresist profile and actual photoresist profile provided in an embodiment of the present application;

[0045] Figure 8 A schematic diagram of another predicted photoresist profile and an actual photoresist profile provided in an embodiment of the present application;

[0046] Fig. 9 Provided in the embodiments of this application Figure 2 Schematic diagram of the process of S101;

[0047] Fig.10 A schematic diagram of an optical feature image set corresponding to an original design graphic provided in an embodiment of the present application;

[0048] Fig.11 A schematic flow chart of another photolithography hotspot detection method provided in an embodiment of the present application;

[0049] Fig.12 A schematic diagram of the structure of a photolithography hotspot detection device provided in an embodiment of the present application;

[0050] Fig.13 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application.

[0051] The above drawings have shown clear embodiments of the present application, which will be described in more detail later. These drawings and text descriptions are not intended to limit the scope of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0052] Here, exemplary embodiments are described in detail, and examples thereof are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application.

[0053] In the semiconductor industry, chip design and chip manufacturing belong to two different fields. In order to ensure that the designed chip can be manufactured with high yield, the chip design must follow a set of geometric design rules (or geometric rules) defined by the chip manufacturing factory. In the early days of semiconductor manufacturing, the communication between chip design companies and chip manufacturing factories using the above-defined set of geometric design rules was sufficient, for example, the minimum width of the design pattern and the minimum spacing between patterns.

[0054] With the continuous development of the semiconductor industry, chip design based on a series of geometric rules can no longer guarantee its manufacturability. The geometric rules have lost their effectiveness for the following reasons: geometric rules are mainly one-dimensional and short-range, while the optical imaging process itself is two-dimensional, and its impact range is medium-range, not short-range. The effectiveness of using geometric rules to estimate the quality of optical images depends on the difficulty of the lithography process involved. The optical resolution required for chip design is usually defined by half of the minimum spacing (i.e., period) in the chip design, i.e., Pitch. min / 2; while the optical resolution of the lithography exposure tool, i.e. the lithography machine, is defined as λ / NAxax, where λ is the exposure wavelength and NAxax is the maximum achievable numerical aperture. (Pitch min The ratio (λ / NAxax / 2) / (λ / NAxax) is used to define the difficulty of the lithography process and is often referred to as the k1 factor. The smaller the k1 factor, the more difficult the lithography process is. From one semiconductor technology node to the next, the k1 factor keeps decreasing. As a result, geometric rules no longer apply.

[0055] In order to re-establish effective communication between chip design companies and chip manufacturing plants, the concept of design for manufacturability came into being. The main goal of lithography DFM is to identify lithography hotspots in chip design. The basic requirements of DFM tools or models are (1) fast implementation speed; (2) zero error rate and low false detection rate; (3) the ability to encrypt information about lithography processes and optical proximity correction technology; (4) DFM can be run in chip design companies instead of chip manufacturing plants, so there is no need to run OPC.

[0056] At present, the fastest way to implement DFM is to use a so-called "hotspot" pattern library. The "hotspot" pattern library is accumulated in advance in the chip manufacturing factory and delivered to the chip design company for use after the accumulation is completed. However, this method has the following disadvantages: (1) It takes a long time to accumulate enough hotspot patterns; (2) It cannot be guaranteed that the hotspot pattern set in the "hotspot" pattern library is complete at any time; (3) In addition to the patterns that can be accurately matched, for the patterns that cannot be accurately matched, the existing technology must use a fuzzy matching algorithm based on geometric features to infer whether the pattern has a lithography hotspot, which is often unreliable, mainly because the relationship between the optical imaging process and the geometric features is nonlinear and non-monotonic.

[0057] In order to solve the reliability problem, the prior art provides a reliable implementation method of DFM, which starts from the chip design step and completes the entire data processing flow. The data processing flow includes two operations: the first operation is to perform optical proximity correction, and the second operation is to perform a lithography manufacturability check on the post-OPC data. The lithography manufacturability check operation first applies the OPC model to the post-OPC data, then calculates and predicts the contour of the bottom of the photoresist on the wafer, and finally the lithography "hot spots" can be more reliably identified from the contours of the bottom of these photoresists. The reason why this process is reliable is that the OPC model takes into account both the physical and chemical processes in the lithography process. After exposing the mask with an appropriate exposure dose, a spatial image is formed in the photoresist layer. The spatial image is a function of the light intensity distribution in the photoresist layer, which only reflects the initial photoacid concentration distribution in the photoresist layer. The final chemical image is formed in the post-exposure baking (PEB) step. In the PEB process, the acid acts as a catalyst to initiate a chain chemical reaction at high temperature. The result of the chemical reaction is the formation of products that can change the dissolution rate of the photoresist in the aqueous tetramethylammonium hydroxide (TMAH) solution. The final chemical product concentration distribution can be called a chemical image. Figure 1 As shown, the prior art includes a process of forming a chemical image in a photoresist from a spatial image (ie, a mask image corresponding to mask data), and a process of obtaining a contour of the chemical image (ie, a contour of the bottom of the photoresist on the wafer) from the chemical image.

[0058] Although the above-mentioned reliable DFM implementation method improves reliability, the method has the following disadvantages: (1) Since the lithography process information and OPC process information in the OPC configuration are very sensitive information that needs to be protected, the DFM of this method must be performed on-site at the manufacturing plant, and cannot be performed on-site at the design plant, which has certain implementation limitations. (2) The DFM of this method is very slow and very expensive. In addition, based on the improved version of the reliable DFM implementation method, it first roughly scans the chip design to determine possible lithography "hot spots", and then carefully checks the lithography "hot spots" determined among those possible lithography "hot spots" through OPC technology and lithography manufacturability inspection operations. This method greatly reduces computing time and resources, but the DFM of this method must also be performed on-site at the manufacturing plant, and cannot be performed on-site at the design plant. This legacy problem greatly limits the application of gradually shortening the cycle time of chips designed for manufacturability through the DFM iteration process.

[0059] In order to develop DFM methods that can simultaneously meet the above four basic requirements of DFM, the computational lithography community has and is working hard to adopt machine learning technology. For example, the computational lithography community has tried to use deep convolutional neural network models for lithography "hotspot" detection. However, this method essentially uses a neural network structure to implement a pattern matching algorithm. This model, which uses the original design geometry as input, is difficult to clearly define the boundary between lithography "hotspots" and lithography "non-hotspots" in a multi-dimensional feature space. Since the original design geometry input is essentially inconsistent with the physics of the optical imaging process, it is unreliable to obtain the model boundary through a limited number of graphic interpolation methods.

[0060] To date, the semiconductor industry still lacks DFM models and methods that can meet all four requirements.

[0061] In order to solve the above technical problems, the overall inventive concept of the present application is to provide a method for improving the detection efficiency of lithography hotspots while ensuring the detection accuracy of lithography hotspots, which is applied to the field of integrated circuit manufacturability design.

[0062] The technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems are described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described below in conjunction with the accompanying drawings.

[0063] Embodiment 1:

[0064] Figure 2 A schematic diagram of a process flow of a photolithography hotspot detection method provided in an embodiment of the present application. Figure 2 As shown, the method of this embodiment includes the following steps S101 to S103, wherein:

[0065] S101: Acquire an original design graphic of a production target chip, and generate an optical characteristic image set corresponding to the original design graphic; the optical characteristic image set includes at least one optical characteristic image.

[0066] It should be understood that the original design graphic may be referred to as the original design pattern, the original design geometric graphic, the original design geometric pattern, etc., and includes a set of polygons. The optical feature image set may be referred to as the intrinsic image set, and the optical feature image may be referred to as the intrinsic optical image, the intrinsic image, etc., and includes a set of optical feature images. The generation process of the optical feature image set is shown in the following embodiment 2, which will not be repeated here. The number of optical feature images in the optical feature image set is determined according to actual conditions. For example, the number of optical feature images in the optical feature image set may be 5.

[0067] S102: inputting all optical feature images into a pre-trained design for manufacturability model, so that the design for manufacturability model makes predictions based on all optical feature images and outputs predicted resist patterns.

[0068] It should be understood that the predicted resist pattern or predicted resist pattern, predicted resist image, can be a chemical image, a scanning electron microscope image, or a three-dimensional structure image. When the resist on the wafer is a photoresist, the predicted resist pattern is also called a predicted photoresist pattern, a predicted photoresist pattern, a predicted chemical image in the photoresist, etc.

[0069] The process from the original design pattern to the final resist pattern on the wafer, such as Figure 3 As shown, there are two implementation methods. The first implementation method is an existing method. In the first implementation method, the first step of the OPC configuration process is to obtain the original design graphics. The second step is to define the lithography target graphics (or lithography target pattern) based on the original design graphics based on factors such as etching deviation and lithography process window enhancement. The lithography target graphics may be different from the corresponding original design graphics. The geometric pattern conversion from the original design graphics to the lithography target graphics is still an operation based on preset rules. Since these rules are simple and short-range, mature deep convolutional neural network structures can learn these simple rules through training. Once the lithography target graphics are determined, the third step is executed, that is, the sub-resolution auxiliary pattern is placed through preset rules or models. The fourth step is to create segmentation line segments at the edges of the lithography target graphics and OPC control points on these newly formed line segments according to the preset rules. The fifth step is to obtain the OPC model and use the OPC model for iterative correction. The sixth step is to verify the post-OPC data. The seventh step is to use the post-OPC data to make a mask. The eighth step is to use the mask lithography machine scanner to expose the wafer to obtain the resist pattern.

[0070] Since the edge segmentation and OPC control points in the fourth step of the first implementation define the space of the OPC solution together, the final OPC solution is based on the geometric pattern of the segmented line segments. The precise OPC solution or post-OPC geometric pattern (i.e., the geometric pattern corresponding to the post-OPC data, or called the post-OPC geometric figure) is difficult to learn through a neural network model because it is discontinuous in the OPC solution space and the number of discontinuous points is uncountable. It can be seen that it is not feasible to use the design geometry as the input of the model and directly map it to the bottom contour of the photoresist on the wafer to establish a lithography DFM model.

[0071] However, in-depth research shows that the DFM model does not need to accurately learn the solution of the post-OPC geometric pattern, because no matter what the post-OPC geometric pattern solution is, its edge placement error of the photoresist bottom profile on the wafer and its sensitivity to changes in exposure dose and exposure focal plane must meet the error limits set by the basic requirements of the lithography process. These strict requirements are directly translated into the limitations of the spatial image formed in the photoresist after exposure and the chemical image formed in the photoresist after PEB.

[0072] Since the lithography machine is a low spatial frequency transmission device, the spatial image is formed only by the low-order geometric structure information of the post-OPC data. In the process of optical imaging, all high-order geometric structure information in the post-OPC data is filtered out. Therefore, the spatial images from different post-OPC data and the chemical images formed subsequently are very similar, and they are limited to a narrow error band. It can be seen that it is feasible to build a lithography DFM model.

[0073] like Figure 3 As shown, the second implementation method is to use the lithography hotspot detection method provided by the present application, pre-train the DFM model, and in the application stage, after obtaining the original design pattern, generate an optical feature image set corresponding to the original design pattern (not shown in Figure 3 ), the optical feature image set is input into the DFM model to output the predicted resist pattern.

[0074] From the perspective of the graphics formation process, the two implementation methods are analyzed as follows: Figure 4 As shown in FIG. 1 , the first implementation method first obtains the lithography target pattern based on the original design pattern, then applies the OPC model to the mask data after optical proximity correction (i.e., post-OPC data), and finally obtains the resist profile on the wafer. Figure 5 As shown, the embodiment of the present application corresponds to the second implementation method. The first step is to obtain the original design graphic, the second step is to generate an optical feature image set, the third step is to input the optical feature image set into a deep convolutional neural network (DCNN) model, the fourth step is to output the predicted resist graphic from the deep convolutional neural network, the fifth step is to obtain the predicted resist graphic in a 2D format, and the sixth step is to shear the predicted resist graphic in the 2D format to obtain the resist contour.

[0075] The lithography DFM model provided in the embodiment of the present application can meet all the requirements of DFM, namely speed, accuracy, information security, and can be executed in a chip design company, thereby avoiding the disadvantage of having to be executed in a chip manufacturing plant. The embodiment of the present application can apply the DFM model to a lithography hotspot detection method, which includes input data encoding design and model training target design, wherein the input data encoding design refers to how to encode the original design graphic into an optical feature image set. The specific implementation process is shown in the following embodiment 2, which will not be repeated here. Model training target design refers to determining the predicted resist graphic as the model training target.

[0076] S103: Identify a resist profile included in the predicted resist pattern, and determine a lithography hotspot on the resist profile.

[0077] When the resist on the wafer is photoresist, the predicted resist profile contained in the resist pattern identified in S103 is also called the predicted photoresist profile, the predicted photoresist edge contained in the resist pattern, the predicted photoresist bottom profile contained in the resist pattern, the predicted profile of the chemical image in the photoresist contained in the resist pattern, etc.

[0078] The optical feature image set in the embodiment of the present application may contain all the information of the original design graphic. The optical feature image set corresponding to the original design graphic is used as the input of the manufacturability design model. On the one hand, it can ensure the accuracy of the predicted resist graphic, and thus ensure the detection accuracy of the lithography hotspots. On the other hand, compared with the prior art of first performing optical proximity correction processing on the original design graphic to obtain a mask pattern, and then determining the lithography hotspots based on the mask pattern, the present application does not require additional optical proximity correction processing, and can quickly obtain the predicted resist graphic, thereby improving the detection efficiency of the lithography hotspots on the resist contour.

[0079] In a possible implementation, in step S103, determining the lithography hotspot on the resist profile includes: searching for a position on the resist profile that complies with lithography manufacturability rules, and determining the position as the lithography hotspot.

[0080] The embodiment of the present application does not specifically limit the lithography manufacturability rule, and the embodiment of the present application can set different lithography manufacturability rules in different operations. Exemplarily, a position on the resist profile where the resist thickness is less than a preset thickness is determined as a lithography hotspot.

[0081] Since the resist profile is obtained based on the predicted resist pattern, this embodiment can improve the accuracy of the lithography hotspot when the accuracy of the model output predicting the resist pattern is high.

[0082] Further, if it is determined that a lithography hotspot exists on the resist profile, the lithography hotspot is subsequently processed, but the embodiment of the present application does not limit the specific operation of the subsequent processing.

[0083] In one possible implementation, the design for manufacturability model is a neural network model; wherein the neural network model includes a deep convolutional neural network.

[0084] In an embodiment of the present application, the design for manufacturability model (referred to as DFM model for short) may be a machine learning model, such as a neural network model, a decision tree model, a naive Bayes model, etc. However, the embodiment of the present application does not specifically limit the model category adopted by the design for manufacturability model.

[0085] The input data of the model is a plurality of optical characteristic images corresponding to the original design pattern, and the output target is to predict the resist pattern. In addition, the manufacturability design model is trained before application, and the training process is shown in the following embodiment 3, which will not be repeated here.

[0086] The embodiment of the present application does not need to execute the OPC process before inputting all the optical feature images in the optical feature image set corresponding to the original design graphic into the manufacturability design model. The operation is simple and the detection cycle time of the lithography hotspot is saved.

[0087] In a possible implementation, the predicted resist pattern is a chemical image, a scanning electron microscope (SEM) image, or a three-dimensional structure image.

[0088] In addition to determining the input data of the neural network model, this embodiment also needs to determine the training target of the neural network model. The training target can be a chemical image, an SEM image or a photoresist 3D structure image. Among them, the chemical image is a concept embedded in the OPC model. In the OPC process, the algorithm first calculates the light intensity distribution function in the resist, and then derives the resist pattern based on the light intensity distribution function, simulating all chemical and physical processes after the formation of the light intensity distribution function. After the photolithography process is completed, a three-dimensional structure of the resist is left on the wafer for subsequent processes, such as etching. Further, an SEM image is obtained using an electron scanning microscope, and the quality of the photolithography process can be detected by observing the SEM image.

[0089] Taking the chemical image as the training target as an example, the predicted photoresist profile obtained from the chemical image in this embodiment can meet the purpose of the DFM model and has higher reliability compared with the method of performing photolithography manufacturability inspection through post-OPC data.

[0090] In a possible implementation, when the predicted resist pattern is a chemical image, identifying the resist profile contained in the predicted resist pattern includes:

[0091] The predicted resist pattern is sheared according to a preset threshold to obtain a resist contour.

[0092] Exemplarily, the preset threshold value can be 0.28, or other values, which are not specifically limited in the present embodiment. For each original design pattern, there is a corresponding predicted resist pattern. For a given process, the present embodiment can perform shearing processing on the predicted resist pattern by using a preset threshold value (e.g., 0.28) to obtain a predicted resist profile.

[0093] Exemplarily, this embodiment takes the metal layer of a wafer as an example and analyzes the photolithography hotspot detection method as follows: Figure 6 , Figure 7 and Figure 8 The straight line in the figure represents the actual photoresist profile. Figure 3 The first implementation method of the photoresist profile obtained, the dotted line represents the predicted photoresist profile obtained according to the neural network model, that is, through Figure 3 The photoresist profile obtained by the second implementation method is shown in FIG. 1 , and in each example figure, the photoresist profile on the left side of the arrow is a local enlarged view of the photoresist profile on the right side of the arrow. Combining these three figures, it can be seen that the straight line and the dotted line have a high degree of fit, reflecting that the predicted photoresist profile is infinitely close to the actual photoresist profile, so the embodiment of the present application improves the recognition accuracy of the photoresist profile.

[0094] The embodiments of the present application have the following advantages: (1) The present embodiment uses the optical characteristic images of the original design graphics as the input of the machine learning model. This set of characteristic images can include almost all the information of the original design graphics and the photolithography imaging characteristics, thereby improving the validity of the input data. (2) Chemical images, SEM images or photoresist 3D structure images are used as the training targets of the machine learning model. In particular, using chemical images as the training targets of the machine learning model can improve the detection efficiency of the DFM model while ensuring the accuracy of photolithography hotspot detection, and the detection speed is faster than that of the prior art. (3) Since the DFM model provided by the embodiments of the present application can directly predict the photoresist profile on the wafer from the chip design company, it does not need to go through the time-consuming and expensive OPC operation, so it can be executed in the chip design company without the need for additional OPC tools. Since the photolithography process information can be encrypted in a set of optical characteristic images, the DFM model developed by the present embodiment can simultaneously meet the four requirements of the ideal DFM model. On this basis, the DFM model proposed in the present application will be widely used in actual semiconductor manufacturing environments.

[0095] Based on the above embodiments, the technical solution of the present application is described in more detail below in combination with several specific embodiments.

[0096] Embodiment 2:

[0097] Fig. 9 Provided in the embodiments of this application Figure 2 Schematic diagram of the process of S101. Figure 2 Based on the embodiment shown, this embodiment focuses on Figure 2 S101 in the figure is refined. Fig. 9 As shown, in step S101, an optical feature image set corresponding to the original design pattern is generated, including the following steps S1011-S1012, wherein:

[0098] S1011: Determine the light transfer function of the original design graphic.

[0099] S1012: Generate an optical characteristic image set according to the light transfer function of the original design graphic and a preset optical characteristic formula.

[0100] Among them, the preset optical characteristic formula is:

[0101]

[0102] Among them, S i (x, y, z = z0; f = f0) is the i-th optical feature image in the optical feature image set, x and y are the coordinates of the resist in the exposure field on the wafer, φ i (x, y, z = z0; f = f0) is the eigenfunction of the Transmission Cross Coefficient (TCC) matrix when the exposure focal plane is set to f = f0 and the resist depth is set to z = z0. represents the convolution operation, and D is the light transfer function of the original design graphic.

[0103] In order to learn the mapping function from the original design pattern to the photoresist profile on the wafer, this embodiment proposes an information encoding scheme based on the input data of the neural network model and the model training target.

[0104] Specifically, since the geometric rules used to generate the lithography target pattern from the original design pattern are obtained based on the relationship between adjacent geometric patterns, and the process from the lithography target pattern to the post-OPC geometric pattern and then to the photoresist profile on the wafer is determined by the lithography process conditions, such as NAxax, illumination light source, and illumination polarization. Therefore, the input of the neural network model must embed information about the original design pattern and lithography process conditions in the input image in a consistent and coherent manner. The above NAxax has its maximum value on each type of scanner. However, in the lithography process, the NAxax value can be defined by the engineer for the optimal process.

[0105] In order to obtain the input data of the neural network model, the present embodiment may first consider the optical imaging equation. Under the condition of partial coherence imaging, the spatial image in the photoresist may be calculated using the following equation, where:

[0106]

[0107] Where I(x, y, z = z0; f = f0) is the spatial image in the photoresist, represents the convolution operation, a i (z=z0; f=f0) and φ i (x, y, z = z0; f = f0) are the eigenvalues ​​and eigenfunctions of the transmission cross coefficient matrix when the exposure focal plane is set to f = f0 and the resist depth is set to z = z0, and M(x, y) is the light transmission function of the photomask pattern. The photomask pattern is defined by the post-OPC data and the mask type (i.e., optical properties). For example, for a phase-shift mask with a dark tone attenuation of 5%, the area defined by the post-OPC data is clear, indicating that it has 100% transmittance and 0 degree phase; while the background area has 5% light transmission and 180 degree phase shift. This calculation formula can provide an optimal imaging system decomposition solution for quickly calculating aerial images under partially coherent illumination.

[0108] Based on this calculation formula, this embodiment uses a set of optical characteristic images of the original design pattern (rather than the mask pattern) as the input data of the DFM model. The optical characteristic image set can be expressed as {S i , i=1, 2, 3, ...}, which contains all the information related to the original design graphics and lithography imaging characteristics.

[0109] Based on the preset optical characteristic formula, the process of obtaining the optical characteristic image set from the original design graphic in this embodiment is as follows: Fig.10 As shown, S1, S2, S3, S4 and S5 are all optical characteristic images.

[0110] The embodiment of the present application uses a set of optical feature images as input data for the DFM model. Since this set of optical feature images can comprehensively and effectively include the original design graphics and lithography imaging characteristics, the embodiment of the present application can improve the accuracy of the input data and thereby improve the accuracy of lithography hotspot detection.

[0111] Embodiment 3:

[0112] Fig.11 A schematic diagram of a process flow of another lithography hotspot detection method provided in an embodiment of the present application. Fig.11 As shown, the photolithography hotspot detection method further includes the following steps S104 to S106, wherein:

[0113] S104: Obtain a data set, where the data set includes a training subset, a validation subset, and a test subset.

[0114] Each subset in the data set includes at least one training sample, and the training sample includes an optical feature image set sample and an actual resist pattern sample corresponding to the optical feature image set sample. The actual resist pattern sample is also called an actual chemical image.

[0115] S105: Generate an initial weight matrix, wherein each weight in the initial weight matrix is ​​used to reflect the importance of different feature regions in the predicted resist pattern sample.

[0116] Exemplarily, for each training sample, it has a corresponding actual chemical image. For a given process, this embodiment can perform threshold processing on the actual chemical image by using a preset threshold (e.g., 0.27688) to obtain the actual resist profile. For each actual chemical image, this embodiment can determine the position of the actual resist profile, so this embodiment can set a larger model training weight on the area where these actual resist profiles are located.

[0117] S106: Training the design for manufacturability model according to the data set and the initial weight matrix to obtain a trained design for manufacturability model.

[0118] That is to say, in order to train the DFM model, the present embodiment can select a group of original design graphic samples for testing, and then generate corresponding optical feature image set samples and predicted resist graphic samples. The first step in the training process is to generate optical feature image set samples corresponding to the original design graphic samples using a preset optical feature formula; the second step is to run the OPC configuration process on these original design graphic samples using an OPC formula to generate post-OPC data, wherein the above-mentioned OPC formula may refer to a series of software calculation operation instructions preset to convert the original design graphic into a mask pattern; the third step is to apply the OPC model to the post-OPC data to generate corresponding actual resist graphic samples; the fourth step is to generate an appropriate weight matrix for model training. The weight matrix is ​​used to control the relative importance of different areas in the chemical image, and relatively large weights are usually set for the edge band area of ​​the contour, the high curvature contour area (such as the line end area), etc.; the fifth step is to train and verify the neural network model. The model training operation in the embodiment of the present application can ensure the detection accuracy of the manufacturability design model.

[0119] Embodiment 4:

[0120] Fig.12 Schematic diagram of the structure of a photolithography hotspot detection device provided in an embodiment of the present application. The device of this embodiment can be in the form of software and / or hardware. Fig.12As shown, the photolithography hotspot detection device provided in this embodiment includes: an acquisition generation module 51, an input and output module 52 and an identification and determination module 53, wherein:

[0121] The acquisition generation module 51 is used to acquire the original design pattern of the production target chip and generate an optical characteristic image set corresponding to the original design pattern; the optical characteristic image set includes at least one optical characteristic image.

[0122] The input-output module 52 is used to input all the optical characteristic images into the pre-trained design for manufacturability model, so that the design for manufacturability model makes predictions based on all the optical characteristic images and outputs predicted resist patterns.

[0123] The identification and determination module 53 is used to identify the resist profile contained in the predicted resist pattern and determine the photolithography hotspot on the resist profile.

[0124] In a possible implementation, the acquisition generation module 51 is further used for:

[0125] Determine the light transfer function of the original design graphic.

[0126] According to the light transmission function of the original design graphic and the preset optical characteristic formula, an optical characteristic image set is generated. The preset optical characteristic formula is:

[0127]

[0128] Among them, S i (x, y, z = z0; f = f0) is the i-th optical feature image in the optical feature image set, x and y are the coordinates of the resist in the exposure field on the wafer, φ i (x, y, z = z0; f = f0) is the eigenfunction of the transmission cross coefficient matrix when the exposure focal plane is set to f = f0 and the resist depth is set to z = z0, represents the convolution operation, and D is the light transfer function of the original design graphic.

[0129] In a possible implementation, the identification and determination module 53 is further configured to:

[0130] Find locations on the resist profile that meet lithography manufacturability rules and identify the locations as lithography hotspots.

[0131] In a possible implementation, the photolithography hotspot detection device is further used for:

[0132] A data set is obtained, the data set comprising a training subset, a validation subset and a test subset, wherein each subset in the data set comprises an optical feature image set sample and an actual resist pattern sample corresponding to the optical feature image set sample.

[0133] Generate an initial weight matrix, wherein each weight in the initial weight matrix is ​​used to reflect the importance of different feature regions in the predicted resist pattern sample.

[0134] The manufacturability design model is trained according to the data set and the initial weight matrix to obtain a trained manufacturability design model.

[0135] In one possible implementation, the manufacturability design model is a neural network model; wherein the neural network model includes a deep convolutional neural network.

[0136] In a possible implementation, the predicted resist pattern is a chemical image, a scanning electron microscope image, or a three-dimensional structure image.

[0137] When the resist pattern is predicted to be a chemical image, the identification and determination module 53 is further used to:

[0138] The predicted resist pattern is sheared according to a preset threshold to obtain a resist contour.

[0139] The lithography hotspot detection device provided in this embodiment can be used to execute the lithography hotspot detection method provided in any of the above method embodiments. Its implementation principle and technical effects are similar and will not be elaborated here.

[0140] It should be noted that the user information and data involved in this application (including but not limited to data used for analysis, stored data, displayed data, etc.) are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant laws, regulations and standards of relevant countries and regions, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0141] That is to say, in the technical solution of this application, the collection, storage, use, processing, transmission, provision and disclosure of user personal information involved are in compliance with the relevant laws and regulations and do not violate public order and good morals.

[0142] According to an embodiment of the present application, the present application also provides an electronic device and a readable storage medium.

[0143] Fig.13 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. The electronic device includes a receiver 60, a transmitter 61, at least one processor 62 and a memory 63. The electronic device composed of the above components can be used to implement the above-mentioned several specific embodiments of the present application, which will not be described in detail here.

[0144] The embodiment of the present application further provides a computer-readable storage medium, in which computer-executable instructions are stored. When a processor executes the computer-executable instructions, each step of the method in the above embodiment is implemented.

[0145] An embodiment of the present application also provides a computer program product, including a computer program, which implements each step of the method in the above embodiment when executed by a processor.

[0146] Various embodiments of the systems and techniques described above in the present application can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include: being implemented in one or more computer programs, which can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor, which can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0147] The program code for implementing the method of the present application can be written in any combination of one or more programming languages. These program codes can be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that the program code, when executed by the processor or controller, enables the functions / operations specified in the flow chart and / or block diagram to be implemented. The program code can be executed entirely on the machine, partially on the machine, partially on the machine as a stand-alone software package and partially on a remote machine, or entirely on a remote machine or electronic device.

[0148] In the context of the present application, a computer-readable storage medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device, or equipment. A computer-readable storage medium may be a machine-readable signal medium or a machine-readable storage medium. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, or equipment, or any suitable combination of the foregoing. A more specific example of a computer-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0149] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the computer. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).

[0150] The systems and techniques described herein can be implemented in a computing system that includes back-end components (e.g., as a data electronic device), or a computing system that includes middleware components (e.g., an application electronic device), or a computing system that includes front-end components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such back-end components, middleware components, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), and the Internet.

[0151] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps disclosed in this application can be performed in parallel, sequentially or in different orders, as long as the desired results of the technical solution disclosed in this application can be achieved, and this document does not limit this.

[0152] The above specific implementations do not constitute a limitation on the protection scope of this application. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the principles of this application should be included in the protection scope of this application.

Claims

1. A photolithography hotspot detection method, characterized in that: include: Acquire an original design graphic of a production target chip, and generate an optical characteristic image set corresponding to the original design graphic; the optical characteristic image set includes at least one optical characteristic image; Inputting all the optical characteristic images into a pre-trained design for manufacturability model, so that the design for manufacturability model makes predictions based on all the optical characteristic images and outputs predicted resist patterns; A resist profile included in the predicted resist pattern is identified, and a lithography hotspot on the resist profile is determined.

2. The method according to claim 1, characterized in that The step of generating an optical feature image set corresponding to the original design pattern comprises: Determining the light transfer function of the original design pattern; The optical characteristic image set is generated according to the light transfer function of the original design pattern and a preset optical characteristic formula; wherein the preset optical characteristic formula is: Among them, S i (x, y, z = z0; f = f0) is the i-th optical feature image in the optical feature image set, x and y are the coordinates of the resist in the exposure field on the wafer, φ i (x, y, z = z0; f = f0) is the eigenfunction of the transmission cross coefficient matrix when the exposure focal plane is set to f = f0 and the resist depth is set to z = z0, represents a convolution operation, and D is the light transfer function of the original design graphic.

3. The method according to claim 1, characterized in that The determining of the lithography hotspot on the resist profile comprises: A position on the resist profile that meets the lithography manufacturability rule is found and the position is determined as a lithography hotspot.

4. The method according to claim 1, characterized in that: Also includes: Acquire a data set, the data set comprising a training subset, a validation subset and a test subset; wherein each subset in the data set comprises an optical feature image set sample and an actual resist pattern sample corresponding to the optical feature image set sample; Generate an initial weight matrix; wherein each weight in the initial weight matrix is ​​used to reflect the importance of different feature areas in the predicted resist pattern sample; The design for manufacturability model is trained according to the data set and the initial weight matrix to obtain a trained design for manufacturability model.

5. The method according to claim 1, characterized in that The manufacturability design model is a neural network model; wherein the neural network model includes a deep convolutional neural network.

6. The method according to claim 1, characterized in that The predicted resist pattern is a chemical image, a scanning electron microscope image or a three-dimensional structure image.

7. The method according to claim 6, characterized in that When the predicted resist pattern is a chemical image, the identifying the resist profile contained in the predicted resist pattern comprises: The predicted resist pattern is sheared according to a preset threshold value to obtain a resist contour.

8. A photolithography hotspot detection device, characterized in that: include: An acquisition generation module is used to acquire an original design graphic of a production target chip and generate an optical characteristic image set corresponding to the original design graphic; the optical characteristic image set includes at least one optical characteristic image; An input-output module, used for inputting all the optical characteristic images into a pre-trained design for manufacturability model, so that the design for manufacturability model makes predictions based on all the optical characteristic images and outputs predicted resist patterns; The identification and determination module is used to identify the resist profile contained in the predicted resist pattern and determine the photolithography hotspot on the resist profile.

9. An electronic device, characterized in that: include: at least one processor and memory; The memory stores computer-executable instructions; The at least one processor executes the computer-executable instructions stored in the memory, so that the at least one processor executes the lithography hotspot detection method according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer-executable instructions, and when the computer-executable instructions are executed by a processor, they are used to implement the photolithography hotspot detection method according to any one of claims 1 to 7.

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