Preparation method of high-contrast wafer-level step standard sheet

Abstract

The invention relates to a preparation method of a high-contrast wafer-level step height standard sheet, and the method comprises the following steps: S1, sequentially depositing a silicon dioxide film layer and a silicon film layer on a first structure through employing a coating technology, and obtaining a second structure; s2, carrying out preset pattern definition on the second structure obtained in the step S1 through photoetching, and carrying out dry etching on a sample with a defined pattern until the uppermost silicon film layer is etched and the silicon dioxide film layer is exposed to obtain a third structure; and S3, depositing a silicon dioxide protective film layer on the surface of the third structure obtained in the step S2 by adopting a coating technology to obtain the high-contrast wafer-level step standard sheet. By adopting the preparation method of the high-contrast wafer-level step standard sheet, the problem of low contrast of a step standard object is effectively solved, and the high-contrast wafer-level step standard sheet has relatively high step uniformity and stability, does not have metal element pollution, and can be widely applied to automatic detection of micro-nano detection equipment.

Description

Technical Field

[0001] The invention relates to the technical field of standard material preparation, and in particular to a method for preparing a high-contrast wafer-level step standard film. Background Art

[0002] As the integrated circuit industry continues to advance towards more advanced manufacturing, the requirements for the accuracy and stability of micro-nano detection equipment serving integrated circuits continue to rise. In order to meet this demand, the importance of wafer-level step standards as the core component of height measurement transfer is becoming increasingly prominent. This standard not only simplifies the process of detection, calibration and measurement transfer by accurately defining the structure on the wafer, but is also highly compatible with the integrated circuit production line, thereby ensuring the measurement accuracy, uniformity and consistency of the entire production line.

[0003] For integrated circuit micro-nano inspection equipment, the wafer-level step standard needs to have a good contrast of the standard on-chip identification mark to achieve high-contrast image acquisition of the inspection equipment and obtain accurate and efficient identification and positioning. This greatly simplifies the difficulty of automatic calibration of micro-nano inspection equipment, realizes fast and efficient batch automatic calibration of micro-nano inspection equipment, and can avoid errors introduced by human operation at the same time.

[0004] In the prior art, most step standard materials are formed by processing a silicon dioxide film layer on a substrate to form a step structure. Since it does not specifically serve the integrated circuit industry, it is difficult to take into account the contrast of the graphics, especially when the step height is smaller, the graphic contrast is worse, which is more difficult for micro-nano detection equipment to identify. The existing industry solution is usually to perform metal coating on the surface of the silicon dioxide film layer, but in the integrated circuit manufacturing process, any tiny metal contamination may have a serious impact on product quality. Therefore, the use of metal components is usually strictly avoided during the design and manufacturing process to ensure the purity and reliability of the product.

[0005] In addition, the wafer-level step standard also needs to have a high degree of stability and uniformity to ensure that it plays a stable and continuous benchmark role in the value transfer and calibration of micro-nano detection equipment, and to ensure the effectiveness and accuracy of the value transfer. In summary, in order to serve the automated calibration of wafer-level detection equipment, it is crucial to develop a wafer-level step standard with high contrast for the detection efficiency and production environment of integrated circuit production lines. Summary of the invention

[0006] The purpose of the present invention is to provide a method for preparing a high-contrast wafer-level step standard film, which effectively solves the problem that micro-nano detection equipment is difficult to achieve automatic calibration, while avoiding metal element contamination, filling the gap in high-contrast wafer-level step standard films.

[0007] To achieve the above object, the present invention provides a method for preparing a high-contrast wafer-level step standard sheet, comprising the following steps:

[0008] S1, using a coating technology to sequentially deposit a silicon dioxide film layer and a silicon film layer on the first structure to obtain a second structure;

[0009] S2, defining a preset pattern on the second structure obtained in step S1 by photolithography, and dry-etching the sample with the defined pattern until the top silicon film layer is etched to expose the silicon dioxide film layer, thereby obtaining a third structure;

[0010] S3. Depositing a silicon dioxide protective film layer on the surface of the third structure obtained in step S2 by using a coating technology to obtain a high-contrast wafer-level step standard film.

[0011] Preferably, in step S1, the coating technology is one of physical vapor deposition, chemical vapor deposition, atomic layer deposition and thermal oxidation.

[0012] Preferably, in step S1, the first structure is a silicon wafer substrate material, and the silicon wafer substrate material is sequentially single-sided polished, cleaned and dried to obtain the first structure.

[0013] Preferably, in step S1, the thickness of the silicon film layer is consistent with the nominal height of the preset step.

[0014] Preferably, in step S2, the step of defining a preset pattern of the second structure by photolithography comprises the following steps:

[0015] S21, coating a layer of photoresist on the second structure by spin coating and baking;

[0016] S22, exposing the preset pattern by photolithography, developing the exposed second structure in a developer, defining the preset pattern on the first structure by photoresist, and obtaining a photoresist mask.

[0017] Preferably, in step S2, the dry etching of the sample with the defined pattern comprises the following steps:

[0018] S23, etching the area not covered by the photoresist mask by dry etching, completely etching the uppermost silicon film layer of the first structure to expose the silicon dioxide film layer;

[0019] S24, using a dry cleaning technique to clean the photoresist remaining on the surface of the first structure after etching;

[0020] S25, further cleaning is performed using a wet cleaning technique to obtain a third structure.

[0021] Preferably, in step S24, the dry cleaning technology is a plasma stripping technology.

[0022] Preferably, in step S25, the wet cleaning technology is to use an acidic cleaning solution and deionized water for multiple rinses.

[0023] Preferably, in step S3, the thickness of the silicon dioxide protective film layer is 5 to 10 nm.

[0024] Therefore, the present invention adopts the above-mentioned method for preparing a high-contrast wafer-level step standard sheet, and the beneficial effects are as follows:

[0025] (1) The preparation method of the present invention can be widely used in the calibration of micro-nano detection equipment in the integrated circuit industry by preparing a standard step structure on a silicon wafer;

[0026] (2) The preparation method of the present invention forms a specific film structure of silicon-silicon dioxide-silicon by depositing multiple film layers. By utilizing the different optical reflection physical properties of silicon and silicon dioxide, a high contrast of the marking pattern can be obtained manually or by microscope, which is helpful for the detection equipment to perform mark recognition and positioning, and perform subsequent automatic calibration;

[0027] (3) The present invention can obtain wafer-level step standard sheets of different heights by adjusting the thickness of the silicon film layer above the silicon dioxide film layer and converting the thickness of the silicon film layer into step height during dry etching;

[0028] (4) The present invention can adjust the dry etching parameters so that the silicon dioxide film layer acts as an etching cut-off layer, which helps to improve the uniformity of etching, thereby obtaining a wafer-level step standard sheet with high uniformity and high stability;

[0029] (5) The entire preparation process of the present invention and the final wafer-level step standard sheet do not contain any metal elements, so it can be ensured that no metal elements are introduced when used for calibration of contact detection equipment, thereby avoiding metal contamination of the integrated circuit production line. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 It is a schematic flow chart of an embodiment of a method for preparing a high-contrast wafer-level step standard sheet of the present invention;

[0031] Figure 2 It is a structural schematic diagram of a first structure in an embodiment of a method for preparing a high-contrast wafer-level step standard sheet of the present invention;

[0032] Figure 3 It is a structural schematic diagram of the second structure in an embodiment of a method for preparing a high-contrast wafer-level step standard sheet of the present invention;

[0033] Figure 4It is a schematic structural diagram of a method for preparing a high-contrast wafer-level step standard sheet according to an embodiment of the present invention after spin coating of photoresist and baking;

[0034] Figure 5 It is a schematic diagram of the structure after exposure and development in an embodiment of a method for preparing a high-contrast wafer-level step standard sheet of the present invention;

[0035] Figure 6 It is a schematic diagram of the structure after dry etching in an embodiment of a method for preparing a high-contrast wafer-level step standard sheet of the present invention;

[0036] Figure 7 It is a structural schematic diagram of the third structure in an embodiment of a method for preparing a high-contrast wafer-level step standard sheet of the present invention;

[0037] Figure 8 It is a schematic diagram of the structure after a silicon dioxide protective film layer is deposited in an embodiment of a method for preparing a high-contrast wafer-level step standard sheet of the present invention;

[0038] Fig. 9 It is a schematic diagram of the final effect of a wafer-level step standard sheet in an embodiment of a method for preparing a high-contrast wafer-level step standard sheet of the present invention.

[0039] Reference numerals

[0040] 1. Silicon wafer substrate material; 2. Silicon dioxide film layer; 3. Silicon film layer; 4. Photoresist; 5. Photoresist mask; 6. Silicon film etching layer; 7. Silicon dioxide protective film layer. DETAILED DESCRIPTION

[0041] The technical solution of the present invention is further described below through the accompanying drawings and embodiments.

[0042] Unless otherwise defined, technical or scientific terms used in the present invention shall have the common meanings understood by one having ordinary skills in the field to which the present invention belongs.

[0043] Embodiment 1

[0044] like Figure 1 As shown, a method for preparing a high-contrast wafer-level step standard sheet includes the following steps:

[0045] S1. A silicon wafer substrate material 1 is single-sided polished, cleaned and dried to obtain a first structure. A silicon dioxide film layer 2 is deposited on the first structure by a coating technology. Then, a silicon film layer 3 is deposited on the silicon dioxide film layer 2 to obtain a second structure.

[0046] S2, presetting the pattern definition of the second structure by photolithography, and dry etching the sample with the defined pattern until the top silicon film layer 3 is etched to obtain the silicon film etching layer 6, exposing the silicon dioxide film layer 2, and obtaining the third structure. The specific steps are as follows:

[0047] S21, coating a layer of photoresist 4 on the second structure by spin coating and baking.

[0048] S22 , exposing the preset pattern by photolithography, developing the exposed second structure in a developer, defining the preset pattern on the first structure by photoresist 4 , and obtaining a photoresist mask 5 .

[0049] S23 , etching the area not covered by the photoresist mask 5 by dry etching, completely etching the uppermost silicon film layer 3 of the first structure to obtain a silicon film etching layer 6 , exposing the silicon dioxide film layer 2 .

[0050] S24, using dry cleaning technology to clean the photoresist 4 remaining on the surface of the first structure after etching.

[0051] S25, further cleaning is performed using a wet cleaning technique to obtain a third structure.

[0052] S3. Deposit a silicon dioxide protective film layer 7 with a thickness of 5 to 10 nm on the surface of the third structure as a protective structure to avoid oxidation, thereby obtaining a high-contrast wafer-level step standard film.

[0053] In this embodiment, the above method is described by taking a method for preparing an 8-inch 100nm-height wafer-level step calibration sheet as an example.

[0054] like Figure 2 As shown, an 8-inch single-sided polished silicon wafer substrate material 1 can be selected, and the silicon wafer substrate material 1 is cleaned and dried to obtain a first structure. During cleaning, an acidic cleaning solution or an alkaline cleaning solution can be selected to remove particles and impurities on the surface of the silicon wafer substrate material 1, providing a good foundation for subsequent preparation steps.

[0055] like Figure 3 As shown, a silicon dioxide film layer 2 of a certain thickness is first deposited on the first structure, and then a silicon film layer 3 of a certain thickness is continuously deposited. In this embodiment, the coating method adopts physical vapor deposition, specifically electron beam evaporation coating, to achieve film deposition and obtain a uniform and dense film layer. The thickness of the silicon dioxide film layer 2 is 97nm, and the thickness of the silicon film layer 3 can be 100nm. Under this film layer parameter, the different optical reflection physical properties of silicon and silicon dioxide can be used to obtain a high contrast of the marking pattern on the wafer-level step standard sheet.

[0056] like Figure 4As shown, in this embodiment, a photoresist 4 is spin-coated on the second structure. Specifically, the photoresist 4 is made of PMMA and baked for 10 minutes. The thickness of the photoresist 4 is 300 nm.

[0057] like Figure 5 As shown, in this embodiment, the electron beam lithography technology is used to place the second structure on which the photoresist 4 is spin-coated in the electron beam lithography equipment, and the preset step pattern and the mark pattern are exposed; after the exposure is completed, the second structure is developed using a mixed solution of MIBK and IPA as a developer, and fixed using an IPA solution, and the morphology of the photoresist 4 with a preset pattern is successfully obtained as a photoresist mask 5.

[0058] like Figure 6 As shown, in this embodiment, the above sample is placed in a dry etcher for etching, and the area not covered by the photoresist mask 5 is etched using a fluorine-containing gas using a photoresist mask 5; by adjusting the etching parameters, the upper 100nm silicon film layer 3 of the area not covered by the photoresist mask 5 is completely etched until the silicon dioxide film layer 2 below is exposed, thereby obtaining a silicon film etching layer 6. Since the etching rates of the silicon film layer 3 and the silicon dioxide film layer 2 in dry etching are different, by adjusting the etching parameters, the silicon dioxide film layer 2 can be etched at a lower rate, so that it acts as an etching barrier layer, thereby obtaining a more uniform step structure.

[0059] like Figure 7 As shown, in this embodiment, the etched sample is placed in a plasma stripping device, and oxygen is used to react with the photoresist 4 to cause an ashing reaction, so that all the residual photoresist 4 on the sample is removed.

[0060] The sample after removing the photoresist 4 is placed in an acidic cleaning solution for cleaning to further remove particulate impurities and organic residues on the sample. The sample is then rinsed with deionized water and dried with nitrogen to obtain a third structure.

[0061] like Figure 8 As shown, in this embodiment, a physical vapor deposition coating technology is adopted, specifically an electron beam evaporation coating preparation method is adopted, and a 10nm silicon dioxide protective film layer 7 is deposited on the third structure to protect the entire wafer-level step standard film, thereby preventing the upper silicon film etching layer 6 from being exposed to the air for a long time and oxidizing, thereby avoiding uncontrollable changes in the step height and improving the height stability of the wafer-level step standard film.

[0062] Finally, a wafer-level step standard sheet with a step structure is prepared. Fig. 9 At the same time, in the preparation process of the entire wafer-level step standard sheet, no metal materials are involved, so the elemental contamination of metal elements on the standard sheet, micro-nano detection equipment and integrated circuit production lines can be avoided.

[0063] Therefore, the present invention adopts the above-mentioned method for preparing a high-contrast wafer-level step standard film, which effectively solves the problem that micro-nano detection equipment is difficult to achieve automatic calibration, while avoiding metal element contamination, filling the gap in high-contrast wafer-level step standard films.

[0064] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that they can still modify or replace the technical solution of the present invention with equivalents, and these modifications or equivalent replacements cannot cause the modified technical solution to deviate from the spirit and scope of the technical solution of the present invention.

Claims

1. A method for preparing a high-contrast wafer-level step standard film, characterized in that: The following steps are involved: S1, using a coating technology to sequentially deposit a silicon dioxide film layer and a silicon film layer on the first structure to obtain a second structure; S2, defining a preset pattern on the second structure obtained in step S1 by photolithography, and dry-etching the sample with the defined pattern until the top silicon film layer is etched to expose the silicon dioxide film layer, thereby obtaining a third structure; S3. Depositing a silicon dioxide protective film layer on the surface of the third structure obtained in step S2 by using a coating technology to obtain a high-contrast wafer-level step standard film.

2. The method for preparing a high-contrast wafer-level step standard sheet according to claim 1, characterized in that: In step S1, the coating technology is one of physical vapor deposition, chemical vapor deposition, atomic layer deposition and thermal oxidation.

3. The method for preparing a high-contrast wafer-level step standard sheet according to claim 1, characterized in that: In step S1, the first structure is a silicon wafer substrate material, and the silicon wafer substrate material is sequentially single-sided polished, cleaned and dried to obtain the first structure.

4. The method for preparing a high-contrast wafer-level step standard sheet according to claim 1, characterized in that: In step S1, the thickness of the silicon film layer is consistent with the nominal height of the preset step.

5. The method for preparing a high-contrast wafer-level step standard sheet according to claim 1, characterized in that: In step S2, the second structure is defined by photolithography, including the following steps: S21, coating a layer of photoresist on the second structure by spin coating and baking; S22, exposing the preset pattern by photolithography, developing the exposed second structure in a developer, defining the preset pattern on the first structure by photoresist, and obtaining a photoresist mask.

6. The method for preparing a high-contrast wafer-level step standard according to claim 1, characterized in that: In step S2, the dry etching of the sample with the defined pattern comprises the following steps: S23, etching the area not covered by the photoresist mask by dry etching, completely etching the uppermost silicon film layer of the first structure to expose the silicon dioxide film layer; S24, using a dry cleaning technique to clean the photoresist remaining on the surface of the first structure after etching; S25, further cleaning is performed using a wet cleaning technique to obtain a third structure.

7. The method for preparing a high-contrast wafer-level step standard sheet according to claim 6, characterized in that: In step S24, the dry cleaning technology is a plasma stripping technology.

8. The method for preparing a high-contrast wafer-level step standard sheet according to claim 6, characterized in that: In step S25, the wet cleaning technology is to use an acidic cleaning solution and deionized water for multiple rinses.

9. The method for preparing a high-contrast wafer-level step standard sheet according to claim 1, characterized in that: In step S3, the thickness of the silicon dioxide protective film layer is 5-10 nm.

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